shared/runtime/semihosting: Add RISC-V semihosting code. #15097
Merged
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This PR contains a full-featured RISC-V semihosting interface implementation.
Even though it targets RISC-V, the specifications say they follow Arm's semihosting call interface and thus this bit of code can be easily modified to also support Arm/Thumb and Aarch64. To keep breakages at a minimum to users of the Arm-specific semihosting code I chose to put this in a different file instead, plus there are no guarantees they
If needed I can make the necessary modifications to have one single RV32/RV64/Aarch32/Aarch64 semihosting implementation, although there are no guarantees they won't diverge in the future (the RISC-V specifications are at version 0.3, after all...)