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all: Fix ruff rules C4, PERF401, and PLC0206. #16776

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all: Fix ruff rules C4, PERF401, and PLC0206. #16776

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@cclauss cclauss commented Feb 18, 2025

Summary

% ruff check --select=C4,PERF401,PLC0206 --statistics

10	PERF401	[ ] manual-list-comprehension
 3	PLC0206	[ ] dict-index-missing-items
 2	C405   	[*] unnecessary-literal-set
 2	C417   	[*] unnecessary-map
 1	C401   	[*] unnecessary-generator-set
 1	C408   	[*] unnecessary-collection-call
[*] fixable with `ruff check --fix`

Each issue flags a minor inefficiency such as not using comprehensions or repeatedly calling list.append() instead of making a single call to .list.extend().

Testing

Run ruff locally and in pre-commit.

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@cclauss
all: Fix ruff rules C4, PERF401, and PLC0206.
89cb90a 
Signed-off-by: Christian Clauss <cclauss@me.com>
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codecov bot commented Feb 18, 2025

Codecov Report

All modified and coverable lines are covered by tests ✅

Project coverage is 98.53%. Comparing base (8987b39) to head (89cb90a).

Additional details and impacted files 
@@           Coverage Diff           @@
##           master   #16776   +/-   ##
=======================================
  Coverage   98.53%   98.53%           
=======================================
  Files         169      169           
  Lines       21822    21822           
=======================================
  Hits        21502    21502           
  Misses        320      320

☔ View full report in Codecov by Sentry.
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Code size report:

   bare-arm:    +0 +0.000% 
minimal x86:    +0 +0.000% 
   unix x64:    +0 +0.000% standard
      stm32:    +0 +0.000% PYBV10
     mimxrt:    +0 +0.000% TEENSY40
        rp2:    +0 +0.000% RPI_PICO_W
       samd:    +0 +0.000% ADAFRUIT_ITSYBITSY_M4_EXPRESS
  qemu rv32:    +0 +0.000% VIRT_RV32

@cclauss cclauss mentioned this pull request Feb 18, 2025
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@dpgeorge
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Is it possible to enable these checks on CI, so there's no regression?

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@cclauss @dpgeorge