micropython · martinribelotta · Oct 28, 2017
diff --git a/.gitmodules b/.gitmodules
@@ -15,3 +15,6 @@
 	path = lib/stm32lib
 	url = https://github.com/micropython/stm32lib
 	branch = work-F4-1.13.1+F7-1.5.0+L4-1.3.0
+[submodule "lib/lpc43xxlib"]
+	path = lib/lpc43xxlib
+	url = https://github.com/martinribelotta/lpc43xxlib.git
diff --git a/lib/lpc43xxlib b/lib/lpc43xxlib
diff --git a/ports/lpc/Makefile b/ports/lpc/Makefile
@@ -0,0 +1,114 @@
+include ../../py/mkenv.mk
+
+BOARD=lpc_board_ciaa_edu_4337
+
+MPY_CROSS=$(TOP)/mpy-cross/mpy-cross
+
+-include boards/$(BOARD)/board.mk
+
+# qstr definitions (must come before including py.mk)
+QSTR_DEFS = qstrdefsport.h
+
+# include py core make definitions
+include $(TOP)/py/py.mk
+
+CHIP_LIB=$(TOP)/lib/$(CHIP)lib
+
+CROSS_COMPILE = arm-none-eabi-
+
+INC += -I.
+INC += -I$(TOP)
+INC += -I$(BUILD)
+INC += -I$(TOP)/lib/cmsis/inc
+INC += -I$(CMSIS_DIR)/
+INC += -Iboards/$(BOARD)/inc
+INC += -I$(CHIP_LIB)/inc
+
+include $(CHIP_LIB)/chip.mk
+
+OPENOCD = openocd
+OPENOCD_CONFIG = boards/$(BOARD)/openocd.cfg
+DFU = dfu-util
+DFUHDR = $(TOP)/tools/dfuheader.py
+CFLAGS_CORTEX_M4 = -mthumb -mtune=cortex-m4 -mabi=aapcs -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant -Wdouble-promotion
+CFLAGS = $(INC) -Wall -Werror -std=gnu99 -nostdlib $(CFLAGS_CORTEX_M4) $(COPT)
+LDFLAGS = -nostdlib -Lboards/$(BOARD) -L$(CHIP_LIB)/lib -Tlinker.lds -Map=$@.map --cref --gc-sections
+
+# Tune for Debugging or Optimization
+ifeq ($(DEBUG), 1)
+CFLAGS += -O0 -ggdb
+else
+CFLAGS += -Os -DNDEBUG
+CFLAGS += -fdata-sections -ffunction-sections
+endif
+
+CFLAGS += $(BOARD_CFLAGS) $(CHIP_CFLAGS)
+
+LIBS = $(shell $(CROSS_COMPILE)gcc $(CFLAGS_CORTEX_M4)  --print-libgcc-file-name)
+
+SRC_LIBM = $(addprefix lib/libm/,\
+	math.c \
+	thumb_vfp_sqrtf.c \
+	acoshf.c \
+	asinfacosf.c \
+	asinhf.c \
+	atan2f.c \
+	atanf.c \
+	atanhf.c \
+	ef_rem_pio2.c \
+	erf_lgamma.c \
+	fmodf.c \
+	kf_cos.c \
+	kf_rem_pio2.c \
+	kf_sin.c \
+	kf_tan.c \
+	log1pf.c \
+	nearbyintf.c \
+	sf_cos.c \
+	sf_erf.c \
+	sf_frexp.c \
+	sf_ldexp.c \
+	sf_modf.c \
+	sf_sin.c \
+	sf_tan.c \
+	wf_lgamma.c \
+	wf_tgamma.c \
+	)
+
+SRC_C = \
+	main.c \
+	mphalport.c \
+	$(wildcard boards/$(BOARD)/src/*.c) \
+	$(CHIP_LIB_SRC_C) \
+	lib/utils/stdout_helpers.c \
+	lib/utils/pyexec.c \
+	lib/libc/string0.c \
+	lib/mp-readline/readline.c \
+	$(SRC_LIBM)
+
+OBJ = $(PY_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
+
+all: $(BUILD)/firmware.bin
+
+$(BUILD)/firmware.elf: $(OBJ)
+	$(ECHO) "LINK $@"
+	$(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS)
+	$(Q)$(SIZE) $@
+
+$(BUILD)/firmware.bin: $(BUILD)/firmware.elf
+	$(ECHO) "Create $@"
+	$(Q)$(OBJCOPY) -O binary -j .isr_vector -j .text -j .data $^ $(BUILD)/firmware.bin
+
+$(BUILD)/firmware.dfu: $(BUILD)/firmware.bin
+	$(ECHO) "Create $@"
+	$(Q)$(DFUHDR) $^ $@
+
+deploy-dfu: $(BUILD)/firmware.dfu
+	$(ECHO) "Writing $< to the board via DFU"
+	$(Q)$(DFU) -R -D $^
+
+deploy-openocd: $(BUILD)/firmware.bin
+	$(ECHO) "Writing $< to the board via OpenOCD"
+	$(Q)$(OPENOCD) -f $(OPENOCD_CONFIG) -c "lpc_flash $<"
+
+include $(TOP)/py/mkrules.mk
diff --git a/ports/lpc/board.h b/ports/lpc/board.h
@@ -0,0 +1,20 @@
+#ifndef _LPC_BOARD_H_
+#define _LPC_BOARD_H_
+
+#include <chip.h>
+
+#define CONSOLE_UART LPC_USART2
+#define BOARD_CIAA_EDU_NXP_4337
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void Board_SystemInit(void);
+void Board_Init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LPC_BOARD_H_ */
diff --git a/ports/lpc/boards/lpc_board_ciaa_edu_4337/README b/ports/lpc/boards/lpc_board_ciaa_edu_4337/README
@@ -0,0 +1,3 @@
+LPCOpen v3.01
+
+Release Date: 03/24/2017
diff --git a/ports/lpc/boards/lpc_board_ciaa_edu_4337/board.mk b/ports/lpc/boards/lpc_board_ciaa_edu_4337/board.mk
@@ -0,0 +1,2 @@
+CHIP=lpc43xx
+BOARD_CFLAGS=-D__USE_LPCOPEN
diff --git a/ports/lpc/boards/lpc_board_ciaa_edu_4337/inc/mpconfigboard.h b/ports/lpc/boards/lpc_board_ciaa_edu_4337/inc/mpconfigboard.h
@@ -0,0 +1,2 @@
+#define MICROPY_HW_BOARD_NAME       "EDU-CIAA"
+#define MICROPY_HW_MCU_NAME         "LPC4337"
diff --git a/ports/lpc/boards/lpc_board_ciaa_edu_4337/memory.lds b/ports/lpc/boards/lpc_board_ciaa_edu_4337/memory.lds
@@ -0,0 +1,14 @@
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx) : ORIGIN = 0x1a000000, LENGTH = 512K
+    RAM (xrw) : ORIGIN = 0x10000000, LENGTH = 32k
+
+    FLASHB (rx) : ORIGIN = 0x1b000000, LENGTH = 512K
+    RAMB (rwx) : ORIGIN = 0x10080000, LENGTH = 32K
+    RAMC (rwx) : ORIGIN = 0x10088000, LENGTH = 8K
+    RAMD (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+}
+
+_py_heap_start = ORIGIN(RAMD);
+_py_heap_end = ORIGIN(RAMD) + LENGTH(RAMD);
diff --git a/ports/lpc/boards/lpc_board_ciaa_edu_4337/openocd.cfg b/ports/lpc/boards/lpc_board_ciaa_edu_4337/openocd.cfg
@@ -0,0 +1,79 @@
+###############################################################################
+#
+# Copyright 2014, Juan Cecconi (UTN-FRBA, Numetron)
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+#    this list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright notice,
+#    this list of conditions and the following disclaimer in the documentation
+#    and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its
+#    contributors may be used to endorse or promote products derived from this
+#    software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+###############################################################################
+
+interface ftdi
+
+ftdi_vid_pid 0x0403 0x6010
+ftdi_channel 0
+ftdi_layout_init 0x0708 0xFFFB
+ftdi_layout_signal nTRST -data 0x0100
+ftdi_layout_signal nSRST -data 0x0200
+
+transport select jtag
+adapter_khz 2000
+
+set _CHIPNAME lpc4337
+
+set _M4_JTAG_TAPID 0x4ba00477
+set _M0_JTAG_TAPID 0x0ba01477
+
+jtag newtap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M4_JTAG_TAPID
+jtag newtap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M0_JTAG_TAPID
+
+target create $_CHIPNAME.m4 cortex_m -chain-position $_CHIPNAME.m4
+target create $_CHIPNAME.m0 cortex_m -chain-position $_CHIPNAME.m0
+
+set _WORKAREASIZE 0x8000
+$_CHIPNAME.m4 configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME lpc2000 0x1a000000 0x80000 0 0 $_CHIPNAME.m4 lpc4300 96000 calc_checksum
+
+reset_config none
+cortex_m reset_config vectreset
+
+targets $_CHIPNAME.m4
+
+$_CHIPNAME.m4 configure -event gdb-attach {
+   echo "Reset Halt, due to gdb attached...!"
+   reset halt
+}
+
+init
+
+proc lpc_flash { BIN } {
+    init
+    halt 0
+    flash write_image erase unlock $BIN 0x1a000000 bin
+    reset run
+    shutdown
+}
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1,2 @@
		#define MICROPY_HW_BOARD_NAME "EDU-CIAA"
		#define MICROPY_HW_MCU_NAME "LPC4337"