-
-
Notifications
You must be signed in to change notification settings - Fork 10.8k
ENH: Implement essential intrinsics required by the upcoming SIMD optimizations(0) #22306
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
ENH: Implement essential intrinsics required by the upcoming SIMD optimizations(0) #22306
Conversation
max/min that reverse IEC 60559's NaN beahvior(propagates NaNs) for float data types npyv_maxn_##SFX npyv_minn_##SFX max/min reduction for all float and integer vector data types npyv_reduce_max_##SFX npyv_reduce_min_##SFX max/min reduction supports IEC 60559 for float data types npyv_reduce_maxp_##SFX npyv_reduce_minp_##SFX max/min reduction reverse IEC 60559's NaN beahvior(propagates NaNs) for float data types npyv_reduce_maxn_##SFX npyv_reduce_minn_##SFX also, this patch implements new intrinsics to extract the first vector lane: npyv_extract0_##SFX npyv_extract0_##SFX
57e0148
to
e3ad145
Compare
npyv_any_##SFX: returns true if any of the elements is not equal to zero npyv_all_##SFX: returns true if all elements are not equal to zero
e3ad145
to
6ef4c8b
Compare
cc @mattip |
The errors are unrelated, they are on account of log length limitations on travis. I made a conservative fix for that before, looks like it needs to be more drastic. |
close/reopen |
continue | ||
_min = self.min(vdata_a, vdata_b) | ||
assert _min == data_min | ||
chk_nan = {"xp": 1, "np": 1, "nn": 2, "xn": 2}.get(intrin[-2:], 0) |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Would probably be clearer as part of the parametrize but doesn't matter. I am mostly curious what min
/max
implement for float values? Does the result depend on the order?
In any case, looked at the code and does look good to me (not that I am very fluid at simd). Not sure if the tests cover all the permutations they could for reductions, but I also trust our integration tests for that.
@mattip will you have another quick look?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I am mostly curious what min/max implement for float values? Does the result depend on the order?
no, it doesn't, just check the tail of the intrinsic name to determine the NaN behavior.
Not sure if the tests cover all the permutations they could for reductions
I'm positive about it.
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I'm working on refactoring the whole testing unit starting from _simd
module to count more on parametrizing rather than inheritance.
see the new numpy/core/tests/test_simd.py part of #21057
Thanks @seiko2plus |
This pullrequest adds:
intrinsics to check true cross all vector lanes
npyv_any_##SFX: returns true if any of the elements is not equal to zero
npyv_all_##SFX: returns true if all elements are not equal to zero
max/min that reverse IEC 60559's NaN behavior(propagates NaNs) for float data types
npyv_maxn_##SFX
npyv_minn_##SFX
max/min reduction for all float and integer vector data types
npyv_reduce_max_##SFX
npyv_reduce_min_##SFX
max/min reduction supports IEC 60559 for float data types
npyv_reduce_maxp_##SFX
npyv_reduce_minp_##SFX
max/min reduction reverse IEC 60559's NaN behavior(propagates NaNs) for float data types
npyv_reduce_maxn_##SFX
npyv_reduce_minn_##SFX
intrinsics to extract the first vector lane:
npyv_extract0_##SFX
npyv_extract0_##SFX
And removes: