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I/O system updates #536

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Merged
merged 2 commits into from
Feb 9, 2021
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murrayrm
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@murrayrm murrayrm commented Feb 7, 2021

Addresses issue #530:

  • Automatic summation and splitting for implicit signal connections fixed.
  • The inplist and outlist can how be omitted if you are using automatic signal names by using inputs and outputs to list signal names that appear in the list of subsystems to be connected.
  • For easier readability, input and output can be used in place of inputs and outputs.

Combined, these changes allow the following simplified commands for interconnecting systems via signal names:

    P = ct.tf2io(ct.tf(1, [1, 0]), input='u', output='y')
    C = ct.tf2io(ct.tf(10, [1, 1]), input='e', output='u')
    sumblk = ct.summing_junction(inputs=['r', '-y'], output='e')
    T = ct.interconnect((P, C, sumblk), input='r', output='y')

@murrayrm murrayrm linked an issue Feb 7, 2021 that may be closed by this pull request
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Coverage Status

Coverage increased (+0.03%) to 87.743% when pulling 2538a06 on murrayrm:iosys_updates into d75c395 on python-control:master.

super(NonlinearIOSystem, self).__init__(
inputs=inputs, outputs=outputs, states=states,
params=params, dt=dt, name=name
)

# Make sure all input arguments got parsed
if kwargs:
raise TypeError("unknown parameters %s" % kwargs)
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🤙

@sawyerbfuller sawyerbfuller merged commit 2c132c9 into python-control:master Feb 9, 2021
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After merging the master branch is now failing tests - perhaps a conflict with the new describing functions system.

I'm not quite able to tell what is going on. In descfcn_test.py I tried changing instantiations of ct.NonlinearIOSystem(None, ... , input=1, output=1) and similar, replacing input with inputs. But when I run pytest locally, another error appears in _process_time_response() @murrayrm any ideas?

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Looks like something went wrong in the merge. I'll have a look tonight.

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Just a quick update: I've put the new auto-summing and auto-splitting, and general interconnect features to use. I've used them to make quite complex feedback systems with any topology I want. In particular, I was able to create software in a few tens of lines of codes that allows me to perform a root locus gain selection -- and plot the step response in SISOTOOL -- for all three gains in a PID controller independently. This entailed an interconnection of about ten subsystems.

@murrayrm murrayrm added this to the 0.9.0 milestone Mar 20, 2021
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new iosys.interconnect is great, but...
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