[WIP]port sevearl test files under test/distributed to Intel GPU #159473
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🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/159473
Note: Links to docs will display an error until the docs builds have been completed. ❌ 1 New FailureAs of commit daf3833 with merge base 512b473 ( NEW FAILURE - The following job has failed:
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@pytorchbot label "ciflow/xpu" |
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❌ 🤖 pytorchbot command failed: Try |
…aisyden/distributed_s2
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@pytorchbot label "module: xpu" |
…evice arg is None. Revised the _initialized checking in test_store.py and test_c10d_common.py
…aisyden/distributed_s2
…issue when world size is 4
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@pytorchbot rebase |
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Didn't find following labels among repository labels: rebase |
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For #114850, we will port distributed tests to Intel GPU. This PR will work on some test files under test/distributed. We could enable Intel GPU with following methods and try the best to keep the original code styles:
Added xpu for Backend.backend_capability and dist.Backend.register_backend()
cc @H-Huang @awgu @wanchaol @fegin @fduwjj @wz337 @wconstab @d4l3k @pragupta @gujinghui @EikanWang @fengyuan14 @guangyey