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Add missing interrupts for USART #360

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Merged
merged 1 commit into from
Mar 29, 2020
Merged

Add missing interrupts for USART #360

merged 1 commit into from
Mar 29, 2020

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aurabindo
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Signed-off-by: Aurabindo Pillai mail@aurabindo.in

Signed-off-by: Aurabindo Pillai <mail@aurabindo.in>
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@adamgreig adamgreig left a comment

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Thanks, looks good!

It looks like the F410 is missing quite a few other interrupts (0, 11, 12, 13, 14, 15, 16, 17, 47, 50, 56, 57, 58, 59, 60, 62, 68, 69, 70, 71, 76, 85). Would you be interested in adding those as well?

bors r+

bors bot added a commit that referenced this pull request Mar 28, 2020
359: H7, AXI: Add some basic definitions for AXI management r=adamgreig a=richardeoin



360: Add missing interrupts for USART r=adamgreig a=aurabindo

Signed-off-by: Aurabindo Pillai <mail@aurabindo.in>

Co-authored-by: Richard Meadows <962920+richardeoin@users.noreply.github.com>
Co-authored-by: Aurabindo Pillai <mail@aurabindo.in>
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sure, I can do that. One of those is a uart interrupt which I should add after this patch is landed. CI is taking forever?

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bors bot commented Mar 28, 2020

This PR was included in a batch that timed out, it will be automatically retried

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Yea, it looks like something's up with bors perhaps, as the actual builds on Travis seem fine. I'll check again tomorrow.

bors bot added a commit that referenced this pull request Mar 29, 2020
360: Add missing interrupts for USART r=adamgreig a=aurabindo

Signed-off-by: Aurabindo Pillai <mail@aurabindo.in>

Co-authored-by: Aurabindo Pillai <mail@aurabindo.in>
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bors bot commented Mar 29, 2020

Timed out

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bors retry

bors bot added a commit that referenced this pull request Mar 29, 2020
360: Add missing interrupts for USART r=adamgreig a=aurabindo

Signed-off-by: Aurabindo Pillai <mail@aurabindo.in>

Co-authored-by: Aurabindo Pillai <mail@aurabindo.in>
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bors retry

bors bot added a commit that referenced this pull request Mar 29, 2020
360: Add missing interrupts for USART r=adamgreig a=aurabindo

Signed-off-by: Aurabindo Pillai <mail@aurabindo.in>

Co-authored-by: Aurabindo Pillai <mail@aurabindo.in>
@adamgreig
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Ok, I think I've fixed it...

bors retry

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bors bot commented Mar 29, 2020

Build succeeded

@bors bors bot merged commit 0e2ca66 into stm32-rs:master Mar 29, 2020
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2 participants