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Add comprehensive CEC support #508

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This PR adds comprehensive CEC support for all devices with CEC IP and serves as a proposal for an RM-based/peripheral-based patch approach that can coexist with the current patching methodologies. This method is conducive to decreased dependence on SVD files (like stm32-rs/meta#4 proposes) and faster support for new devices in the future (#477 and #504). CEC support is added for the following RMs/devices (including devices that do not yet have a patch file and/or SVD file):

  • RM0041: F100
  • RM0091: F042, F048, F051, F058, F071, F072, F078, F091, F098
  • RM0313: F373, F378
  • RM0385: F745, F746, F750, F756
  • RM0390: F446
  • RM0399: H745, H747, H755, H757
  • RM0410: F765, F767, F769, F777, F778, F779
  • RM0433: H742, H743, H750, H753
  • RM0436: MP157
  • RM0441: MP151
  • RM0442: MP153
  • RM0444: G071, G081
  • RM0455: H7A3, H7B0, H7B3
  • RM0468: H723, H725, H730, H733, H735

The goal of this approach is to create a self-contained definition of the CEC peripheral that can replace the sometimes-erroneous SVD definition and unify the register/field descriptions for all SVDs. The basic idea is that there is a unique YAML file in common_patches/cec for each reference manual that creates a new CEC peripheral to match that RM's description. The register and field definitions are imported from other YAML files that define the IP common to different RMs. A separate cec_delete.yaml file removes the original SVD's CEC definition. Some SVDs have a CEC definition when the device itself doesn't actually have CEC IP, so the separate delete file allows easy removal. If stm32-rs is no longer dependent on SVD files at some point in the future, then the delete file can just go away. Some code duplication could be reduced with new features in svdtools, but I haven't looked at this in-depth yet.

One aspect that doesn't really fit into this peripheral-based approach is the peripheral reset and enable fields in the RCC registers. Most SVDs already had them, but F446 needed CECRST added. F730, F7x2, and F7x3 needed CECRST removed. These were just done in the top device YAML file in the absence of a better idea.

The CEC peripheral is pretty straightforward with only two IP versions (v1 for F100 and v2 for all others), so some of the design decisions aren't applicable here but make more sense for more complicated peripherals (like the DFSDM, which I'm also working on).

I don't have a use case for the CEC or an easy way to test it, so I can't speak for the accuracy of this patch with respect to the actual silicon. However, I've reviewed the RMs and mmap diffs very thoroughly and am pretty confident in the accuracy of this patch. There are some notable differences that show up in the mmap diffs besides basic name and description changes:

  • stm32f0x1: The original SVD's CFGR register is messed up
  • stm32f0x2: Same
  • stm32f0x8: Same
  • stm32f301: Completely removed the CEC peripheral
  • stm32f373: Same as f0xx above
  • stm32f446: The original SVD is missing the CEC interrupt and CECRST
  • stm32f730: Removed CECRST
  • stm32f7x2: Same
  • stm32f7x3: Same

I'd appreciate any feedback or suggestions for improvement on this approach, as well as any errors that I missed (or added). Absent any problems, this should be ready to merge.

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github-actions bot commented Mar 5, 2021

Memory map comparison

@wallacejohn
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Per the discussion on Matrix, this approach would benefit from dedicated directives in svdtools. I can put together a proposal for some additional syntax.

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