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Merged
merged 2 commits into from
Mar 9, 2023
Merged

Update to latest STM32CubeL0 v1.12.2 #1969

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d7020ae
system(L0) update STM32L0xx HAL Drivers to v1.10.6
fpistm Mar 8, 2023
ba07738
system(L0): update STM32L0xx CMSIS Drivers to v1.9.3
fpistm Mar 8, 2023
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19 changes: 9 additions & 10 deletions system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x4.h
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Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright(c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
Expand Down Expand Up @@ -72,7 +71,7 @@ typedef enum
/****** Cortex-M0 Processor Exceptions Numbers ******************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Cortex-M0+ Hard Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M0+ Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M0+ System Tick Interrupt */

Expand Down Expand Up @@ -3614,7 +3613,7 @@ typedef struct
#define RCC_CSR_LSECSSD_Msk (0x1UL << RCC_CSR_LSECSSD_Pos) /*!< 0x00004000 */
#define RCC_CSR_LSECSSD RCC_CSR_LSECSSD_Msk /*!< External Low Speed oscillator CSS Detected */

/*!< RTC congiguration */
/*!< RTC configuration */
#define RCC_CSR_RTCSEL_Pos (16U)
#define RCC_CSR_RTCSEL_Msk (0x3UL << RCC_CSR_RTCSEL_Pos) /*!< 0x00030000 */
#define RCC_CSR_RTCSEL RCC_CSR_RTCSEL_Msk /*!< RTCSEL[1:0] bits (RTC clock source selection) */
Expand Down Expand Up @@ -5693,7 +5692,7 @@ typedef struct
#define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \
((INSTANCE) == TIM21))

/***************** TIM Instances : external trigger input availabe ************/
/***************** TIM Instances : external trigger input available ************/
#define IS_TIM_ETR_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \
((INSTANCE) == TIM21))

Expand Down Expand Up @@ -5778,6 +5777,7 @@ typedef struct
#define RCC_CRS_IRQn RCC_IRQn
#define DMA1_Channel4_5_6_7_IRQn DMA1_Channel4_5_IRQn
#define ADC1_COMP_IRQn ADC1_IRQn
#define SVC_IRQn SVCall_IRQn

/* Aliases for __IRQHandler */
#define RNG_LPUART1_IRQHandler LPUART1_IRQHandler
Expand All @@ -5803,4 +5803,3 @@ typedef struct



/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
19 changes: 9 additions & 10 deletions system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x6.h
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Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright(c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
Expand Down Expand Up @@ -72,7 +71,7 @@ typedef enum
/****** Cortex-M0 Processor Exceptions Numbers ******************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Cortex-M0+ Hard Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M0+ Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M0+ System Tick Interrupt */

Expand Down Expand Up @@ -3647,7 +3646,7 @@ typedef struct
#define RCC_CSR_LSECSSD_Msk (0x1UL << RCC_CSR_LSECSSD_Pos) /*!< 0x00004000 */
#define RCC_CSR_LSECSSD RCC_CSR_LSECSSD_Msk /*!< External Low Speed oscillator CSS Detected */

/*!< RTC congiguration */
/*!< RTC configuration */
#define RCC_CSR_RTCSEL_Pos (16U)
#define RCC_CSR_RTCSEL_Msk (0x3UL << RCC_CSR_RTCSEL_Pos) /*!< 0x00030000 */
#define RCC_CSR_RTCSEL RCC_CSR_RTCSEL_Msk /*!< RTCSEL[1:0] bits (RTC clock source selection) */
Expand Down Expand Up @@ -5749,7 +5748,7 @@ typedef struct
#define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \
((INSTANCE) == TIM21))

/***************** TIM Instances : external trigger input availabe ************/
/***************** TIM Instances : external trigger input available ************/
#define IS_TIM_ETR_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \
((INSTANCE) == TIM21))

Expand Down Expand Up @@ -5834,6 +5833,7 @@ typedef struct
#define RCC_CRS_IRQn RCC_IRQn
#define DMA1_Channel4_5_IRQn DMA1_Channel4_5_6_7_IRQn
#define ADC1_COMP_IRQn ADC1_IRQn
#define SVC_IRQn SVCall_IRQn

/* Aliases for __IRQHandler */
#define RNG_LPUART1_IRQHandler LPUART1_IRQHandler
Expand All @@ -5859,4 +5859,3 @@ typedef struct



/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
19 changes: 9 additions & 10 deletions system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010x8.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright(c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
Expand Down Expand Up @@ -72,7 +71,7 @@ typedef enum
/****** Cortex-M0 Processor Exceptions Numbers ******************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Cortex-M0+ Hard Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M0+ Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M0+ System Tick Interrupt */

Expand Down Expand Up @@ -3658,7 +3657,7 @@ typedef struct
#define RCC_CSR_LSECSSD_Msk (0x1UL << RCC_CSR_LSECSSD_Pos) /*!< 0x00004000 */
#define RCC_CSR_LSECSSD RCC_CSR_LSECSSD_Msk /*!< External Low Speed oscillator CSS Detected */

/*!< RTC congiguration */
/*!< RTC configuration */
#define RCC_CSR_RTCSEL_Pos (16U)
#define RCC_CSR_RTCSEL_Msk (0x3UL << RCC_CSR_RTCSEL_Pos) /*!< 0x00030000 */
#define RCC_CSR_RTCSEL RCC_CSR_RTCSEL_Msk /*!< RTCSEL[1:0] bits (RTC clock source selection) */
Expand Down Expand Up @@ -5744,7 +5743,7 @@ typedef struct
#define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \
((INSTANCE) == TIM21))

/***************** TIM Instances : external trigger input availabe ************/
/***************** TIM Instances : external trigger input available ************/
#define IS_TIM_ETR_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \
((INSTANCE) == TIM21))

Expand Down Expand Up @@ -5830,6 +5829,7 @@ typedef struct
#define RCC_CRS_IRQn RCC_IRQn
#define DMA1_Channel4_5_IRQn DMA1_Channel4_5_6_7_IRQn
#define ADC1_COMP_IRQn ADC1_IRQn
#define SVC_IRQn SVCall_IRQn

/* Aliases for __IRQHandler */
#define RNG_LPUART1_IRQHandler LPUART1_IRQHandler
Expand All @@ -5855,4 +5855,3 @@ typedef struct



/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
19 changes: 9 additions & 10 deletions system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l010xb.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright(c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
Expand Down Expand Up @@ -72,7 +71,7 @@ typedef enum
/****** Cortex-M0 Processor Exceptions Numbers ******************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Cortex-M0+ Hard Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M0+ Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M0+ System Tick Interrupt */

Expand Down Expand Up @@ -3687,7 +3686,7 @@ typedef struct
#define RCC_CSR_LSECSSD_Msk (0x1UL << RCC_CSR_LSECSSD_Pos) /*!< 0x00004000 */
#define RCC_CSR_LSECSSD RCC_CSR_LSECSSD_Msk /*!< External Low Speed oscillator CSS Detected */

/*!< RTC congiguration */
/*!< RTC configuration */
#define RCC_CSR_RTCSEL_Pos (16U)
#define RCC_CSR_RTCSEL_Msk (0x3UL << RCC_CSR_RTCSEL_Pos) /*!< 0x00030000 */
#define RCC_CSR_RTCSEL RCC_CSR_RTCSEL_Msk /*!< RTCSEL[1:0] bits (RTC clock source selection) */
Expand Down Expand Up @@ -5816,7 +5815,7 @@ typedef struct
((INSTANCE) == TIM21) || \
((INSTANCE) == TIM22))

/***************** TIM Instances : external trigger input availabe ************/
/***************** TIM Instances : external trigger input available ************/
#define IS_TIM_ETR_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \
((INSTANCE) == TIM21) || \
((INSTANCE) == TIM22))
Expand Down Expand Up @@ -5906,6 +5905,7 @@ typedef struct
#define RCC_CRS_IRQn RCC_IRQn
#define DMA1_Channel4_5_IRQn DMA1_Channel4_5_6_7_IRQn
#define ADC1_COMP_IRQn ADC1_IRQn
#define SVC_IRQn SVCall_IRQn

/* Aliases for __IRQHandler */
#define RNG_LPUART1_IRQHandler LPUART1_IRQHandler
Expand All @@ -5931,4 +5931,3 @@ typedef struct



/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
19 changes: 9 additions & 10 deletions system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h
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Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright(c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
Expand Down Expand Up @@ -72,7 +71,7 @@ typedef enum
/****** Cortex-M0 Processor Exceptions Numbers ******************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Cortex-M0+ Hard Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M0+ Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M0+ System Tick Interrupt */

Expand Down Expand Up @@ -3723,7 +3722,7 @@ typedef struct
#define RCC_CSR_LSECSSD_Msk (0x1UL << RCC_CSR_LSECSSD_Pos) /*!< 0x00004000 */
#define RCC_CSR_LSECSSD RCC_CSR_LSECSSD_Msk /*!< External Low Speed oscillator CSS Detected */

/*!< RTC congiguration */
/*!< RTC configuration */
#define RCC_CSR_RTCSEL_Pos (16U)
#define RCC_CSR_RTCSEL_Msk (0x3UL << RCC_CSR_RTCSEL_Pos) /*!< 0x00030000 */
#define RCC_CSR_RTCSEL RCC_CSR_RTCSEL_Msk /*!< RTCSEL[1:0] bits (RTC clock source selection) */
Expand Down Expand Up @@ -5835,7 +5834,7 @@ typedef struct
#define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \
((INSTANCE) == TIM21))

/***************** TIM Instances : external trigger input availabe ************/
/***************** TIM Instances : external trigger input available ************/
#define IS_TIM_ETR_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \
((INSTANCE) == TIM21))

Expand Down Expand Up @@ -5920,6 +5919,7 @@ typedef struct
#define RCC_CRS_IRQn RCC_IRQn
#define DMA1_Channel4_5_6_7_IRQn DMA1_Channel4_5_IRQn
#define ADC1_IRQn ADC1_COMP_IRQn
#define SVC_IRQn SVCall_IRQn

/* Aliases for __IRQHandler */
#define RNG_LPUART1_IRQHandler LPUART1_IRQHandler
Expand All @@ -5945,4 +5945,3 @@ typedef struct



/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
19 changes: 9 additions & 10 deletions system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l021xx.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,12 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright(c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
Expand Down Expand Up @@ -72,7 +71,7 @@ typedef enum
/****** Cortex-M0 Processor Exceptions Numbers ******************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
HardFault_IRQn = -13, /*!< 3 Cortex-M0+ Hard Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M0+ Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M0+ System Tick Interrupt */

Expand Down Expand Up @@ -3860,7 +3859,7 @@ typedef struct
#define RCC_CSR_LSECSSD_Msk (0x1UL << RCC_CSR_LSECSSD_Pos) /*!< 0x00004000 */
#define RCC_CSR_LSECSSD RCC_CSR_LSECSSD_Msk /*!< External Low Speed oscillator CSS Detected */

/*!< RTC congiguration */
/*!< RTC configuration */
#define RCC_CSR_RTCSEL_Pos (16U)
#define RCC_CSR_RTCSEL_Msk (0x3UL << RCC_CSR_RTCSEL_Pos) /*!< 0x00030000 */
#define RCC_CSR_RTCSEL RCC_CSR_RTCSEL_Msk /*!< RTCSEL[1:0] bits (RTC clock source selection) */
Expand Down Expand Up @@ -5975,7 +5974,7 @@ typedef struct
#define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \
((INSTANCE) == TIM21))

/***************** TIM Instances : external trigger input availabe ************/
/***************** TIM Instances : external trigger input available ************/
#define IS_TIM_ETR_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \
((INSTANCE) == TIM21))

Expand Down Expand Up @@ -6060,6 +6059,7 @@ typedef struct
#define RCC_CRS_IRQn RCC_IRQn
#define DMA1_Channel4_5_6_7_IRQn DMA1_Channel4_5_IRQn
#define ADC1_IRQn ADC1_COMP_IRQn
#define SVC_IRQn SVCall_IRQn

/* Aliases for __IRQHandler */
#define LPUART1_IRQHandler AES_LPUART1_IRQHandler
Expand All @@ -6085,4 +6085,3 @@ typedef struct



/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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