Everyone going Mobile" is the current communication trend. Mobile devices such as Smartphones and... more Everyone going Mobile" is the current communication trend. Mobile devices such as Smartphones and Tablets are becoming increasingly popular in uploading movies and pictures to Facebook and YouTube. The communication is carried out by antennas operating in many bands such as the GSM band at 900 MHz or BT at 2.4 GHz. Data storage for the communication process is provided by a memory bus DDR2/3 operating at 1066MTs and IO communication is provided by a USB3.0 type bus operating at 2.5GHz. These critical interfaces couple noise to the transmitting/receiving antennas which can corrupt the voice/data wireless communication link. This paper proposes studies of the main physical mechanisms behind such noise coupling to the antennas. We used a massively parallel finite difference time domain (FDTD) EM solver to find the optimum phase shift between the byte lanes resulting in a 50% reduction of crosstalk between memory and the multiband antenna. We developed an innovative process/workflow using EDA tools and measurements to solve such problems.
2017 IEEE 21st Workshop on Signal and Power Integrity (SPI), 2017
Infotainment and PCB miniaturization are one of the challenges of many companies. Reduce the over... more Infotainment and PCB miniaturization are one of the challenges of many companies. Reduce the overall dimension of the devices preserving the high efficiency in terms of data transfer rate and power consumption is one of the missions in this century. However one of the limits of miniaturization was the memory dimension and memory placement on PCB. In many cases more than 30% of the PCB area was dedicated to the memory chip, and this can have an impact on miniaturization. In this paper we will evaluate a new technique that can reduce the impact of LPDDDR using a flexible connection between the main PCB and the PCB where all the memories are placed. We are calling, this technique, “Flex-DIMM”. It offers numerous advantages over the traditional memory-down approach, for example the same behavior reducing the PCB area. Another advantage of this technique was provided a plug-n-play approach for memory channels, this dramatically reduce the design cycle of embedded systems and the routing ...
Due to the increasing overall complexity and integration, electronic engineers are faced every da... more Due to the increasing overall complexity and integration, electronic engineers are faced every day with ever more complicated ElectroMagnetic Interference (EMI) issues. As a result many first prototypes fail to pass all EMI certification tests causing a big loss of time and profit. Up to now, debugging EMI issues has mostly been done in costly EMI chambers. Moreover these tests are done rather late in the design cycle when there is not much flexibility left to implement the optimal and most cost-efficient EMI mitigation methods. Simulations offer a lot a flexibility when estimating the EMI impact of different elements in the electronic system and can really help to find the real sources for possible EMI issues. By having this knowledge very early in the design stage, one can implement cheap, yet effective EMI mitigation methods without resorting to more costly EMI suppressors like shielded connectors, chokes, or specially-designed enclosures. Unfortunately, due to the complexity, mo...
2010 IEEE 14th Workshop on Signal Propagation on Interconnects, 2010
EMI engineers are struggling everyday with complex radiation problems that fail critical products... more EMI engineers are struggling everyday with complex radiation problems that fail critical products to pass EMI certification and causes big loss of profit. Advances in EMI engineering are following a similar trend like Signal-Integrity engineering 10-years ago when simulation tools became capable of providing accurate predictive simulations in a reasonable amount of time. With careful engineering utilizing cutting-edge full-wave field-solver software: Momentum (MOM) [1], EMpro (FDTD) [2] along with a hardware boost with heterogeneous massive CPU/GPU parallel processing (CUDA) technology [3], we can move the EMI teams from the back-end black-magic to a successful cost-effective front-end design. This paper presents an innovative process (Virtual-EMI lab) for pre-and post-tape-out providing the designers with an early stage EMI-suppression matrix (on-chip and onboard enablers) to find the optimum trade-off between performance and cost. What is Virtual EMI Lab Most of EMI problems are large scale and EMI simulation requires extreme long time and excessive memory, which often makes simulation formidable for EMI engineer. Currently, EMI debug/analysis is done in the costly EMI chambers which can cost thousands of dollars and critical delays in time-to-market. However, with recent advances in simulation tools adopting CPU/GPU parallel processing technology[3], complex EMI problems are now feasible to solve within reasonable amount of time (for ex: 10-hrs with GPU instead of 8-days on the CPU). This paper develops a pre/post tape-out process named "Virtual EMI lab" to use the EMI simulation to derive layout guidelines and to aid EMI analysis (Fig. 1). Virtual EMI lab was used to analyze various EMI problems, such as the grounding-effectiveness of the connector-to-PCB, reducing common-mode noise injected into the cables. It was also used to investigate SSO memory emission within couple of hours on the GPU to provide the best on-board decoupling-scheme for minimum radiation of the PCB antenna [5].
2010 Asia-Pacific International Symposium on Electromagnetic Compatibility, 2010
Thanks to the application of GPU-CUDA acceleration technology to EM simulation tools, more and mo... more Thanks to the application of GPU-CUDA acceleration technology to EM simulation tools, more and more complicated EMI challenges can be efficiently investigated and solved very early in the design process. This paper presents a novel methodology to predict EMI emission due to memory SSO noise from a real, commercial graphics card by means of a commercially available CUDA accelerated full-wave FDTD simulator. It is shown that thanks to the CUDA acceleration one can estimate the influence of on-board decoupling capacitors on the EMI emission within hours.
Electrical Performance of Electronic Packaging,, 2002
We propose a novel topology optimization methodology in the frequency domain for a highspeed inte... more We propose a novel topology optimization methodology in the frequency domain for a highspeed interface that selects an optimum topology and reduces the time-domain simulation matrix. The method is demonstrated on a DDR333 data interface.
2010 Asia-Pacific International Symposium on Electromagnetic Compatibility, 2010
Thanks to the application of GPU-CUDA acceleration technology to EM simulation tools, more and mo... more Thanks to the application of GPU-CUDA acceleration technology to EM simulation tools, more and more complicated EMI challenges can be efficiently investigated and solved very early in the design process. This paper presents a novel methodology to predict EMI emission due to memory SSO noise from a real, commercial graphics card by means of a commercially available CUDA accelerated full-wave FDTD simulator. It is shown that thanks to the CUDA acceleration one can estimate the influence of on-board decoupling capacitors on the EMI emission within hours.
Everyone going Mobile" is the current communication trend. Mobile devices such as Smartphones and... more Everyone going Mobile" is the current communication trend. Mobile devices such as Smartphones and Tablets are becoming increasingly popular in uploading movies and pictures to Facebook and YouTube. The communication is carried out by antennas operating in many bands such as the GSM band at 900 MHz or BT at 2.4 GHz. Data storage for the communication process is provided by a memory bus DDR2/3 operating at 1066MTs and IO communication is provided by a USB3.0 type bus operating at 2.5GHz. These critical interfaces couple noise to the transmitting/receiving antennas which can corrupt the voice/data wireless communication link. This paper proposes studies of the main physical mechanisms behind such noise coupling to the antennas. We used a massively parallel finite difference time domain (FDTD) EM solver to find the optimum phase shift between the byte lanes resulting in a 50% reduction of crosstalk between memory and the multiband antenna. We developed an innovative process/workflow using EDA tools and measurements to solve such problems.
2017 IEEE 21st Workshop on Signal and Power Integrity (SPI), 2017
Infotainment and PCB miniaturization are one of the challenges of many companies. Reduce the over... more Infotainment and PCB miniaturization are one of the challenges of many companies. Reduce the overall dimension of the devices preserving the high efficiency in terms of data transfer rate and power consumption is one of the missions in this century. However one of the limits of miniaturization was the memory dimension and memory placement on PCB. In many cases more than 30% of the PCB area was dedicated to the memory chip, and this can have an impact on miniaturization. In this paper we will evaluate a new technique that can reduce the impact of LPDDDR using a flexible connection between the main PCB and the PCB where all the memories are placed. We are calling, this technique, “Flex-DIMM”. It offers numerous advantages over the traditional memory-down approach, for example the same behavior reducing the PCB area. Another advantage of this technique was provided a plug-n-play approach for memory channels, this dramatically reduce the design cycle of embedded systems and the routing ...
Due to the increasing overall complexity and integration, electronic engineers are faced every da... more Due to the increasing overall complexity and integration, electronic engineers are faced every day with ever more complicated ElectroMagnetic Interference (EMI) issues. As a result many first prototypes fail to pass all EMI certification tests causing a big loss of time and profit. Up to now, debugging EMI issues has mostly been done in costly EMI chambers. Moreover these tests are done rather late in the design cycle when there is not much flexibility left to implement the optimal and most cost-efficient EMI mitigation methods. Simulations offer a lot a flexibility when estimating the EMI impact of different elements in the electronic system and can really help to find the real sources for possible EMI issues. By having this knowledge very early in the design stage, one can implement cheap, yet effective EMI mitigation methods without resorting to more costly EMI suppressors like shielded connectors, chokes, or specially-designed enclosures. Unfortunately, due to the complexity, mo...
2010 IEEE 14th Workshop on Signal Propagation on Interconnects, 2010
EMI engineers are struggling everyday with complex radiation problems that fail critical products... more EMI engineers are struggling everyday with complex radiation problems that fail critical products to pass EMI certification and causes big loss of profit. Advances in EMI engineering are following a similar trend like Signal-Integrity engineering 10-years ago when simulation tools became capable of providing accurate predictive simulations in a reasonable amount of time. With careful engineering utilizing cutting-edge full-wave field-solver software: Momentum (MOM) [1], EMpro (FDTD) [2] along with a hardware boost with heterogeneous massive CPU/GPU parallel processing (CUDA) technology [3], we can move the EMI teams from the back-end black-magic to a successful cost-effective front-end design. This paper presents an innovative process (Virtual-EMI lab) for pre-and post-tape-out providing the designers with an early stage EMI-suppression matrix (on-chip and onboard enablers) to find the optimum trade-off between performance and cost. What is Virtual EMI Lab Most of EMI problems are large scale and EMI simulation requires extreme long time and excessive memory, which often makes simulation formidable for EMI engineer. Currently, EMI debug/analysis is done in the costly EMI chambers which can cost thousands of dollars and critical delays in time-to-market. However, with recent advances in simulation tools adopting CPU/GPU parallel processing technology[3], complex EMI problems are now feasible to solve within reasonable amount of time (for ex: 10-hrs with GPU instead of 8-days on the CPU). This paper develops a pre/post tape-out process named "Virtual EMI lab" to use the EMI simulation to derive layout guidelines and to aid EMI analysis (Fig. 1). Virtual EMI lab was used to analyze various EMI problems, such as the grounding-effectiveness of the connector-to-PCB, reducing common-mode noise injected into the cables. It was also used to investigate SSO memory emission within couple of hours on the GPU to provide the best on-board decoupling-scheme for minimum radiation of the PCB antenna [5].
2010 Asia-Pacific International Symposium on Electromagnetic Compatibility, 2010
Thanks to the application of GPU-CUDA acceleration technology to EM simulation tools, more and mo... more Thanks to the application of GPU-CUDA acceleration technology to EM simulation tools, more and more complicated EMI challenges can be efficiently investigated and solved very early in the design process. This paper presents a novel methodology to predict EMI emission due to memory SSO noise from a real, commercial graphics card by means of a commercially available CUDA accelerated full-wave FDTD simulator. It is shown that thanks to the CUDA acceleration one can estimate the influence of on-board decoupling capacitors on the EMI emission within hours.
Electrical Performance of Electronic Packaging,, 2002
We propose a novel topology optimization methodology in the frequency domain for a highspeed inte... more We propose a novel topology optimization methodology in the frequency domain for a highspeed interface that selects an optimum topology and reduces the time-domain simulation matrix. The method is demonstrated on a DDR333 data interface.
2010 Asia-Pacific International Symposium on Electromagnetic Compatibility, 2010
Thanks to the application of GPU-CUDA acceleration technology to EM simulation tools, more and mo... more Thanks to the application of GPU-CUDA acceleration technology to EM simulation tools, more and more complicated EMI challenges can be efficiently investigated and solved very early in the design process. This paper presents a novel methodology to predict EMI emission due to memory SSO noise from a real, commercial graphics card by means of a commercially available CUDA accelerated full-wave FDTD simulator. It is shown that thanks to the CUDA acceleration one can estimate the influence of on-board decoupling capacitors on the EMI emission within hours.
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Papers by Hany Fahmy