Papers by Md. Selim Al Mamun
(IJACSA) International Journal of Advanced Computer Science and Applications, Dec 31, 2013
Reversible sequential circuits are going to be the significant memory blocks for the forthcoming ... more Reversible sequential circuits are going to be the significant memory blocks for the forthcoming computing devices for their ultra low power consumption. Therefore design of various types of latches has been considered a major objective for the researchers quite a long time. In this paper we proposed efficient design of reversible sequential circuits that are optimized in terms of quantum cost, delay and garbage outputs. For this we proposed a new 3*3 reversible gate called SAM gate and we then design efficient sequential circuits using SAM gate along with some of the basic reversible logic gates.
Abstract:-Reversible logic is gaining interest of many researchers due to its low power dissipati... more Abstract:-Reversible logic is gaining interest of many researchers due to its low power dissipating characteristic. In this paper we proposed a new approach for designing online testable reversible circuits. The resultant testable reversible circuit can detect any single bit error whiles it is operating. Appropriate theorems and lemmas are presented to clarify the proposed design. The experimental results show that our design approach is superior in terms of number of number of gates, garbage outputs and quantum cost.
International Journal of Science and Technology
Reversible Logic is a very promising and flourishing research area. Reversible logic theoreticall... more Reversible Logic is a very promising and flourishing research area. Reversible logic theoretically allows designers to build subsystem circuit design with zero power dissipation than the existing classical ones. However synthesis of reversible circuit is not easy. In this paper we propose an efficient approach for carry skip BCD adder using reversible logic. Our results show that our design is much more efficient than the existing ones in terms quantum cost, garbage outputs and delay.
International Journal of Engineering and Technology
Abstract: Reversible sequential circuits are considered the significant memory block for their ul... more Abstract: Reversible sequential circuits are considered the significant memory block for their ultra-low power consumption. Universal shift register is an important memory element of the sequential circuit family. In this paper we proposed efficient design of reversible universal shift register that is optimized in terms of quantum cost, delay and garbage outputs. Appropriate theorems and lemmas are presented to clarify the proposed designs and establish its efficiency.
International Journal of Computer Applications , Oct 20, 2012
Reversible logic has become immensely popular research area and its applications have spread in v... more Reversible logic has become immensely popular research area and its applications have spread in various technologies for their low power consumption. In this paper we proposed an efficient design of random access memory using reversible logic. In the way of designing the reversible random access memory we proposed a reversible decoder and a write enable reversible master slave D flip-flop. All the reversible designs are superior in terms of quantum cost, delay and garbage outputs compared to the designs existing in literature.
IOSR Journal of Computer Engineering (IOSR-JCE), Oct 20, 2012
Abstract:Reversible logic has come to the forefront of theoretical and applied research today. Al... more Abstract:Reversible logic has come to the forefront of theoretical and applied research today. Although many researchers are investigating techniques to synthesize reversible combinational logic, there is little work in the area of sequential reversible logic. Latches and flip-flops are the most significant memory elements for the forthcoming sequential memory elements. In this paper, we proposed two new reversible logic gates MG-1 and MG-2. We then proposed new design techniques for latches and flip-flops with the help of the new proposed gates. The proposed designs are better than the existing ones in terms of number of gates, garbage outputs and delay.
Journal of Computing, Jun 5, 2012
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Papers by Md. Selim Al Mamun