Magnetically coupled high-gain Y-source isolated DC/DC converter

www.ietdl.org Published in IET Power Electronics Received on 23rd December 2013 Revised on 11th April 2014 Accepted on 22nd May 2014 doi: 10.1049/iet-pel.2013.0957 ISSN 1755-4535 Magnetically coupled high-gain Y-source isolated DC/DC converter Yam P. Siwakoti1, Poh Chiang Loh2, Frede Blaabjerg2, Graham E. Town1 1 Department of Engineering, Macquarie University, NSW 2109, Australia Department of Energy Technology, Aalborg University, Pontoppidanstræde 101, 9220 Aalborg, Denmark E-mail: yam.siwakoti@mq.edu.au 2 Abstract: A new form of magnetically coupled DC/DC converter is proposed for medium power applications (250 W to 2 kW), requiring a high-voltage gain, short inductive charging time and galvanic isolation. The proposed converter can be realised using a unique Y-source impedance network and a two-switch push–pull circuit with voltage-doubling rectification. The converter’s voltage gain is presently not matched by any other converter operating at the same switch duty ratio. The converter also has more degrees of freedom in design for setting the desired gain than other converters, and hence can better meet the demands of many applications. The operating principles of the converter have been analysed mathematically, and are verified by both simulation and experiment. 1 Introduction The development of isolated DC/DC converters with high-voltage gain has recently been intensified by national targets to connect more renewable energy sources and other distributed generators to the grid. Such developments are necessary because distributed sources are usually low-voltage entities with widely varying output voltage that cannot be tied directly to the grid. Examples include photovoltaic panels, fuel cells and small-scale wind turbines (20–150 V), whose low voltages need to be conditioned by high step-up DC/DC converters to arrive at a higher dc-link voltage of between 200 and 600 V, before being interfaced to the 110, 230 or 400 V AC grid [1, 2]. Other trends towards DC electrification in residential and industrial settings using distributed DC power system and micro-grid technologies have also increased the motivation to develop advanced DC/DC converters. Furthermore, DC system architectures have many advantages compared with their AC counterparts, leading to many large corporations to retrofit their existing AC systems with DC systems. This shift depends heavily on the availability of efficient DC/DC converters with adequate boost capability [3–5]. Other applications requiring DC/DC converters with large boost capability include uninterruptable DC back-up power supplies for telecommunication systems and server farms, and electric vehicles [6]. Designing of the boost stages of these DC/DC converters is, however, not trivial because of the usual requirements for a longer inductive charging time and/or the design of a well-coupled high-frequency transformer. A longer charging time will lead to higher losses, since during this period the source simply charges inductors and transfers no energy to the load. The transformer, on the other hand, will always be IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 2817–2824 doi: 10.1049/iet-pel.2013.0957 needed if galvanic isolation is required. However, using it for voltage boosting will lead to a proportionally high turns ratio, which can be difficult to wind while keeping leakage low. These challenges have led to the development of other gain boosting techniques [7, 8] like multilevel cascading and the insertion of voltage multiplier cells or an impedance network. The recommended technique depends on the demanded power density, efficiency, cost and reliability, which are usually not fixed. Consequently, no single technique is perfect for all cases, even though the cascading and voltage multiplying techniques are generally known to introduce more components, which can, in turn, compromise performance. Inclusion of an impedance network therefore appears to be an attractive option, leading to the isolated Z-source and quasi-Z-source boost converters described in [9–17]. In this paper, we propose an alternative Y-source isolated DC/DC converter, whose included Y-source impedance network [18] produces an even higher gain, and provides more tuning parameters for arriving at an overall more versatile design. For example, the proposed converter can be realised with a shorter charging time and a smaller turns ratio for the isolation transformer without compromising gain. The topology of the proposed converter and its operating principles are presented in Section 2 with simulation and experimental results presented in Section 3. This paper concludes in Section 4. 2 2.1 Principles of operation Proposed DC/DC converter The proposed converter is shown in Fig. 1. It consists of a Y-source impedance network for voltage boosting, a push– 2817 & The Institution of Engineering and Technology 2014 www.ietdl.org Fig. 1 Proposed Y-source impedance network-based isolated DC/DC converter pull switching circuit with a transformer for galvanic isolation and a voltage doubling rectifier (VDR) for increasing the final DC output. Within the Y-source network, there are a three-winding coupled inductors (N1, N2 and N3), a capacitor C1 and a diode D1. The network operates in either the shoot-through or active state with the former charging the inductor, and the latter discharging energy from the source and inductor to the push–pull circuit. The shoot-through state is created by turning on switches S1 and S2 simultaneously, and is discussed further in Section 2.3. This state is normally not permitted for a standalone push– pull converter, but is necessary for the proposed converter to short its impedance network output, referred to as its dc-link. The resulting short-circuit is drawn in Fig. 2a, which causes the three-winding coupled inductor to charge, as in most DC/DC boost converters. During this time, diode D1 is reverse-biased, and hence allows no energy from the source to flow to the push–pull circuit. Consequently, the shoot-through time should preferably be short, while not compromising gain. (Note: In standard DC/DC boost converters, there is zero power delivered to the load at unity duty ratio, even though the theoretical gain is infinite.) The stored inductive energy, together with energy from the source, will subsequently be fed to the push–pull circuit when in the active state by keeping S1 or S2 on only, but not both. The resulting equivalent circuit is shown in Fig. 2b, where two possible current paths have been drawn, depending on whether S1 or S2 has been kept on. When alternated equally, they then give rise to the necessary AC quantities needed for transferring energy across the push–pull transformer. At the secondary end of the transformer, diode D2 conducts, while diode D3 blocks, during the negative half cycle, causing capacitor C2 to charge to the secondary voltage amplitude. Diode D3 then takes over the conduction when in the positive half cycle, resulting in an output DC voltage given by the sum of the positive secondary voltage and voltage across C2. Rectification of the secondary voltage has therefore occurred, together with a voltage gain of 2. Summarising, advantages of the proposed converter, when compared with existing boost converters, can be listed as: (1) The converter has more degrees of freedom for varying its gain, and hence more design freedom to meet requirements demanded by the considered applications. Particularly, a shorter inductive charging time and a transformer with smaller turns ratio can be realised, while not compromising gain. (2) Only two switches are needed for square-wave voltage inversion in the push–pull circuit, while still able to introduce the shoot-through state demanded by the Y-source network. (3) Other advantages of the push–pull circuits are retained, such as two switches sharing a common ground, and hence allowing simpler gate drivers to be used. In addition, only a single switch conducts at a time when in the active state, whose resulting conduction losses are thus lower. Fig. 2 Equivalent circuits of the proposed converter when in a Shoot-through b Active modes 2818 & The Institution of Engineering and Technology 2014 It should however be noted that the push–pull intermediate circuit has, to a prominent extent, limited the power range of the proposed converter to between 250 W and 2 kW. Any higher power flow through the push–pull circuit may lead to rapid staircase saturation of the core, which must certainly be avoided [19]. Alternatively, the push–pull circuit can be replaced by the classical isolated full-bridge circuit, which conceptually, is a straightforward replacement with more switches used. The classical full-bridge has, in fact, been tried by [9, 16] with either a quasi-Z-source or IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 2817–2824 doi: 10.1049/iet-pel.2013.0957 www.ietdl.org Table 1 Comparison of isolated boost converters Converter types without impedance network (classical) with quasi-Z-source network [9] with cascaded quasi-Z-source network [16] with Y-source network Costs Sizes Weights + + + (low + + + (low + + + (low gain) gain) gain) -- (high gain) -- (high gain) -- (high gain) + + + − − − + + + + + + Mathematical derivation When in its shoot-through state (vdc−link = 0 and Iin = 0), the circuit in Fig. 2a results in (1), where n12 = N1/N2 and n13 = N1/N3 are the turns ratios of the coupled inductor, VC1 is the voltage across capacitor C1 and vL is the voltage across winding N1 of the coupled inductor n12 n13 V n12 − n13 C1 (1) On the other hand, when in the active state shown in Fig. 2b, the circuit expressions change to (2), where Vin is the input source voltage Vin = vL + VC1 + vL /n12 ⇒ vL = (3)  
n12
n n Vin − VC1 1 − dst + 12 13 VC1 dst n12 + 1 n12 − n13
  
 n12 n13 + 1 dst (4) = 0 ⇒ VC1 = Vin 1 − dst / 1 − n12 − n13 cascaded quasi-Z-source impedance network placed at its front end. Both networks use non-coupled inductors, whose gains are thus not as prominent as the proposed Y-source impedance network. Regardless of that, the common intention is still to introduce an exponentially increasing gain to complement the much slower proportional gain of the isolated transformer. The resulting converter designed might therefore be smaller and cheaper for high-gain applications because of its lesser winding turns and core sizes involved. Table 1 gives a rough comparison of the converters mentioned, but it should be mentioned that the viewpoints projected may be subjective since they depend on the actual gain designed, its range of variation and the components and materials available for realising the converters. VC1 + vL /n12 − vL /n13 = 0 ⇒ vL = dst = 2D − 1 Performing state space averaging on (1) and (2) then leads to the expression in (4) for computing capacitor voltage VC1 + Means favourable, while − means unfavourable. 2.2 defining their common duty ratio as D, the shoot-through overlap region dst can be determined as in (3), while its corresponding active duration can be computed from 1 − dst  n12
V − VC1 (2) n12 + 1 in The durations of the two states can also be determined by referring to the switch gating signals shown in Fig. 3, which are two similar pulsed signals shifted by 180°. On Referring now to the peak dc-link voltage v̂dc−link during the active interval with only either S1 or S2 on, its value can be determined as (5), from which the Y-source voltage gain v̂dc−link /Vin can be computed     1 n13 + 1 n12 v̂dc−link = Vin − 1 + v = Vin − n12 + 1 n13 L n13
  −1
 1 + n13 dst Vin − VC1 ⇒ v̂dc−link /Vin = 1 − 1 − n23 (5)  The gain obtained from the Y-source network can obviously be set higher than that of the traditional Z-source network by enforcing the inequalities of 1 + n13/1 − n23 > 2 and 1 − n23 > 0. They then lead to the coupled inductor design requirements in (6) and (7) for the Y-source network, if its gain is to be set higher than that of the traditional Z-source network [9–15, 19] 1 + n13 . 2 ⇒ N1 + 2N2 . N3 1 − n23 (6) 1 − n23 . 0 ⇒ N2 , N3 and N3 . 1 (7) Moreover, by setting the denominator of (5) to be greater than zero, the permitted range for can be determined as (8), which for a larger winding factor, gives a range narrower than that of the traditional Z-source network (0 ≤ dst < 0.5). The Y-source network is therefore capable of producing a high gain, while using only a short inductive shoot-through time
 1 + n13 dst ≤ 1 ⇒ 0 ≤ dst 0,1− 1 − n23 1 − n23 N3 − N2 , = = 1/K 1 + n13 N3 + N1 (8) At times, it might also be convenient to express the voltage gain or peak voltage across the dc-link in terms of the switch duty ratio D and winding factor K. This can be done by substituting (3) and the definition of K into (5), giving (9) v̂dc−link =  Fig. 3 Switching sequences for S1 and S2 when in the boost mode (D > 0.5) IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 2817–2824 doi: 10.1049/iet-pel.2013.0957 Vin , 1 − K(2D − 1) 0.5 ≤ D , K+1 2K (9) An exponentially increasing gain can therefore be obtained by choosing an appropriate K above 2, and then tuning the switch duty cycle, D, accordingly. This exponential voltage gain can be larger than the proportional gain introduced by 2819 & The Institution of Engineering and Technology 2014 www.ietdl.org the push–pull transformer. The Y-source network should therefore concentrate on meeting the required gain, while the transformer is optimised for galvanic isolation. A large turns ratio is thus not needed for the transformer, whose power density can then be improved. For this work, a 1:1:1 transformer has been implemented simply for providing isolation in the push–pull circuit. Regardless of the final design chosen for the coupled inductor and transformer, their leakage inductances must be kept small by following common practices well documented in [18]. With the gains introduced by the Y-source network, transformer and VDR combined, the overall converter output voltage, Vo, and gain, GV(K, D), can be written as in (10), where NPP represents the transformer turns ratio, which for the 1:1:1 transformer is NPP = 1 2NPP Vin , 1 − K(2D − 1) 2NPP GV (K, D) =  1 − K(2D − 1) Vo = 2v̂dc−link =  (10) The overall gain can thus be varied by changing K, D and NPP, which can be deduced from (10) and is shown in Fig. 4 for different K and D with NPP set to unity (for a classical bridge-based isolated DC/DC converter, only the transformer turns ratio and switch duty ratio are available for gain tuning). Another tuning freedom shown more clearly in Table 2 is the possibility of generating a particular winding factor K, and hence gain GV, by various winding combinations (N1, N2 and N3) of the coupled inductor. The eventual combination opted for should ideally help the converter avoid large turns ratios for the coupled inductor and transformer, which could otherwise be difficult to realise. Such flexibilities are not available in other isolated impedance-source converters. 2.3 Principle of magnetic shoot-through The shoot-through state of the proposed converter occurs when switches S1 and S2 are turned on simultaneously to create a magnetic short-circuit across the primary windings of the push–pull transformer. To the Y-source network, this magnetic short-circuit is no different from the electric short-circuit needed for inductive charging. The crucial mechanism here is thus the magnetic short-circuit, which Fig. 4 Theoretical voltage gain of the proposed converter for different winding factors, K 2820 & The Institution of Engineering and Technology 2014 Table 2 Gain of proposed converter against winding factor and turns ratio Winding factors, K Ranges of D Voltage gains, GV Possible turns ratios N1:N2:N3 2 0.5 < D < 3/4 2[1 − 2(2D − 1)]−1 3 0.5 < D < 4/6 2[1 − 3(2D − 1)]−1 4 0.5 < D < 5/8 2[1 − 4(2D − 1)]−1 5 0.5 < D < 6/10 2[1 − 5(2D − 1)]−1 1:1:3, 2:1:4, 1:2:5, 3:1:5, 4:1:6 1:1:2, 3:1:3, 2:2:4, 1:3:5, 4:2:5 2:1:2, 1:2:3, 5:1:3, 4:2:4, 8:1:4 3:1:2, 2:2:3, 1:3:4, 7:1:3, 6:2:4 can be analysed by referring to the magnetic flux paths shown in Fig. 5 for the two currents flowing through the primary windings of the transformer. Owing to the way the primary windings are wound, these two produced fluxes will traverse in opposite directions with their magnitudes fP1 and fP2 determined as (11) fP1 / VTX , P1 NP1 and fP2 / VTX , P2 NP2 (11) The expressions in (11), when written separately as in (12), will give the net flux fT in the core when only S1 or S2 is turned on. The expression changes to (13) when both switches are on, which obviously gives zero net flux, since VTX , P1 = VTX , P2 = v̂dc−link and the two primary windings are similar (NP1 = NP2 = NPP). With zero net flux, voltage induced across the secondary winding is zero, which, to the Y-source network, appears like the required electric shoot-through across its output. The proposed converter can therefore operate as intended, so long as the switching sequences shown in Fig. 3 are applied VTX , P1 VTX , P2 = NP1 NP2 (12) VTX , P1 V − TX , P2 = 0 NP1 NP2 (13) fT = fP1 = fP2 / fT = fP1 − fP2 / The concern here is more with symmetry in the sense that the two primary halves must be magnetically identical to produce the zero net flux. Any imbalance will lead to a non-zero net flux that could saturate the core after a few switching cycles. Moreover the windings, including the secondary, Fig. 5 Magnetic flux paths in toroidal transformer for illustrating magnetic shoot-through IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 2817–2824 doi: 10.1049/iet-pel.2013.0957 www.ietdl.org Table 3 Parameter and component values used for simulation and experiment Parameters/descriptions Values/part numbers power rating input voltage range, Vin output voltage, Vo capacitances: C1, C2 and C3 turns ratio of coupled inductor 230 W 48 V–115 V 230 V 470 µF at 400 V Kemet winding factor, K permitted ranges of D and dst isolated transformer switching frequency, fs switching devices, S1 and S2 diode, D1 diodes, D2 and D3 5:1:3 (80:16:48) on ‘C055863A2’ molypermalloy powder (MPP) core from Magnetics Inc. 4 0.5 < D < 0.625, 0 < dst < 0.25 1:1:1 (30:30:30) on ‘0W48613TC’ ferrite core from Magnetics Inc. 6.1 kHz VDS = 650 V, IDS = 47 a cool MOS ‘SPW47N60C3’ ‘C3D25170H’ – silicon carbide Schottky diode Z-Rec™ rectifier ‘C3D20060D’ – silicon carbide Schottky diode Z-Rec™ rectifier must be uniformly distributed throughout the core to minimise losses because of leakage and fringing fields [19]. Regarding the switches, bipolar power transistors must not be used, even if identical, because they can lead to staircase core saturation caused by imbalanced net flux after a couple of switching cycles. The flux imbalance is because of differences in storage times of the bipolar power transistors, which can alter their turn-on times, and hence the volt– second balance between the two primary windings. This imbalance can be further accentuated by the negative temperature coefficients of the bipolar power transistors, which are hence inappropriate switches for the push–pull circuit [19, 20]. Power metal–oxide semiconductor field effect transistors (MOSFETs), on the other hand, have positive temperature coefficients, which can help to nullify any small volt–second difference caused by different device storage times as the temperature rises. MOSFETs, being majority carrier devices, are thus more suitable for the push–pull switching circuit [19, 20]. 3 Simulation and experimental results Simulation was performed with piecewise linear electrical circuit simulation (PLECS), using those parameters listed in Table 3, which are also the experimental parameters. Fig. 6 shows the results obtained with an input voltage of 70 V and D = 0.55 (or dst = 0.1). The peak dc-link voltage (6th trace) and output voltage (11th trace) are indeed close to the values of 116 and 230 V computed from (9) and (10), respectively. The simulated overall voltage gain of 3.33 is thus in agreement with the gain computed from (10). Also anticipated is the doubled dc-link voltage stress experienced by the switches when they are in the push–pull active state. A scaled-down 230 W prototype was subsequently built in the laboratory, whose layout is shown in Fig. 7. The prototype was tested with a variety of switching frequencies, but for conciseness and better showing of passive component charging and discharging in a switching period, only results related to those parameters listed in Table 2 are reported in Figs. 8–10. Referring first to Fig. 8a for D = 0.5 or no shoot-through, its results clearly show the converter output Fig. 6 Simulated waveforms of the proposed converter when D = 0.55 and K = 4 IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 2817–2824 doi: 10.1049/iet-pel.2013.0957 2821 & The Institution of Engineering and Technology 2014 www.ietdl.org as 230 V when its input is 115 V. This gives a gain of 2 introduced by the VDR only, since the gain of the Y-network is unity under no shoot-through condition. Other characteristic features can be seen in Fig. 8b, where the input diode D1 has been noted to conduct continuously with Fig. 7 Experimental setup Fig. 8 Experimental waveforms of the proposed converter when D = 0.5 (no shoot-through) and K = 4 a Input/output voltage/current of the converter b Gate-source voltage, drain-source voltage, dc-link voltage and voltage across input diode 2822 & The Institution of Engineering and Technology 2014 Fig. 9 Experimental waveforms of the proposed converter when D = 0.55 (10% shoot-through) and K = 4 a Input/output voltage/current of the converter b Gate-source voltage, drain-source voltage, dc-link voltage and voltage across input diode c Drain-source voltage, current through drain-source, transformer secondary voltage and current IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 2817–2824 doi: 10.1049/iet-pel.2013.0957 www.ietdl.org Fig. 10 Experimental waveforms of the proposed converter when D = 0.575 (15% shoot-through) and K = 4 a Input/output voltage/current of the converter b Gate-source voltage, drain-source voltage, dc-link voltage and voltage across input diode c Drain-source voltage, current through drain-source, transformer secondary voltage and current The input voltage is next reduced to 70 V and then 46 V, which for a constant output of 230 V, requires the duty ratio D to be increased to 0.55 and then to 0.575. The respective waveforms obtained after reaching thermal stability are shown in Figs. 9 and 10, from which their respective overall gains are computed as 3.33 and 5 (see 1st and 3rd traces in Figs. 9a and 10a). Also seen in Figs. 9b and 10b are the expected pulsating dc-link voltage waveforms, and voltage waveforms across diode D1, which are found to become more prominent as D increases. In addition, for Fig. 9, its testing conditions have been intentionally set similar to those used for the simulation shown in Fig. 6. The close similarity in results has further strengthened confidence with the analytical studies. The results in Figs. 9 and 10 are however obtained with gains of only 1.67 and 2.5 contributed by the Y-source impedance network. Higher gain of 6 obtained from the Y-source network alone without the isolation transformer and VDR has been demonstrated in [20], but not tested here with the proposed converter. The reason is because of the high average input current demanded, which at the time of testing, could not be supported by power supplies available in the laboratory. To be more specific, the average input current demanded is computed as 12 A with an input voltage of ≃ 20 V, if the output current, output voltage and overall converter gain are set as 1 A, 230 V and 6 × 2 (factor of 2 contributed by the VDR), respectively. Figs. 11a and b show the efficiency of the proposed converter at full load over a range of D and its corresponding input voltage Vin, while keeping the output voltage constant at 230 V. The maximum efficiency recorded at full load is 96.1% at Vin = 115 V and D = 0.5 (no shoot-through time inserted). It falls to 91.1% at Vin = 46 V and D = 0.575 (15% shoot-through time in a switching period). This reduced efficiency at higher voltage gain is, however, experienced by all existing voltage boosting techniques, including transformer boosting, when subjected to the same constant output voltage, current, and hence power conditions set for the experiments. The input current and losses are however not constant, but increase with the D and corresponding voltage gain. Efficiency of the converter at higher gain is thus lower, regardless of which voltage boosting technique has been applied and which parameter has been chosen for increasing the converter gain. The latter means, for the proposed converter, increasing K, rather than D, will also lead to a smaller efficiency value at higher gain. To next illustrate the converter efficiency at different loads, Fig. 11c shows the corresponding efficiency curves obtained for two different input voltages, while keeping the output voltage constant at 230 V. These curves again show that at a higher gain (lower input voltage for a fixed output voltage) the converter efficiency is lower because of reasons clarified earlier. 4 zero forward voltage, and the dc-link voltage has been noted to be always equal to the input voltage, except for some unintended narrow shoot-through notches. These notches are caused by non-zero device switching times, which are unavoidable in practice. The switches have also been noted to withstand twice the dc-link voltage, which as mentioned earlier, is expected for a push–pull circuit. IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 2817–2824 doi: 10.1049/iet-pel.2013.0957 Conclusion An isolated DC/DC converter with a high-voltage gain and a short inductive charging time has been described. It uses a unique Y-source impedance network, a push–pull circuit and a voltage-doubling rectifier, which, when coordinated, provides a versatile topology with many degrees of design freedom for tuning the overall voltage gain. The proportional gain offered by the push–pull transformer is thus not critically important, allowing it to be designed for 2823 & The Institution of Engineering and Technology 2014 www.ietdl.org Fig. 11 Efficiency of the converter against a D(0.5 ≤ D ≤ 0.575) b Input voltage Vin c Load when K = 4 at an output voltage of 230 V isolation purposes and thereby avoiding extreme turns ratios, unlike some other transformer-based converters. The anticipated performance of the converter was verified by simulation and experiment, and the results confirm the theoretical basis and practicality of the proposed converter. 5 References 1 Blaabjerg, F., Chen, Z., Kjaer, S.B.: ‘Power electronics as efficient interface in dispersed power generation systems’, IEEE Trans. Power Electron., 2004, 19, (5), pp. 1184–1194 2 Ismail, E.H., Al-Saffar, M.A., Sabzali, A.J., Fardoun, A.A.: ‘A family of single-switch PWM converters with high step-up conversion ratio’, IEEE Trans. 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Siwakoti, Y.P., Loh, P.C., Blaabjerg, F., Town, G.E.: ‘Y-source impedance network’, IEEE Trans. Power Electron. (Lett.), 2014, 29, (7), pp. 3250–3254 IET Power Electron., 2014, Vol. 7, Iss. 11, pp. 2817–2824 doi: 10.1049/iet-pel.2013.0957