Proceedings of the 10th WSEAS International Conference on CIRCUITS, Vouliagmeni, Athens, Greece, July 10-12, 2006 (pp102-107)
Noise Characterization of CMOS Image Sensors
S. FERUGLIO1, A. PINNA1, C. CHAY2, O. LLOPIS2, B. GRANADO1, A. ALEXANDRE1,
P. GARDA1, G. VASILESCU1
1
LISIF, University Pierre & Marie Curie – Paris 6,
2
LAAS/CNRS, Toulouse,
FRANCE ;
Abstract: - This paper presents noise characterization of a CMOS 0.6-µm image sensors system. The integrated readout
circuit adaptability allows measuring the photocurrent magnitude of each pixel in charge integration mode or in
transimpedance mode. In order to find the minimum detectable signal of this system and to identify the main dominant
noise sources, an accurate noise analysis is performed under dark and illumination conditions. Noise measurement and
simulation with Spectre present a good agreement with the values predicted by the proposed analytical equations.
Key-Words: - CMOS, integrated amplifier, measurement, noise, PPS, simulation.
1 Introduction
For low power and low cost applications, random
addressing, etc, CMOS image sensors are widely used.
However, despite several benefits, CMOS Passive Pixel
Sensors (PPS) and Active Pixel Sensor (APS) have not
yet reached the Charge Coupled Device (CCD) noise
performance. Because of their high dark current value
and a significant noise, CMOS devices are prone to
strong disparities, which severely limit the performance
[1-4].
After introducing the system under investigation in
section 2, in section 3 we present the three operating
modes, which are the reset, the charge integration and
the transimpedance mode. Then, in section 4, a noise
analysis is proposed during the entire operation cycle.
Finally, theory is compared with measurement and
simulation results in section 5.
2 On-Chip Image Sensor System
The investigated sensor contains a 4x4 matrix of PPS
together with an integrated operational amplifier added
on the serial output of the matrix [1, 2]. This on-chip
image sensor system has been fabricated in CMOS AMS
0.6-µm technology. Concerning the pixel itself, there are
two possible configurations. Fig. 1 presents only two
PPS of the matrix associated to the amplifier. Pixel 2, at
the bottom, is in normal configuration (one of the most
popular architecture) and pixel 1, at the top left, has
what is called a reverse configuration [2]. The
photodiodes J1 are made up by using a P+ diffusion layer
on N well and the photodetectors J2 are realised with a
N+ diffusion or N well on a P substrate. Each photodiode
has a reset transistor Mrstθ and a selection transistor Mselθ,
with θ_=_1, 2, …, 16. Mrstθ and Mselθ are NMOS
transistors, which act as switches. The Mrst' switch is a
PMOS. The feedback capacitance Cint, connected
between the input V- and the output Vout, is of type interpoly capacitance.
Concerning the integrated amplifier, the main model
parameters are the following:
Gain bandwidth product GBW = A0fcOA close to
7.9_MHz, with A0 = 87.7 dB;
Offset voltage Voff of about 10 mV;
Common Mode Input Range : [0.4 V ; 3.8 V];
Equivalent input noise voltage en of 0.5 µV/Hz1/2 at
10 Hz and 15 nV/Hz1/2 at 100 kHz.
Note that these values are obtained from Spectre
simulations.
At the output, the signal flows through an analogical
I/O pin to allow monitoring with an oscilloscope and
measurement with a spectrum analyzer.
Fig. 1: Simplified representation of the on-chip image sensor.
1
Proceedings of the 10th WSEAS International Conference on CIRCUITS, Vouliagmeni, Athens, Greece, July 10-12, 2006 (pp102-107)
Both Polθ (with θ = 1 to 16) and Pol , are numerical
signals resulting from the Keil MCB167 V2.0 evaluation
board, associated to the Infineon C167CR
microcontroller [5]. The numerical signals Selθ are
delivered by an integrated multiplexer, associated to the
same microcontroller, while Vp and Vref are voltage
biases generated by an external circuit. Consequently, all
requested DC values are available, in order to provide
reverse bias to all photodetectors.
and a high dynamic range [6-13]. However, a tradeoff
must be made between sensitivity and bandwidth.
In this mode, the reset transistor MrstX (belonging to
the photodetector X) is open, while all other reset
transistors Mrst' and MrstY (with Y = 1 to 16 and Y ≠ X)
remain closed. MselX is also turned-on, whereas the other
selection transistors MselY are turned-off. Consequently,
in the steady-state, the output voltage is proportional to
R(Iph+Idc), where Iph and Idc are the photo- and dark
currents, respectively.
3 Sensor System Operation
3.3 Integration Mode
To provide an improved adaptability with respect to the
operating conditions, the PPS matrix can operate in two
modes (transimpedance or integration), with a reset
phase after the readout of each pixel, just before the next
pixel readout.
The charge integration mode is especially employed at
low-illumination levels [9, 13-18]. However, it cannot
allow a fast or a continuous data conversion. Here, the
conversion time depends on the integration time tint,
which, at its turn, depends on the junction current.
In this mode, MrstX, as well as Mrst' and MselY are
turned-off, whereas MrstY and MselX are in conduction.
Then, the total junction current is integrated on the
capacitance Cint. Hence, the temporal voltage evolution
at the output is linear in (Iph+Idc)tint/Cint.
4 Noise Analysis
Fig. 2: On-chip amplifier during reset.
3.1 Reset Phase
During this phase, the photodetectors are biased with an
appropriate reverse voltage in order to evacuate the
charge on the capacitance Cint. All switches Mrstθ (θ = 1
to 16) as well as Mrst' are closed by Polθ and Pol ,
respectively, whereas the selection transistors Mselθ act
as open switches. Hence, the amplifier is in the follower
mode. This configuration is represented in Fig. 2, where
R is the equivalent channel resistance of Mrst'; Voff is the
offset voltage source of the integrated amplifier; Ioff
represents the offset current due to various leakage
mechanisms (the amplifier itself, the bitline, the switchoff transistors); Cb denotes the parasitic bitline
capacitance, that is evaluated as Cb_=_NCb'_+_COA,
with N being the number of rows times the number of
columns; COA denotes the equivalent capacitance seen at
the amplifier input V-; Cb' corresponds to the pixel
capacity on V-, as well as the stray capacity of the
connecting line.
In the steady-state, the output voltage Vout1 is close to
Vref.
3.2 Transimpedance Mode
The transimpedance mode is currently employed for a
fast detection with a direct current-to-voltage conversion
In order to evaluate the minimum detectable signal, it’s
necessary to find the output noise RMS value at the end
of the readout phase. To do this, assuming that all noise
sources are independent, a noise analysis is carried out
during various operation modes separately.
Fig. 3: Noise equivalent circuit during reset.
4.1 Noise During Reset
At the output, only the noise due to the readout circuit
(amplifier and the feedback elements) is sensed.
However, at each detection node of the matrix, a αkT/C
noise is also present (α being 1 for a complete reset and
1/2 for an incomplete reset), where T is the absolute
temperature and k denotes the Boltzmann constant [19,
20].
The noise equivalent circuit of the follower, in its
steady-state, is proposed in Fig. 3. It contains three main
noise sources [21]:
2
Proceedings of the 10th WSEAS International Conference on CIRCUITS, Vouliagmeni, Athens, Greece, July 10-12, 2006 (pp102-107)
enR, the channel noise of the feedback transistor
Mrst’. As this device operates as a switch, in the
ohmic region, the thermal noise is dominant. Its
Power Spectral Density (PSD) is described by the
following equation:
(1)
Se (f)= R 2 Si (f)=4kTR
nR
nR
en, the equivalent input noise voltage of the
amplifier. It is viewed as a superposition of thermal
noise and 1/f noise, such as:
S e ( f ) = a OA +
n
a fOA
(2)
f
where aOA and afOA are positive real coefficients
deduced from experimental data (expressed in
V².Hz-1 and V², respectively).
in, the equivalent input noise current, mainly arising
from the contribution of the amplifier and the
substrate. Its PSD is given by:
S i ( f ) = a' OA +
n
where a’OA
A².
The total output noise voltage PSD under steady-state
condition has been computed. We find [2]:
⎛
⎛Cj
R ⎜⎜ S i + ⎜
⎜ nD ⎜⎝ Cb
≈ ⎝
2
Sv
nout 2
where
fc3
2
2
2
⎞ ⎛
⎛ ⎛
⎞
⎞
⎞ ⎞
⎟ S ⎟ + ⎜ f ⎟ S + ⎜ 1 + ⎜ f ⎟ ⎟S
i
e
⎜
⎟
⎜
⎟
⎟ n ⎟⎟
nRs
⎜ ⎝ f c 4 ⎠ ⎟ en
f
Se
⎠
⎠
⎝
⎠ ⎝ c3 ⎠
nR
+
2
2
⎛ f ⎞
⎛ f ⎞
⎟⎟
⎟⎟
1 + ⎜⎜
1 + ⎜⎜
⎝ f c6 ⎠
⎝ f c5 ⎠
Cj
is
1
,
=
2πRC j
fc5 =
(
the
f c4 =
2π RCint + Rs C j
1
)
(6)
capacitance,
photodetector
(
(
))
1
,
2π Rs C j + R C b + C j + C int
and f c 6 =
1
.
2πRCint
a' fOA
(3)
f
and a’fOA are expressed in A².Hz-1 and
Since the circuit of Fig. 3 is time-invariant, the
equation of the output noise voltage vnout1 is deduced
from a nodal analysis. Thus, as A0 >> 1, its PSD is given
by [2]:
(
)
⎛ ⎛ f ⎞
⎟⎟
R Si + Si + S e ⎜ 1 + ⎜⎜
n
n ⎜
nR
f
⎝ ⎝ c1 ⎠
Sv
≈
2
nout 1
⎛ f ⎞
⎟⎟
1 + ⎜⎜
⎝ fc2 ⎠
1
1
.
and f c 2 =
with f c1 =
2πRCint
2πR (Cb + Cint )
2
2
⎞
⎟
⎟
⎠ (4)
4.2 Noise in Transimpedance Mode
At low frequency, the noise equivalent circuit of the
acquisition chain is presented in Fig. 4. The newly
introduced elements are:
inD, the noise equivalent current source of the
photodetector. As it is generally admitted [19, 22,
23], only the shot noise is dominant. Its PSD is:
(5)
SinD(f)=2q(I ph + I dc )=2q(sλ Popt + I dc )
with q, the elementary charge ; sλ, the quantum
efficiency and Popt, the optical power.
enRs, the thermal noise voltage of the particular
selection transistor, Rs being its equivalent channel
resistance.
Fig. 4: Noise equivalent circuit in transimpedance mode.
4.3 Noise During Integration Phase
When operating in integration mode, the equivalent
circuit of Fig. 4 remains still valid, provided that R and
enR are both suppressed. Note that during this phase, the
steady-state is never reached. However, as all
components are supposed linear, a frequency-domain
analysis can still be performed. S vnout 3 is then found to
be [2]:
2
Si
⎛ Cj ⎞
nD
⎟ S
Sv ( f ) ≈
+⎜
2
⎜ C ⎟ enRs
nout 3
2πCint f
int
⎠
⎝
(7)
2
2
Si
⎛C ⎞
⎛ Cb + C j + Cint ⎞
n
⎟ S +⎜ j⎟
+⎜
2
en
⎟
⎜
⎟
⎜
C
C
int
⎝ b ⎠ 2πCint f
⎠
⎝
All these noise equations have been implemented in a
MATLAB program in order to check the predicted
numerical values against measurement and simulation.
(
)
(
)
5 Experimental Results
Table 1 presents the main parameters of the
photodetector under investigation. Starting from the
foundry datasheet, the junction capacitance parameters
have been computed. As it was previously proved [23,
24], the junction capacitance value, deduced from the
3
Proceedings of the 10th WSEAS International Conference on CIRCUITS, Vouliagmeni, Athens, Greece, July 10-12, 2006 (pp102-107)
Table 1: Various photodetectors data, at 300 K.
Type
Ndiff-Psub (J1)
Nwell-Psub (J1)
Pdiff-Nwell (J2)
Dimensions
(µm²)
5.80 x 5.80
6.55 x 6.60
11.75 x 11.75
Idc + Iph
measured*
(fA)
at 5 V
Measured Simulated
at 2.5 V
11.59
6.64
3.69
81,76
7.87
13.45
5.69
22,04
45.03
6.52
7.46
22,69
* exposed to sunlight (unknown light intensity).
Cj simulated (fF)
at 0 V
22.76
17.04
98.35
foundry datasheet, compares well with experimental
data.
Concerning the dark current estimation, the adopted
technique consists to average 100 successive
measurement points, which yields the measured values
of Idc and Idc + Iph presented in Table 1. A significant
discrepancy appears between the measured and
computed values (with MATLAB). A possible
explaination must take into account to the following
point:
Ioff has been neglected;
The foundry maybe underestimated the junction
leakage current parameters [24, 25].
Fig. 5: RMS output noise voltage versus frequency, during
reset.
A noise analysis in frequency-domain of any of the
sixteen pixels has been carried out, by assuming that the
readout circuit operates in the follower/transimpedance
mode. During the first phase (follower mode), it is
possible to determine the noise contribution of the
integrated readout circuit alone (amplifier and its
associated feedback elements). Analysis during
transimpedance phase yields the noise of the global
acquisition chain.
Simulations have been also performed under Cadence
design tools together with the AMS CMOS 0.6-µm
design kit and Spectre [26]. For CMOS transistors used
as switches or inside the operational amplifier, the BSIM
3v3 model has been employed. Photodetectors have been
Idc (fA) at 2.5 V
modelled by paralleling a diode with a DC current
generator to account for the carriers generated by light.
As the steady-state is admitted, the small-signal
parameters can be deduced from DC simulation. Thus,
the following parameters have been added to the
numerical model : Vref = 2.5 V; R = 35.11 kΩ;
Cint_=_1_pF; Cb' = 2 fF; COA = 587.3 fF;
afOA_=_2.5_10_12 V²; aOA_= 205.02 10-18 V².Hz-1;
a’OA_=_a'fOA = 0.
Fig 5 presents the output noise plots, obtained during
reset. Experimental data are collected by sweeping the
Vector Signal Analyser HP 89410 between 0.1 Hz and
10 MHz, with an integration window of 3 Hz. Each data
point on Fig. 5 is an ensemble mean value of 256
samples. The previously developed model (eq.(4)) shows
a good agreement with both simulation and measurement
Nevertheless, the level of measured noise is slightly
higher than the predicted value with a relative error less
than 9 % at 100 Hz and less than 14 % at 100 kHz. This
difference can be due to the noise source in which has
been neglected in our calculation. Thus, for fmin_=_2.5 Hz
2
and fmax = 100 kHz, we have found v nout
= 7.87 10-11
1 _ _
V². Finally, Fig. 5 proves that the 1/f noise of the
amplifier is dominant at low frequency but at
frequencies higher than 10 kHz, the thermal noise of
Mrst’ becomes dominant and it imposes a noise floor of
about 30 nV/ Hz . Moreover, it has been noted that if
measurement is made without shielding, interfering
signals of strong amplitude appear close to 1 MHz.
A second measurement campaign has been carried
out at the LAAS/CNRS laboratory in Toulouse. Fig. 6
illustrates the employed setup. Here, the output of the
integrated amplifier goes on a Low Noise Amplifier
(LNA), which is connected to the spectrum analyzer
Avantest R9211B (controlled by a computer). The whole
equipment is enclosed in a Faraday box. Except the
spectrum analyzer and the computer, which are supplied
by 220 V / 50 Hz, the remaining circuits are biased by
internal batteries. Measurements have been performed
between 2.5 Hz and 100 kHz, at an ambient temperature
of 25.5°C. In order to estimate the noise contribution of
the photodetectors, a laser with an optical fiber
illuminates the active surface. The laser is temperaturecontrolled to deliver a wavelength of 830 nm. The
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Proceedings of the 10th WSEAS International Conference on CIRCUITS, Vouliagmeni, Athens, Greece, July 10-12, 2006 (pp102-107)
optical power is adjusted according to the current
through the laser device.
Fig. 7 shows the output noise of the LNA with both
inputs shorted-circuited. At low frequency, we note a
noise in f-1.5 and, at higher frequency, a noise floor
appears close to 0.95 nV/ Hz , with a corner frequency
around 200 Hz. Consequently, the noise level of the
LNA is well below the noise level of the investigated
system on-chip.
same as previously, but, as this photodetector is less
sensitive to the incident 830 nm light, the noise level
variation with the optical power is less significant than in
the case of Fig. 8.
Finally, with Cj = 32 fF and the previously defined
parameters under dark condition, the computed mean
2
square value of the noise voltage at the output vnout
is
3
-10
1.04 10
V² and the same result is obtained by
simulation.
Fig. 6: Setup for noise measurement.
Fig. 8: Output noise of the photodetector J2 associated to the
on-chip transimpedance amplifier, at three different
illumination powers P1, P2 and P3.
Fig. 7: Noise voltage PSD of the LNA versus frequency.
The plot of Fig. 8 refers to the photodiode J2 (NdiffPsub) and the amplifier in transimpedance mode, when
applying various optical powers. In addition, a plot of
the noise power obtained by simulation under Cadence
and MATLAB has been added. Under dark condition,
the shapes of the theoretical and experimental curves are
quite identical with a relative error less than 2.5 % at
100_Hz and at 100 kHz. Besides, if the optical power of
the laser is increased, the shape of the noise PSD
remains the same, the plot being shifted upward.
Consequently, as it is assumed through equations (5) and
(6), the total output noise can be rewritten as:
2
+ H sλ Popt , where H is the transfer
Svnout2 = Svnout2
dark
function between the optical input and the voltage
output.
Fig. 9 presents the noise contribution of the
photodetector J1 (Pdiff-Nwell) associated to the
integrated amplifier. The aspect of the plot remains the
Fig. 9: Output noise of the photodiode J1 associated to the
transimpedance amplifier.
6 Conclusion
A noise characterization of a CMOS PPS fabricated in
CMOS AMS 0.6-µm technology has been presented. In
order to find the minimum detectable signal of this
system in dark and under illumination, an accurate noise
analysis is performed, pertinent to all configurations.
Noise measurement and simulation with Spectre
compare well with the proposed analytical model. At
low frequency, the 1/f noise of the integrated amplifier is
dominant and, at higher frequency, the thermal noise of
the transistor Mrst’ imposes the noise floor.
5
Proceedings of the 10th WSEAS International Conference on CIRCUITS, Vouliagmeni, Athens, Greece, July 10-12, 2006 (pp102-107)
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