ECE342 - Computer Hardware

University of Toronto

Lab 1: Review of Logic Circuit Design and Nios II Processor Programming

1 Introduction
The purpose of this lab is to review some of the material from the ECE241-Digital Systems and ECE243-Computer
Organization courses.
In the first part of this lab exercise, you will review digital logic fundamentals by designing a circuit that
displays a shifting pattern. We will use the Quartus II design software with which you became familiar in ECE241.
In the second part of this lab we will review the Nios II processor programming that you learned in the ECE243
course. You will use the Altera Monitor Program to write and debug C programs for the DE2 Basic Computer,
which is a simple Nios II-based computer system implemented on an FPGA.
Finally, we will introduce the basics of designing computer systems based on the Nios II processor. We will
use the Altera SOPC Builder and Quartus II tools for this purpose.
NOTE: This lab requires reading a fair amount of tutorials. Also, you have to familiarize yourself with several
new tools. In order to successfully complete the lab exercises, you have to make sure to allocate enough time for
preparation.

2 Shifting pattern
The circuit you will design is a shifting pattern across the segments of the 7-segment displays and another pattern
across LEDR lights. The patterns can move at 10 different speeds, the speed is controlled using pushbuttons.

LEDR pattern (A)

You should use 10 red LEDs to shift a 10-bit pattern. LEDR[9] is the MSB, and LEDR[0] is the LSB.

7-segment display pattern (B)

You should use 20 segments across four 7-segment displays (HEX3,2,1,0) to shift a 20-bit pattern. When all
pattern bits are 1s, the 20 segments represent 2525 (red segments as depicted in Figure 1). Note that the other
segments are not used (black segments), they are always off. The MSB is on the top-left segment, and the LSB
on the top right segment. The blue arrows denote adjacent bits in the pattern. Figure 2 shows an example custom

Figure 1: All 1s pattern on the 7-segment displays

pattern that can be displayed. In the left figure, the pattern is shown before shifting one segment (one bit) to the
right. The right figure shows the pattern after the shift.
1

(a) Before shift right

(b) After shift right

Figure 2: Custom pattern on the 7-segment displays

Shifting
You must initialize both pattern A and B on reset (KEY[0]) with some constant. Use SW[0] to enable shifting to
the right, and SW[1] to enable shifting to the left. If both are off the pattern should stall. SW[0] should override
SW[1]. Use SW[2] to shift additional 1s into the pattern. Similarly, use SW[3] to shift additional 0s to the
pattern. For example, the new bits should be added on the left side if shifting to the right is enabled.
If both SW[2] and S[3] are off (no new bits) and SW[1] is on, then the pattern is shifted circularly to the left
by MSB assuming the position of LSB. Other bits are shifted to the left. A circular shift to the right should be
implemented if SW[2],S[3] are off and S[0] is on.

Changing speed
Your circuit should support 10 speeds. Use green LEDs (LEDGs) to display the speed. The number of on
LEDGs should correspond to the speed, e.g. Speed(5) is displayed as the LEDG[4:0] being on. Speed(N ) is
twice as fast as Speed(N 1). Speed(1) should be approximately one shift per second. Use KEY[1] to change
one speed up (double the speed), and KEY[2] to move one speed down (halve the speed).
Preparation
Present the following at the beginning of the lab:
Verilog source code for the shifting pattern circuit.
Simulation of your circuit, with comments explaining the behavior of the circuit. The simulation MUST be
printed before the lab starts.
In lab
In the lab you will have to test circuits you created in the preparation. You must show the operation of the circuit
on the DE2 board.

3 The Nios II Processor Programming and Debugging

Part A
In this part you will review the Nios II processor programming and debugging (http://university.altera.com). You
are required to read the Altera Monitor Program tutorial; the section called Using Device Drivers is optional, so
you may skip this section if desired.
Questions
What is the role of the start symbol?
What is the Nios II JTAG Debug Module and what debugging features does it provide?
What type of breakpoint conditions are supported by the Monitor Program? Describe some examples of
how you could use breakpoints of various types to debug a program.

Part B
Program 1
You will use programs for the computer system called the DE2 Basic Computer. This system is included as
part of the Altera Monitor Program, as mentioned in the tutorial that you read in Part A of this exercise. We will
start with a simple example provided with the Monitor Program. Create a new project in the monitor and select
DE2 Basic Computer as the target system. Specify C program as the program type. Check the box Include a
sample program and select the Getting started sample. Set memory offsets to 0x400. Compile, load and run
the program. What happens when you keep the pushbutton KEY1 pressed (observe HEX display)? Why is this
the case?
Program 2
The purpose of this part is to review the use of interrupts with the Monitor Program, and to discuss how interrupts
are handled with C code. Note that interrupts are discussed both in the Monitor Program Tutorial and the DE2
Basic Computer documentation, so ensure that you have read both documents.
Make a new Monitor Program project as you did for Program 1, above, but this time use the sample program
called Interrupt Example. This program performs a function similar to that in Program 1, except that it does so
using interrupts (instead of polling). Examine the Interrupt Example code (which will have been copied into
your project directory when you made your Monitor Program project.
As a programming exercise, you are to add one interesting feature of your own invention to the interrupt-driven
program, or modify the existing function in some non-trivial way. You can make any type of change that you find
interesting, as long as it is non-trivial (meaning that it requires more than just a few lines of code, and requires
some design effort on your part).
Questions
What does volatile int * KEY ptr =(int*)0x10000050 mean, and how is it different from
int * KEY ptr?
What assembly instruction corresponds to the statement *(KEY ptr+3)=0?
What assembly instruction corresponds to the C macro NIOS2 WRITE IENABLE(0x3)?
Describe how you could modify the program so that the HEX displays would be rotated at twice the speed
as in the sample program
Notice that most of the is written in C, but some parts of the code are still written in (inline) assembly
language. What is the purpose of this assembly language code?
Preparation
Part A: Read the tutorial and answer the questions
Part B: Create the Monitor Program projects and answer the questions
Part B: Write you non-trivial change to the program
In lab
Part B: Demonstrate the operation of Program 2 in which the speed of rotating the displays is changed.
Show that you can set a breakpoint within the interrupt service routine for the KEYs and that you can see
which KEY has been pressed by using the Monitor Program.
Demonstrate the additional interesting feature that you added to the program.

4 Computer System Design with SOPC Builder

In this part you will design your custom computer system. In order to learn how to do this, read the tutorial
Introduction to the SOPC Builder. Make sure to understand and perform the following key steps:
Creating a top-level entity in Quartus II (lights.v)
3

Creating an SOPC Builder project (nios system.sopc).

Adding, connecting and configuring components in SOPC Builder
System generation (which files are generated?)
Compile (i.e. synthesize) your system in Quartus II (which files are the input, and which ones are the output
of this compilation?)

After your system is synthesized, examine the C version of the simple lights program (as per tutorial). Create
a project in the monitor and test the lights program. NOTE: Make sure that you select custom system and then
specify PTF and SOF files for the system you have just designed. You are running the program on your system,
and not on DE2 Basic Computer!
Questions

What are the nios system.sopc, nios system.ptf and nios system.h files?
How does the Nios II processor access peripherals, what is this interface called?
, and the other one
?
For two components to communicate via Avalon Switch Fabric one has to be
What are the base and end addresses of an Avalon slave?
What does memory/s1 (0h - 7fffh) stands for, what is the capacity of this memory?
Examine module nios system at the end of the nios system.v file. It instantiates all modules added by
the user. In addition, there are also several modules generated by SOPC Builder. What are they called and
what is their purpose?
How is this simple lights example in C different from a hardware-only implementation which contains
only the Verilog statement assign LEDs[7:0] = Switches[7:0]
In DE2 Basic Computer, the slider switches do not generate interrupts. In Program 2 we use polling for
the switches. What modifications would you have to make to the DE2 Basic Computer system in order to
support interrupt mode for the switches?

Preparation
Create the entire project and all the required files. Answer the questions.
In lab
Demonstrate the operation of the lights program on your custom system.

5 Notes
To simplify some of the steps a starter kit has been provided on the course website. The starter kit is a ZIP archive
containing a Quartus II project for the shifting pattern circuit.
The tutorials and materials are available from http://university.altera.com website and also from the Blackboard.
In the labs, copy your files to the local hard drive (C:). The tools run much faster when they access the local
disk. The network drive and USB stick are much slower devices. Make sure to backup your files once you are
done with the lab.

6 Marking scheme
Shifting pattern preparation (1 mark)
Nios II programming preparation (1 mark)
SOPC Builder prep preparation (1 mark)
Shifting pattern in-lab (1 mark)
Nios II programming in-lab (1 mark)
SOPC Builder in-lab (1 mark)