Scribd Logo
Upload

Welcome to Scribd!

  • 52 views

    CSE369 Lab1&2 Wi22

    Uploaded by

    Deniz Melek Türk
    The document provides instructions for Lab 1 and 2 of an introductory digital logic course. It introduces Verilog and the development board that will be used. The tasks include: 1) Simulating basic Verilog designs, 2) Investigating logic on the development board, 3) Adding simple logic gates, 4) Designing a circuit to recognize a digit, and 5) Implementing a circuit to recognize multiple digits. Students are evaluated on completing the tasks, minimizing logic gates, simulating their design, and demonstrating their work.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    CSE369 Lab1&2 Wi22

    Uploaded by

    Deniz Melek Türk
    52 views5 pages
    The document provides instructions for Lab 1 and 2 of an introductory digital logic course. It introduces Verilog and the development board that will be used. The tasks include: 1) Simulating basic Verilog designs, 2) Investigating logic on the development board, 3) Adding simple logic gates, 4) Designing a circuit to recognize a digit, and 5) Implementing a circuit to recognize multiple digits. Students are evaluated on completing the tasks, minimizing logic gates, simulating their design, and demonstrating their work.

    Original Title

    CSE369-Lab1&2-Wi22

    Copyright

    © © All Rights Reserved

    Available Formats

    PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    The document provides instructions for Lab 1 and 2 of an introductory digital logic course. It introduces Verilog and the development board that will be used. The tasks include: 1) Simulating basic Verilog designs, 2) Investigating logic on the development board, 3) Adding simple logic gates, 4) Designing a circuit to recognize a digit, and 5) Implementing a circuit to recognize multiple digits. Students are evaluated on completing the tasks, minimizing logic gates, simulating their design, and demonstrating their work.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    52 views5 pages

    CSE369 Lab1&2 Wi22

    Uploaded by

    Deniz Melek Türk
    The document provides instructions for Lab 1 and 2 of an introductory digital logic course. It introduces Verilog and the development board that will be used. The tasks include: 1) Simulating basic Verilog designs, 2) Investigating logic on the development board, 3) Adding simple logic gates, 4) Designing a circuit to recognize a digit, and 5) Implementing a circuit to recognize multiple digits. Students are evaluated on completing the tasks, minimizing logic gates, simulating their design, and demonstrating their work.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 5

    Intro to Digital Logic, Lab 1 (& 2)

    An Introduction to Verilog and Digital Components

    Lab Objectives
    The first lab will introduce you to the Altera’s Terasic DE1-SoC development board and our primary
    design tool this quarter, Intel’s Quartus Prime. Both of these components are very important for all
    future labs so please pay attention.

    We have combined the first two labs into one (with the later due date) to account for delays in
    picking up lab kits. As this is the first lab, we strongly recommend that you treat this as two
    separate labs (i.e., complete Tasks 1-3 around Lecture 2 and then Tasks 4-5 by the due date) so
    that you have sufficient time to deal with any setup issues you may encounter. Even without
    your lab kit, you can complete Tasks 1, 3, 4, and part of 5.

    Task #1 – Verilog Design and Simulation


    The designs in this class will be done through the Intel Quartus Prime software. This is preloaded on
    machines in the department, and you are free to do all the work on these PCs. However, you can install
    the software on your own computer, if desired. If you use macOS, refer to the special instructions in
    .

    You will perform steps from the tutorial MANY times in subsequent labs, so taking notes on how
    to do important tasks will save you lots of time later.

    Open from the course website and complete Sections 0 through 8. You will
    simulate two designs: and . Be sure to do all of the steps and ask the course staff for
    help when you encounter issues. During your lab demo, you will need to show your simulation of
    and give a brief verbal explanation of what actually does.

    Task #2 – Logic Investigation


    Read through from the course website. Make sure you know where the LEDs,
    switches, and pushbuttons are on the DE1 and then connect it to your computer and power on your
    board. Feel free to play around with preloaded program to get a feel for the board inputs and outputs.
    Now finish the rest of to program your board with the provided top-level
    module . The relevant portion of the code is copied below (Figure 1), but the full code should
    be downloaded from the course website. Refer to the code comments and play with the appropriate
    inputs to discern the logical behaviors of our input and output signals:

    1) Which logical value (0 = FALSE = GND, 1 = TRUE = VDD) turns the red LEDs on?

    2) Which position (up or down) of the slider switch outputs a TRUE?

    3) Which position of the pushbutton (pressed or unpressed) outputs a TRUE?

    1
    Figure 1: Starter code for top-level module that defines the inputs and outputs that we will use in Lab 1.

    Task #3 – Add Simple Logic


    Now modify to implement the following additional logic. You will only need to add one line of
    code beneath each comment. Refer to on the course website
    for the syntax for gate modules and logical operators.

    1) Place an inverter (NOT gate) between SW2 and LEDR4.

    2) Use a second inverter to connect the output of the first inverter to LEDR5.

    3) Place a two-input NOR gate between two unused switches and an unused LED (your choice).

    Recompile your modified project and load it onto your board to make sure that it behaves as you would
    expect. Don’t forget to upload your modified alongside your lab report.

    2
    Task #4 – Digit Recognizer (Design)
    Electronics can be cold and impersonal so let’s change that by having your DE1 recognize you! We want
    to design a circuit that will light up an LED only when you input the last digit of your student ID
    number. Your goal is to design the circuit out of NOT, NAND, and NOR gates using the fewest number of
    gates possible.

    To make it fair to those with more “difficult” student ID numbers, inverters hooked directly to a
    switch output are not counted towards the “gates used” total (see Figure 2).

    1) Find the last digit of your student ID number in the “Digit” column of Table 1 below – this is
    known as Binary-coded decimal ( https://en.wikipedia.org/wiki/Binary-coded_decimal ).
    2) Design the circuit by hand that will output a 1 only when the switch code matches your
    particular Digit. Be sure that it also outputs a 0 for invalid inputs (e.g., all switches are 1).

    SW3 SW2 SW1 SW0 Digit


    0 0 0 0 0
    0 0 0 1 1
    0 0 1 0 2
    0 0 1 1 3
    0 1 0 0 4
    0 1 0 1 5
    0 1 1 0 6
    0 1 1 1 7
    1 0 0 0 8
    1 0 0 1 9 Figure 2: Schematic of your breadboard circuit. Only gates used
    Table 1: Map of the last digit of your student ID inside the Digit Recognizer count towards your total "gates used."
    number to the state of switches 0-3. Only use the input NOT gates that help you simplify your design.

    Task #5 – Multi-Digit Recognizer (Implementation)


    Recognizing only one digit is a bit simplistic, so we’d like to scale it up to handle more digits.
    1) Copy your Lab 1 project folder (or unzip a fresh copy of ) into a new Lab
    2 project folder.
    2) Download from the “Files→Labs→Lab 1” page of the course website into your Lab 2
    project folder, add it to your Quartus project, and set it as your top-level module. Note that this
    file contains a prewritten testbench for you to use!

    Note that the testbench uses an “ ” statement to generate the input patterns, with
    delays and a statement. However, the testbench is non-synthesizable (i.e., the code
    doesn’t compile to hardware and is therefore only useful/meaningful in simulation).

    3) In , implement the logic for a circuit that recognizes the last two digits of your student ID
    number. will be the rightmost digit, encoded as in Task #4, and will be the
    next digit, using a similar code (e.g., the digit 8 is encoded as , , , ).
    Make sure to test your design in simulation BEFORE mapping it to the FPGA.

    3
    Lab Grading
    Working Design: 90 points for correctness, style, and testing.
    Logic Minimization: Up to 10 points for using as few logic gates as possible in Task #4.
    Each gate (NOT, NAND, NOR) counts the same, though any NOT gates connected directly to
    a switch input are not counted. The fewer gates, regardless of the number of chips, the
    better the grade.
    Note that we do not care about the number of gates in Part II (Verilog) – we’ll start worrying
    about FPGA efficiency in later labs.

    Lab Demonstration/Turn-In Requirements


    Lab Report (before Wednesday section, submit as PDF on Gradescope)
    • A simple, accurate explanation of what the circuit does. (Note: we do NOT want a
    written description of the circuit gates, we want a description of what it actually does – if you’re
    not sure, see how we described how the circuit works)
    • The value of the signal (TRUE or FALSE) that makes the LEDs light up.
    • The position of the switches (up or down) that cause them to output TRUE.
    • The position of the pushbuttons (pressed or unpressed) that cause them to output TRUE.
    • A circuit diagram of your 1-digit recognizer circuit.
    • A screenshot of the ModelSim simulation for your 2-digit recognizer design (always with
    explanation!).
    • How many hours (estimated) it took to complete this lab in total, including reading, planning,
    designing, coding, debugging, and testing.
    • As separate files, upload your finished code ( and ).
    In-Person Demo (during your demo slot)
    • Demonstrate your working simulation of the circuit.
    • Demonstrate your working NOR and double inverter circuits.
    • Explain your ModelSim simulation of your 2-digit recognizer circuit.
    • Demonstrate your 2-digit recognizer working in hardware.

    Be prepared to demo circuits from separate projects. Compile the bit files for both projects
    ahead of time so that you don’t need to wait during your demo. In order to switch, close your
    current Quartus project, open the next project, open , and then
    load onto the DE1-SoC.

    4
    Lab 1 & 2 Rubric
    Grading Criteria Points

    Q1: description 8 pts

    Q2: LED question 4 pts

    Q3: Switch question 4 pts

    Q4: Pushbutton question 4 pts

    Q5: Circuit diagram of 1-digit recognizer 5 pts

    ▪ Logic minimization 10 pts

    Q6: ModelSim screenshot of 2-digit recognizer 3 pts

    ▪ Explanation of waveforms 5 pts

    Time spent 2 pts

    SystemVerilog code uploaded 5 pts

    LAB DEMO 50 pts

    100 pts

    You might also like