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    Embedded Processors and Memory: Version 2 EE IIT, Kharagpur 1

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    ahamed
    This document discusses digital signal processors (DSPs). It begins by providing an overview of DSP applications and defining DSP tasks. It then describes the architecture of a typical real-time signal processing system including analog-to-digital and digital-to-analog converters. The document also discusses errors introduced during conversion stages. It provides examples of implementing an FIR filter on a general-purpose processor versus a DSP. Specifically, it shows code for an FIR filter on a simple general-purpose processor and describes features of an early DSP (TMS32010) developed by Texas Instruments in the 1980s.

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    Embedded Processors and Memory: Version 2 EE IIT, Kharagpur 1

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    ahamed
    88 views9 pages
    This document discusses digital signal processors (DSPs). It begins by providing an overview of DSP applications and defining DSP tasks. It then describes the architecture of a typical real-time signal processing system including analog-to-digital and digital-to-analog converters. The document also discusses errors introduced during conversion stages. It provides examples of implementing an FIR filter on a general-purpose processor versus a DSP. Specifically, it shows code for an FIR filter on a simple general-purpose processor and describes features of an early DSP (TMS32010) developed by Texas Instruments in the 1980s.

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    This document discusses digital signal processors (DSPs). It begins by providing an overview of DSP applications and defining DSP tasks. It then describes the architecture of a typical real-time signal processing system including analog-to-digital and digital-to-analog converters. The document also discusses errors introduced during conversion stages. It provides examples of implementing an FIR filter on a general-purpose processor versus a DSP. Specifically, it shows code for an FIR filter on a simple general-purpose processor and describes features of an early DSP (TMS32010) developed by Texas Instruments in the 1980s.

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    88 views9 pages

    Embedded Processors and Memory: Version 2 EE IIT, Kharagpur 1

    Uploaded by

    ahamed
    This document discusses digital signal processors (DSPs). It begins by providing an overview of DSP applications and defining DSP tasks. It then describes the architecture of a typical real-time signal processing system including analog-to-digital and digital-to-analog converters. The document also discusses errors introduced during conversion stages. It provides examples of implementing an FIR filter on a general-purpose processor versus a DSP. Specifically, it shows code for an FIR filter on a simple general-purpose processor and describes features of an early DSP (TMS32010) developed by Texas Instruments in the 1980s.

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    Module

    2
    Embedded Processors and
    Memory
    Version 2 EE IIT, Kharagpur 1
    Lesson
    7
    Digital Signal Processors
    Version 2 EE IIT, Kharagpur 2
    Instructional Objectives
    After going through this lesson the student would learn
    o Architecture of a Real time Signal Processing Platform
    o Different Errors introduced during A-D and D-A converter stage
    o Digital Signal Processor Architecture
    o Difference in the complexity of programs between a General Purpose Processor
    and Digital Signal Processor

    Pre-Requisite
    Digital Electronics, Microprocessors

    Introduction
    Evolution of Digital Signal Processors
    Comparative Performance with General Purpose Processor

    7.1 Introduction
    Digital Signal Processing deals with algorithms for handling large chunk of data. This branch
    identified itself as a separate subject in 70s when engineers thought about processing the signals
    arising from nature in the discrete form. Development of Sampling Theory followed and the
    design of Analog-to-Digital converters gave an impetus in this direction. The contemporary
    applications of digital signal processing was mainly in speech followed by Communication,
    Seismology, Biomedical etc. Later on the field of Image processing emerged as another
    important area in signal processing.

    The following broadly defines different processor classes


    • General Purpose - high performance
    ƒ Pentiums, Alpha's, SPARC
    ƒ Used for general purpose software
    ƒ Heavy weight OS - UNIX, NT
    ƒ Workstations, PC's
    • Embedded processors and processor cores
    ƒ ARM, 486SX, Hitachi SH7000, NEC V800
    ƒ Single program
    ƒ Lightweight, real-time OS
    ƒ DSP support
    ƒ Cellular phones, consumer electronics (e. g. CD players)
    • Microcontrollers
    ƒ Extremely cost sensitive
    ƒ Small word size - 8 bit common
    ƒ Highest volume processors by far
    ƒ Automobiles, toasters, thermostats, ...

    Version 2 EE IIT, Kharagpur 3


    A Digital Signal Processor is required to do the following Digital Signal Processing tasks in real
    time
    • Signal Modeling
    ƒ Difference Equation
    ƒ Convolution
    ƒ Transfer Function
    ƒ Frequency Response
    • Signal Processing
    ƒ Data Manipulation
    ƒ Algorithms
    ƒ Filtering
    ƒ Estimation

    What is Digital Signal Processing?

    Application of mathematical operations to digitally represented signals


    ƒ Signals represented digitally as sequences of samples
    ƒ Digital signals obtained from physical signals via transducers (e.g., microphones) and
    analog-to- digital converters (ADC)
    ƒ Digital signals converted back to physical signals via digital-to-analog converters
    (DAC)
    ƒ Digital Signal Processor (DSP): electronic system that processes digital signals

    Signal Processing
    Analog Processing
    Analog Processing

    Sensor Analog Processor


    Measurand Conditioner ADC
    LPF

    Digital Processing

    DSP Analog Processor


    DAC
    LPF

    Fig. 7.1 The basic Signal Processing Platform

    The above figure represents a Real Time digital signal processing system. The measurand can be
    temperature, pressure or speech signal which is picked up by a sensor (may be a thermocouple,
    microphone, a load cell etc). The conditioner is required to filter, demodulate and amplify the
    signal. The analog processor is generally a low-pass filter used for anti-aliasing effect. The ADC
    block converts the analog signals into digital form. The DSP block represents the signal
    processor. The DAC is for Digital to Analog Converter which converts the digital signals into

    Version 2 EE IIT, Kharagpur 4


    analog form. The analog low-pass filter eliminates noise introduced by the interpolation in the
    DAC.

    ADC
    x (t ) xs ( t ) xq ( t ) bbits
    Sampler Quantizer Coder
    x ( n) xq ( n ) ⎡⎣ xb ( n ) ⎤⎦
    p(t )

    DAC
    bbits
    Decoder Sample/hold
    ⎡⎣ xb ( n ) ⎤⎦ y ( n)

    Fig. 7.2 D-A and A-D Conversion Process


    The performance of the signal processing system depends to the large extent on the ADC. The
    ADC is specified by the number of bits which defines the resolution. The conversion time
    decides the sampling time. The errors in the ADC are due to the finite number of bits and finite
    conversion time. Some times the noise may be introduced by the switching circuits.

    Similarly the DAC is represented by the number of bits and the settling time at the output.
    A DSP tasks requires
    ƒ Repetitive numeric computations
    ƒ Attention to numeric fidelity
    ƒ High memory bandwidth, mostly via array accesses
    ƒ Real-time processing
    And the DSP Design should minimize
    ƒ Cost
    ƒ Power
    ƒ Memory use
    ƒ Development time

    Take an Example of FIR filtering both by a General Purpose Processor as well as DSP

    Example
    FIR Filtering
    x (k ) y (k )
    h(k )

    Version 2 EE IIT, Kharagpur 5


    y ( k ) = ( h0 + h1 z −1 + h2 z −2 + L + hN −1 z N −1 ) x ( k )
    = h0 x ( k ) + h1 x ( k − 1) + h2 x ( k − 2 ) + L + hN −1 x ( k − N + 1)
    N −1
    = ∑ hi x ( k − i ) = h ( k ) * x ( k )
    i =0

    An FIR (Finite Impulse Response filter) is represented as shown in the following figure. The
    output of the filter is a linear combination of the present and past values of the input. It has
    several advantages such as:
    ƒ Linear Phase
    ƒ Stability
    ƒ Improved Computational Time

    x (k)
    1 h0

    z-1 h1
    y (k)
    -1
    Σ
    z h2

    z-1 hN -1
    Fig. 7.3 Tapped Delay Line representation of an FIR filter

    FIR filter on (simple) General Purpose Processor


    loop:
    lw x0, (r0)
    lw y0, (r1)
    mul a, x0,y0
    add b,a,b
    inc r0
    inc r1
    dec ctr

    Version 2 EE IIT, Kharagpur 6


    tst ctr
    jnz loop
    sw b,(r2)
    inc r2

    This program assumes that the finite window of input signal is stored at the memory location
    starting from the address specified by r1 and the equal number filter coefficients are stored at the
    memory location starting from the address specified by r0. The result will be stored at the
    memory location starting from the address specified by r2. The program assumes the content of
    the register b as 0 before the start of the loop.

    lw x0, (r0)
    lw y0, (r1)

    These two instructions load x0 and y0 registers with values from the memory location specified
    by the registers r0 and r1 with values x0 and y0

    mul a, x0,y0

    This instruction multiplies x0 with y0 and stores the result in a.

    add b,a,b
    This instruction adds a with b (which contains already accumulated result from the previous
    operation) and stores the result in b.

    inc r0
    inc r1
    dec ctr
    tst ctr
    jnz loop

    The above portion of the program increment the registers to point to the next memory location,
    decrement the counters, to see if the filter order has been reached and tests for 0. It jumps to the
    start of the loop.

    sw b,(r2)
    inc r2

    This stores the final result and increments the register r2 to point to the next location.

    Let us see the program for an early DSP TMS32010 developed


    by Texas
    Instruments in 80s.
    It has got the following features
    • 16-bit fixed-point
    • Harvard architecture separate instruction and data memories
    • Accumulator

    Version 2 EE IIT, Kharagpur 7


    • Specialized instruction set Load and Accumulate
    • 390 ns Multiple-Accumulate(MAC)

    TI TMS32010 (Ist DSP) 1982

    Instruction
    Memory
    Processor
    Data
    Memory
    Datapath:
    Mem
    T-Register

    Multiplier
    P-Register
    ALU

    Accumulator

    Fig. 7.4 Basic TMS32010 Architecture

    The program for the FIR filter (for a 3rd order) is given as follows

    Here X4, H4, ... are direct (absolute) memory addresses:


    LT X4 ;Load T with x(n-4)
    MPY H4 ;P = H4*X4
    ;Acc = Acc + P
    LTD X3 ;Load T with x(n-3); x(n-4) = x(n-3);
    MPY H3 ; P = H3*X3
    ; Acc = Acc + P
    LTD X2
    MPY H2
    ...
    • Two instructions per tap, but requires unrolling
    ; for comment lines

    Version 2 EE IIT, Kharagpur 8


    LT X4 Loading from direct address X4
    MPY H4 Multiply and accumulate
    LTD X3 Loading and shifting in the data points in the memory
    The advantages of the DSP over the General Purpose Processor can be written as Multiplication
    and Accumulation takes place at a time. Therefore this architecture supports filtering kind of
    tasks. The loading and subsequent shifting is also takes place at a time.

    II. Questions

    1. Discuss the different errors introduced in a typical real time signal processing systems.

    Answers

    Various errors are in


    ADC
    i. Sampling error
    ii. Quantization
    iii. Coding
    Algorithm
    iv. in accurate modeling
    v. Finite word length
    vi. Round of errors
    vii. Delay due to finite execution time of the processor
    DAC
    viii. Decoding
    ix. Transients in sampling time

    Version 2 EE IIT, Kharagpur 9

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