Traffic Light Project Final
Traffic Light Project Final
Traffic Light Project Final
Analog Project
Third Year of Engineering By
Department of Electronics and Telecommunication Engineering Fr. C. Rodrigues Institute of Technology Sector - 9A, Vashi, Navi Mumbai 400 703 UNIVERSITY OF MUMBAI
CERTIFICATE OF APPROVAL
Project Entitled:
Submitted by:
YATEESH LULLA
301032
In the subject Electronic Hardware Workshop of the degree of T.E. in "Electronics and Telecommunication Engineering" is approved.
Subject teacher
TABLE OF CONTENTS
ABSTRACT INTORDUCTION CIRCUIT DESCRIPTION COMPONENTS LIST PIN CONFIGURATION OF ICS USED DESIGN AND LAYOUT APPLICATION CONCLUSION REFERENCES DATA SHEET
ABSTRACT This project operates red, green and yellow leds in the correct sequence for a traffic light. This project uses a 555 astable circuit to provide clock pulses for the 4017 counter.
INTRODUCTION
This project incorporates 3 leds red yellow and green. The time taken for the entire sequence of operation can be varied from 7 secs to about 2 minutes by adjusting the 1M preset The 555 astable circuit provides clock pulses for the 4017 counter which has ten outputs namely Q0 to Q9 Each output becomes high in turn as the clock pulses are received. Appropriate outputs are combined with diodes to supply the yellow and green LEDs. The red LED is connected to the 10 output which is high for the first 5 counts (Q0-Q4 high), this saves using 5 diodes for red and simplifies the circuit.
CIRCUIT DESCRIPTION
PARTS REQUIRED
resistors: 470 3, 22k, 100k capacitors: 0.1F, 1F , 10F diodes: 1N4148 6 LEDs: red, yellow, green 1M preset, horizontal 555 timer IC, such as NE555 4017 counter IC DIL sockets for ICs: 8-pin, 16-pin
This project uses a 555 astable circuit to provide clock pulses for the 4017 counter. 555 astable An astable circuit produces a square wave This is a digital waveform with sharp transitions between low (0V) and high voltages The circuit is called an astable because it is not stable in any state: the output is continually changing between 'low' and 'high'.
4017 decade counter (1-of-10) The count advances as the clock input becomes high, each output Q0-Q9 goes high in turn as counting advances The reset input should be low (0V) for normal operation (counting 0-9). When high it resets the count to zero (Q0 high).Counting to less than 9 is achieved by connecting the output (Q0-Q9) to reset The disable input should be low (0V) for normal operation. When high it disables counting so that clock pulses are ignored and the count is kept constant. The 10 output is high for counts 0-4 and low for 5-9, so it provides an output at 1/10 of the clock frequency.
DESIGN/LAYOUT
APPLICATION Ramp metering Timers Fire station Medical emergency entrance At the entry and exit of car washes
CONCLUSION The main advantage is that it improves transport service and traffic flow and it doesnt cost much The problems that one might have to deal with is that of excessive delay And disobedience of signals The future scope of this project is that its efficiency can be improved Using microprocessor (8086) and that it can be used as a remote traffic Controller
REFERENCES