Thomas Barber Jr.

, Phil Carvey, and Anantha Chandrakasan

ncreasingly, the wireless communications industry has been moving toward networks that communicate over smaller areas at lower power levels (Table 1).Until recently, most wireless communications were in the form of satellite transmissions. In the early 90s, the mobile cellular phone industry exploded and work has begun on short range wireless networks to send data (e.g. Xeroxs Ubiquitous Computing project [ l ] a n d Berkeleys InfoPad Project 121). BBNs BodyLANTM project proposes to take this progression one step further, by lowering the power consumption for extremely short range systems by more than an order of magnitude (see Winning Wireless Technology). Such a system will be a key enabling technology in applications such as personal intertial navigation, nonevasive patient monitoring, drug infusion, and sports training. Micro-power multi-axis accelerometers, coupled with an RF wireless modem could, for example, give the position and velocity of body components and the head of a golf club during a swing. Real time feedback (from a wearable computer exeJuly 1996

cuting a golf training program) could create training techniques not currently possible. Designing a low power system of this type requires an understanding of the capabilitiesof VLSI technology, the interrelation between hardware and software techniques, and some knowledge of radio frequency propagation.In this article, we will discuss the engineering pitfalls to avoid, and the tradeoffs inherent, in such a design, using our experience with BodyLan as a starting point for further development of such a system.

gorithms, architecture circuit/logic, and the general layout of the system 141. For the BodyLAN system, algorithm optimization included determining the optimal network topology, partitioning system functions between personal electronic accessories (PEAs) and the wearable base station, and optimizing ithe communications protocol.
Network Protocol To achieve low power consumption, each PEA communicates with the HUB using FM modulated lburrts of rf energy. The BodyLAN systern uses a time division multiple access (TDIUA) communications protocol. Using the TDMA protocol, each communi29

System Design
Low-power integrated circuit design involves optimizing the communications al8755-3996/96/$5.00019961EEE

.__ . . . .- ... . .

. . ~.

.
. . . ~ i

Table 1: Comparing Various Wireless Networks .. ... . . . . . . . . . . . . . . . ___. . . . . .

~

->--

System
I

Range
~~

Typical Bit Rate

I

Transmit Power

satellite 131 Mobile Phone Wireless Lan [2]

23000 miles

155 Mbls 35 kbls

2 Mbls

10-1oow
0.1-1

500-1000 feet
15-25 feet 6-10 feet

0.1-1 mW

BodyLANTM

90 kbls

10-1ooopw

1 . PEA block diagram

cations event (transmission or reception) is scheduled at fixed points in time. By employing error correction codes and positioning the bursts uniquely between BodyLANs, we can achieve a prescribed link error rate even when multiple BodyLANs share the same physical volume and frequency band. One method of reducing the power consumption is to exploit the low duty cycle, d, of the communicationslink. The power consumption, as a function of the duty cycle, is equal, there is no benefit from a reduced duty cycle. In order to achieve large power reductions due to low duty cycle, it is extremely important that those portions of the modem that are powered continuously operate at microwatt levels. The continuously powered modem sections fall into three areas: maintaining synchronization, creating burst events, and maintenance functions. The maintenance functions include generating internal operating voltages, tuning filters, and matching networks, and especially regulating the turn-on frequency of the local (rf) oscillator. Each PEA contains a micro-power voltage-controlled crystal oscillator (VCXO) operating at 4 MHz, which serves as the timing base for all PEA functions. This
Circuits & Devices

where Puctiveand Pinactiveis the power consumed when the circuit is active, and inactive, respectively. When both parameters are

PEA Design
BodyLAN sections of our prototype (Fig. 1) include receiver and transmitter sections, the 4 MHz VCXO frequency reference previously mentioned, a battery interface to create the various voltage supply voltages, a microprocessor to execute procedure calls, and a CMOS controller chip implementing all other functions. Microprocessor procedure calls implement all complex communications and transducer control functions. After the PEA and HUB are phase synchronized, the PEA enters the active mode. In this mode, the controller sequentially accesses instructions from TDMA memory and executes each instruction at a specific time relative to the start of the frame. Most instructions have the side effect of generating event calls to the microprocessor. Each event call corresponds to a communications action (transmission or reception). During the periods between instruction executions, virtually the entire modem is powered off. Figure 2 shows the PEA control flow.

2. PEA control flow

Digital Hardware There are two major methods of reducing the power consumption in digital circuits: reducing the supply voltage to the lowest possible level, and reducing the switched capacitance (proportional to the number of transitions). In CMOS logic, the power dissipation is inainly due to the charging and discharging of parasitic capacitances associated with logic gates and interconnects. It is given by:

3. Shift register (a) without parallelization; (b)with two level parallelism.

VCXO is phase and frequency locked to the HUB via receipt of beacons transmitted by the HUB. The HUB repetitively broadcasts a sequence of eight beacons per frame at 30.52 frames/s. Each beacon consists of a sequence of eight 2 ps rf bursts spread out over a period of 320 ps, with each burst containing four FM modulated bits. Both the locations of the beacons within a frame, and the beacon bit sequence, are unique for each BodyLAN. This assures that a PEA can discriminate beacons broadcast by its home HUB. Once a PEA is locked to the HUB, a communications link can be established by
July 1996

the HUB by interacting with the PEA DSP via a bi-directional overhead channel. The HUB can interrogate the PEA to determine what application is needed and what are the expected bandwidth requirements. The HUB then downloads an appropriate TDMA plan to the PEA and enables the PEA to transmit and/or receive according to 1 hedownloaded TDMA plan. Multiple TDlMA plans are normal and expected with switchover between one plan and anofher achieved within one frame period. All data transmitted between PEA and HUB consists of three two microseconds rf bursts spread out over TDMA slots averaging 120 ps

where a is the activity factor, Cis the physiis the supply voltage, cal capacitance, VDD andfis the clock frequency. The power dissipation is proportional to the square of the supply voltage and directly proportional to the number of transitions. Therefore, to obtain the minimum energy solution the supply voltage should first be reduced with the fixed supply voltage. As the supply voltage is decreased, the circuit delay is increased, limiting the magnitude of voltage reduction possible. One approach to operate at low supply voltage is to exploit pipelining and parallelism [4]. To minimize the supply voltage, the critical path of the integrated circuit should be kept as short as possible. This can be accomplished through the strict use of two-level random logic and tree structures for compu31

Modem A modem such as designed for BodyLAN can be partitioned into receiver and transmitter sections sharing a common local oscillator and oscillator PLL. Between bursts, all sections should be powered down. As many circuits as possible should remain continuously biased at fractions of a microamp. In the 500 ns period prior to each burst in our system, the bias currents are switched from fractions of a microamp to tenshundreds of microamps (normal operation). By combining balanced circuits with this commonly used biasing technique, we achieve startup times of less than 500 ns. There are three major modes of operation 4. Power consumption in the modem: receive, transmit, and oscillator frequency adjust. In the receive mode, tation. The critical path of the BodyLANTM ters normalized to the case when there is no only the receiver and local oscillator are powered. In the transmit mode, only the controller chip, for example, is equivalent to parallelism [5]. transmitter and local oscillator are powered. a 6-bit ripple adder, resulting in supply voltParallelism has been used in the Bodyages as low as 1 V, even using aprocess with LAN system to implement a 520-bit 32 tap In the oscillator frequency adjust mode, the threshold voltages of VTN= 0.7 and VTP= digital matched filter at half power con- local oscillator and oscillator PLL sections are powered. When powered on, the re0.9V. sumption of a standard implementation. A ceiver, transmitter, local oscillator, and freProper choice of algorithm and architecreduction of only 50 percent was achieved quency PLL, draw 1600, 1200, 600, and ture are key to minimizing the amount of in the matched filter case because of the 1400 PA, respectively. The oscillator PLL capacitance switched per cycle. There are two types of transitions: computational and overhead in the parallel structure to extract power consumption is relatively high because of the use of a commercial prescaler. spurious. Computational transitions are many taps. The receiver converts the FM modulated The duty ratio of a system can also be those transitions necessary to perform the given logic function. Often, however, due to used to reduce the power consumption, as carrier into a digital bit stream using direct circuit hazards or critical races, a node can shown in Eq. 1, by reducing the power dis- conversion. Commonly used in pagers, ditransition multiple times inside a clock pe- sipated when the system is inactive. For the rect conversion receivers offer low power riod before settling to correct logical value. BodyLAN system, we developed a micro- operation because there is no active stage for These extra transitions are called spurious or controller to reduce the power dissipation of performing frequency conversion, no image frequency issues, and out-of-band rejection glitching transitions, and should always be an inactive subsystems to the equivalent via low pass filters. A block diagram of the avoided. With proper choice of algorithm, power reduction of a single inverter. The BodyLAN receiver is shown in Fig. 5. architecture, and logic design, spurious tranpower consumption necessary to implement A dipole antenna for the receiver is sitions can be minimized (and in some cases eliminated), leaving the minimum number a typical TDMA plan is approximately 1 matched to the low noise amplifier (LNA) device with a tuned circuit. Increasing bias of transitions necessary to compute a result. nJ/bit. The number of transitions per cycle can still be further reduced by spreading the computational transitions over a number of cycles (Le., using parallelism). For example, the computational transitions of a shift register of length L, clocked a t 5 can be reduced by using U n shift-registers in parallel, and clocked at f/n, as shown in Figure 3 (shown for a case with n = 2). Ideally, this technique gives a power reduction of l/n. However, the overhead necessary to produce the parallel system (i.e., the multiplexer, producing the excess clock phases, and routing) eventually exceeds the benefit of the parallel approach. This is shown in Fig. 4, which gives the power dissipation for shift regis- 5. BodyLAN receiver, local oscillator, and PLL oscillator.
32 Circuits & Devices

current of the cascoded NPN transistor LNA stage reduces its noise at the expense of increased power consumption. A bias current of 400 yA balances the noise contribution of the LNA gain transistor with the noise generated in antenna matching network inductor. Conventional 1 & Q mixers, followed by low pass linear phase filters, follow the LNA. DC blocking amplifiers with a low pass rolloff of 100 kHz and a highpass rolloff of 1.2 MHz provide filtering and gain. L Q mixers then pass The baseband I & through phase shifters producing (I, I) and (Q, Q). These phase shifters have a crossover frequency of 1.2 MHz. I and I are separated by 90 degrees. Demodulation is effected by hard limiting I * Q -I * Q. This demodulator scheme, commonly used in pagers, shows excellent behavior regardless of amplitude and phase errors between the I & Q local oscillator (LO) mixer inputs. All receiver stages except the LNA are balanced. Mixers are biased at 200 yA with external passive low pass filters. The I and Q mixers are driven directly from phase splitters coupled into the oscillator. Phase errors between I and Q mixer outputs due to the phase splitting resistances are under 8 degrees. This technique reduces the power consumption compared to conventional approaches employing buffer stages. Little frequency shift is observed when the mixers are powered on and off. This is not the case when the transmitter is powered on and off. Accordingly, the LO signals are buffered before driving the transmitter driving amplifier. In conventional modems, the transmitter is by far the largest power consumer. In addition, it typically employs a large antenna, requires a matching network, and multistage amplifiers. These components both add to the cost and normally preclude a single chip solution. In BodyLAN, by contrast, the minimal range and very small size constraint radically change many conventional design notions.

FCC Part 15 Specification allows for unregulated transmission in the 320-400 Mhz band, provided the radiated field strength is below 200 pV/m at 3 meters 1161. If the duty cycle is 0.05, the peak field strengths is 8000 pV/m at 1.5 meters. This corresponds with a peak radiated power of only 4.8 kW. As we envision PEAS being about 20 mm in diameter and 8-10 mm thick, the transmit antenna has a low radiation resistance and a high quality factor, Q (not to be confused with the Q mixer). Accordingly, the antenna drive efficiency will be very low as most of the power will be dissipated as heat in the antenna and drive transistors. The BodyLAN transmitter employis a single turn transmit antenna having an inductance of 45 nH, and driven by a balanced tuned amplifier. Since the antenna Q is substantially lowered by drive transistor losses, only manual tuning is required to achieve matching over the expected temperature range. A gain of 30 dB has been observed with a bias of 1000 FA. Marginal transinit power consumption is thus less than 3.5 nJ/bit. Table 2 shows the power consuniption breakdown of the various system components, and serves as a suitable startling point for those wishing to design such a system from scratch.

Thomas Barber is currently a Design Engineer at Analog Devices, Inc. His primary research has been on low-power imp l e m e n t a t i o n of c o m m u n i c a t i o n s algorithms. Phil Carvey is a Division Engineer at BBN Inc. His recent research focus has been on low-power body-worn electronics and multi-gigabit TCP/IP routers. Mr. Carvey is currently integrating the BodyLAN modem into a static LCD display for mapping applications.
Anantha Chandrakasan is currently the Analog Devices Career Development Assistant Professor of Electronics Engineering and Computer Science at MIT. His interests include the ultra low power implementation of DSPs, wireless sensors and multimedia devices, emerging technologies, and CAD tools for VLSI.

References 1. M. Weiser, Some Computer Science Issues in Ubiquitous Computing, Communications of the ACM, pp. 75-84, July 1993.
2. Samuel Shong, et. al., A Monolithic CMOS Radio System for Widcband CDMA Communications, Calgary Wireless 94 Conference, July

1994.
3. M.A. Berga.mo, D. J. Hoder, Gigabit Satellite Nctwork Using NASAs Advanced Communication Technology Satellite (ACTS):Features, Cap a b i 1it i e s , an d Ope ratio n s, Pucfic

1 Section

1 Power (nJlbit) 1
1 7 1

I RF transmit

Telecommunications Conference, January 22-26,

1 RF receive

1995. 4. A. P. ChaIIdrdkdsLUI, R.W. Brodersen, LowPower Digirul CMOS Design, Kluwer Academic Publishers. June 1995.
5. Thomas Barber, BodyLANTM: A Low Power Communications System, MS Thesis, MIT,
1996.

3 1.5
50 l

1 Microprocessor
1 Matched filter

1
I
I

1
I
l

1 Microcontroller

Acknowledgment The BodyLan project was completed with funding from ARPA Grant No. DABT6394-C-0017. BBN has applied for a patent on the BodyLAN technology. CD

6. The Code of Federal Regulations Title 47, Telecommunications,Part 15, Radio Frequency Devices, Subpart C. Intentional Radiators, Section 15.209,Radiated Emissions Limits; General Requirements.

July 1996

33