Unit

THE 80386 AND 80486 MICROPROCESSOR

-80386 Microprocessors -Speci ! 80386 Re"isters -80386 Me#or$ M n "e#ent -Mo%in" to Protecte& Mo&e -'irt( ! 8086 Mo&e -T)e Me#or$ P "in" Mec) nis# -80486 Microprocessor -80386 A&&ressin" Mo&es -Instr(ction Set

Introduction to the 80386

T)e 80386 is n &% nce& 32-*it #icroprocessor opti#i+e& ,or #(!tit s-in" oper tin" s$ste#s n& &esi"ne& ,or pp!ic tions nee&in" %er$ )i") per,or# nce. T)e 32-*it re"isters n& & t p t)s s(pport 32-*it &&resses n& & t t$pes. T)e processor c n &&ress (p to ,o(r "i" *$tes o, p)$sic ! #e#or$ n& 64 ter *$tes /20/461 *$tes1 o, %irt( ! #e#or$. T)e onc)ip #e#or$- # n "e#ent , ci!ities inc!(&e &&ress tr ns! tion re"isters2 &% nce& #(!tit s-in" ) r&3 re2 protection #ec) nis#2 n& p "e& %irt( ! #e#or$. Speci ! &e*(""in" re"isters pro%i&e & t n& co&e *re -points e%en in ROM-* se& so,t3 re. T3o %ersions o, 80386 re co##on!$ % i! *!e4 51 80386D6 2180386S6

80386D6 32 *it &&ress *(s 56 *it & t *(s P c- "e& in 532 pin cer #ic p c- "e A&&ress 478 o, #e#or$

80386S6 24 *it &&ress *(s 32*it & t *(s 500 pin ,! t pin "ri& rr $/P7A1 56 M8 o, #e#or$

80386S6 3 s &e%e!ope& ,ter t)e D6 ,or pp!ic tion t) t &i&n9t re:(ire t)e ,(!! 32-*it *(s %ersion.It is ,o(n& in # n$ PCs (se t)e s #e * sic #ot)er *o r& &esi"n s t)e 80286.Most pp!ic tion !ess t) n t)e 56M8 o, #e#or$ 2so t)e S6 is pop(! r n& !ess cost!$ %ersion o, t)e 80386 #icroprocessor. T)e 80386 cp( s(pports 56- no4o, se"#ents n& t)(s tot ! %irt( ! #e#or$ sp ce is 478 ;56 -<64 ter *$tes Me#or$ # n "e#ent section s(pports 'irt( ! #e#or$ P "in" 4 !e%e!s o, protection 20-33 MH+ ,re:(enc$

Architecture of 80386
T)e Intern ! Arc)itect(re o, 80386 is &i%i&e& into 3 sections. Centr ! processin" (nit/CPU1 Me#or$ # n "e#ent (nit/MMU1 8(s inter, ce (nit/8IU1 Centr ! processin" (nit is ,(rt)er &i%i&e& into E=ec(tion (nit/EU1 n& Instr(ction (nit/IU1 E=ec(tion (nit ) s 8 7ener ! p(rpose n& 8 Speci ! p(rpose re"isters 3)ic) re eit)er (se& ,or ) n&!in" & t or c !c(! tin" o,,set &&resses.

>T)e Instr(ction (nit &eco&es t)e opco&e *$tes recei%e& ,ro# t)e 56-*$te instr(ction co&e :(e(e n& rr n"es t)e# in 3- instr(ction &eco&e& instr(ction :(e(e. >A,ter &eco&in" t)e# p ss it to t)e contro! section ,or &eri%in" t)e necess r$ contro! si"n !s. T)e * rre! s)i,ter incre ses t)e spee& o, !! s)i,t n& rot te oper tions.

> T)e #(!tip!$ ? &i%i&e !o"ic i#p!e#ents t)e *it-s)i,t-rot te !"orit)#s to co#p!ete t)e oper tions in #ini#(# ti#e. >E%en 32- *it #(!tip!ic tions c n *e e=ec(te& 3it)in one #icrosecon& *$ t)e #(!tip!$ ? &i%i&e !o"ic. >T)e Me#or$ # n "e#ent (nit consists o, Se"#ent tion (nit n& P "in" (nit. >Se"#ent tion (nit !!o3s t)e (se o, t3o &&ress co#ponents2 %i+. se"#ent n& o,,set ,or re!oc *i!it$ n& s) rin" o, co&e n& & t . >Se"#ent tion (nit !!o3s se"#ents o, si+e 47*$tes t # =. >T)e P "in" (nit or" ni+es t)e p)$sic ! #e#or$ in ter#s o, p "es o, 4-*$tes si+e e c). >P "in" (nit 3or-s (n&er t)e contro! o, t)e se"#ent tion (nit2 i.e. e c) se"#ent is ,(rt)er &i%i&e& into p "es. T)e %irt( ! #e#or$ is !so or" ni+es in ter#s o, se"#ents n& p "es *$ t)e #e#or$ # n "e#ent (nit. T)e Se"#ent tion (nit pro%i&es 4 !e%e! protection #ec) nis# ,or protectin" n& iso! tin" t)e s$ste# co&e n& & t ,ro# t)ose o, t)e pp!ic tion pro"r #. >P "in" (nit con%erts !ine r &&resses into p)$sic ! &&resses. >T)e contro! n& ttri*(te P@A c)ec-s t)e pri%i!e"es t t)e p "e !e%e!. E c) o, t)e p "es # int ins t)e p "in" in,or# tion o, t)e t s-. T)e !i#it n& ttri*(te P@A c)ec-s se"#ent !i#its n& ttri*(tes t se"#ent !e%e! to %oi& in% !i& ccesses to co&e n& & t in t)e #e#or$ se"#ents. >T)e 8(s contro! (nit ) s prioriti+er to reso!%e t)e priorit$ o, t)e % rio(s *(s re:(ests.T)is contro!s t)e ccess o, t)e *(s. T)e &&ress &ri%er &ri%es t)e *(s en *!e n& &&ress si"n ! A0 A A35. T)e pipe!ine n& &$n #ic *(s si+in" (nit ) n&!e t)e re! te& contro! si"n !s. >T)e & t *(,,ers inter, ce t)e intern ! & t *(s 3it) t)e s$ste# *(s.

Register Organisation:
>T)e 80386 ) s ei")t 32 - *it "ener ! p(rpose re"isters 3)ic) # $ *e (se& s eit)er 8 *it or 56 *it re"isters. >A 32 - *it re"ister -no3n s n e=ten&e& re"ister2 is represente& *$ t)e re"ister n #e 3it) pre,i= E. >E= #p!e 4 A 32 *it re"ister correspon&in" to A6 is EA62 si#i! r!$ 86 is E86 etc.

>T)e 56 *it re"isters 8P2 SP2 SI n& DI in 8086 re no3 % i! *!e 3it) t)eir e=ten&e& si+e o, 32 *it n& re n #es s E8P2ESP2ESI n& EDI. >A6 represents t)e !o3er 56 *it o, t)e 32 *it re"ister EA6. > 8P2 SP2 SI2 DI represents t)e !o3er 56 *it o, t)eir 32 *it co(nterp rts2 n& c n *e (se& s in&epen&ent 56 *it re"isters. >T)e si= se"#ent re"isters % i! *!e in 80386 re CS2 SS2 DS2 ES2 BS n& 7S. >T)e CS n& SS re t)e co&e n& t)e st c- se"#ent re"isters respecti%e!$2 3)i!e DS2 ES2BS2 7S re 4 & t se"#ent re"isters. >A 56 *it instr(ction pointer IP is % i! *!e !on" 3it) 32 *it co(nterp rt EIP.

Flag Register of 80386:

T)e B! " re"ister o, 80386 is 32 *it re"ister. O(t o, t)e 32 *its2 Inte! ) s reser%e& *its D58 to D352 DC n& D32 3)i!e D5 is !3 $s set t 5. T3o e=tr ne3 ,! "s re &&e& to t)e 80286 ,! " to &eri%e t)e ,! " re"ister o, 80386. T)e$ re 'M n& RB ,! "s.

> 'M - Virtual Mode Flag4 I, t)is ,! " is set2 t)e 80386 enters t)e %irt( ! 8086 #o&e 3it)in t)e protection #o&e. T)is is to *e set on!$ 3)en t)e 80386 is in protecte& #o&e. In t)is #o&e2 i, n$ pri%i!e"e& instr(ction is e=ec(te& n e=ception 53 is "ener te&. T)is *it c n *e set (sin" IRET instr(ction or n$ t s- s3itc) oper tion on!$ in t)e protecte& #o&e. >RF- Resume Flag4 T)is ,! " is (se& 3it) t)e &e*(" re"ister *re -points. It is c)ec-e& t t)e st rtin" o, e%er$ instr(ction c$c!e n& i, it is set2 n$ &e*(" , (!t is i"nore& &(rin" t)e instr(ction c$c!e. T)e RB is (to# tic !!$ reset ,ter s(ccess,(! e=ec(tion o, e%er$ instr(ction2 e=cept ,or IRET n& POPB instr(ctions. >A!so2 it is not (to# tic !!$ c!e re& ,ter t)e s(ccess,(! e=ec(tion o, DMP2 CA@@ n& INT instr(ction c (sin" t s- s3itc). T)ese instr(ction re (se& to set t)e RB to t)e % !(e speci,ie& *$ t)e #e#or$ & t % i! *!e t t)e st c-. >Segment Descriptor Registers4 T)is re"isters re not % i! *!e ,or pro"r ##ers2 r t)er t)e$ re intern !!$ (se& to store t)e &escriptor in,or# tion2 !i-e ttri*(tes2 !i#it n& * se &&resses o, se"#ents. >T)e si= se"#ent re"isters ) %e correspon&in" si= E3 *it &escriptor re"isters. E c) o, t)e# cont ins 32 *it * se &&ress2 32 *it * se !i#it n& F *it ttri*(tes. T)ese re (to# tic !!$ !o &e& 3)en t)e correspon&in" se"#ents re !o &e& 3it) se!ectors. >Control Registers4 T)e 80386 ) s t)ree 32 *it contro! re"isters CR02 CR2 n& CR3 to )o!& "!o* ! # c)ine st t(s in&epen&ent o, t)e e=ec(te& t s-. @o & n& store instr(ctions re % i! *!e to ccess t)ese re"isters. >System Address Registers4 Bo(r speci ! re"isters re &e,ine& to re,er to t)e &escriptor t *!es s(pporte& *$ 80386. >T)e 80386 s(pports ,o(r t$pes o, &escriptor t *!e2 %i+. "!o* ! &escriptor t *!e /7DT12interr(pt &escriptor t *!e /IDT12 !oc ! &escriptor t *!e /@DT1 n& t s- st te se"#ent &escriptor /TSS1. >Debug and Test Registers4 Inte! ) s pro%i&e set o, 8 &e*(" re"isters ,or ) r&3 re &e*(""in". O(t o, t)ese ei")t re"isters DR0 to DRE2 t3o re"isters DR4 n& DRC re Inte! reser%e&. >T)e initi ! ,o(r re"isters DR0 to DR3 store ,o(r pro"r # contro!! *!e *re -point &&resses2 3)i!e DR6 n& DRE respecti%e!$ )o!& *re -point st t(s n& *re -point contro! in,or# tion. >T3o #ore test re"ister re pro%i&e& *$ 80386 ,or p "e c c)in" n #e!$ test contro! n& test st t(s re"ister.

ADDRESSIN

! OD E S :

T)e 80386 s(pports o%er !! e!e%en &&ressin" #o&es to , ci!it te e,,icient e=ec(tion o, )i")er !e%e! ! n"( "e pro"r #s. >In c se o, !! t)ose #o&es2 t)e 80386 c n no3 ) %e 32-*it i##e&i te or 32- *it re"ister oper n&s or &isp! ce#ents. >T)e 80386 ) s , #i!$ o, sc !e& #o&es. In c se o, sc !e& #o&es2 n$ o, t)e in&e= re"ister % !(es c n *e #(!tip!ie& *$ % !i& sc !e , ctor to o*t in t)e &isp! ce#ent. >T)e % !i& sc !e , ctor re 52 22 4 n& 8. >T)e &i,,erent sc !e& #o&es re s ,o!!o3s. >Scaled Indexed Mode4 Contents o, t)e n in&e= re"ister re #(!tip!ie& *$ sc !e , ctor t) t # $ *e &&e& ,(rt)er to "et t)e oper n& o,,set. >Based Scaled Indexed Mode4 Contents o, t)e n in&e= re"ister re #(!tip!ie& *$ sc !e , ctor n& t)en &&e& to * se re"ister to o*t in t)e o,,set. >Based Scaled Indexed Mode it! Displacement4 T)e Contents o, t)e n in&e= re"ister re #(!tip!ie& *$ sc !in" , ctor n& t)e res(!t is &&e& to * se re"ister n& &isp! ce#ent to "et t)e o,,set o, n oper n&.

Real Address !ode of 80386

>A,ter reset2 t)e 80386 st rts ,ro# #e#or$ !oc tion BBBBBBB0H (n&er t)e re ! &&ress #o&e. In t)e re ! #o&e2 80386 3or-s s , st 8086 3it) 32-*it re"isters n& & t t$pes. >In re ! #o&e2 t)e &e, (!t oper n& si+e is 56 *it *(t 32- *it oper n&s n& &&ressin" #o&es # $ *e (se& 3it) t)e )e!p o, o%erri&e pre,i=es. >T)e se"#ent si+e in re ! #o&e is 64-2 )ence t)e 32-*it e,,ecti%e &&ressin" #(st *e !ess t) n 0000BBBBBH. T)e re ! #o&e initi !i+es t)e 80386 n& prep res it ,or protecte& #o&e.

Memory Addressing in Real Mode4

In t)e re ! #o&e2 t)e 80386 c n &&ress t t)e #ost5M*$tes o, p)$sic ! #e#or$ (sin" &&ress !ines A0-A5F. >P "in" (nit is &is *!e& in re ! &&ressin" #o&e2 n& )ence t)e re ! &&resses re t)e s #e s t)e p)$sic ! &&resses. >To ,or# p)$sic ! #e#or$ &&ress2 ppropri te se"#ent re"isters contents /56-*its1 re s)i,te& !e,t *$ ,o(r positions n& t)en &&e& to t)e 56-*it o,,set &&ress ,or#e& (sin" one o, t)e &&ressin" #o&es2 in t)e s #e 3 $ s in t)e 80386 re ! &&ress #o&e. >T)e se"#ent in 80386 re ! #o&e c n *e re &2 3rite or e=ec(te&2 i.e. no protection is % i! *!e. >An$ ,etc) or ccess p st t)e en& o, t)e se"#ent !i#it "ener te e=ception 53 in re ! &&ress #o&e. >T)e se"#ents in 80386 re ! #o&e # $ *e o%er! ppe& or non-o%er! ppe&. >T)e interr(pt %ector t *!e o, 80386 ) s *een !!oc te& 5G*$te sp ce st rtin" ,ro# 00000H to 003BBH.

"rotected !ode of 80386:

>A!! t)e c p *i!ities o, 80386 re % i! *!e ,or (ti!i+ tion in its protecte& #o&e o, oper tion. >T)e 80386 in protecte& #o&e s(pport !! t)e so,t3 re 3ritten ,or 80286 n& 8086 to *e e=ec(te& (n&er t)e contro! o, #e#or$ # n "e#ent n& protection *i!ities o, 80386. >T)e protecte& #o&e !!o3s t)e (se o, &&ition ! instr(ction2 &&ressin" #o&es n& c p *i!ities o, 80386.

ADDRESSIN7 IN PROTECTED MODE4 In t)is #o&e2 t)e contents o, se"#ent re"isters re (se& s se!ectors to &&ress &escriptors 3)ic) cont in t)e se"#ent !i#it2 * se &&ress n& ccess ri")ts *$te o, t)e se"#ent. >T)e e,,ecti%e &&ress /o,,set1 is &&e& 3it) se"#ent * se &&ress to c !c(! te !ine r &&ress. T)is !ine r &&ress is ,(rt)er (se& s p)$sic ! &&ress2 i, t)e p "in" (nit is &is *!e&2 ot)er3ise t)e p "in" (nit con%erts t)e !ine r &&ress into p)$sic ! &&ress. >T)e p "in" (nit is #e#or$ # n "e#ent (nit en *!e& on!$ in protecte& #o&e. T)e p "in" #ec) nis# !!o3s ) n&!in" o, ! r"e se"#ents o, #e#or$ in ter#s o, p "es o, 4G*$te si+e. >T)e p "in" (nit oper tes (n&er t)e contro! o, se"#ent tion (nit. T)e p "in" (nit i, en *!e& con%erts !ine r &&resses into p)$sic ! &&ress2 in protecte& #o&e.

Seg#entation:
>Descriptor t *!es4 T)ese &escriptor t *!es n& re"isters re # nip(! te& *$ t)e oper tin" s$ste# to ens(re t)e correct oper tion o, t)e processor2 n& )ence t)e correct e=ec(tion o, t)e pro"r #. >T)ree t$pes o, t)e 80386 &escriptor t *!es re !iste& s ,o!!o3s4 >7@O8A@ DESCRIPTOR TA8@E / 7DT 1 >@OCA@ DESCRIPTOR TA8@E / @DT 1

>INTERRUPT DESCRIPTOR TA8@E / IDT 1 >Descriptors4 T)e 80386 &escriptors ) %e 20-*it se"#ent !i#it n& 32-*it se"#ent &&ress. T)e &escriptor o, 80386 re 8-*$te :( ntities ccess ri")t or ttri*(te *its !on" 3it) t)e * se n& !i#it o, t)e se"#ents. >Descriptor Attri*(te 8its4 T)e A / ccesse&1 ttri*(te& *it in&ic tes 3)et)er t)e se"#ent ) s *een ccesse& *$ t)e CPU or not. >T)e THPE ,ie!& &eci&es t)e &escriptor t$pe n& )ence t)e se"#ent t$pe. >T)e S *it &eci&es 3)et)er it is s$ste# &escriptor /S<01 or co&e?& t se"#ent &escriptor / S<51. >T)e DP@ ,ie!& speci,ies t)e &escriptor pri%i!e"e !e%e!. >T)e D *it speci,ies t)e co&e se"#ent oper tion si+e. I, D<52 t)e se"#ent is 32*it oper n& se"#ent2 e!se2 it is 56-*it oper n& se"#ent. >T)e P *it /present1 si"ni,ies 3)et)er t)e se"#ent is present in t)e p)$sic ! #e#or$ or not. I, P<52 t)e se"#ent is present in t)e p)$sic ! #e#or$. >T)e 7 /"r n(! rit$1 *it in&ic tes 3)et)er t)e se"#ent is p "e &&ress *!e. T)e +ero *it #(st re# in +ero ,or co#p ti*i!it$ 3it) ,(t(re process. >T)e A'@ / % i! *!e1 ,ie!& speci,ies 3)et)er t)e &escriptor is ,or (ser or ,or oper tin" s$ste#.

>T)e 80386 ) s ,i%e t$pes o, &escriptors !iste& s ,o!!o3s4

5.Co&e or D t Se"#ent Descriptors. 2.S$ste# Descriptors. 3.@oc ! &escriptors. 4.TSS /T s- St te Se"#ent1 Descriptors. C.7ATE Descriptors.
>T)e 80386 pro%i&es 80286 &oes. ,o(r !e%e! protection #ec) nis# e= ct!$ in t)e s #e 3 $ s t)e

P "in"4 >P "in"

Oper tion4
P "in" is one o, t)e #e#or$ # n "e#ent tec)ni:(es (se& ,or %irt( ! #e#or$ #(!tit s-in" oper tin" s$ste#. >T)e se"#ent tion sc)e#e # $ &i%i&e t)e p)$sic ! #e#or$ into *(t t)e p "in" &i%i&es t)e #e#or$ into ,i=e& si+e p "es. % ri *!e si+e se"#ents

>T)e se"#ents re s(ppose& to *e t)e !o"ic ! se"#ents o, t)e pro"r #2 *(t t)e p "es &o not ) %e n$ !o"ic ! re! tion 3it) t)e pro"r #. >T)e p "es re I(st ,i=e& si+e portions o, t)e pro"r # #o&(!e or & t . >T)e &% nt "e o, p "in" sc)e#e is t) t t)e co#p!ete se"#ent o, t)e p)$sic ! #e#or$ t n$ ti#e. t s- nee& not *e in

>On!$ ,e3 p "es o, t)e se"#ents2 3)ic) re re:(ire& c(rrent!$ ,or t)e e=ec(tion nee& to *e % i! *!e in t)e p)$sic ! #e#or$. T)(s t)e #e#or$ re:(ire#ent o, t)e t s- is s(*st nti !!$ re&(ce&2 re!in:(is)in" t)e % i! *!e #e#or$ ,or ot)er t s-s. >J)ene%er t)e ot)er p "es o, t s- re re:(ire& ,or e=ec(tion2 t)e$ # $ *e ,etc)e& ,ro# t)e secon& r$ stor "e.

>T)e pre%io(s p "e 3)ic) re e=ec(te&2 nee& not *e % i! *!e in t)e #e#or$2 n& )ence t)e sp ce occ(pie& *$ t)e# # $ *e re!in:(is)e& ,or ot)er t s-s. >T)(s p "in" #ec) nis# pro%i&es n e,,ecti%e tec)ni:(e to # n "e t)e p)$sic ! #e#or$ ,or #(!tit s-in" s$ste#s.

"aging $nit:
T)e p "in" (nit o, 80386 (ses t3o !e%e! t *!e #ec) nis# to con%ert !ine r &&ress pro%i&e& *$ se"#ent tion (nit into p)$sic ! &&resses. T)e p "in" (nit con%erts t)e co#p!ete # p o, t s- into p "es2 e c) o, si+e 4G. T)e t sis ,(rt)er ) n&!e& in ter#s o, its p "e2 r t)er t) n se"#ents. T)e p "in" (nit ) n&!es e%er$ t s- in ter#s o, t)ree co#ponents n #e!$ p "e &irector$2 p "e t *!es n& p "e itse!,.

"aging Descri%tor &ase Register: T)e contro! re"ister CR2 is (se& to store t)e
32-*it !ine r &&ress t 3)ic) t)e pre%io(s p "e , (!t 3 s &etecte&. T)e CR3 is (se& s p "e &irector$ p)$sic ! * se &&ress re"ister2 to store t)e p)$sic ! st rtin" &&ress o, t)e p "e &irector$. T)e !o3er 52 *it o, t)e CR3 re !3 $s +ero to ens(re t)e p "e si+e !i"ne& &irector$. A #o%e oper tion to CR3 (to# tic !!$ !o &s t)e p "e t *!e entr$ c c)es n& t ss3itc) oper tion2 to !o & CR0 s(it *!$.

"age Director' : T)is is t t)e #ost 4G*$tes in si+e. E c) &irector$ entr$ is o,

4 *$tes2t)(s tot ! o, 5024 entries re !!o3e& in &irector$.T)e (pper 50 *its o, t)e !ine r &&ress re (se& s n in&e= to t)e correspon&in" p "e &irector$ entr$. T)e p "e &irector$ entries point to p "e t *!es.

"age (a)les: E

c) p "e t *!e is o, 4G*$tes in si+e n& # n$ cont in

# =i#(#

o, 5024 entries. T)e p "e t *!e entries cont in t)e st rtin" &&ress o, t)e p "e n& t)e st tistic ! in,or# tion *o(t t)e p "e. >T)e (pper 20 *it p "e ,r #e &&ress is co#*ine& 3it) t)e !o3er 52 *it o, t)e !ine r &&ress. T)e &&ress *its A52- A25 re (se& to se!ect t)e 5024 p "e t *!e entries. T)e p "e t *!e c n *e s) re& *et3een t)e t s-s. >T)e P *it o, t)e *o%e entries in&ic te2 i, t)e entr$ c n *e (se& in &&ress tr ns! tion. >I, P<52 t)e entr$ c n *e (se& in &&ress tr ns! tion2 ot)er3ise it c nnot *e (se&. >T)e P *it o, t)e c(rrent!$ e=ec(te& p "e is !3 $s )i").

>T)e ccesse& *it A is set *$ 80386 *e,ore n$ ccess to t)e p "e. I, A<52 t)e p "e is ccesse&2 e!se (n ccesse&.

>T)e D *it / Dirt$ *it1 is set *e,ore 3rite oper tion to t)e p "e is c rrie& o(t. T)e D-*it is (n&e,ine& ,or p "e &irector entries. >T)e OS reser%e& *its re &e,ine& *$ t)e oper tin" s$ste# so,t3 re. >T)e User ? S(per%isor /U?S1 *it n& re &?3rite *it re (se& to pro%i&e protection. T)ese *its re &eco&e& to pro%i&e protection (n&er t)e 4 !e%e! protection #o&e!. >T)e !e%e! 0 is s(ppose& to ) %e t)e )i")est pri%i!e"e2 3)i!e t)e !e%e! 3 is s(ppose& to ) %e t)e !e st pri%i!e"e. >T)is protection pro%i&e *$ t)e p "in" (nit is tr nsp rent to t)e se"#ent tion (nit.

'irt( ! 8086 Mo&e

>In its protecte& #o&e o, oper tion2 80386D6 pro%i&es %irt( ! 8086 oper tin" en%iron#ent to e=ec(te t)e 8086 pro"r #s. >T)e re ! #o&e c n !so (se& to e=ec(te t)e 8086 pro"r #s !on" 3it) t)e c p *i!ities o, 803862 !i-e protection n& ,e3 &&ition ! instr(ctions. >Once t)e 80386 enters t)e protecte& #o&e ,ro# t)e re ! #o&e2 it c nnot ret(rn * c- to t)e re ! #o&e 3it)o(t reset oper tion. >T)(s2 t)e %irt( ! 8086 #o&e o, oper tion o, 803862 o,,ers n &% nt "e o, e=ec(tin" 8086 pro"r #s 3)i!e in protecte& #o&e. >T)e &&ress ,or#in" #ec) nis# in %irt( ! 8086 #o&e is e= ct!$ i&entic ! 3it) t) t o, 8086 re ! #o&e. >In %irt( ! #o&e2 8086 c n &&ress 5M*$tes o, p)$sic ! #e#or$ t) t # $ *e n$3)ere in t)e 47*$tes &&ress sp ce o, t)e protecte& #o&e o, 80386. >@i-e 80386 re ! #o&e2 t)e &&resses in %irt( ! 8086 #o&e !ie 3it)in 5M*$tes o, #e#or$. >In %irt( ! #o&e2 t)e p "in" #ec) nis# n& protection c p *i!ities re % i! *!e t t)e ser%ice o, t)e pro"r ##ers. >T)e 80386 s(pports #(!tipro"r ##in"2 )ence #ore t) n one pro"r ##er # $ *e (se t)e CPU t ti#e.

IN(ROD$*(ION (O 80+86
T)e Inte! 80+86 /or i+861 3 s #icroprocessor pro&(ce& *$ Inte! n& t)e ,irst ti")t!$ pipe!ine& =86 &esi"n. Intro&(ce& in 5F8F2 it 3 s !so t)e ,irst =86 c)ip to se #ore t) n #i!!ion tr nsistors2 &(e to ! r"e on-c)ip c c)e n& n inte"r te& ,!o tin" point (nit. It represents ,o(rt) "ener tion o, *in r$ co#p ti*!e CPUs since t)e ori"in ! 8086 o, 5FE82 n& it 3 s t)e secon& 32-*it =86 &esi"n ,ter t)e 80386. A C0 MH+ 80486 e=ec(te& ro(n& 40 #i!!ion instr(ctions per secon& on %er "e n& 3 s *!e to re c) C0 MIPS pe -. T)e instr(ction set o, t)e i486 is %er$ si#i! r to its pre&ecessor2 t)e Inte! 803862 3it) t)e &&ition o, on!$ ,e3 e=tr instr(ctions2 s(c) s CMP6CH7 3)ic) e=ec(tes t)e co#p re- n&-s3 p to#ic oper tion n& t)e 6ADD 3)ic) e=ec(tes t)e ,etc)- n&- && to#ic oper tion ret(rnin" t)e ori"in ! % !(e2 (n!i-e t)e ADD instr(ction t) t on!$ ret(rne& so#e ,! "s. t)e rc)itect(re o, t)e i486 is % st i#pro%e#ent o%er t)e 80386. It ) s n on-c)ip (ni,ie& instr(ction n& & t c c)e2 n on-c)ip ,!o tin"-point (nit /BPU12 e=cept in t)e S6 n& S@ #o&e!s2 n& n en) nce& *(s inter, ce (nit. Si#p!e instr(ctions /s(c) s A@U re"2 re"1 e=ec(te in one c!oc- c$c!e A 56-MH+ 486 t)ere,ore ) s per,or# nce si#i! r to 33-MH+ 386 /or 28612 n& t)e o!&er &esi"n ) s to re c) C0 MH+ to *e co#p r *!e 3it) 2C-MH+ 486 p rt.

Differences )et,een the 386 and +86

An 8 G8 on-c)ip SRAM c c)e stores t)e #ost recent!$ (se& instr(ctions n& & t /56 G8 n&?or 3rite-* c- on so#e ! ter #o&e!s1. T)e 386 ) & no s(c) intern ! c c)e *(t s(pporte& s!o3er o,,-c)ip c c)e. Ti")t!$ co(p!e& pipe!inin" !!o3s t)e 486 to co#p!ete si#p!e instr(ction !i-e A@U reg"reg or A@U reg"im e%er$ c!oc- c$c!e. T)e 386 nee&e& t3o c!oc- c$c!es ,or t)is. Inte"r te& BPU /&is *!e& or *sent in S6 #o&e!s1 3it) &e&ic te& !oc ! *(s "i%es , ster ,!o tin" point c !c(! tions co#p re& to t)e i386Ki38E co#*in tion. I#pro%e& MMU per,or# nce. 32-*it & t *(s n& 32-*it &&ress

T)e 486 ) s *(s.

D(st !i-e t)e 803862 t)e 32-*it &&ress *(s o, t)e 80486 en *!e& (p to 4 7i" *$te o, #e#or$ to *e &irect!$ &&resse& (sin" ,! t #e#or$ #o&e! 3it) 32-*it !ine r &&resses in protecte& #o&e.

Internal Architecture of the 80486

Pin description of 80486

8US CHC@E IDENTIBICATION

T)e rc)itect(re is #ore i&entic ! to 80386.A # t) co-processor n& &&e& in &&ition 3it) t)e 80386 rc)itect(re

one !e%e! c c)e is

The purpose of the Register is to hold temporary results, and control the execution of the program. General purpose registers in Pentium are !"#, !$#, !%#, !&#, !'P, !&P,!'(, or !%(. The )* +it registers are named ,ith prefix !, !"#, etc, and the least -6 +its 0 -. of these registers can +e accessed ,ith names such as "#, '( 'imilarly the lo,er eight +its /0 01 can +e accessed ,ith names such as "2 3 &2. The higher eight +its /8 -.1 ,ith names such as "4 3 &4. The instruction pointer !"P 5no,n as program counter/P$1 in 8 +it microprocessor, is a )* +it register to handle )* +it memory addresses, and the lo,er -6 +it segment (P is used for -6 +i memory address. The flag register is a )* +it register The (67 Pri8ilege uses t,o +its in protected mode to determine ,hich (67 instructions can +e used, and the nested tas5 is used to sho, a lin5 +et,een t,o tas5s. The processor also includes control registers and system address registers , de+ug and test registers for system and de+ugging operations.

T)e intern ! pro"r ##in" #o&e! is "i%en *e!o3

T)e ,! " re"ister o, 80486

-E. (ER! A Arc)itect(re 3 Arc)itect(re o, t)e 804865E ADDRESSIN7 MODESE 8 8US CHC@E IDENTIBICATION5F E E=ec(tion (nit 3 B B! " Re"ister6 P Protecte& Mo&eF P "in"52 R Re"ister Or" nis tion4 Re ! A&&ress Mo&e8 S Se"#ent tion50 ' 'irt( ! 8086 Mo&e54

-E.(ER! /$I0
5.Ho3 # n$ st "es re % i! *!e in pipe!inin" o, 80386L 2.t)e c!oc- ,re:(ecnc$ o, 80386 is . 3.T)e ,! "s (se& to se!ect *et3een %irt( ! n& protecte& #o&e is 4.3) t is t)e si+e o, #e#or$ t)e 80386 c n ccess. C.80486 ) s intern ! ROM o, 4G .S $ Hes?No 6.T)e p)$sic ! &&ress is *its. E.t)e &&ressin" #o&e o, MO' EA62ME86K5234C68FN is 8.T)e &&ress n& & t *(s o, !! =86 re s #e. s $ tr(e or , !se F.J)ic) processor ) s t)e c c)e or" ni+ tion 18086 *180286 c180386 &180486 50.T)e re ! #o&e in 686 3i!! 3or- in t)e #e#or$ &&ress r n"e o, on!$.

M *$tes

O&1E*(I2E /$ES(IONS

(."E

5. T)e ter# PSJ Pro"r # St t(s 3or& re,ers 1 Acc(#(! tor O B! " re"ister *1 H n& @ re"ister c1 Acc(#(! tor O Instr(ction re"ister &1 8 n& C re"ister 2. A PP is (se& to iso! te *it2 it &oes t)is *ec (se t) t ANI sets !! ot)er *its to Qero 1 s(*ro(tine *1 ,! " c1 ! *e! &1 # s3. Inter ction *et3een CPU n& o(tp(t oper tion is -no3n s 1 ) n&s) -in" *1 ,! ""in" c1 re!oc tin" &1 s(*Lro(tine perip)er ! &e%ice t) t t -es p! ce &(rin" n& i#p(t

4. A&&ressin" in 3)ic) t)e instr(ctions cont ins t)e &&ress o, t)e & t to t)e oper te& on is -no3n s

1 i##e&i te &&ressin" *1 i#p!ie& &&ressin" c1 re"ister &&ressin" &1 &irect &&ressin"

C. Res rt is speci ! t$pe o, CA@@ in 3)ic) 1 t)e &&ress is pro"r ##e& *(t not *(i!t into t)e ) r&3 re *1 t)e &&ress is pro"r ##e& *(i!t into t)e ) r&3 re c1 t)e &&ress is not pro"r ##e& *(t *(i!t into t)e ) r&3 re &1 None o, t)e *o%e 6. T)e # =i#(# &&ress *!e #e#or$ sp ce o, 80386 is 1 647 *1 56 7 c1 87 &1 47

E.T)e st c- is speci !i+e& te#por r$ LL ccess #e#or$ &(rin" L.. n& LL instr(ctions 1 r n&o#2 store2 !o & *1 r n&o#2 p(s)2 !o & c1 se:(enti !2 store2 pop &1 se:(enti !2 p(s)2 pop 8. T)e No. o, contro! !ines in 80386 re PPF. T)e !en"t) o, EA6 L re"ister is PP- *its 50. T)e !en"t) o, pro"r # co(nter is PPA *its 55. T)e !en"t) o, st c- pointer is PPA *its 52. T)e !en"t) o, st t(s 3or& is PP- *its 53. T)e No. o, CONTRO@ ,! "s re PP54. J) t is t)e p(rpose o, (sin" A@E si"n ! )i") L 1 To ! tc) !o3 or&er &&ress ,ro# *(s to sep r te A0 L AE *1 To ! tc) & t Do L D E ,ro# *(s "o sep r te & t *(s c1 To &is *!e & t *(s ! tc) 5C. J) t is t)e p(rpose o, READH si"n !L 1 It is (se& to in&ic te to (ser t) t #icroprocessor is 3or-in" n& re &$ to (se *1 It is (se& to pro%i&e ,or proper JAIT st tes 3)en #icroprocessor is co##(nic tin" 3it) s!o3 perip)er ! &e%ice. c1 It is (se& to pro%i&e ,or proper s)o3in" &o3n o, , st perip)er ! &e%ices so s to co##(nic te t #icro processors spee&.

56. J) t is t)e &&ressin" #o&e (se& in instr(ction MO' 8@2 C@L 1 Direct *1 In&irect c1 In&e=e& &1 I##e&i te

5E. T)e # =i#(# n(#*er o, IRo &e%ices c n *e inter, ce& 3it) 80386 in t)e IRo # ppe& IRo tec)ni:(e re 58. S) &o3 A&&ress 3i!! e=ist in 1 *so!(te &eco&in" *1 !ine r &eco&in" c1 p rtic ! &eco&in" &1 none o, t)e *o%e 5F. T)e Instr(ctions (se& ,or & t tr ns,er in IRo # ppe& IRO re 1 IN2 OUT *1 IN2 @DA && c1 STA && &1 None o, t)e *o%e 20. N(#*er o, A&&ress !ines in 80486 is 1 56 *132 c1 34 &1 528

RE2IE3 /$ES(IONS 4 !AR-S

5. Di,,erenti te *et3een 80386 n& 80486. 2. C! ssi,$ t)e &i,,erent "ro(ps o, 80386 instr(ction set 3it) e= #p!e. 3. Di,,erenti te *et3een (ni&irection ! *(,,er n& *i-&irection ! *(,,er.

4. J) t is t)e nee& ,or A@E si"n ! in 808C #icroprocessorL C. 7i%e t)e oper tion o, t)e ,o!! instr(ctions4/ 1 DAA /*1 DEC. 6. St te t)e ,(nctions ,or A@E n& TRAP pins . E. M -e note on t)e re ! #o&e oper tion o, 80386. 8. J) t is MPUL F. J) t &o $o( #e n *$ #(!tip!e=in" t)e *(sL 50. @ist o(t t)e t3o #o&es o, oper tion o, =86 , #i!$. 55. J) t is pro"r # co(nterL

52. J) t is n instr(ctionL 53. J) t is PSJL Dr 3 54. De,ine - Interr(pt. 5C. J) t re t)e &&ressin" #o&es ,or 80386 #icroprocessorL 56. # -e note o, t)e protecte& #o&e o, 80386L 5E. De,ine st c-. 58. Speci,$ )o3 pro"r # co(nter is (se,(! in pro"r # e=ec(tion.

5F. Ho3 t)e & t

n& &&ress !ines re &e#(!tip!e=e&L

20. S)o3 t)e *it positions o, % rio(s ,! "s in 80386 ,! " re"isterL 25. @ist t)e % rio(s si"n !s o, 80486. 22. J) t re t)e instr(ction pipe!inin" st "es in 80386 n& 80486 23. J) t re t)e si#i! rit$ n& &i,,erence *et3een s(*tr ct n& co#p re instr(ctionsL 24. @ist t)e t$pe o, si"n !s t) t ) %e to *e pp!ie& to "ener te n ) r&3 re interr(pts. 2C. Jrite 26. Dr 3 s(*ro(tine to c!e r t)e ,! " re"ister n& cc(#(! tor (sin" 80386L si#p!e &i "r # ,or t)e ,! "s o, 80486L

2E. @ist o(t t)e si#i! rities *et3een CA@@SRET n& PUSHSPOP instr(ctions. 28. @ist interr(pts o, 80386 2F. De,ine4 / 1 Instr(ction C$c!e /*1 M?c c$c!e /c1 T-st te. 30. E=p! in t)e e=ec(tion o, t)e instr(ction PUSHAH. 35. J) t re t)e &i,,erent #e#or$ # ppin" sc)e#esL 7i%e n$ one &% nt "e n& &is &% nt "e ,or e c)

&I

/$ES(IONS

5. . Dr 3 t)e *!oc- &i "r # o, 80386 #p n& e=p! inL /58 *. Jrite n sse#*!$ ! n"( "e pro"r # to && t3o 2-&i"its 8CD N(#*erL /41 2. . E=p! in t)e instr(ction set o, 80386L /501 *. Jrite notes on contro! ,! "s .

3. . E=p! in t)e rc)itect(re o, Inte! 80486 t)e )e!p o, *!oc- &i "r #L /50 *. E=p! in t)e si#i! rities &i,, *?3 80386 n& 80486L

4. . Jit) ne t *!oc- &i "r # e=p! in t)e 8IU (nit o, 80386L /81 *. @ist o(t t)e # s- *!e n& non # s- *!e interr(pts % i! *!e in 80386L /41

C./ 1Speci,$ t)e contents o, t)e re"isters n& t)e ,! " st t(s s t)e ,o!!o3in" instr(ctions re e=ec(te&./41 i. MO' A62 00 ii. MO' E862M02B8N iii. MO' EC62 E86 %i. H@T /*1Jrite instr(ctions to !o & t)e )e= &eci# ! n(#*er 6CH in re"ister C6 n& F2H in cc(#(! tor A./81 6. / 1J)$ t)e !o3er or&er &&ress *(s is #(!tip!e=e& 3it) & t *(sL Ho3 t)e$ 3i!! *e &e-#(!tip!e=e&L /61 /*1 Di,,erenti te *et3een # s- *!e n& non-# s- *!e interr(pts./61 E. 1Jrite n sse#*!$ ! n"( "e pro"r # (sin" #ini#(# n(#*er o, instr(ctions to && t)e 32 *it no. in E862 ED6 O EC6. Store t)e res(!t in MEMORH. /61 *1 E=p! in t)e si#i! rities &i,, *?3 s(*tr ct n& co#p re instr(ctions in 808CL /61 8. / 1E=p! in in &et i! t)e ,o!!o3in" instr(ctions4- /i1 ADD /ii1 RA@ /iii1 SHR /i%1 CMP /*1 De,ine O e=p! in t)e ter# &&ressin" #o&es. F. / 1Dr 3 t)e pin &i "r # n& e=p! in t)e contro! si"n !s present in 80386

50. E=p! in 3it) e= #p!es t)e rit)#etic instr(ction ./521 55. E=p! in 3it) e= #p!es t)e & t tr ns,er instr(ction ./521 52. E=p! in 3it) e= #p!es t)e contro! instr(ction ./521 53. E=p! in 3it) e= #p!es t)e !o"ic ! instr(ction o, 80386./521 54.J) t re t)e &&ressin" #o&es present in 80386 .e=p! in 3it) e= #p!e./521