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    Instruction Format 8051

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    alex24arul
    The document describes instruction formats and addressing modes for the 8051 microcontroller. It explains that instructions consist of opcodes and operands that can be 1, 2, or 3 bytes. It also describes the different addressing modes including immediate, register, direct, indirect, and indexed. Finally, it provides examples of instruction types like arithmetic, branching, data transfer, logical, and bitwise instructions.

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    Instruction Format 8051

    Uploaded by

    alex24arul
    608 views26 pages
    The document describes instruction formats and addressing modes for the 8051 microcontroller. It explains that instructions consist of opcodes and operands that can be 1, 2, or 3 bytes. It also describes the different addressing modes including immediate, register, direct, indirect, and indexed. Finally, it provides examples of instruction types like arithmetic, branching, data transfer, logical, and bitwise instructions.

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    Microprocessor

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    The document describes instruction formats and addressing modes for the 8051 microcontroller. It explains that instructions consist of opcodes and operands that can be 1, 2, or 3 bytes. It also describes the different addressing modes including immediate, register, direct, indirect, and indexed. Finally, it provides examples of instruction types like arithmetic, branching, data transfer, logical, and bitwise instructions.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PPT, PDF, TXT or read online from Scribd
    Download as ppt, pdf, or txt
    608 views26 pages

    Instruction Format 8051

    Uploaded by

    alex24arul
    The document describes instruction formats and addressing modes for the 8051 microcontroller. It explains that instructions consist of opcodes and operands that can be 1, 2, or 3 bytes. It also describes the different addressing modes including immediate, register, direct, indirect, and indexed. Finally, it provides examples of instruction types like arithmetic, branching, data transfer, logical, and bitwise instructions.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PPT, PDF, TXT or read online from Scribd
    Download as ppt, pdf, or txt
    of 26

    INSTRUCTION FORMAT

    INSTRUCTION = command to the microcontroller Consists of op-code and operand Word size: one byte => includes the opcode and operand in the same byte

    two byte =>first byte specifies the operation code


    second byte specifies the operand three byte => the first byte specifies the opcode two bytes specify the 16-bit address

    INSTRUCTION FORMAT
    Data types and directives: DB => Define Byte => used to define data format 8051 supports decimal, hexadecimal, ASCII, and binary data Decimal D ASCII Binary B Eg: ADD A, #50 ; D is optional Eg: MOV A, #A Eg: MOV A, #01010000B

    Hexadecimal H Eg: ADD A, #50H

    INSTRUCTION FORMAT
    Data types and directives: ORG ORIGIN Used to indicate the beginning of address

    EQU EQUATE
    Used to define constant without occupying a memory location Associates a constant value with a data label Wherever the label occurs the constant value is sustituted COUNT EQU 25 MOV R3, #COUNT

    ADDRESSING MODES OF 8051


    The 8051 provides a total of five distinct addressing modes. (1) immediate (2) register (3) direct (4) register indirect (5) indexed

    ADDRESSING MODES OF 8051


    Immediate Addressing Mode The operand comes immediately after the op-code. The immediate data must be preceded by the pound sign, "#"

    ADDRESSING MODES OF 8051


    Register Addressing Mode Register addressing mode involves the use of registers to hold the data to be manipulated

    ADDRESSING MODES OF 8051


    Direct Addressing Mode - It is most often used to access RAM locations 30 - 7FH. -This is due to the fact that register bank locations are accessed by the register names of R0 - R7. -There is no such name for other RAM locations so must use direct addressing -In the direct addressing mode, the data is in a RAM memory location whose address is known, and this address is given as a

    part of the instruction

    ADDRESSING MODES OF 8051

    ADDRESSING MODES OF 8051


    Register Indirect Addressing Mode A register is used as a pointer to the data. If the data is inside the CPU, only registers R0 and R 1 are used for this purpose. R2 - R7 cannot be used to hold the address of an operand located in RAM when using indirect addressing mode. When RO and R 1 are used as pointers they must be preceded by the @ sign.

    ADDRESSING MODES OF 8051

    ADDRESSING MODES OF 8051


    Indexed Addressing Mode Indexed addressing mode is widely used in accessing data elements of look-up table entries located in the program ROM space of the 8051. The instruction used for this purpose is : MOVC A, @ A+DPTR

    The 16-bit register DPTR and register A are used to form the
    address of the data element stored in on-chip ROM.

    ADDRESSING MODES OF 8051


    Indexed Addressing Mode l Because the data elements are stored in the program (code) space ROM of the 8051, the instruction MOVC is used instead of MOV. The "C" means code. l In this instruction the contents of A are added to the 16-bit

    register DPTR to form the 16- bit address of the needed data.

    INSTRUCTION SET OF 8051


    Depending on operation they perform, all instructions are divided in several groups: Arithmetic Instructions Branch Instructions Data Transfer Instructions

    Logic Instructions
    Bit-oriented Instructions

    Arithmetic Instructions
    ADD A,Rn Adds the register to the accumulator ADD A,direct Adds the direct byte to the accumulator ADD A,@Ri ADD A,#data ADDC A,Rn Adds the indirect RAM to the accumulator Adds the immediate data to the accumulator Adds the register to the accumulator with a carry flag

    ADDC A,direct Adds the direct byte to the accumulator with a carry flag ADDC A,@Ri Adds the indirect RAM to the accumulator with a carry flag ADDC A,#data Adds the immediate data to the accumulator with a carry flag

    Arithmetic Instructions
    SUBB A,Rn Subtracts the register from the accumulator with a borrow
    SUBB A,direct Subtracts the direct byte from the accumulator with a borrow SUBB A,@Ri Subtracts the indirect RAM from the accumulator with a borrow Subtracts the immediate data from the accumulator with a SUBB A,#data borrow INC A INC Rn INC Rx INC @Ri Increments the accumulator by 1 Increments the register by 1 Increments the direct byte by 1 Increments the indirect RAM by 1

    Arithmetic Instructions
    DEC A DEC Rn DEC Rx Decrements the accumulator by 1 Decrements the register by 1 Decrements the direct byte by 1

    DEC @Ri
    INC DPTR MUL AB DIV AB DA A

    Decrements the indirect RAM by 1


    Increments the Data Pointer by 1 Multiplies A and B Divides A by B Decimal adjustment of the accumulator according to BCD code

    BRANCHING INSTRUCTIONS
    ACALL addr11 Absolute subroutine call LCALL addr16 Long subroutine call RET Returns from subroutine

    RETI
    AJMP addr11 LJMP addr16 SJMP rel

    Returns from interrupt subroutine


    Absolute jump Long jump Short jump (from 128 to +127 locations relative to the following instruction)

    BRANCHING INSTRUCTIONS
    JC rel JNC rel
    JB bit,rel JBC bit,rel JMP @A+DPTR JZ rel JNZ rel

    Jump if carry flag is set. Short jump. Jump if carry flag is not set. Short jump.
    Jump if direct bit is set. Short jump. Jump if direct bit is set and clears bit. Short jump. Jump indirect relative to the DPTR Jump if the accumulator is zero. Short jump. Jump if the accumulator is not zero. Short jump.

    BRANCHING INSTRUCTIONS
    CJNE A,direct,rel CJNE A,#data,rel CJNE Rn,#data,rel CJNE @Ri,#data,rel DJNZ Rn,rel DJNZ Rx,rel NOP Compares direct byte to the accumulator and jumps if not equal. Short jump. Compares immediate data to the accumulator and jumps if not equal. Short jump.

    Compares immediate data to the register and jumps if not equal. Short jump.
    Compares immediate data to indirect register and jumps if not equal. Short jump. Decrements register and jumps if not 0. Short jump. Decrements direct byte and jump if not 0. Short jump. No operation

    DATA TRANSFER
    MOV A,Rn MOV A,direct MOV A,@Ri MOV A,#data Moves the register to the accumulator Moves the direct byte to the accumulator Moves the indirect RAM to the accumulator Moves the immediate data to the accumulator

    MOV Rn,A

    Moves the accumulator to the register

    MOV Rn,direct Moves the direct byte to the register MOV Rn,#data Moves the immediate data to the register MOV direct,A Moves the accumulator to the direct byte

    DATA TRANSFER
    MOV direct,A MOV direct,Rn MOV direct,@Ri MOV @Ri,A Moves the accumulator to the direct byte Moves the register to the direct byte Moves the indirect RAM to the direct byte Moves the accumulator to the indirect RAM MOV direct,direct Moves the direct byte to the direct byte MOV direct,#data Moves the immediate data to the direct byte

    MOV @Ri,direct MOV @Ri,#data


    MOVC A,@A+DPTR MOVC A,@A+PC

    Moves the direct byte to the indirect RAM Moves the immediate data to the indirect RAM
    Moves the code byte relative to the DPTR to the accumulator (address=A+DPTR)

    MOV DPTR,#data Moves a 16-bit data to the data pointer

    Moves the code byte relative to the PC to the accumulator (address=A+PC)

    DATA TRANSFER
    Moves the external RAM (8-bit address) to the accumulator Moves the external RAM (16-bit address) to the MOVX A,@DPTR accumulator Moves the accumulator to the external RAM (8-bit MOVX @Ri,A address) Moves the accumulator to the external RAM (16-bit MOVX @DPTR,A address) PUSH direct Pushes the direct byte onto the stack POP direct Pops the direct byte from the stack/td> XCH A,Rn Exchanges the register with the accumulator XCH A,direct Exchanges the direct byte with the accumulator XCH A,@Ri Exchanges the indirect RAM with the accumulator Exchanges the low-order nibble indirect RAM with the XCHD A,@Ri accumulator MOVX A,@Ri

    LOGICAL INSTRUCTIONS
    ANL A,Rn ANL A,direct ANL A,@Ri ANL A,#data ANL direct,A ANL direct,#data ORL A,Rn ORL A,direct ORL A,@Ri ORL direct,A ORL direct,#data AND register to accumulator AND direct byte to accumulator AND indirect RAM to accumulator AND immediate data to accumulator AND accumulator to direct byte AND immediae data to direct register OR register to accumulator OR direct byte to accumulator OR indirect RAM to accumulator OR accumulator to direct byte OR immediate data to direct byte

    LOGICAL INSTRUCTIONS
    XRL A,Rn XRL A,direct Exclusive OR register to accumulator Exclusive OR direct byte to accumulator

    XRL A,@Ri
    XRL A,#data XRL direct,A CLR A

    Exclusive OR indirect RAM to accumulator


    Exclusive OR immediate data to accumulator Exclusive OR accumulator to direct byte Clears the accumulator

    XORL direct,#data Exclusive OR immediate data to direct byte

    CPL A
    SWAP A RL A RLC A RR A

    Complements the accumulator (1=0, 0=1)


    Swaps nibbles within the accumulator Rotates bits in the accumulator left Rotates bits in the accumulator left through carry Rotates bits in the accumulator right

    RRC A

    Rotates bits in the accumulator right through carry

    BIT WISE INSTRUCTIONS


    CLR C CLR bit SETB C SETB bit CPL C CPL bit ANL C,bit ANL C,/bit ORL C,bit Clears the carry flag Clears the direct bit Sets the carry flag Sets the direct bit Complements the carry flag Complements the direct bit AND direct bit to the carry flag AND complements of direct bit to the carry flag OR direct bit to the carry flag OR complements of direct bit to the carry flag Moves the direct bit to the carry flag Moves the carry flag to the direct bit

    ORL C,/bit
    MOV C,bit MOV bit,C

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