Document Number: MC33812

Rev. 5.0, 7/2010

Freescale Semiconductor
Advance Information
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
Freescale Semiconductor, Inc., 2010. All rights reserved.
Multifunctional Ignition and
Injector Driver
The 33812 is an engine control analog power IC intended for
motorcycle and other single/dual cylinder small engine control
applications. The IC consists of three integrated low side drivers, one
pre-driver, a +5.0 V, voltage pre-regulator, an MCU watchdog circuit,
an ISO 9141 K-Line interface, and a parallel interface for MCU
communication. The three low side drivers are provided for driving a
fuel injector, a lamp or LED, and a relay or other load. The pre-driver
is intended to drive either an Insulated Gate Bipolar Transistor (IGBT)
or a bipolar Darlington transistor to control an ignition coil.
Features:
Designed to operate over the range of ~4.7 V V
PWR
36 V
Fuel Injector driver - Current Limit - 4.0 A Typical
Ignition pre-driver can drive IGBT or Darlington bipolar junction
transistors
Ignition pre-driver has independent high and low side outputs
Relay driver - Current Limit - 4.0 A Typical
Lamp driver- Current Limit - 1.5 A Typical
All external outputs protected against short to battery, over-current
Ignition and other drivers protected against over-temperature
Interfaces directly to MCU Using 5.0 V parallel interface
VCC voltage pre-regulator provides +5.0 V power for the MCU
MCU Power On RESET generator
MCU watchdog timer circuit with parallel refresh/time setting line
Independent fault annunciation outputs for ignition, injector and relay drivers
ISO-9141 K-Line transceiver for communicating diagnostic messages
Pb-free packaging designated by suffix code EK
Figure 1. 33812 Simplified Application Diagram
SMALL ENGINE CONTROL IC
33812
*Note: AEC qualified for automotive applications
ORDERING INFORMATION
Device
Temperature
Range (T
A
)
Package
MCZ33812EK/R2
-40 to 125C 32 SOICW-EP
*MCZ33812AEK/R2
EK Pb-FREE SUFFIX
98ASA10556D
32 Pin SOICW EP
MRX
33812
V
BAT
LAMPOUT
MCU
RESET

ROUT
RELAY OR
MIL
V
BAT
RESET
VCC
MTX
INJIN
VCCSENS
DGND
+5 V
IGNIN
IGNOUTH
ISO9141 ISO9141
IGNFB
VCCREF
INJOUT
INJECTOR
V
BAT
V
BAT
GPIO
RXD
TXD
PGND1,2
WD_INH
TM_EN, TEST2
GPIO
GPIO WDRFSH
INJFLT
IGNFLT
GPIO
GPIO
LAMPIN
RIN GPIO
GPIO
V
BAT
IGNSUP
PNP
IGNOUTL
(IGBT DRIVER SHOWN)
OTHER LOAD
V
PWR
Note: Surge Voltage protection recommended on VPWR
GPIO RELFLT
+5 V
VPWR
Analog Integrated Circuit Device Data
2 Freescale Semiconductor
33812
Figure 2. 33812 Simplified Application Diagram (Darlington Mode)
MRX
33812
V
BAT
LAMPOUT
MCU
RESET

ROUT
RELAY OR
MIL
V
BAT
RESET
VCC
MTX
INJIN
VCCSENS
DGND
+5 V
IGNIN
IGNOUTH
ISO9141 ISO9141
IGNFB
VCCREF
INJOUT
INJECTOR
V
BAT
V
BAT
GPIO
RXD
TXD
PGND1,2
WD_INH
TM_EN, TEST2
GPIO
GPIO WDRFSH
INJFLT
IGNFLT
GPIO
GPIO
LAMPIN
RIN GPIO
GPIO
V
BAT
IGNSUP
PNP
IGNOUTL
(DARLINGTON
OTHER LOAD
+5 V
GPIO RELFLT
+5 V
VPWR
DRIVER SHOWN)
Analog Integrated Circuit Device Data
Freescale Semiconductor 3
33812

Figure 3. 33812 Simplified Internal Block Diagram
V
PWR
, V
CC
Oscillator
INJIN
VPWR
IGNIN
~50 A
~50 A
LOGIC CONTROL
Gate Control
Current Limit
Temperature Limit
Short Protection
Open det. on Injector
+
R
S
lLimit
VClamp

Relay and
~75A
INJOUT
VCCREF
Band Gap
PARALLEL
CONTROL
under-voltage
POR, over-voltage
V10.0 Analog
V2.5 Logic
Bias
ROUT
VCCSENS
+
R
S
lLimit
VClamp

Gate Control
Current Limit
Temperature Limit
Short Protection
ISO9141
CONTROLLER
MRX
MTX
LAMPOUT
V
CC
ISO9141
~50 A
~50 A
Lamp Output
Ignition
IGNSUP
Predriver
IGNFB
GND
TEST3
TEST1
PGND1
PGND2
DGND
IGNFLT
WATCHDOG
RESET
V
CC
INJFLT
LAMPIN
WDRFSH
RIN
~50 A
V
CC
~50 A
V
CC
~50 A
~50 A
~50 A
IGNOUTH
Short
Protection IGNOUTL
Injector Output
TEST2
WD_INH
V
CC
~50 A
~50 A
RELFLT
V
CC
~50 A
(Open Drain)
TM_EN
~50 A
*Note: Pull up and pull down current sources are ~50 A unless otherwise noted
Analog Integrated Circuit Device Data
4 Freescale Semiconductor
33812
PIN CONNECTIONS
PIN CONNECTIONS
Figure 4. 33812 Pin Connections
GND
IGNOUTL
IGNOUTH
IGNSUP
IGNFB
ISO9141
VCCSENS
VCCREF
VPWR
RESET
INJFLT
RELFLT
IGNFLT
INJIN
RIN
LAMPIN
IGNIN
TEST3
TEST2
TEST1
WD_INH
N.C.
INJOUT
PGND1
DGND
LAMPOUT
PGND2
ROUT
N.C.
TM_EN
WDRFSH
MRX
MTX
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Table 1. 33812 Pin Definitions
Pin Pin Name
Pin
Function
Formal Name Description
1 IGNOUTL Output Ignition Output Low
Low side output to drive Gate/Base of IGBT/Bipolar Darlington
2 IGNOUTH Output Ignition Output High
High side output to drive Gate/Base of IGBT/Bipolar Darlington
3 IGNSUP Input Ignition Output Supply Tie to +5 V for Darlington, tie to the V
PWR
supply for IGBT output device
4 IGNFB Input Feedback from Source
Voltage feedback from source of Ignition driver transistor through 10:1
voltage divider
5 ISO9141 Input/Output ISO9141 K-Line Bidirectional
Serial Data Signal
The ISO9141 pin is V
PWR
level IN/OUT signal connected to external ECU
Tester using ISO9141 Protocol.The Output is Open drain and the Input is
a ratiometric V
PWR
level threshold comparator
6 VCCSENS Input Voltage Sense from VCC Feedback to internal VCC regulator from external pass transistor
7 VCCREF Output VCC Reference Base drive Base drive voltage for external PNP pass transistor
8 VPWR Supply Input Main Voltage Supply Input
VPWR is the main voltage supply Input for the device. Connected to +12
volt battery (It should have reverse battery protection and transient
suppression.)
9 RESET Output Reset Output to MCU
Logic Level Reset signal used to reset the MCU when the watchdog circuit
times out, during under voltage condition on VCC and for initial power up
and power down
10 INJFLT Output Injector Fault
Logic Level output to MCU indicating any fault in the injector circuit.
11 RELFLT Output Relay Fault
Logic Level output to MCU indicating any fault in the relay circuit.
12 IGNFLT Output Ignition Fault Logic Level output to MCU indicating any fault in the ignition circuit.
13 INJIN Input Injector Parallel Input
Logic Level input from the MCU to control the injector driver output
14 RIN Input Relay Parallel Input
Logic Level Parallel input to activate RELAY output, ROUT
15 LAMPIN Input LAMP Parallel Input Logic Level Parallel input to activate the malfunction indicator lamp output,
LAMP
16 IGNIN Input Ignition Parallel Input
Logic Level Input from MCU controlling the ignition coil current flow and
spark.
17 MTX Input ISO9141 MCU Data Input
Input logic level ISO9141 data from the MCU to the ISO9141 IN/OUT pin
Analog Integrated Circuit Device Data
Freescale Semiconductor 5
33812
PIN CONNECTIONS
18 MRX Output Low Side Driver Output
Output logic level ISO9141 data to the MCU from the ISO9141 IN/OUT pin
19 WDRFSH Input Watchdog Refresh Logic Level input from MCU to refresh the watchdog circuit to prevent
RESET
20 TM_EN Input Test Mode Enable
Used by Freescale test engineering, tie to Gnd in operation
21 N.C. Unused ------- Unused pin, leave open
22 ROUT Output Relay Driver Output
Low side relay driver output driven by parallel input RIN
23 PGND2 Ground Power Ground 2
Ground for RELAY driver output
24 LAMPOUT Output Warning Lamp Output Low side driver output for MIL (warning lamp) driven by parallel input
LAMPIN
25 DGND Ground Supply Ground
Tied to ground plane, used for ground for all low power signals
26 PGND1 Ground Power Ground 1 Ground for INJOUT injector driver output
27 INJOUT Output Injector Driver Output
Low side driver output for Injector driven by parallel input INJIN
28 N.C. Unused -------
Unused pin, leave open
29 WD_INH Input Watch Dog Inhibit Normally tied to GND, If tied high through a pull-up, it inhibits RESET from
a watchdog time-out
30 TEST1 Input Test 1
MUST be tied to GND.
31 TEST2 Input Test 2
MUST be tied to GND.
32 TEST3 Input Test 3 MUST leave OPEN.
EP GND Ground Substrate Ground
Should be tied to DGND.
Table 1. 33812 Pin Definitions
Pin Pin Name
Pin
Function
Formal Name Description
Analog Integrated Circuit Device Data
6 Freescale Semiconductor
33812
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground, unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Rating Symbol Value Unit
VPWR Supply Voltage
(1)
V
PWR
-0.3 to 45 V
DC
Logic Input Voltage (MTX, INJIN, IGNIN, WDRFSH, LAMPIN, RIN) V
IL
-0.3 to V
CC
V
DC
Injector and RELAY Low Side Driver Drain Voltage (V
INJOUT
) V
INJOUT
V
RELOUT
-0.3 to V
CLAMP_INJ
-0.3 to V
CLAMP_REL
V
DC
Lamp Low Side Driver Drain Voltage (LAMPOUT)
LAMP
OUT
-0.3 to V
CLAMP_LAMP
V
DC
Output Clamp Energy (INJOUT and ROUT) (Single Pulse)
T
JUNCTION
= 150C, I
OUT
= 1.5 A
E
CLAMP_INJ_SP
E
CLAMP_REL_SP
100 mJ
Output Clamp Energy (INJOUT and ROUT) (Continuous operation)
T
JUNCTION
= 125C, I
OUT
= 1.0 A, (Max. frequency is 70 Hz, Maximum Duty Cycle 90%)
E
CLAMP_INJ_CP
E
CLAMP_REL_CP
100 mJ
Output Continuous Current (INJOUT and ROUT)
T
JUNCTION
= 150C
I
OCC_MAX
2.0 A
Output Clamp Energy (LAMPOUT) (Single Pulse) - T
JUNCTION
= 150C, I
OUT
= 0.5 A E
CLAMP_LAMP_SP
35 mJ
ESD Voltage
(2)
Human Body Model
Machine Model
Charge Device Model (Corner pins)
Charge Device Model
V
ESD1
V
ESD2
V
ESD3
V
ESD4
2000
200
750
500
V
THERMAL RATINGS
Operating Temperature
Ambient
Junction
Case
T
A
T
J
T
C
-40 to 125
-40 to 150
-40 to 125
C
Storage Temperature
T
STG
-55 to 150 C
Power Dissipation (T
A
= 25C)
(5)
P
D
1.7 W
Peak Package Reflow Temperature During Solder Mounting
(3),

(4)
T
SOLDER
Note 4 C
Thermal Resistance
Junction-to-Ambient
Junction- to-Lead
Junction-to-Flag
R
JA
R
JL
R
JC
75
8.0
1.2
C/W
Notes
1. Exceeding these limits may cause malfunction or permanent damage to the device.
2. ESD testing is performed in accordance with the Human Body Model (HBM) (C
ZAP
= 100 pF, R
ZAP
= 1500 ), the Machine Model (MM)
(C
ZAP
= 200 pF, R
ZAP
= 0 ), and the Charge Device Model (CDM), Robotic (C
ZAP
= 4.0 pF).
3. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
4. Freescales Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes
and enter the core ID to view all orderable parts (i.e. MC33xxxD enter 33xxx), and review parametrics.
5. This parameter is guaranteed by design but is not production tested.
Analog Integrated Circuit Device Data
Freescale Semiconductor 7
33812
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions of 7.0 V V
PWR
18 V, -40C T
C
125C, unless otherwise noted. Where
applicable, typical values reflect the parameters approximate average value with V
PWR
= 14 V, T
A
= 25C.
Characteristic Symbol Min Typ Max Unit
POWER INPUT (VPWR)
Supply Voltage (measured at VPWR pin)
(7)
Fully Operational
Full Parameter Specification
V
PWR(FO)
V
PWR(FP)
4.7
7.0
36
18
V
Supply Current - All Outputs Disabled (Normal Mode) I
VPWR(ON)
10.0 14.0 mA
V
PWR
Over-voltage Shutdown Threshold Voltage
(8)
V
PWR(OV)
36.5 39 42 V
V
PWR
Over-voltage Shutdown Hysteresis Voltage V
PWR(OV-HYS)
0.5 1.5 3.0 V
V
PWR
Under-voltage Shutdown Threshold Voltage
(8)
V
PWR(UV)
3.0 3.7 4.4 V
V
PWR
Under-voltage Shutdown Hysteresis Voltage V
PWR(UV-HYS)
100 200 300 mV
VOLTAGE REGULATOR OUTPUTS (VCCREF, VCCSENS)
VCCSENS (VCC) Output Voltage (measured with external output PNP
(FZT753 typical) transistor and 500 Load on VCCSENS)
V
SENS
4.9 5.0 5.1 V
VCCREF Output Current
(9)
I
VCCREF
-5.0 mA
VCCREF Current Limit
I
VCCCL
5.0 15 20 mA
Output Capacitance External (ceramic, low ESR recommended)
V
OCE
2.2 F
VCCSENS Input Current
I
VCCSENS
50 1000 A
Line Regulation (external output PNP transistor and 500 Load on
VCCSENS)
REG
LINE
_
VCC
2 25 mV
Load Regulation (external output PNP transistor and 500 Load on
VCCSENS)
REG
LOAD_VCC
2 25 mV
Dropout Voltage (Minimal Input/Output Voltage at full load) V
DROPOUT
46 200 mV
V
CC
Under-voltage RESET Threshold Voltage RESET
UV_VCC
4.5 4.7 4.9 V
LOW SIDE DRIVER (INJOUT AND ROUT)
Output Fault Detection Voltage Threshold
(10)
Outputs programmed OFF (Open Load, Injector/Relay)
Outputs programmed ON (Short to Battery)
V
OUT(FLT-TH)
2.0 2.5 3.0 V
Output OFF Open Load Detection Current (Injector/Relay)
V
DRAIN
= 18 V, Outputs Programmed OFF
I
(OFF)OCO
40 75 150
A
Notes
6. Device is functional provided T
J
is less than 150C. Some table parameters may be out of specification.
7. Over-voltage thresholds minimum and maximum include hysteresis.
8. Under-voltage thresholds minimum and maximum include hysteresis, for disabling outputs only, RESET based on VCC under-voltage
9. This parameter is guaranteed by design, however is not production tested.
10. Output fault detect thresholds are the same for output open and shorts.
Analog Integrated Circuit Device Data
8 Freescale Semiconductor
33812
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
LOW SIDE DRIVER (INJOUT AND ROUT) (CONTINUED)
Drain-to-Source ON Resistance
I
OUT
=1.0 A, T
J
= 125C, V
PWR
=14 V
I
OUT
=1.0 A, T
J
= 25C, V
PWR
=14 V
I
OUT
=1.0 A, T
J
= -40C, V
PWR
=14 V
R
DS(ON)-INJ/REL
R
DS(ON)-INJ/REL
R
DS(ON)-INJ/REL

0.25
0.2
0.4

Output Self Limiting Current I

OUT(LIM)-INJ/REL
3.0 6.0 A
Output Clamp Voltage - I
D
= 20 mA V
CLAMP_INJ/REL
48 53 58 V
Output Leakage Current (INJOUT)
V
DRAIN
= 24 V, (Note: Open Load Detection Current cant be
disabled)
I
OUT(LKG)-INJ
1.0
mA
Output Leakage Current (ROUT)
V
DRAIN
= 24 V, (Note: Open Load Detection Current cant be
disabled)
I
OUT(LKG)-REL
1.0
mA
Over-temperature Shutdown
(11)
T
LIM-INJ/REL
155 190 C
Over-temperature Shutdown Hysteresis
(11)
T
LIM(HYS)-INJ/REL
5.0 10 15 C
LOW SIDE DRIVER (LAMPOUT)
Drain-to-Source ON Resistance
I
OUT
= 300 mA, T
J
= 150C, V
PWR
= 14 V R
DS(ON)LAMP
1.0

Output Self Limiting Current

I
OUT(LIM)-LAMP
1.0 2.5 A
Output Clamp Voltage - I
D
= 20 mA
V
CLAMP-LAMP
48 53 58 V
Output Leakage Current
(11)
V
DRAIN
= 24 V, (Note: No Open Load Detection Current)
I
OUT(LKG)-LAMP
20
A
Output Fault Detection Voltage Threshold
(11)
Outputs programmed ON (Short to Battery)
V
OUT(FLT-TH)-LAMP
2.0 2.5 3.0 V
Over-temperature Shutdown
(11)
T
LIM-LAMP
155 190 C
Over-temperature Shutdown Hysteresis
(11)
T
LIM(HYS)-LAMP
5.0 10 15 C
Notes
11. This parameter is guaranteed by design, however is not production tested.
STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions of 7.0 V V
PWR
18 V, -40C T
C
125C, unless otherwise noted. Where
applicable, typical values reflect the parameters approximate average value with V
PWR
= 14 V, T
A
= 25C.
Characteristic Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
Freescale Semiconductor 9
33812
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
IGNITION (IGBT/DARLINGTON) DRIVER PARAMETERS (IGNOUTL, IGNOUTH, IGNFB, IGNSUP)
Drain-to-Source ON Resistance
(IGNOUTL Output, Gate/Base Drive Turn Off Resistance)
R
DS_L(ON)
150 300 400
Drain-to-Source ON Resistance
(IGNSUP to IGNOUTH Output, Gate/Base Drive Turn On Resistance)
R
DS_H(ON)
70 90
Ignition Output High Source Current (IGNOUTH) I
GATEDRIVE_H
40 50 mA
Ignition Output High (IGNOUTH) Device Power Dissipation
(12)
PD_IGNOUTH
300 mW
Output Fault Detection Voltage Threshold
(12)
(At IGNFB pin, not at input of 10:1 Voltage Divider)
Output programmed OFF (Open Load)
Output programmed ON (Short to Battery)
V
IGNFB_OUT(FLT-TH)
100 250 400 mV
Feedback Sense Current (FBx Input Current)
FBx = 2.0 V, Output Programmed OFF I
FBX(FLT-SNS) 1.0
A
IGNSUP Voltage for:
IGBT
(12)
Darlington
(12)
V
IGNSUP_IGBT
V
IGNSUP_DARL

V
PWR
5.0
V
PWR_MAX
V
CC_MAX
V
Over-temperature Shutdown on IGNOUTH and IGNOUTL
(12)
T
LIM-IGNOUTH,L
155 190 C
Over-temperature Shutdown Hysteresis on IGNOUTH and IGNOUTL
(13)
T
LIM(HYS)-
IGNOUTH,L
5.0 10 15 C
ISO9141 TRANSCEIVER PARAMETERS (ISO9141)
Input low voltage at ISO I/O pin
V
IL_ISO
0.3xVPWR V
Input high voltage at ISO I/O pin
V
IH_ISO
0.7*VPWR V
Input hysteresis at ISO I/O pin
V
HYST_ISO
0.15xVPWR
Output low voltage at ISO I/O pin
V
OL_ISO
0.2xVPWR V
Output high voltage at ISO I/O pin
V
OH_ISO
0.8xVPWR V
Output current limit at ISO I/O pin (MTX = 0)
I
LIM_ISO
50 100 150 mA
Load capacitance at ISO I/O pin
(13)
C
L_ISO
0.01 3.0 10 nF
DIGITAL OUTPUTS (MRX, IGNFLT, RELFLT, INJFLT)
Output Logic High-voltage Levelled I
OH
=1.0 mA load)
V
OH
0.8 x V
CC
V
CC
+ 0.2 V
Output Logic Low-voltage Level (at I
OL
=1.0 mA load)
V
OL
GND 0.1 x V
CC
V
DIGITAL OUTPUT (RESET)
Resistance of Internal pull-down resistor on open drain RESET pin R
RESET
100 500 k
Notes
12. These parameters are guaranteed by design.
13. This parameter is guaranteed by design, however it is not production tested.
STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions of 7.0 V V
PWR
18 V, -40C T
C
125C, unless otherwise noted. Where
applicable, typical values reflect the parameters approximate average value with V
PWR
= 14 V, T
A
= 25C.
Characteristic Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
10 Freescale Semiconductor
33812
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
DIGITAL INPUTS (MTX, INJIN, IGNIN, LAMPIN, WDRFSH, RIN, WD_INH)
Input Logic High-voltage Thresholds V
IH
0.7 x V
CC
V
CC
+ 0.3 V
Input Logic Low-voltage Thresholds V
IL
GND - 0.3 0.2 x V
CC
V
Input Logic Voltage Hysteresis V
IHYS
0.5 1.5 V
Input Logic Capacitance
(14)
C
IN
20 pF
Input Logic Pull-down Current (all except MTX) - 0.8 V to 5.0 V I
LOGIC_PD
30 50 100 A
Input Logic Pull-up Current (MTX only) - 0.8 V to 5.0 V I
LOGIC_PU
-30 -50 -100 A
Notes
14. These parameters are guaranteed by design.
STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions of 7.0 V V
PWR
18 V, -40C T
C
125C, unless otherwise noted. Where
applicable, typical values reflect the parameters approximate average value with V
PWR
= 14 V, T
A
= 25C.
Characteristic Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
Freescale Semiconductor 11
33812
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions of 7.0 V V
PWR
18 V, -40C T
C
125C, unless otherwise noted. Where applicable,
typical values reflect the parameters approximate average value with V
PWR
= 14 V, T
A
= 25C.
Characteristic Symbol Min Typ Max Unit
POWER INPUT
Required Low State Duration on VPWR for Under-voltage Detect
V
PWR
V
PWR_UV
(15)
t
UV
1.0
s
WATCHDOG TIMER
Maximum time value Watchdog can be loaded with WD
MAX
10 s
Maximum WDRFSH pulse width to load full Watchdog time value WD
LOAD
1.0 ms
Minimum pulse width on WDRFSH to refresh Watchdog timer WDRFSH
MIN
1.0 s
Reset Pulse Width when Watchdog times out WD
RESET
100 s
ISO9141 TRANSCEIVER
Typical ISO9141 Data Rate
(15)
ISO
BR
10 kbps
Turn OFF Delay MTX Input to ISO Output t
TXDF
2.0 s
Turn ON/OFF Delay ISO Input to MRX Output t
RXDF
, t
RXDR
1.0 s
Rise and Fall Time MRX Output (measured from 10% to 90%) t
RXR
, t
RXF
1.0 s
Maximum Rise and Fall Time MTX Input (measured from 10% to 90%)
(15)
t
TXR
, t
TXF
1.0 s
LAMP DRIVER
Inrush Current Blanking Time (LAMPOUT only)
t
OC(BLANK)
5.0 7.0 9.0 ms
LAMPOUT, automatic retry timer during short to battery fault condition
t
RETRY_LAMP
7.0 10 13 ms
DIGITAL LOGIC OUTPUTS
INJFLT, IGNFLT Output Signal Rise Time
(15)
t
R(DLO)
100 200 ns
INJFLT, IGNFLT Output Signal Fall Time
(15)
t
F(DLO)
100 200 ns
INJECTOR AND RELAY DRIVER
Output ON Current Limit Fault Filter Timer t
SC
30 60 90 s
Output OFF Open Circuit Fault Filter Timer (INJECTOR and RELAY
Driver)
t
(OFF)OC
100 400 s
Output Slew Rate - Rise - Z
LOAD
= 14 , V
LOAD
= 14 V
t
SR(RISE)
1.0 5.0 10 V/s
Output Slew Rate - Fall - Z
LOAD
= 14 , V
LOAD
= 14 V
t
SR(FALL)
1.0 5.0 10 V/s
IGNITION PRE-DRIVER
Output OFF Open Circuit Fault Filter Timer
t
(OFF)OC
100 400 s
Output ON Short-circuit to Battery Fault Detection Timer
t
(ON)(SC)
30 60 90 s
Notes
15. This parameter is guaranteed by design, however is not production tested.
Analog Integrated Circuit Device Data
12 Freescale Semiconductor
33812
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
SUPPLY INPUT (VPWR)
The VPWR pin is battery input to the 33812 IC. A POR/LVI
sub-circuit monitors this input's voltage level. The VPWR pin
requires external reverse battery and transient protection.
OUTPUT (VCCREF)
The VCCREF output pin is used to drive an external 5.0 V
regulator PNP bipolar pass transistor.
INPUT (VCCSENS)
The VCCSENS pin is used to monitor the +5.0 Volts from
the external pass transistors output. A POR will be
performed when the voltage on the VCCSENS pin goes from
0 to VCC.
DIGITAL GROUND (DGND)
The DGND pin provides ground reference for the digital
inputs and outputs. The V
CC
supply is referenced to the
DGND pin.
PGND1 AND PGND2
The PGNDx pins provide power additional ground
reference for the power outputs, ROUT, LAMPOUT, and
INJOUT. The V
PWR
supply is referenced to the PGND pins.
INJECTOR INPUT (INJIN)
The INJIN pin is the parallel input that controls the Injector
output, INJOUT. The INJIN pin is a logic level input with built-
in pull-down to ground to prevent accidental actuation of the
injector if the connection to the pin is lost.
INJECTOR AND RELAY DRIVER OUTPUT (INJOUT/
ROUT)
The INJOUT and ROUT output pin are the Injector driver
and Relay driver outputs for the fuel Injector and Relay that
this IC supports. The Relay Driver and Injector Drivers are
identical in operation and features The Injector driver output
is controlled by the parallel input (INJIN) and the Relay driver
output is controlled by the parallel input (RIN). The Injector
and Relay outputs are turned off during VPWR over-voltage
and under-voltage events. Open circuit (during off state),
short to battery (during on state), and over-temperature faults
are detected and annunciated as a logic high on the INJFLT
and RELFLT lines. Over-current is limited by the current
limiting circuitry but is not annunciated unless the over-
current is due to a short to battery. For either driver, when a
fault condition is detected, the driver will turn off, and when
the fault condition clears, it will try to turn on again, if the input
line goes low and then high.
LAMP DRIVER OUTPUT (LAMPOUT)
The LAMPOUT output pin is the lamp driver, a low side
driver capable of driving an incandescent lamp. The current
limit blanking time is set to allow the driver to handle the
inrush current of a cold lamp filament. The LAMPOUT output
is controlled by the parallel input pin (LAMPIN). The
LAMPOUT low side driver is protected against over-
temperature, and short to battery. Unlike the Injector driver,
when a fault condition is detected, the LAMPOUT driver will
turn off, but when the fault condition clears, it will to turn on
again, while the input line, LAMPIN is high.
PRE-DRIVER OUTPUT, WITH FEEDBACK AND
SUPPLY VOLTAGE INPUT (IGNSUP, IGNOUTL,
IGNOUTH, IGNFB)
The IGNOUTL and IGNOUTH output pins are the low side
and high side output pins of the Ignition pre-driver. They are
used to drive either an IGBT or a Darlington BJT to control the
ignition coil current to produce a spark. The choice of output
device, IGBT or Darlington Bipolar Junction Transistor, is
indicated by the choice of supply voltage on the IGNSUP pin.
When driving a Darlington bipolar transistor, the IGNSUP
line must be tied to the +5.0 V supply. When driving an IGBT,
the IGNSUP may be tied to a protected voltage source (e.g.
V
PWR
) greater than +5.0 V to achieve the necessary gate
drive voltage required by the IGBT. The high side output
device will current limit if the circuit is forced to supply
currents greater than the maximum indicated.
The IGNOUTL and IGNOUTH lines are controlled by the
parallel input (IGNIN).The IGNOUT(L,H) outputs and the
associated feedback pin, IGNFB, provide short to battery
protection for the external driver transistor. A 10:1 voltage
divider must be used on the feedback pin to prevent >400
Volt Ignition Coil flyback voltage from damaging the IC.
Open circuit (off state), short to battery (on state), and
temperature limit threshold exceeded on the pre-driver stage
are detected on the output, and all annunciated as a logic
high on the IGNFLT line.
There is no individual annunciation of these three fault
conditions. The IGNFLT line goes high when any of the three
fault conditions are present.
If an over-current /short to battery fault condition, as
defined by a V
DS
greater than the V
IGNFB_OUT(FLT-TH)
is
detected, the IGNOUTH or IGNOUTL will turn off and not turn
on again until the fault condition has cleared and the IGNIN
input line goes low and then high.
OUTPUTS (INJFLT, RELFLT, IGNFLT)
The INJFLT, RELFLT and IGNFLT pins are the logic level
outputs that indicate when a fault condition has been
detected on the INJOUT, ROUT or IGNOUT pins. These pins
Analog Integrated Circuit Device Data
Freescale Semiconductor 13
33812
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
are normally low and will go high when a fault is detected.
Toggling the respective input pin will clear the respective fault
pin if the fault has been cleared.
K-LINE COMMUNICATION (MTX, MRX, ISO9141)
These three pins are used to provide an ISO914, K-line
communication link for the MCU to provide diagnostic support
for the system. MRX is the +5.0 V logic level serial output line
to the MCU. MTX is the +5.0 V logic level serial input to the
IC from the MCU. The ISO9141 pin is a bidirectional line,
consistent with the ISO9141 specification for signalling to and
from the MCU.
RESET (RESET)
The RESET pin is an open drain output.Without power on
the circuit, RESET is held low by an internal pull-down
resistor. When power is applied to the circuit and the voltage
on the VCC
SENSE
pin reaches the lower voltage threshold,
(5.0 volts - 2% = 4.9 V) the RESET pin will remain at a low
level (open drain FET turned on) for a period of time equal to
the value WD
RESET
. After this time period, the RESET pin will
then go high and stay high until a watchdog RESET is
generated, or an under-voltage event on VCC occurs. The
watchdog time and refresh features are controlled via the
WDRFSH line.
RELOAD AND REFRESH TIME (WDRFSH)
The WDRFSH pin is an input that is supplied by an MCU
output to set up the initial reload time, WD
RELOAD
, and to
refresh the watchdog timer. See the description of the
watchdog timer for information on how to use this pin.
WATCHDOG INHIBIT(WD_INH)
The WD_INH, watchdog inhibit pin, is normally tied to
ground. If desired, during software development, it can be
lifted from the ground pad and pulled high through an external
pull-up resistor. When high, WD_INH will prevent the
watchdog timer from causing a RESET because of a
watchdog timeout. The WD_INH should not be connected to
an MCU I/O pin or left floating in normal operation.
TEST PINS (TEST1, TEST2, AND TEST3)
These three pins are used only by Freescale test
engineering during the production testing of the 33812. They
are not to be used for any application purpose and must be
handled as specified in the pinout section of this document.
Analog Integrated Circuit Device Data
14 Freescale Semiconductor
33812
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
The 33812 has two states of operation, Normal state and
Reset state.
RESET STATE
Applying V
PWR
to the device will generate a Power On
RESET (POR) placing the device in the RESET state. The
Power On RESET circuit incorporates a timer to prevent high
frequency transients from causing an erroneous POR.
An under-voltage condition on VCC will also place the
device in the RESET state causing a RESET pulse to be
generated on the RESET line.
All RESETs will pre-load the watchdog timer with the
maximum time value, WD
MAX
. The Watchdog will begin
counting on the rising edge of the pulse.
NORMAL STATE
The NORMAL State is entered after the RESET line goes
high.
Control register settings from RESET are as follows:
All Outputs Off.
Watchdog timer loaded with the WD
MAX
time value.
Power Supply
The 33812 is designed to operate from 4.5 V to 36 V on
the VPWR pin. The VPWR pin supplies power to all internal
regulators, analog and logic circuit blocks. The VCCREF
output pin controls an external PNP bipolar transistor, such
that the collector is driven to +5.0 V +/- 2%. The VCCSENS
input pin, connected to the collector of the PNP, is used to
monitor the output voltage and provides the feedback to
regulate the PNP collector to +5.0 V.
INJECTOR DRIVER OPERATION
The open drain Low Side Driver (LSD) INJOUT is
designed to control a fuel injector. The Injector Driver is
controlled through the logic level parallel input pin, INJIN.
When INJIN is high, the INJOUT pin is pulled to ground,
turning on the fuel injector. When INJIN is low, the injector
pulls the INJOUT output to VBAT and the injector is turned
off.
The INJOUT driver includes off state open load detection
and its output device is protected against over-current, short
to battery, over-temperature, inductive flyback over-voltage
and VPWR over-voltage.
INJOUT Output Protection Features
Over-current (I
OUT-LIM
)
The Injector Driver protection scheme uses three separate
protection schemes to prevent damage to the output device.
The first protection scheme is deployed when an over-
current event occurs. In this case the current limiting circuitry
will attempt to limit the maximum current flow to the specified
I
LIM-INJ
value.
Short to Battery
The second protection scheme is invoked when the over-
current fault is due to a hard short to battery. In this case, the
protection circuitry will, after the short detection filter time,
turn off the output driver. The output will not try to turn on
again until the INJIN input goes low and then high again.
A short to battery is reported as a high logic level on the
INJFLT line.
Temperature Limit (T
LIM
)
The third protection scheme deals with the junction
temperature of the output device. Any time the maximum
temperature limit on the output device is exceeded (T
LIM
), the
device will shutdown until the junction temperature falls below
this maximum temperature minus the hysteresis temperature
value. The T
LIM
hysteresis value is T
LIM(HYST)
.
The maximum temperature (T
LIM
) protection scheme
controls the output device regardless of the state of the INJIN
input. The device is unable to be activated until the junction
temperature falls below this maximum temperature minus the
hysteresis temperature value.
An over-temperature fault is also reported as a high logic
level on the INJFLT line.
Over-voltage (V
CLAMP-INJ
and V
PWR(OV)
)
The injector driver is also protected against two types of
over-voltage conditions:
When the V
PWR
supply exceeds the V
PWR(OV)
threshold,
the INJOUT output turns off and stays off until the over-
voltage condition abates and the INJIN input pin toggles low
and then high again.
The output device controls inductive flyback voltages by
an active clamping network that limits the voltage across the
output device to V
CLAMP-INJ
volts.
Analog Integrated Circuit Device Data
Freescale Semiconductor 15
33812
FUNCTIONAL DEVICE OPERATION
IGNITION PRE-DRIVER OPERATION
INJOUT Fault Detection Features
Off State, Open Load Detection
An open load on the injector driver is detected by the
voltage level on the drain of the output device in the off state.
Internal to the device is a pull-down current source. In the
event of an open injector the drain voltage is pulled low.
When the voltage crosses the open load detection threshold,
an open load is detected. The open load fault detect
threshold is set internally and is not programmable. The open
load fault is reported as a high logic level on the INJFLT line.
On State, Shorted Load Detection
The INJOUT driver is capable of detecting a shorted
injector load (short to battery) in the on state. A shorted load
fault is reported when the drain pin voltage is greater than the
preset short threshold voltage. The shorted load fault detect
threshold is set internally and is not programmable. The
shorted load fault is reported as a high logic level on the
INJFLT line.
Clearing the INJFLT line
When the INJFLT line goes high for any of the following
reasons, while the INJIN line is high (on state):
Short to battery
Over-temperature
Over-voltage
Open load
The INJFLT line will remain high until the INJIN line goes
to a low logic level and the returns high (rising edge).
IGNITION PRE-DRIVER OPERATION
The Ignition pre-driver output is controlled by the logic
level input IGNIN. When IGNIN is high the IGNOUTH pin is
pulled high to IGNSUP. When the IGNIN pin is low, the
IGNOUTL line is pulled to ground turning off the driver
Darlington or IGBT.The IGNOUT pre-driver protects the
output device against over-current, short to battery, and
VPWR over-voltage.
IGNOUT OUTPUT PROTECTION FEATURES
Over-current and Short to battery (I
LIM
)
The Ignition Pre-driver protection scheme senses over-
current in the driver device by monitoring the voltage at the
IGNFB pin. Since this pin is protected by a 10:1 voltage
divider, the over-current threshold voltage is set internally to
1/10 of the voltage expected on the drain or collector of the
output device in an over-current situation. Since the Ignition
output device is external to the 33812, a short to battery is the
same as an over-current fault.
An over-current fault or short to battery is reported as a
high logic level on the IGNFLT line.
Temperature Limit (T
LIM
)
Since the Ignition output device is external to the 33812,
there is no over-temperature protection provided.
IGNOUT FAULT DETECTION FEATURES
Off State, Open Load Detection
An open load on the ignition driver external device is
detected by the voltage level on the drain or collector of the
output device in the off state (through a 10:1 voltage divider).
In the event of an open ignition coil the drain/collector voltage
is pulled low. When the voltage crosses the open load
detection threshold, an open load is detected. The open load
fault detect threshold is set internally and is not
programmable. An open load fault is reported as a high logic
level on the IGNFLT line.
Over-voltage (V
PWR(OV)
)
The Ignition pre-driver is also protected against an over-
voltage condition:
When the VPWR supply exceeds the V
PWR(OV)
threshold,
the IGNOUTL and IGNOUTH outputs turn off and stays off
until the over-voltage condition clears and the next rising
edge of the IGNIN input pin.
Clearing the IGNFLT line
When the IGNFLT line goes high for any of the following
reasons, while the IGNIN line is high (on state):
Short to battery
Over-voltage
Over-temperature of the IGNOUTL and IGNOUTH
transistors
Open load
The IGNFLT line will remain high until the IGNIN line goes
to the low logic level and then returns high.
Analog Integrated Circuit Device Data
16 Freescale Semiconductor
33812
FUNCTIONAL DEVICE OPERATION
RELAY DRIVER OPERATION
RELAY DRIVER OPERATION
The Relay Driver (ROUT) is a low side driver that is
controlled by the logic level RIN input pin. When RIN is high,
the ROUT pin is pulled to ground, turning on an external relay
or other device. When RIN is low, the relay coil pulls the
ROUT output to V
BAT
, and the relay is turned off.
The ROUT driver includes off state open load detection
and its output device is protected against over-current, short
to battery, over-temperature, inductive flyback over-voltage
and VPWR over-voltage.
The Relay Driver is functionally and electrically identical to
the Injector driver and can be used as a second Injector
driver, for two cylinder applications, as long as maximum
power dissipation considerations are observed.
ROUT PROTECTION FEATURES
Over-current (I
OUT-LIM ROUT
)
The ROUT Driver protection scheme uses three separate
protection schemes to prevent damage to the output device.
The first protection scheme is deployed when an over-
current event occurs. In this case, the current limiting circuitry
will attempt to limit the maximum current flow to the specified
I
OUT

LIM-REL
value.
Short to Battery
The second protection scheme is invoked when the over-
current fault is due to a hard short to battery. In this case, the
protection circuitry will, after the short detection filter time,
turn off the output driver. The output will not try to turn on
again until the RIN input goes low and then high again.
A short to battery is reported as a high logic level on the
RELFLT line.
Temperature Limit (T
LIM
)
The third protection scheme deals with the junction
temperature of the output device. Any time the maximum
temperature limit on the output device is exceeded (T
LIM
), the
device will shutdown until the junction temperature falls below
this maximum temperature minus the hysteresis temperature
value. The T
LIM
hysteresis value is T
LIM(HYST)
.
The maximum temperature (T
LIM
) protection scheme
controls the output device regardless of the state of the RIN
input. The device is unable to be activated until the junction
temperature falls below this maximum temperature minus the
hysteresis temperature value.
An over-temperature fault is also reported as a high logic
level on the RELFLT line.
Over-voltage (V
CLAMP-REL
and V
PWR(OV)
)
The relay driver is also protected against two types of
over-voltage conditions:
When the VPWR supply exceeds the V
PWR(OV)
threshold,
the ROUT output turns off and stays off until the over-voltage
condition abates and the RN input pin toggles low and then
high again.
The output device is protected against inductive flyback
voltages greater than V
CLAMP-REL
by an active clamping
network that limits the voltage across the output device to
V
CLAMP-REL
volts.
ROUT FAULT DETECTION FEATURES
Off State, Open Load Detection
An open load on the relay driver is detected by the voltage
level on the drain of the output device in the off state. Internal
to the device is a pull-down current source. In the event of an
open injector the drain voltage is pulled low. When the
voltage crosses the open load detection threshold, an open
load is detected. The open load fault detect threshold is set
internally and is not programmable. The open load fault is
reported as a high logic level on the RELFLT line.
On State, Shorted Load Detection
The ROUT driver is capable of detecting a shorted load
(short to battery) in the on state. A shorted load fault is
reported when the drain pin voltage is greater than the preset
short threshold voltage. The shorted load fault detect
threshold is set internally and is not programmable. The
shorted load fault is reported as a high logic level on the
RELFLT line.
Clearing the RELFLT line
When the RELFLT line goes high for any of the following
reasons, while the RIN line is high (on state):
Short to battery
Over-temperature
Over-voltage
Open load
The RELFLT line will remain high until the RIN line goes to
a low logic level and the returns high (rising edge).
Analog Integrated Circuit Device Data
Freescale Semiconductor 17
33812
FUNCTIONAL DEVICE OPERATION
LAMP DRIVER OPERATION
LAMP DRIVER OPERATION
The Lamp Driver is a low side driver that is controlled by
the logic level LAMPIN input pin. When LAMPIN is high, the
LAMP pin is pulled to ground, turning on an external bulb or
LED. When LAMPIN is low, the bulb or LED pulls the LAMP
output to V
BAT
, and the lamp is turned off.
LAMPOUT Protection Features
Over-current (I
OUT-LIM-LAMP
)
The LAMPOUT Driver protection scheme uses three
separate protection schemes to prevent damage to the
output device.
The first protection scheme is deployed when an over-
current event occurs. In this case the current limiting circuitry
will attempt to limit the maximum current flow to the specified
I
OUT

LIM-LAMP
value.
Short to Battery
The second protection scheme is invoked when the over-
current fault is due to a hard short to battery. In this case, the
protection circuitry will, after the short detection filter time,
turn off the output driver.
There will be an internal retry timer to try to turn on again
if the fault clears.
There is no annunciation of any LAMPOUT faults.
Temperature Limit (T
LIM
)
The third protection scheme deals with the junction
temperature of the output device. Any time the maximum
temperature limit on the output device is exceeded (T
LIM
), the
device will shutdown until the junction temperature falls below
this maximum temperature minus the hysteresis temperature
value. The T
LIM
hysteresis value is T
LIM(HYST)
.
The maximum temperature (T
LIM
) protection scheme
controls the output device regardless of the state of the
LAMPIN input. The device is unable to be activated until the
junction temperature falls below this maximum temperature
minus the hysteresis temperature value.
LAMPOUT FAULT DETECTION FEATURES
Off State, Open Load Detection
Since there is no way to annunciate an open load fault for the
lamp output driver, no open load fault detection is performed
by the 33812.
On State, Shorted Load Detection
Even though there is no way to annunciate a shorted load
fault for the lamp output driver, shorted fault detection is
performed by the 33812 as part of the protection for the
output FET.
The LAMPOUT driver also has an over-current blanking
time of t
OC(BLANK)
to allow for incandescent lamp inrush
current
OVER/UNDER-VOLTAGE SHUTDOWN STRATEGY
How the outputs behave after an over-voltage or under-
voltage event on VPWR is listed in Table 3 below:
Table 3. Over-voltage/Under-voltage Truth Table
Output
State
Before OV
or UV
State When
Returning From
Over-voltage
State When
Returning From
Under-voltage
INJOUT X
OFF OFF
IGNOUT X
OFF OFF
ROUT OFF
OFF OFF
ROUT ON
ON OFF
LAMPOUT OFF
OFF OFF
LAMPOUT ON
ON OFF
Analog Integrated Circuit Device Data
18 Freescale Semiconductor
33812
FUNCTIONAL DEVICE OPERATION
WATCHDOG TIMER OPERATION
WATCHDOG TIMER OPERATION
The purpose of the watchdog timer is to provide a RESET
to the MCU whenever the MCU is locked up in a loop or
otherwise hung up, perhaps by executing erroneous code,
such as a HALT instruction. The watchdog timer is initialized
by a power on RESET or a RESET that occurs after a fault
such as an under-voltage event on VCC.
Whenever the watchdog timer is refreshed, it is always
reloaded with the value WD
RELOAD
which initially has a value
of WD
MAX
seconds. Whenever a RESET occurs, the
WD
RELOAD
value is set to WD
MAX
seconds and the watchdog
timer is re-loaded with this value. When the RESET pulse
returns high, and, if the WDRFSH line is low, the watchdog
timer starts counting. If the watchdog timer reaches the
WD
MAX
value before the next rising edge on the WDRFSH
line, the watchdog circuit will generate a RESET pulse to the
MCU and reload itself with the maximum time value of
WD
RELOAD
, which will have been set back to WD
MAX
seconds.
In normal operation, the MCU will issue a WDRFSH pulse,
periodically, which re-loads the watchdog timer with the
WD
RELOAD
value and starts the counting again, thus avoiding
a watchdog timer generated RESET pulse. When the
watchdog timer is refreshed by a WDRFSH pulse, before the
watchdog timer reaches the programmed value, the refresh
will prevent a RESET pulse from being issued to the MCU.
Loading the Watchdog Timer and WD
RELOAD
Aside from the RESET case, which always loads the
WD
RELOAD
value and the watchdog timer with the maximum
time value, WD
MAX
, there is an additional way that the
watchdog timer and the value WD
RELOAD
can be re-loaded.
During initialization, if the WDRFSH pulse width is greater
than WD
LOAD
, both the watchdog timer and the value
WD
RELOAD
will be loaded with a timer count value,
corresponding to the width of the pulse present on the
WDRFSH input. Once this value is set, no further setting of
the WD
LOAD
value is possible until a RESET is performed.
Once the WDRFSH input goes low, the watchdog timer will
begin incrementing again, counting up to the new value that
has been loaded into the reload register. The watchdog must
be refreshed by another pulse on the WDRFSH line, before
the watchdog timer counts up to the reload value, or else a
RESET pulse will be generated and sent to the MCU.
If the WDRFSH line is ever kept high for longer than
WD
RELOAD
seconds, the watchdog will issue an immediate
RESET to the MCU. Upon receiving a RESET input from the
33812, the MCU should always be programmed to bring the
WDRFSH line low to avoid being locked in a deadly
embrace condition where the MCU and 33812 alternate
back and forth between the RESET and Normal states.
Disabling the Watchdog Timer
If the WD_INH line is pulled high through a pull-up resistor
of 10 K or less, (i.e. not tied to ground), the watchdog timer
will be inhibited from issuing a RESET to the MCU, while the
line is held in this state. This watchdog Inhibited state
should only be used during software testing and development
to avoid being concerned about an inadvertent watchdog
RESET.
Watchdog Timing Diagrams
Watchdog Loaded with WD
MAX
Time
5
3 WDRFSH
2
0
5
4
3
2
1
0
Voltage
Time
5
4
3
2
1
0
Voltage
Time
RESET
Watchdog timer
WDRFSH
PW
A
<WD
LOAD
RESET loads the watchdog timer and WD
RELOAD
with WD
MAX

Refresh pulses, PW
A
, on WDRFSH load the Watchdog timer with the
WD
RELOAD
5
4
3
2
1
0
Voltage
Time
WDRFSH
PW
B
>WD
LOAD
During initialization, for the first WDRFSH pulse only, PW
B
, that is greater
than WD
LOAD
but less than WD
MAX
, the Watchdog timer and WD
RELOAD

value will be loaded with a time value corresponding to the width of that
pulse, PW
B
. All pulses on the WDRFSH line width less than WD
RELOAD,
will
result in the Watchdog timer being reloaded with the time value correspond-
ing to PW
B
. This programmability is only allowed once per RESET.
1
4
Holding WDRFSH high will trigger RESET every WD
MAX
time
& WD
RELOAD
= WD
MAX
Analog Integrated Circuit Device Data
Freescale Semiconductor 19
33812
FUNCTIONAL DEVICE OPERATION
ISO-9141 TRANSCEIVER OPERATION
ISO-9141 TRANSCEIVER OPERATION
Bus I/O Pin (ISO9141)
This I/O pin represents the single-wire bus transmitter and
receiver.
Transmitter Characteristics
The ISO-9141 bus transmitter is a low side MOSFET with
internal over-current thermal shutdown. An internal pull-up
resistor with a serial diode structure is integrated so no
external pull-up components are required for the application
in a slave node.
Voltage can go from -18 V to 40 V without current supplied
from any other source than the pull-up resistance. The
ISO9141 pin exhibits no reverse current from the ISO9141
bus line to VPWR, even in the event of GND shift or VPWR
disconnection.
The transmitter has one slew rate (normal slew rate)
Receiver Characteristics
The receiver thresholds are ratiometric with the VPWR
supply pin.
Analog Integrated Circuit Device Data
20 Freescale Semiconductor
33812
TYPICAL APPLICATIONS
ISO-9141 TRANSCEIVER OPERATION
TYPICAL APPLICATIONS
Low Voltage Operation
During a low voltage condition (4.5 V < VPWR < 9.0 V) the
device will operate as described in the functional description,
however, certain parameters listed in the tables may be out of
specification. Fault condition annunciation is not guaranteed
below the minimum parametric operating voltage.
Low Side Injector Driver Voltage Clamp
The Injector output of the 33812 incorporates an internal
voltage clamp to provide fast turn OFF and transient
protection. Each clamp independently limits the drain-to-
source voltage to V
CLAMP_INJ
. The total energy clamped (E
J
)
can be calculated by multiplying the peak current (I
PEAK
)
times the clamp voltage (V
CL
) times the Time () all divided by
2 (see Figure 5).
Characterization of the output clamp, using a repetitive
pulse method at 1.0 A, indicates the maximum energy to be
100 mJ at 125C junction temperature per output
.
Figure 5. Output Voltage Clamping
Reverse Battery and Transient Protection
The 33812 device requires external reverse battery
protection on the VPWR pin.
All outputs consist of a power MOSFET with an integral
substrate diode. During a reverse battery condition, current
will flow through the load via the substrate diode. Under this
condition load devices will turn on. If reverse battery
protection for the loads is required, a diode must be placed in
series with the load.
Good automotive engineering practices recommend the
use of transient voltage suppression on the VPWR line. A
TVS device and adequate capacitive decoupling are
necessary for a robust design.
Drain-to-Source Clamp
Voltage (V
CL
= 50 V)
Drain-to-Source ON
Voltage (V
DS(ON)
)
Drain Voltage
Clamp Energy
E
J
=( x I
PEAK x
V
CL
)/2
GND
Time
Drain Current
(I
PEAK
= 0.3 A)

Analog Integrated Circuit Device Data

Freescale Semiconductor 21
33812
PACKAGING
PACKAGE DIMENSIONS
PACKAGING
PACKAGE DIMENSIONS
For the most current package revision, visit www.freescale.com and perform a keyword search using the 98A listed below.

EK SUFFIX
32-PIN
98ASA10556D
REVISION D
Analog Integrated Circuit Device Data
22 Freescale Semiconductor
33812
PACKAGING
PACKAGE DIMENSIONS

EK SUFFIX
32-PIN
98ASA10556D
REVISION D
Analog Integrated Circuit Device Data
Freescale Semiconductor 23
33812
PACKAGING
PACKAGE DIMENSIONS
EK SUFFIX
32-PIN
98ASA10556D
REVISION D
Analog Integrated Circuit Device Data
24 Freescale Semiconductor
33812
REVISION HISTORY
REVISION HISTORY
REVISION DATE DESCRIPTION OF CHANGES
4.0
7/2009 Initial release
5.0
7/2010 Changed Part Number from PCZ33812AEK/R2 to MCZ33812AEK/R2
How to Reach Us:
Home Page:
www.freescale.com
Web Support:
http://www.freescale.com/support
USA/Europe or Locations Not Listed:
Freescale Semiconductor, Inc.
Technical Information Center, EL516
2100 East Elliot Road
Tempe, Arizona 85284
1-800-521-6274 or +1-480-768-2130
www.freescale.com/support
Europe, Middle East, and Africa:
Freescale Halbleiter Deutschland GmbH
Technical Information Center
Schatzbogen 7
81829 Muenchen, Germany
+44 1296 380 456 (English)
+46 8 52200080 (English)
+49 89 92103 559 (German)
+33 1 69 35 48 48 (French)
www.freescale.com/support
Japan:
Freescale Semiconductor Japan Ltd.
Headquarters
ARCO Tower 15F
1-8-1, Shimo-Meguro, Meguro-ku,
Tokyo 153-0064
Japan
0120 191014 or +81 3 5437 9125
support.japan@freescale.com
Asia/Pacific:
Freescale Semiconductor China Ltd.
Exchange Building 23F
No. 118 Jianguo Road
Chaoyang District
Beijing 100022
China
+86 10 5879 8000
support.asia@freescale.com
For Literature Requests Only:
Freescale Semiconductor Literature Distribution Center
P.O. Box 5405
Denver, Colorado 80217
1-800-441-2447 or +1-303-675-2140
Fax: +1-303-675-2150
LDCForFreescaleSemiconductor@hibbertgroup.com
Freescale and the Freescale logo are trademarks of
Freescale Semiconductor, Inc. All other product or service names
are the property of their respective owners.
Freescale Semiconductor, Inc., 2010. All rights reserved.
MC33812
Rev. 5.0
7/2010
Information in this document is provided solely to enable system and
software implementers to use Freescale Semiconductor products. There are
no express or implied copyright licenses granted hereunder to design or
fabricate any integrated circuits or integrated circuits based on the
information in this document.
Freescale Semiconductor reserves the right to make changes without further
notice to any products herein. Freescale Semiconductor makes no warranty,
representation or guarantee regarding the suitability of its products for any
particular purpose, nor does Freescale Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation consequential or
incidental damages. Typical parameters that may be provided in Freescale
Semiconductor data sheets and/or specifications can and do vary in different
applications and actual performance may vary over time. All operating
parameters, including Typicals, must be validated for each customer
application by customers technical experts. Freescale Semiconductor does
not convey any license under its patent rights nor the rights of others.
Freescale Semiconductor products are not designed, intended, or authorized
for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other
application in which the failure of the Freescale Semiconductor product could
create a situation where personal injury or death may occur. Should Buyer
purchase or use Freescale Semiconductor products for any such unintended
or unauthorized application, Buyer shall indemnify and hold Freescale
Semiconductor and its officers, employees, subsidiaries, affiliates, and
distributors harmless against all claims, costs, damages, and expenses, and
reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized
use, even if such claim alleges that Freescale Semiconductor was negligent
regarding the design or manufacture of the part.