Whites EE 320/320L Course Syllabus Page 1 of 4

South Dakota School of Mines and Technology rev. 8/12/09

EE 320/320L Electronics I
Fall 2009

Instructor: Dr. Keith W. Whites
Office: 317 Electrical Engineering/Physics (EEP) Building
E-mail: whites@sdsmt.edu
Web: http://whites.sdsmt.edu
Office hours: MWF 10-11 AM

Please use e-mail rather than the telephone if you need to contact the instructor. All e-mail will
be answered. The instructor and TAs will have at least three office hours per week in which to
answer any questions you may have on the lecture material, homework problems, homework
grading, etc.

Catalog Description: (3-1) 4 credits. Pre- or co-requisite: EE 221. Presents concepts of
electronic devices and circuits including modeling of semiconductor devices, analysis and design
of transistor biasing circuits, and analysis and design of linear amplifiers. Use of computer
simulation tools and breadboarding as part of the circuit design process is emphasized. Students
are introduced to methods for designing circuits which still meet specifications even when there
are statistical variations in the component values.

Meeting Times: The lecture portion of this course will meet Monday, Wednesday, and Friday
from 9:00-9:50 AM in room EEP 252, and a few Tuesdays elsewhere. The laboratory portion
meets on pre-announced Tuesdays from 8:00-10:50 AM in rooms EEP 336 and 342. These days
are listed below in the Class Schedule.

Course Text: A. S. Sedra and K. C. Smith, Microelectronic Circuits. New York: Oxford
University Press, fifth edition, 2004.

Grading: Three exams 45 %
Final exam 15 %
Homework 20 %
Laboratories 20 %

Homework policy: One homework set will generally be assigned each week. The homework
assignments will be distributed through the EE 320 web page accessible from the URL above.
The homework is to be turned in at the beginning of class. Please write your name and student
number on your homework and staple the pages together. Late homework will be penalized with
a 10% score reduction per calendar day.

Exam Policy: The exams will be closed book, closed notes, and no formula sheets. Using or
referring to equations stored in a calculator is not allowed, even if these equations came pre-
programmed in the calculator. If you feel an exam problem was graded incorrectly, it must be
resubmitted to the instructor within 24 hours from the time the exam was returned. Failure to
write an exam will result in a score of zero. No makeup exams will be given. Upon prior
notification of the instructor, allowances will be made under extreme circumstances.

Laboratories: Use a laboratory notebook for all of your laboratory work. Work exclusively in
ink and cross out mistakes, keeping them legible. Number the front of every page in the upper
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South Dakota School of Mines and Technology rev. 8/12/09
right corner. The first page of the lab book is to be used as the table of contents. Pre-laboratory
work is to be done in your lab book and completed prior to the scheduled laboratory period. The
TA must sign off on your pre-laboratory work before you begin your lab experiments. Work in
teams of no more than two students per bench. Each student must maintain their own lab book.
Your completed lab book must be delivered to the TAs no later than 4 PM on the Thursday
following your lab. Late lab books will be penalized with a 10% score reduction per calendar
day. Every lab must be completed to receive a passing grade in the course.

Honor System: All work written in the exams, homework, and the laboratories must be your
own. Failure to abide by this rule will result, at a minimum, in a zero score for the assignment
and/or further action following SDSMT regulations. Homework solutions and laboratories can
be discussed with your colleagues that are currently enrolled in EE 320, but all work you submit
must be your own.


Course Outcomes: Upon completion of this course, students should demonstrate the ability to:
1. Draw characteristic curves for the diode, BJ T, and MOSFET, and to identify regions of
operation.
2. Complete simple load line analyses for diode and transistor circuits.
3. Design and analyze common rectifier circuits such as half cycle, full cycle and bridge
rectifiers and compute the diode currents and peak inverse voltage (PIV) for the circuit with
a resistive load.
4. Bias a diode, BJ T, or MOSFET device to achieve a desired quiescent operating point.
5. Linearize non-linear devices (diodes and transistors) and apply small signal models were
appropriate.
6. Design and analyze common transistor amplifier configurations for BJ Ts (such as common
emitter, common base, and emitter follower) and for FETs (such as common source,
common gate, and source follower).
7. Know advantages and disadvantages of common BJ T and FET transistor amplifier
configurations.
8. Design and analyze simple digital circuits using diodes, BJ Ts, or MOSFETs.
9. Compute the frequency response of basic transistor amplifier circuits.
10. Use SPICE to analyze circuits that include semiconductor devices such as diodes, BJ Ts, and
FETs.
11. Construct basic diode circuits in the laboratory (such as rectifiers) and make AC and DC
voltage and current measurements.
12. Construct basic BJ T transistor circuits in the laboratory (such as small signal amplifiers) and
make AC and DC voltage and current measurements.
13. Construct basic FET transistor circuits in the laboratory (such as small signal amplifiers)
and make AC and DC voltage and current measurements.


Americans with Disabilities Act (ADA) Statement: Students with special needs or requiring special
accommodations should contact the campus ADA coordinator, J olie McCoy, at 394-1924 and/or the instructor at the
earliest opportunity.

Freedom in Learning Statement: Students are responsible for learning the content of any course of study in which
they are enrolled. Under board of regents and university policy, student academic performance shall be evaluated
solely on an academic basis and students should be free to take reasoned exception to the data or views offered in
any course of study. Students who believe that an academic evaluation is unrelated to academic standards but is
Whites EE 320/320L Course Syllabus Page 3 of 4
South Dakota School of Mines and Technology rev. 8/12/09
related instead to judgment of their personal opinion or conduct should contact the dean of the college which offers
the class to initiate a review of the evaluation.


EE 320/320L Class Schedule
Fall 2009

Date Section Topic
9/2 3.1 Pre-assessment. Introduction to course. Ideal diode.
9/4 3.2, 3.7 Physical operation of diodes.
9/7 No class.
9/8 3.3 DC analysis of diode circuits. (No laboratory)
9/9 3.3 Small-signal diode model and its application.
9/11 Notes Introduction to B2 Spice from Beige Bag Software.
9/14 3.4 Zener diodes.
9/15 3.5 Diode rectifier circuits (half, full cycle, and bridge). (No laboratory)
9/16 3.5 Peak rectifiers.
9/18 3.6 Limiting and clamping circuits. Voltage doubler. Special diode types.
9/21 5.1, 5.2 BJ T construction. NPN physical operation.
9/22 Laboratory #1.
9/23 5.1, 5.2 PNP BJ T physical operation. BJ T examples.
9/25 5.4 DC analysis of BJ T circuits.
9/28 Review.
9/29 No laboratory.
9/30 Exam #1.
10/2 5.6 BJ T as a signal amplifier.
10/5 5.6 BJ T small-signal equivalent circuit models.
10/6 Laboratory #2.
10/7 5.6 BJ T small-signal amplifier examples.
10/9 5.3 Graphical analysis of a BJ T small-signal amplifier.
10/12 No class.
10/13 No laboratory.
10/14 5.5 BJ T biasing. Current mirror.
10/16 5.7 Common emitter amplifier.
10/19 5.7 Common emitter amplifier with emitter degeneration.
10/20 Laboratory #3.
10/21 5.7 Common base amplifier. Emitter follower amplifier.
10/23 5.8 BJ T internal capacitances. High frequency circuit model.
10/26 Review.
10/27 No laboratory.
10/28 Exam #2.
10/30 5.9 Common emitter amplifier frequency response. Millers theorem.
11/2 5.10 BJ T as an electronic switch.
11/3 Laboratory #4.
11/4 4.1 Enhancement type MOSFET operation, p-channel, and CMOS.
11/6 4.2 MOSFET circuit symbols, current-voltage characteristics.
11/9 4.3, 4.4 MOSFET circuits at DC.
11/10 No laboratory.
11/11 No class.
11/13 4.4, 4.6 MOSFET as an amplifier. Small-signal equivalent circuit models.
11/16 4.6 MOSFET small-signal amplifier examples.
11/17 Laboratory #5.
11/18 4.5 Biasing MOSFET amplifiers. MOSFET current mirror.
11/20 4.7 Common source amplifier.
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South Dakota School of Mines and Technology rev. 8/12/09
11/23 Review.
11/24 No laboratory.
11/25 Exam #3.
11/27 No class.
11/30 4.7 Common source amplifier with source degeneration.
12/1 No laboratory.
12/2 6.5 CMOS common source amplifier.
12/4 4.7 MOSFET common gate and CMOS common gate amplifier.
12/7 6.7 MOSFET common drain (source follower) amplifier.
12/8 Laboratory #6.
12/9 4.10 CMOS digital logic inverter.
12/11 Review. Course assessment.
12/14 Final Exam, 10:00-11:50 AM, Room EP 252.