Lab Manual
Lab Manual
Lab Manual
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
INTRODUCTION
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
Figure 1.1
ACCUMULATOR
The accumulator is the primary source and destination for one operand
and two operand instructions. For example, all data transfers between the
CPU and I/O devices are performed through the accumulator. In addition,
many memory reference instructions move data between the accumulator
and memory than between any other register and memory. All Arithmetic
and Boolean instructions take one of the operands from the accumulator
and return the result to the accumulator. So the accumulator should be
loaded before any arithmetic or boolean operation.
REGISTERS
Apart from the accumulator we have got other registers such as B, C, D,
E, H and L. These are called secondary registers. Data stored in any of
these six registers may be accessed with equal ease. Such data can be
moved to any other registers or can be used as the second operand in two
operand instructions. These six registers can be used to hold 8-bit data
when used individually or 16-bit data when used in pair as BC or DE or
HL.
Registers H and L comprise the primary data pointer for 8085A.
Normally, these two registers will be used to hold the 16-bit memory
address of data being accessed. It is usually called Memory Pointer. We
can transfer data between any specified register and memory location
addressed by H and L. It is good to address data memory via registers H
and L, whenever possible because it can make your program more
efficient and easy to relocate.
FLAGS
The ALU consists of five flip-flops that are set or reset according to data
conditions in the Accumulator and other registers. The Microprocessor
uses them to test for data conditions. The five flip-flops, referred to as
flags, are the Carry flag (C), the Zero flag (Z), the Sign flag (S), the Parity
flag (P) and the Auxiliary Carry flag (AC).
PROGRAM COUNTER (PC)
Class
: BE (SW) EEE
Name
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Semester : 05
Roll No.: C5592
This register deals with sequencing the execution of instructions. The
function of the PC is to point to the memory location from which the next
byte is to be fetched for execution.
STACK POINTER (SP)
The Stack Pointer Register is also 16-bit and is used as a memory pointer.
It points to a memory location in RAM memory, called the STACK. The
beginning of the stack is defined by the user.
1.2
ii.
Arithmetic operations,
iii.
Logical operations
iv.
v.
Machine-control operations.
Since data and instructions may reside anywhere in internal registers,
external registers or memory, locating them requires a particular
addressing. The instructions in these five functional groups can be
categorized according to their method of addressing the hardware
registers and memory. This method is called the ADDRESSING MODE
and six modes are available with 8085A which are explained in detail
here,
i.
Implied addressing
Microprocessors & Microcontrollers Laboratory Manual
Class
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ii.
Register addressing
iii.
Immediate addressing
iv.
Direct addressing
v.
Register indirect addressing
vi.
Combined addressing.
i. IMPLIED ADDRESSING
The instructions using this mode have no explicit operands.
include
Examples
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Semester : 05
Roll No.: C5592
Instructions using this mode specify the effective address as a part of
instruction. These instructions contain 3 bytes, with the first byte as
OP code followed by 2 bytes of address of data (the low-order byte of
address in byte 2, the higher-order byte of the address in byte
Consider.
the
the
the
3).
LDA 2035.
This instruction loads accumulator with the contents of memory location
2035. This mode is also called the absolute mode.
v. REGISTER INDIRECT ADDRESSING
This mode contains a register pair which stores the address of data ( the
higher-order byte of the address in the first register of the pair, and loworder byte in the second). As an example,
LDAX B
loads the accumulator with the contents of a memory location addressed
by B and C register pair.
vi. COMBINED ADDRESSING MODES
Some instructions use a combination of addressing modes. A CALL
instruction, for example, combines direct addressing and register indirect
addressing. The direct address in a CALL instruction specifies the address of
the desired subroutines; the register indirect address is that of stack pointer.
The CALL instruction pushes the current contents of the program counter
into the memory location specified by the stack pointer. The address that
follows the CALL instruction is copied to PC and hence execution starts at
the address of the subroutine.
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
MODULE 1
EXPERIMENTS ON DATA TRANSFER
OPERATIONS & FLAG OPERATIONS
OBJECTIVES
1.
To illustrate
operations.
2.
various
addressing
modes
using
data
transfer
1.
2.
- Contents of X.
X can be memory location or any valid
Register of 8085A.
LSB
- Least Significant Bit.
MSB
- Most Significant Bit.
LSD
- Least Significant Digit (Byte).
MSD
- Most Significant Digit (Byte).
LN
- Lower Nibble.
HN
- Higher Nibble.
B
- Binary.
H
- Hex.
D
- Decimal.
(X)4>(Y
)
- Contents of X is copied to Y.
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
PROGRAM 1
ADDRESSING
IMMEDIATE,
DIRECT
&
REGISTER
(A) = 23, (B) = 50, (C) = 1A, (D) = 63, (E) = FE, (H) = 76, (L) =
AC
PROGRAM
; Load BC with immediate data
LXI B,501A of
; 501A. (B) = 50, (C) = 1A
LDA 4150
; Load A with direct data of FE.
MOV E,A
; (E) = FE
LDA 4151
; Load A with direct data of 63
MOV D,A
; (D) = 63
MVI A,23
; (A) = 23
; Load Immediate data of 76AC
LXI H,76AC to HL
;Pair. (H) = 76, (L) = AC.
HLT
OBJECT CODES
Memory
address
Opcodes
4100
01
4101
1A
4102
50
4103
3A
Mnemonics
LXI
B, 501A
LDA
4150
Class
: BE (SW) EEE
Name
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Semester
: 05
50
4105
41
4106
5F
MOV
E, A
4107
3A
LDA
4151
4108
51
4109
41
410A
57
MOV
D, A
410B
3E
MVI
A, 23
410C
23
410D
21
410E
AC
410F
76
4110
76
LXI H, 76AC
HLT
PROCEDURE
1.
Key in the opcodes from the address shown into the trainer.
2.
3.
Single step the program and check the register contents at every
point.
4.
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Class
: BE (SW) EEE
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Data
: (4150) = 29
Result
: (4160) = 29
PROGRA
M
LXI
H,4150
LXI
D,4160
MOV
STAX
HLT
A,M
D
OBJECT CODES
Memory
address
4100
Opcodes
21
4101
50
4102
41
4103
11
4104
60
4105
41
4106
4107
Mnemonics
LXI
H,4150
LXI
D,4160
7E
MOV
A, M
12
STAX D
10
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Semester
: 05
4108
HLT
PROCEDURE
1. Key in the opcodes from the address specified.
2. Enter data at 4150.
3. Execute the program and check for result at 4160.
DISCUSSION
11
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: 05
(4150) = 99
(4151) = 77 (DE)
= 005B
Result : (4160) = 5B
(4161) = 00
PROGRAM
D,
005B
LXI
LHL
D
4150
XCH
G
SHL
D
4160
HLT
OBJECT CODES
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Name
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: 05
Memory address
Opcodes
Mnemonics
4100
11
4101
5B
4102
00
4103
2A
4104
50
4105
41
4106
EB
XCHG
4107
22
SHLD
4108
60
4109
41
410A
76
LXI
D, 005B
LHLD
4150
4160
HLT
PROCEDURE
1.
2.
3.
13
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Semester
: 05
76
AC
C
1
wher
e,
S
Sign
- Flag:
Zero
- Flag:
AC
Auxiliary carry
- flag:
Parity
- Flag:
Carry
- Flag:
14
Class
: BE (SW) EEE
Name
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Semester
: 05
In the example given below, you will be testing the status of S, Z, C and P
flags which lead to conditional jumps, calls and returns. This program is a
do nothing program. Each instruction sets and resets flags which can
be monitored separately using the sihgle step command.
PROGRAM:
NOP
MVI
ADI
ANI
ORI
ADI
RAL
XRA
HLT
A,05
FF
F4
14
90
A
OBJECT CODES
Memory
address
Opcodes
Mnemonics
4100
00
NOP
4101
3E
MVI
A, 05
4102
05
4103
C6
ADI
FF
4104
FF
4105
E6
ANI
F4
4106
F4
4107
F6
ORI
14
4108
14
4109
C6
ADI
90
410A
90
410B
17
RAL
410C
AF
XRA
15
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Name
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Semester
: 05
410D
HLT
PROCEDURE
1.
2.
Only by single-stepping through the program, you can view the Flag
status corresponding to individual instructions.
3.
4.
5.
6.
Now, the NOP would have been executed and the display shows the
address from where the program actually starts. Record this address in
the table.
7.
8.
9.
10.
Note down the value in hex in its equivalent binary form in the table
given below.
11.
12.
13.
Now the next instruction is executed and the flags are updated
accordingly.
14.
Repeat the same from step (vii) and record the values of Flag register
after each operation.
16
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Semester : 05
Roll No.: C5592
15.
Repeat until the address 410D is displayed when STEP key is
pressed.
Mnemoni
Step
c
No.
Flag
Register
Executed
S
1.
2.
3.
4.
5.
6.
7.
8.
9.
Progra
m
AC
- P
- C
Counter
Content
s
NOP
MVI A, 05
ADI FF
ANI F4
ORI 14
ADI 90
RAL
XRA A
HLT
DISCUSSION
17
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
What are the instructions that always set the Auxiliary Carry Flag
to 1 ?
2.
What does the instruction CMC do? Will Carry Flag be set to 1 or 0
after the execution of the instruction CMC ?
3.
Will the rotate instruction affect both Carry and Auxiliary Carry
Flag ?
4.
5.
6.
7.
Name the instructions that clear the Auxiliary Carry Flag to Zero ?
8.
Assume A to have a data of F5. Now, write the status of flags after
execution of the following instructions one by one and give reasons for
the same.
SUI FB
DAA
XRA A
18
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
MODULE 2
ARITHMETIC AND LOGICAL OPERATIONS
This module deals with Arithmetic instructions that Add, Subtract,
Increment, Decrement data in registers or memory and Logical
instructions that AND, OR, XOR, Complement, Compare and Rotate data
in registers or between memory and registers.
PROGRAM 5 - 8 BIT ADDITION
OBJECTIVE
To add two 8 - bit numbers in memory and store the result in memory.
THEORY
The first data is brought to Accumulator A and the second one in any one
of the other registers, say B. The addition is done using ADD. The result is
then stored at 4152. The ADD instruction affects flags depending on
result.
The two data to be added are at 4150 and 4151. The result is stored at
4152.
Data
(4150=
:
)23
(4151=
)35
Resu
(4152=
lt
:
)58.
PROGRA
M
LDA
MOV
LDA
ADD
19
Class
: BE (SW) EEE
Name
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Semester
STA
HLT
: 05
FLOW CHART
OBJECT CODES
Memory address
4100
Opcode
s
3A
Mnemonics
LDA
4150
20
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
4101
50
4102
41
4103
47
MOV
B, A
4104
3A
LDA
4151
4105
51
4106
41
4107
80
ADD
4108
32
STA
4152
4109
52
410A
41
410B
76
HLT
PROCEDURE
1.
2.
3.
4.
Change data at 4150 and 4151 and execute each time and check for
result.
DISCUSSION
21
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: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
(4152) = 25
FLOW CHART
PROGRA
M
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Semester
LXI
MOV
INX
SUB
INX
MOV
HLT
: 05
OBJECT CODES
Memory
address
4100
Opcodes
21
4101
50
4102
41
4103
7E
MOV
A, M
4104
23
INX
4105
96
SUB
4106
23
INX
4107
77
MOV
M, A
4108
76
HLT
Mnemonics
LXI
H, 4150
PROCEDURE
1.
2.
3.
4.
23
Class
: BE (SW) EEE
Name
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Semester : 05
PROGRAM 8- ONE'S COMPLEMENT
OBJECTIVE
To find the One's Complement of the data at memory location 4150 and
store the result at 4151.
THEORY
In the One's complement of a binary number the ones are changed to
zeros and the zeros to ones. For example, the one's complement of
01010110
=B
10101001
=B
56
is
A9
OBJECT CODES
Memory
address
4100
Opcodes
3A
Mnemonics
LDA
4150
4101
50
4102
41
4103
2F
CMA
4104
32
STA
4105
51
4106
41
4151
24
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
4107
HLT
PROCEDURE
1.
2.
3.
4.
Try changing data at 4150 and execute the program each time,
and check results.
DISCUSSION
25
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: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
26
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
27
Class
: BE (SW) EEE
Name
AngsAnanth
Semester : 05
PROGRAM 9 - LOGICAL OPERATIONS
OBJECTIVE
To learn about logical instructions available with 8085A like AND, OR,
XOR, NOT.
THEORY
Logical operations, as you will know, form the major part of the
instruction set of any microprocessor. They are very useful for a varied
number of applications. As seen, from the previous examples, the AND,
NOT (Complement) and OR are already explained. The XOR is given here
as an example. The truth tables for the four logical operations are as
follows:
AND
OR
XOR
NOT
X Y Z
X Y Z
X Y Z
X Z
0 0
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0
: 05
0 0
0
0 0
0
0
1
0 1
0
1 0
1
0 1
1
1
0
1
0
0
0
1
1
1
0
1
29
Class
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Name
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Semester
1
: 05
1
1
1
1
1
1
1
0
EXAMPLE
The two numbers to be XORed are at memory locations 4150 and 4151
and the XORed result will be stored at 4152.
Data
:
(4150) = 43
(4151) = 64
Result
:
Microprocessors & Microcontrollers Laboratory Manual
30
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Semester : 05
0100 0011B
----------
0010 0111B
(4152)
=
27.
PROGRAM
LDA
4150
;(4150) => (A)
MOV
B,A
31
Class
: BE (SW) EEE
Name
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Semester
;(A)
: 05
=> (B)
LDA
4151
;(4151) => (A)
XRA
B
OBJECT CODES
32
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
Memory address
Opcodes
Mnemonics
4100
3A
LDA
4150
4101
50
4102
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41
4103
47
MOV
B, A
4104
3A
LDA
4151
4105
51
34
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
4106
: 05
41
4107
A8
XRA
B
4108
32
STA
4152
4109
52
35
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
410A
41
410B
76
HLT
PROCEDURE
36
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: BE (SW) EEE
Name
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Semester
: 05
DISCUSSION
37
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
Rewrite the above program to store a result that is greater than 8bits.
Sample program:
Data :
(4150) = FF
(4151) = FF
Result :
(4152) = FE
(4153) = 01
2.
3.
4.
:(4150) = 99
(4151) = 99
99 + 99 =
: 198
(4152) = 98
(4153) = 01
23
56
8A
10
:(4160)= AD
(4161)= 66
5623 + 108A =
66AD
b. Data :(4150)=
(4151)=
(4152)=
(4153)=
23
CD
CD
09
Result
:(4160)= F0
(4161)= D6
CD23 + 09CD = D6F0
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Class
: BE (SW) EEE
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Semester
5.
: 05
6.
Subtract two decimal numbers at 4150 and 4151 and store result at
4152.
[HINT : Use DAA]
Sample problems:
a. Data
Result
b. Data
Result
7.
(4152
1
: (4150) = 29
)= 7
: (4151) = 12
29 - 17 =
12
: (4150) = 85
(4152
2
)= 6
: (4151) = 59
85 - 26 =
59
8.
(4150) = 64
(4151) = 32
Result : (4152) = 32
Microprocessors & Microcontrollers Laboratory Manual
39
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
9.
: 05
Find the two's complement of the 16-bit data at 4150 and 4151 and
store result at 4152 and 4153.
Sample problem:
Data :=
(4150)23
=
(4151)AC
Result :
40
Class
: BE (SW) EEE
Name
AngsAnanth
Semester
: 05
41