MALP-

SUBJECT:

MICROPROCESSOR &

ASSEMBLY LANGUAGE PROGRAMMING

MALPINDEX
MICROPROCESSOR & INTRAFACING
SR.NO.
1
2
3
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AIM
DATE
TO STUDY THE ARCHITECTURE OF 8085
TO STUDY THE TIMING DIAGRAM OF 8085
TO STUDY THE DEMULTIPLEXING OF
CONTROL SIGNALS
TO STUDY THE INSTRUCTIONS OF 8085
PERFORM A PROGRAM TO ADD TWO 8
BIT NUMBERS USING 8085 SIMULATOR
PERFORM A PROGRAM TO SUBTRACT
TWO 8 BIT NUMBERS USING 8085
SIMULATOR
PERFORM A PROGRAM TO ADD TWO 16
BIT NUMBERS USING 8085 SIMULATOR
PERFORM A PROGRAM TO MULTIPLY
TWO 8 BIT NUMBERS USING SUCCESSIVE
ADDITION
METHOD
USING
8085
SIMULATOR
PERFORM A PROGRAM TO MULTIPLY
TWO BIT NUMBERS USING SHIFT AND ADD
METHOD USING 8085 SIMULATOR
PERFORM A PROGRAM TO DIVIDE 16 BIT
NUMBER BY AN 8 BIT NUMBER USING 8085
SIMULATOR
PERFORM A PROGRAM TO ADD TWO 16
BIT
BCD
NUMBERS
USING
8085
SIMULATOR
PERFORM A PROGRAM TO TRANSFER A
BLOCK OF N BYTES FROM SOURCE TO
DESTINATION USING 8085 SIMULATOR
PERFORM A PROGRAM TO PROGRAM TO
FIND MAXIMUM NUMBER IN THE ARRAY
USING 8085 SIMULATOR
PERFORM A PROGRAM TO PROGRAM TO
FIND MINIMUM / SMALLEST NUMBER IN
ARRAY USING 8085 SIMULATOR
PROGRAM TO SORT THE NUMBERS IN
ASCEDING ORDER
PROGRAM TO SORT THE NUMBERS IN
DESCEDING ORDER.
INTRODUCTION TO 8085
MICROPROCESSOR TRAINER KIT VMC8501
2

SIGNATURE

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MALPPRACTICAL-1
AIM : To study about 8085 microprocessor Architecture.

Control Unit
Generates signals within up to carry out the instruction, which has been decoded. In reality
causes certain connections between blocks of the up to be opened or closed, so that data goes
where it is required, and so that ALU operations occur.
Arithmetic Logic Unit
The ALU performs the actual numerical and logic operation such as add, subtract,
AND, OR, etc. ALU uses data from memory and from Accumulator to perform arithmetic
operations. Always stores result of operation in Accumulator.
Registers
The 8085/8080A-programming model includes six registers, one accumulator, and one flag
register, as shown in Figure. In addition, it has two 16-bit registers: the stack pointer and the
program counter. They are described briefly as follows.
The 8085/8080A has six general-purpose registers to store 8-bit data; these are identified as
B,C,D,E,H, and L as shown in the figure. They can be combined as register pairs - BC, DE, and
HL - to perform some 16-bit operations. The programmer can use these registers to store or
copy data into the registers by using data copy instructions.
Accumulator
The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU). This
register is used to store 8-bit data and to perform arithmetic and logical operations. The result of
an operation is stored in the accumulator. The accumulator is also identified as register A.
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Flags
The ALU includes five flip-flops, which are set or reset after an operation according to data
conditions of the result in the accumulator and other registers. They are called Zero (Z), Carry
(CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags; they are listed in the Table and their
bit positions in the flag register are shown in the Figure below. The most commonly used flags
are Zero, Carry, and Sign. The microprocessor uses these flags to test data conditions.
For example, after an addition of two numbers, if the sum in the accumulator id larger than
eight bits, the flip-flop uses to indicate a carry -- called the Carry flag (CY) -- is set to one.
When an arithmetic operation results in zero, the flip-flop called the Zero (Z) flag is set to one.
The first Figure shows an 8-bit register, called the flag register, adjacent to the accumulator.
However, it is not used as a register; five bit positions out of eight are used to store the outputs
of the five flip-flops. The flags are stored in the 8-bit register so that the programmer can
examine these flags (data conditions) by accessing the register through an instruction. These
flags have critical importance in the decision-making process of the micro- processor. The
conditions (set or reset) of the flags are tested through the software instructions. For example,
the instruction JC (Jump on Carry) is implemented to change the sequence of a program when
CY flag is set. The thorough understanding of flag is essential in writing assembly language
programs.
Program Counter (PC)
This 16-bit register deals with sequencing the execution of instructions. This register is a
memory pointer. Memory locations have 16-bit addresses, and that is why this is a 16-bit
register. The microprocessor uses this register to sequence the execution of the instructions. The
function of the program counter is to point to the memory address from which the next byte is to
be fetched. When a byte (machine code) is being fetched, the program counter is incremented by
one to point to the next memory location.
Stack Pointer (SP)
The stack pointer is also a 16-bit register used as a memory pointer. It points to a memory
location in R/W memory, called the stack. The beginning of the stack is defined by loading 16bit address in the stack pointer. The stack concept is explained in the chapter "Stack and
Subroutines."
Interrupts
The 8085 microprocessor has 5 interrupts. They are presented below in the order of their
priority (from lowest to highest):
INTR is maskable 8080A compatible interrupt. When the interrupt occurs the processor fetches
from the bus one instruction, usually one of these instructions:

One of the 8 RST instructions (RST0 - RST7). The processor saves current program
counter into stack and branches to memory location N * 8 (where N is a 3-bit number
from 0 to 7 supplied with the RST instruction).
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CALL instruction (3 byte instruction). The processor calls the subroutine, address of
which is specified in the second and third bytes of the instruction.

RST5.5 is a maskable interrupt. When this interrupt is received the processor saves the contents
of the PC register into stack and branches to 2Ch (hexadecimal) address.
RST6.5 is a maskable interrupt. When this interrupt is received the processor saves the contents
of the PC register into stack and branches to 34h (hexadecimal) address.
RST7.5 is a maskable interrupt. When this interrupt is received the processor saves the contents
of the PC register into stack and branches to 3Ch (hexadecimal) address.
Trap is a non-maskable interrupt. When this interrupt is received the processor saves the
contents of the PC register into stack and branches to 24h (hexadecimal) address.
All maskable interrupts can be enabled or disabled using EI and DI instructions. RST 5.5,
RST6.5 and RST7.5 interrupts can be enabled or disabled individually using SIM instruction.
Pin Diagram of 8085 Microprocessor with Description
1.Power Supply
2.Clock Signals
3.Interrupt Signals
4.Address and Data bus
5.Control and Status signals
6.Serial I/O Port
7.DMA Request Signals

MALP-

Power Supply Signal and clock signal:

VCC:-Vcc is to be connected to +5V power supply.
Vss:-Ground reference
X1 and X2:- This pin is used for providing the clock frequency to the microprocessor.
Generally Crystal oscillator or LC oscillator is used to generate the frequency. The frequency
generated
Here is internally divided into two. As we know that the basic operating timing frequency of
the microprocessor is 3 MHz so 6 MHz frequency is applied.
Serial Input Output port:SID and SOD:-These pins are used for serial data communication.
Interrupt Signal:Pin 6 to 11:- These pins are used for interrupt signals. Generally and external devices are
connected here which requests the microprocessor to perform a particular task.
There are 5 pins for hardware interruptsTRAP, RST7.5, RST 6.5, RST5.5 and INTR
INTA is used for acknowledgement. Microprocessor sends the acknowledgement to external
devices through the INTA pin.
Address Bus and DATA Buses:AD0-AD7:-These are multiplexed address and data bus. So it can be used to carry the lower
order 8 bit address as well as the data. Generally these lines are demultiplexed using the Latch.
During the opcode fetch operation, in the first clock cycle the lines deliever the lower order
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MALPaddress bus A0-A7.

In the subsequent IO/M read or write it is used as data bus D0-D7. CPU can read or write data
through these lines.
A8-A15:- These are address bus used to address the memory location.
Control and Status Signal:S0 and S1:-It is used for the status signal in microprocessor.
ALE (Arithmetic Latch Enable):-This signal is used to capture the lower address presented
on multiplexed address and data bus.
RD:-This is active low input generally
used for reading operation.
WR:-This is active low input used for writing operation.
IO/M:-This pin is used to select the memory or input-output through which we want to
communicate the data.
READY:-As we know that memory and input -output have slower response than
microprocessor. So a microprocessor may now be able to handle further data till it completes
the present job. So it is in waiting state. As it completes the present job it sets the READY pin.
Microprocessor enters into wait state while READY pin is disabled.
RESET IN:-This is active low input. This pin is used to reset the microprocessor. An active
low signal applied to this pin reset the program counter inside the microprocessor. The busses
are tri-stated.
RESETOUT:-If we want to reset the external devices connected to the microprocessor then a
signal applied to this pin resets the external devices.

DMA Request Signal:

HOLD and HLDA:-HOLD is an active high input signal used by the other controller to
request microprocessor about use of address, data and control signal. The HOLD and HLDA
signal are used for direct memory access (DMA). DMA controller receives a request from a
device and in turn issues the HOLD signal to the microprocessor.
The processor releases the system bus and then acknowledges the HOLD signal with HLDA
signal. The DMA transfer thus begins.
CONCLUSION :

MALPPRACTICAL-2
AIM: To study the Timing Diagram of 8085 Microprocessor.
Timing Diagram is a graphical representation. It represents the execution time taken by each
instruction in a graphical format. The execution time is represented in T-states.
Instruction Cycle:
The time required to execute an instruction is called instruction cycle.
Machine Cycle:
The time required to access the memory or input/output devices is called machine cycle.
T-State:
The machine cycle and instruction cycle takes multiple clock periods.A portion of an operation
carried out in one system clock period is called as T-state.

Machine cycle is decided by using status signal.

The 8085 microprocessor has 5 basic machine cycles. They are

1

Opcode fetch cycle (4T)

Memory read cycle (3 T)

Memory write cycle (3 T)

I/O read cycle (3 T)

I/O write cycle (3 T)

MALP-

Each instruction of the 8085 processor consists of one to five machine cycles, i.e., when the
8085 processor executes an instruction, it will execute some of the machine cycles in a specific
order.
The processor takes a definite time to execute the machine cycles. The time taken by the
processor to execute a machine cycle is expressed in T-states.
One T-state is equal to the time period of the internal clock signal of the processor.The T-state
starts at the falling edge of a clock.
Opcode fetch machine cycle of 8085 :
Each instruction of the processor has one byte opcode. The opcodes are stored in memory. So,
the processor executes the opcode fetch machine cycle to fetch the opcode from memory. Hence,
every instruction starts with opcode fetch machine cycle. The time taken by the processor to execute
the opcode fetch cycle is 4T. In this time, the first, 3 T-states are used for fetching the opcode from
memory and the remaining T-states are used for internal operations by the processor.

Fig - Timing Diagram for Opcode Fetch Machine Cycle

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Examples with Instruction: Every Instruction has timing diagram that depends on its T-state.

1) MVI B, Data

11

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2) STA , address

CONCLUSION :

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PRACTICAL-3
AIM: To study the de-multiplexing of control signals in 8085.
Demultiplexing means separation of address/data bus AD0-AD7 into address bus AD7
AD0 and data bus D7D0. Microprocessor 8085 is having AD 0AD7. Bus which is used for
sending lower 8 bit address as well as data. During last clock cycle, address is transferred on these
lines and data during 2nd clock cycle and 3rd clock cycle. Therefore during the 1st clock cycle lower
address must be transferred on AD 0AD7. For this purpose, in the 1 st clockcycle ALE is high and
latch is enabled. So the address available at A0 A7. During the 2nd and 3rd clock cycle ALE goes
low and latch is disabled. So ADoAD7 will act as D0D7 in the 2nd and 3rd clock cycle.

Execution of Program by Microprocessor

Initially the program is prepared using the instructions in Assembly Language. This program is
called as Assembly Language Program(ALP). The instructions are then translated from assembly
language to Hexadecimal number, using hexadecimal number keyboard. These instruction codes are
stored in memory locations.
The starting memory address is transfer into the program counter. Now microprocessor executes the
program as given below:
Fetch Operation:

Microprocessor will transfer 16 bit addresses from PC to address lines, So the desired
memory location is selected.

Microprocessor then gives location RD=0. So, the 8 bit instruction bit code is transferred
from selected memory location to data pins.
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MALP

This instruction code is transferred by Microprocessor from data bus to instruction register.

This method of transferring instruction opcode from memory to instruction register is called as
Opcode fetch instruction.
Execution Operation:

The instruction code is transferred from Instruction register to Instruction decoder. Hence
one corresponding clock at the instruction decoder output executes. The clock will generate
all the control signal to execute one corresponding instruction.

If the instruction code is of 2/3 Bytes, then first this clock will read second and third byte of
instruction from memory and then execute the corresponding instruction. The address in the
PC is auto incremented by one. The same process of fetch and execution is repeated for next
instruction code.

CONCLUSION:

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MALP-

PRACTICAL- 4
Aim : To Study about 8085 Instruction Set.
The 8085 instructions can be classified as follows:

Data transfer operations

Arithmetic operations (ADD, SUB, INR, DCR)
Logic operations
Branching operations (JMP, CALL, RET)

DATA TRANSFER INSTRUCTIONS

Opcode

Operand

Copy from source to destination

MOV
Rd, Rs
M, Rs
Rd, M

Move immediate 8-bit

MVI
Rd, data
M, data

Load accumulator
LDA
16-bit address

Load accumulator indirect

LDAX
B/D Reg. pair

Load register pair immediate

LXI
Reg. pair, 16-bit data

Description
This instruction copies the contents of the source
register into the destination register; the contents of
the source register are not altered. If one of the operands is a
memory location, its location is specified by the contents of
the HL registers.
Example: MOV B, C or MOV B, M
The 8-bit data is stored in the destination register or
memory. If the operand is a memory location, its location is
specified by the contents of the HL registers.
Example: MVI B, 57H or MVI M, 57H
The contents of a memory location, specified by a
16-bit address in the operand, are copied to the accumulator.
The contents of the source are not altered.
Example: LDA 2034H
The contents of the designated register pair point to a memory
location. This instruction copies the contents of that memory
location into the accumulator. The contents of either the
register pair or the memory location are not altered.
Example: LDAX B
The instruction loads 16-bit data in the register pair
designated in the operand.
Example: LXI H, 2034H or LXI H, XYZ
LHLD 16-bit address

Load H and L registers direct

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The instruction copies the

contents of the memory
location pointed out by the
16-bit address into register L
and copies the contents of
the next memory location
into register H. The contents
of source memory locations
are not altered.

Example: LHLD 2040H

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MALPStore accumulator direct

STA
16-bit address

Store accumulator indirect

STAX
Reg. pair

The contents of the accumulator are copied into the memory

location specified by the operand. This is a 3-byte instruction,
the second byte specifies the low-order address and the third
byte specifies the high-order address.
Example: STA 4350H
The contents of the accumulator are copied into the memory
location specified by the contents of the operand (register
pair). The contents of the accumulator are not altered.
Example: STAX B

Store H and L registers direct SHLD 16-bit address

The contents of register L are stored into the memory location specified by the 16-bit address in the
operand and the contents of H register are stored into the next memory location by incrementing the
operand. The contents of registers HL are not altered. This is a 3-byte instruction, the second byte
specifies the low-order address and the third byte specifies the high-order address.
Example: SHLD 2470H
Exchange H and L with D and E
XCHG

The contents of register H are exchanged with the contents of

register D, and the contents of register L are exchanged with
the contents of register E.
Example: XCHG

Copy H and L registers to the stack pointer

SPHL
The instruction loads the contents of the H and L registers into
the stack pointer register, the contents of the H register
provide the high-order address and the contents of the L
register provide the low-order address. The contents of the H
and L registers are not altered.
Example: SPHL
Push register pair onto stack
PUSH Reg. pair

The contents of the register pair designated in the operand are

copied onto the stack in the following sequence. The stack
pointer register is decremented and the contents of the highorder register (B, D, H, A) are copied into that location. The
stack pointer register is decremented again and the contents of
the low-order register (C, E, L, flags) are copied to that
location.
Example: PUSH B or PUSH A

Pop off stack to register pair POP Reg. pair

The contents of the memory location pointed out by the stack
pointer register are copied to the low-order register (C, E, L,
status flags) of the operand. The stack pointer is incremented
by 1 and the contents of that memory location are copied to
the high-order register (B, D, H, A) of the operand. The stack
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MALPpointer register is again incremented by 1.

Example: POP H or POP A
Output data from accumulator to a port with 8-bit address
OUT 8-bit port address .
Example: OUT F8H
Input data to accumulator from a port with 8-bit address
IN 8-bit port address
Example: IN 8CH

ARITHMETIC INSTRUCTIONS
Opcode

Operand

Description

Add register or memory to accumulator

ADD
R
The contents of the operand (register or memory) are
M
added to the contents of the accumulator and the result is
stored in the accumulator. If the operand is a memory
location, its location is specified by the contents of the HL
registers. All flags are modified to reflect the result of the
addition.
Example: ADD B or ADD M
Add register to accumulator with carry
ADC
R
The contents of the operand (register or memory) and
M
the Carry flag are added to the contents of the accumulator
and the result is stored in the accumulator. If the operand is a
memory location, its location is specified by the contents of
the HL registers. All flags are modified to reflect the result of
the addition.
Example: ADC B or ADC M

Add immediate to accumulator

ADI
8-bit data

The 8-bit data (operand) is added to the contents of the

accumulator and the result is stored in the accumulator. All
flags are modified to reflect the result of the addition.
Example: ADI 45H

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MALPAdd immediate to accumulator with carry

ACI 8-bit data
The 8-bit data (operand) and the Carry flag are added to the
contents of the accumulator and the result is stored in the
accumulator. All flags are modified to reflect the result of the
addition.
Example: ACI 45H
Add register pair to H and L registers
DAD Reg. pair
The 16-bit contents of the specified register pair are added to
the contents of the HL register and the sum is stored in the HL
register. The contents of the source register pair are not
altered. If the result is larger than 16 bits, the CY flag is set.
No other flags are affected.
SUB
R
The contents of the operand (register or memory ) are
M
subtracted from the contents of the accumulator, and the result
is stored in the accumulator. If the operand is a memory
location, its location is specified by the contents of the HL
registers. All flags are modified to reflect the result of the
subtraction.
Example: SUB B or SUB M
Subtract source and borrow from accumulator
SBB
R
The contents of the operand (register or memory ) and
M
the Borrow flag are subtracted from the contents of the
accumulator and the result is placed in the accumulator. If
the operand is a memory location, its location is specified by
the contents of the HL registers. All flags are modified to
reflect the result of the subtraction.
Example: SBB B or SBB M

19

Subtract register or memory from accumulator

Subtract immediate from accumulator
SUI 8-bit data
The 8-bit data (operand) is subtracted from the contents of the
accumulator and the result is stored in the accumulator. All
flags are modified to reflect the result of the subtraction.
Example: SUI 45H
Subtract immediate from accumulator with borrow
SBI 8-bit data
The 8-bit data (operand) and the Borrow flag are subtracted
from the contents of the accumulator and the result is stored in
the accumulator. All flags are modified to reflect the result of
the subtracion.
Example: SBI 45H
Increment register or memory by 1
INR
R
M

The contents of the designated register or memory) are

incremented by 1 and the result is stored in the same place. If
the operand is a memory location, its location is specified by
the contents of the HL registers.
Example: INR B or INR M

Decrement register or memory by 1 The contents of the designated register or memory are
DCR R
decremented by 1 and the result is stored in the same place. If
M
the operand is a memory location, its location is specified by
the contents of the HL registers.
Example: DCR B or DCR M
Decrement register pair by 1
DCX R

Decimal adjust accumulator

DAA

The contents of the designated register pair are decremented

by 1 and the result is stored in the same place.
Example: DCX H

The contents of the accumulator are changed from a binary

value to two 4-bit binary coded decimal (BCD) digits. This is
the only instruction that uses the auxiliary flag to perform the
binary to BCD conversion, and the conversion procedure is
described below. S, Z, AC, P, CY flags are altered to reflect
the results of the operation.
If the value of the low-order 4-bits in the accumulator is
greater than 9 or if AC flag is set, the instruction adds 6 to the
low-order four bits.
If the value of the high-order 4-bits in the accumulator is
greater than 9 or if the Carry flag is set, the instruction adds 6
to the high-order four bits.
Example: DAA

BRANCHING INSTRUCTIONS
Opcode

Operand

Description

Jump unconditionally
JMP
16-bit address

The program sequence is transferred to the memory location

specified by the 16-bit address given in the operand.
Example: JMP 2034H or JMP XYZ

Jump conditionally
16-bit address
The program sequence is transferred to the memory location
specified by the 16-bit address given in the operand based on
the specified flag of the PSW as described below.
Example: JZ 2034H or JZ XYZ
Opcode
JC
JNC
JP
JM
JZ
JNZ
JPE
JPO

Description
Jump on Carry
Jump on no Carry
Jump on positive
Jump on minus
Jump on zero
Jump on no zero
Jump on parity even
Jump on parity odd

Unconditional subroutine call

CALL
16-bit address

Flag Status
CY = 1
CY = 0
S=0
S=1
Z=1
Z=0
P=1
P=0

The program sequence is transferred to the memory location

specified by the 16-bit address given in the operand. Before
the transfer, the address of the next instruction after CALL
(the contents of the program counter) is pushed onto the stack.
Example: CALL 2034H or CALL XYZ

Call conditionally
Operand: 16-bit address
The program sequence is transferred to the memory location
specified by the 16-bit address given in the operand based on
the specified flag of the PSW as described below. Before the
transfer, the address of the next instruction after the call (the
contents of the program counter) is pushed onto the stack.
Example: CZ 2034H or CZ XYZ
Opcode
CC
CNC
CP
CM
CZ
CNZ

Description
Call on Carry
Call on no Carry
Call on positive
Call on minus
Call on zero
Call on no zero

Flag Status
CY = 1
CY = 0
S=0
S=1
Z=1
Z=0

CPE
CPO

Call on parity even

Call on parity odd

P=1
P=0

Load program counter with HL contents

PCHL none The contents of registers H and L are copied into the program counter. The contents of
H are placed as the high-order byte and the contents of L as
the low-order byte.
Example: PCHL
Restart
RST 0-7 The RST instruction is equivalent to a 1-byte call instruction to one of eight memory
locations depending upon the number. The instructions are
generally used in conjunction with interrupts and inserted
using external hardware. However these can be used as
software instructions in a program to transfer program
execution to one of the eight locations. The addresses are:
Instruction
RST 0
RST 1
RST 2
RST 3
RST 4
RST 5
RST 6
RST 7

Restart Address
0000H
0008H
0010H
0018H
0020H
0028H
0030H
0038H

The 8085 has four additional interrupts and these interrupts generate RST instructions internally and
thus do not require any external hardware. These instructions and their Restart addresses are:
Interrupt
TRAP
RST 5.5
RST 6.5
RST 7.5

Restart Address
0024H
002CH
0034H
003CH

LOGICAL INSTRUCTIONS
Opcode

Operand

Description

Compare register or memory with accumulator

CMP
R
The contents of the operand (register or memory) are
M
compared with the contents of the accumulator. Both
contents are preserved . The result of the comparison is
shown by setting the flags of the PSW as follows:
if (A) < (reg/mem): carry flag is set
if (A) = (reg/mem): zero flag is set

if (A) > (reg/mem): carry and zero flags are reset

Example: CMP B or CMP M
Compare immediate with accumulator
CPI 8-bit data The second byte (8-bit data) is compared with the contents of the accumulator. The
values being compared remain unchanged. The result of the
comparison is shown by setting the flags of the PSW as
follows:
if (A) < data: carry flag is set
if (A) = data: zero flag is set
if (A) > data: carry and zero flags are reset
Example: CPI 89H
Logical AND register or memory with accumulator
ANA
R
The contents of the accumulator are logically ANDed with
M
the contents of the operand (register or memory), and the
result is placed in the accumulator. If the operand is a
memory location, its address is specified by the contents of
HL registers. S, Z, P are modified to reflect the result of the
operation. CY is reset. AC is set.
Example: ANA B or ANA M
Logical AND immediate with accumulator
ANI 8-bit data The contents of the accumulator are logically ANDed with the 8-bit data (operand)
and the result is placed in the accumulator. S, Z, P are
modified to reflect the result of the operation. CY is reset. AC
is set.
Example: ANI 86H
Exclusive OR register or memory with accumulator
XRA
R
The contents of the accumulator are Exclusive ORed with
M
the contents of the operand (register or memory), and the
result is placed in the accumulator. If the operand is a
memory location, its address is specified by the contents of
HL registers. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.
Example: XRA B or XRA M
Exclusive OR immediate with accumulator
XRI 8-bit data
The contents of the accumulator are Exclusive ORed with the
8-bit data (operand) and the result is placed in the
accumulator. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.
Example: XRI 86H
Logical OR register or memory with accumulator
ORA
R
The contents of the accumulator are logically ORed with
M
the contents of the operand (register or memory), and the
result is placed in the accumulator. If the operand is a
memory location, its address is specified by the contents of
Rotate accumulator left
RLC
none
Each binary bit of the accumulator is rotated left by one
position. Bit D7 is placed in the position of D0 as well as in
the Carry flag. CY is modified according to bit D7. S, Z, P,
AC are not affected.
Example: RLC

Rotate accumulator right

RRC
none

Each binary bit of the accumulator is rotated right by one

position. Bit D0 is placed in the position of D7 as well as in
the Carry flag. CY is modified according to bit D0. S, Z, P,
AC are not affected.
Example: RRC
HL registers. S, Z, P are modified to reflect the result of the
operation. CY and AC are reset.
Example: ORA B or ORA M

Logical OR immediate with accumulator

ORI 8-bit data The contents of the accumulator are logically ORed with the 8-bit data (operand) and
the result is placed in the accumulator. S, Z, P are modified to
reflect the result of the operation. CY and AC are reset.
Example: ORI 86H
Rotate accumulator left through carry
RAL
Each binary bit of the accumulator is rotated left by one
position through the Carry flag. Bit D7 is placed in the Carry
flag, and the Carry flag is placed in the least significant
position D0. CY is modified according to bit D7. S, Z, P, AC
are not affected.
Example: RAL
Rotate accumulator right through carry
RAR none Each binary bit of the accumulator is rotated right by one position through the Carry
flag. Bit D0 is placed in the Carry
flag, and the Carry flag is placed in the most significant
position D7. CY is modified according to bit D0. S, Z, P, AC
are not affected.
Complement accumulator
CMA
The contents of the accumulator are complemented. No flags
are affected.
Example: CMA
Complement carry
CMC
Set Carry
STC

The Carry flag is complemented. No other flags are affected.

Example: CMC
The Carry flag is set to 1. No other flags are affected.
Example: STC

CONTROL INSTRUCTIONS
Opcode

Operand

No operation
NOP

Description
No operation is performed. The instruction is fetched and
decoded. However no operation is executed.
Example: NOP
Halt and enter wait state HLT

The CPU finishes executing the current instruction and halts

any further execution. An interrupt or reset is necessary to exit
from the halt state.
Example: HLT
Disable interrupts
DI

Enable interrupts
EI

Read interrupt mask

RIM

conclusion:

The interrupt enable flip-flop is reset and all the interrupts

except the TRAP are disabled. No flags are affected.
Example: DI
The interrupt enable flip-flop is set and all interrupts are
enabled. No flags are affected. After a system reset or the
acknowledgement of an interrupt, the interrupt enable flipflop is reset, thus disabling the interrupts. This instruction is
necessary to reenable the interrupts (except TRAP).
Example: EI
This is a multipurpose instruction used to read the status of
interrupts 7.5, 6.5, 5.5 and read serial data input bit. The
instruction loads eight bits in the accumulator with the
following interpretations Example: RIM

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)
PROGRAM: 5
ADDITION OF TWO 8 BIT NUMBERS.
PROGRAM STATEMENT:
Write a program to add the contents of memory locations D000H and D001H. Store result in
memory location D002H.
EXPLANATION:
We have two numbers at memory locations D000H and D001H. Let these numbers be
20H and 23H. We have to add these two numbers.
Using ADD instruction we will add the two numbers.
Store the result at memory location D002H.
e.g.
D000H = 20H
D001H = 23H
Result D002H = 20H + 23H = 43H
PROGRAM:
INSTRCTIO
N
LXI H, D000H
MOV A, M
INX H

ADD M

INX H
MOV M, A
HLT

COMMENT

OPERATION

Set HL as memory pointer at memory location D000H.

H = D0H
L = 00H
Load first operand in accumulator
A = 20H
Increment HL to point next memory location i.e. H = D0H,
D001H
L = 01H
D001 : 23H
Add the second operand with first operand.
A=A+ M
A = 20 + 23
A = 43 H
Increment HL to point to next memory location
H = D0H,
L = 02H
Store the result
D002 : 43H
Result
Terminate program execution
Stop.

27

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

FLOWCHART:
Star
t
Set HL as
memory pointer
at memory
location

Load the
number in
accumulator

Increment
pointer to point
to the second
number

Add the two

numbers

Increment
pointer and
store the result

HL = D000H

A = 20H

HL = D001

A = 43H

D002: 43

Result

Stop
28

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

PROGRAM: 6
SUBTRACTION OF TWO 8 BIT NUMBERS.
PROGRAM STATEMENT:
Write a program to subtract the contents of memory locations D001H from memory location
D000H and place the result in memory location D002H.
EXPLANATION:
We have two numbers at memory locations D000H and D001H. Let these numbers be
50H and 20H. We have to subtract these two numbers.
Using SUB instruction we will subtract the two numbers.
Store the result at memory location D002H.
e.g.
D000H = 50H
D001H = 20H
Result D002H = 50H - 20H = 30H
PROGRAM:
INSTRCTIO
N
LXI H, D000H
MOV A, M
INX H

SUB M

INX H
MOV M, A
HLT

COMMENT

OPERATION

Set HL as memory pointer at memory location D000H.

H = D0H
L = 00H
Load first operand in accumulator
A = 50H
Increment HL to point next memory location i.e. H = D0H,
D001H
L = 01H
D001 : 20H
Subtract the second operand with first operand.
A=A M
A = 50 20
A = 30 H
Increment HL to point to next memory location.
H = D0H,
i.e. D002H
L = 02H
Store the result
D002 : 30H
Result
Terminate program execution
Stop.

29

GP GANDHINAGAR

EC DEPARTMENT

(SEM-4)

FLOWCHART:

Star
t
Set HL as
memory pointer
at memory
location

Load the
number in
accumulator

HL = D000H

A = 50H

Increment
pointer to point
to the second
number

HL = D001

Subtract the two

numbers

A = 30H

Increment
pointer and
store the result

D002: 30

30

MALP-3341101

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

Stop

PROGRAM: 7
ADDITION OF TWO 16 BIT NUMBERS.
PROGRAM STATEMENT:
Write a program to add the 16 bit number in memory locations D000H and D001H with the 16
bit number in memory locations D002H and D003H. The most significant 8 bits of the two
numbers to be added are in memory locations D001H and D003H. Store the result in memory
locations D004H and D005H with the most significant byte in memory location D005H.
EXPLANATION:
We have two16 bit numbers. Let the two numbers be 1234H and 4321H.
We have to add the word at memory locations D000H and D001H with the word at
memory locations D002H and D003H.
For computing the addition there are two methods.
We will store the two numbers in the register pairs DE and HL. Then using the DAD
instruction we will add the two 16 bit numbers. The result of addition will be stored in the
HL register pair. Store the result.
e.g. D000H = 34H
D001H = 12H
D002H = 21H
D003H = 43H
RESULT = 1234H + 4321H = 5555H
D004H = 55H
D005H = 55H
PROGRAM:
INSTRCTIO
N
LHLD D000H
XCHG
LHLD D002H
DAD D

COMMENT

OPERATION

Load the first 16 bit number

Save the first 16 bit number in DE register pair.
Load the second 16 bit number
Add the two 16 bit numbers.

SHLD D004H

Store the two 16 bit result

H = 12H, L = 34H
D = 12H, E = 34H
H = 43H, L = 21H
HL = HL + DE
HL = 4321 + 1234
HL = 5555H
H = 55H, L = 55H
D004H : 55H
D005H : 55H

31

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

HLT

Result
Stop

Terminate program execution

FLOWCHART:

Star
t
Load the first 16
bit number and
store it in a
separate
register

H = 12H
L = 34H
D = 12H
E = 34H

Load the second

16 bit number

H = 43H
L -34H

Add the two

number

HL = 1234 +
4321
HL = 5555H

Store the result

D004H: 55H
D005H: 55H

Result

Stop
32

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

PROGRAM: 8
MULTIPLY TWO 8 BIT NUMBERS USING SUCCESSIVE ADDITION METHOD.
PROGRAM STATEMENT:
Multiply two 8 bit numbers stored in memory locations D000H and D001H. Store the result in
memory locations E000H and E001H.
EXPLANATION:
Consider that a byte is present at the memory location D000H and second byte is
present at memory location D001H.
We have to multiply the bytes present at the above two memory locations.
We will multiply the numbers using successive addition method.
In successive addition method, one number is accepted and other number is taken as a
counter. The first number is added with itself, till the counter decrements to zero.
Result is stored at memory locations E000H and E001H.
For example: D000H = 12H,D001H = 10H
Result = 12H + 12H + 12H + 12H + 12H + 12H + 12H + 12H + 12H + 12H
Result = 0120H
E000H = 20H
E001H = 01H
PROGRAM:
Label

Instruction
LDA
D000H
MOV E, A
MVI
D,
00H
LDA
D001H
MOV C , A

Comment
A = first number

Operation
A = 12H

E = first number
D = 00H

E = 12H
D = 00H

A = second number

A = 10H

Initialize counter

C = 10H
33

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

BACK
:

LXI
H, Result = 0
0000H
DAD D
Result = result + first number
DCR C
JNZ BACK
SHLD
E000H

Decrement count
If counter 0 repeat
Store result

HLT

Terminate program execution.

FLOWCHART:
Start

Get the first number

Initialize second number as a

Initialize Result = 0

Result = Result + First number

Decrement counter

No

Is counter = 0?

Yes
Store result
34
Stop

H = 00H,
L = 00H
HL = HL +
DE
C=C1
E000H
:
20H,
E001H : 01H
Result
Stop

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

PROGRAM: 9
WRITE A PROGRAM TO MULTIPLY TWO BIT NUMBERS USING SHIFT AND ADD
METHOD.
DEFINITION:
Input: 2 data bytes directly available
Operation: Multiply and.
Output: Store the result in HL pair
SOLUTION PLAN:
1. Load 2 data bytes in registers.
2. The data is of 8 bits, use it as counter.
3. Shift and add method so use register pair to store result. The method is as follows :
number 1 * number 2 both of 8 bits,
If we observe the above example carefully we get following points:
(i)
If the bit is 1 we add to the result.
(ii)
After each checking and adding we have to shift result to left by 1 bit.
4. The result is of 16 bits so use HL pair as result register.
5. To shift result left by 1 bit add the same contents (i.e.) it will shift all bits left by 1 bit.
6. If the bit is 1, add to result. Then shift the result to left by 1 bit. Check the next bit and so
on up to end.
PROGRAM:
Label

Instruction
LXI
D,
multiplicand
LXI H, 0000H
MVI B, multiplier

Operation
Number 1

DE

000
HL (Result reg.)
Number 2
B
35

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

UP:

DOWN:

MVI C, 08H
DAD H
MOV A, B
RLC
MOV B, A
JNC DOWN
DAD D
DCR C
JNZ UP

FLOWCHART:

08
C (counter)
HL + HL HL (shift result left by 1
bit)
B
A
Rotate data to left by 1 bit
A
B
Is bit = 1, if no go to down
HL + DE HL
C1
C
Is C = 0,

Start

Load no1 in DE pair and no2 in B

reg.
Initialize result register = 0000
Initialize Counter = 08 number of
Shift result left by 1 bit
Rotate number2 and check MSB bit
available in carry

No Is carry = 1?

Yes
Result = result + no1
Counter = counter 1

36

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)
Is counter = 0?

No

Yes
Stop

PROGRAM: 10
DIVIDE 16 BIT NUMBER BY AN 8 BIT NUMBER.
PROGRAM STATEMENT:
Divide 16 bit number stored in memory locations D000H and D001H by the 8 bit number stored
at memory location D002H. Store the quotient in memory locations E000H and E001H and
remainder in memory locations E002H and E003H.
EXPLANATION:
Get the dividend in the HL register pair. Get the divisor in the accumulator and store it in
register C.
Initialize quotient in register pair DE as 00H.
Perform the division by subtracting the divisor from the dividend, till the dividend is
greater than the divisor. Increment the quotient every time the dividend is greater than the
divisor when the subtraction is performed.
When the dividend becomes less than the divisor then this dividend is the remainder.
Store the quotient and remainder.
EXAMPLE:
D000 = 05H
D001H = 02H
D002H = 04H
Result = 0205H/04H
= 81H (Quotient)
And 01H = Reminder
E000H = 81H
37

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)
E001H = 00H
E002H = 01H
E003H = 00H

PROGRAM:
Label

BACK:

SKIP:

Instruction
LHLD D000H

Comment
Get the dividend

LDA D002H
MOV C,A
LXI D, 0000H

Get the divisor

Store the divisor in C
Initialize Quotient = 0

MOV A,L
SUB C
MOV L,A
JNC SKIP
DCR H
INX D
MOV A,H
CPI 00
JNZ BACK
MOV A,L
CMP C
JNZ BACK
SHLD E002H

Division = Dividend Divisor

Subtract
borrow
of
subtraction
Quotient = quotient + 1

Operation
H = 02H, L =
05H
A = 04H
C = 04H
D = 00H, E =
00H
A=L
A= A C
L=A

previous H = H 1
DE = DE + 1
A=H

Check if dividend < divisor

If no repeat

A=L

Store the reminder

E002H = 01H,
E003H = 00H
(Reminder)
Result

XCHNG
38

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)
SHLD E000H

Store the quotient

HLT

Terminate program execution

FLOWCHART:
Start

Get the dividend

Get the divisor

Quotient = 0
Division = dividend divisor
Quotient = Quotient + 1

If Dividend <
No
divisor

39

E000H = 81H,
E001H = 00H
(Quotient) Result
Stop

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)
Yes
Reminder = Dividend
Store the quotient and reminder
Stop

PROGRAM: 11
ADD TWO 16 BIT BCD NUMBERS.
PROGRAM STATEMENT:
Add two 4 digits BCD numbers in HL and DE register pairs and store the result in memory
locations D000H and D001H with the MSB loaded at D001H. Ignore carry after 16 bit.
EXPLANATION:
Consider that two words are available in register pairs HL and DE. We have to add these
two words.
Using add instruction, add the contents, of the lower two bits i.e. add L and E.
The result of this addition is stored in the A register.
DAA instruction is then used to convert the result to valid BCD. Store the result at
memory location D000H.
Now, add the contents of MSB along with carry if generated in LSB addition.
The result of MSB addition is stored in the A register. Adjust this result to valid BCD
number. The final result is then stored at the memory location D001H.
e.g.: HL
=
3629 BCD
DE
=
4738 BCD
ALGORITHM:
Step 1 :
Add two lower digits.
Step 2 :
Adjust result to valid BCD number.
40

GP GANDHINAGAR

EC DEPARTMENT

(SEM-4)
Step 3
Step 4
Step 5
Step 6
Step 7
Step 8

:
:
:
:
:
:

store the result at memory location D000H.

Add the two upper digits with carry.
Adjust result to valid BCD number.
store the result at memory location D001H.
Display the result.
Stop.

PROGRAM:
INSTRUCTIO
N
MOV A,L
ADD E
DAA
STA D000H
MOV H,A
ADC D
DAA
STA D001H
HLT

COMMENT
Get the LSB of first number in A
A = A + E i.e. compute the LSB addition
Convert the HEX to valid BCD result
Store result of LSB addition at location
D000H
Get the MSB of first number in A
A = A + D i.e. compute the MSB addition
Convert the HEX to valid BCD result
Store result of LSB addition at location
D001H
Terminate the execution of program

FLOWCHART:
Start

Load the first four digit

BCD number

Load the second four digit

BCD number

Add two lower digits

Adjust result to valid BCD

number
41

MALP-3341101

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

Store the result at memory

location

Add two upper digits with

carry
Adjust result to valid BCD
number
Store the result at memory
location D001 H

PROGRAM: 12
TRANSFER A BLOCK OF N BYTES FROM SOURCE TO DESTINATION
PROGRAM STATEMENT:
Write an ALP to move a block of N bytes of data from source block to destination block. Source
memory location D000H and destination memory block starts from E000H.
EXPLATION:
Consider that a block of data of N bytes is present at source location. Now this block of N
bytes is to be moved from source location.
Let the number of bytes N = 10.
We will have to initialize this as count in the C register.
We know that source address is in the HL register and destination address is in the DE
register.
Get the byte from source memory block and store the byte in the destination memory
block.
Transfer data byte by byte from source to destination block till all the bytes are
transferred.
PROGRAM:
42

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

Label

Instruction
MVI C, 0AH
LXI H, D000H
LXI D, E000H

BACK:

MOV A, M
SATX D
INX H
INX D
DCR C
JNZ BACK
HLT

FLOWCHART:

Comment
Initialize counter
Initialize source memory pointer

Operation
C = 0AH
H = D0H,
L = 00H
Initialize destination memory pointer
D = E0H,
E = 00H
Get byte from source memory block
M
A
Store byte in the destination memory Result
block
Increment source memory pointer
HL = HL + 1
Initialize destination memory pointer
DE = DE + 1
Decrement counter
C=C1
If counter 0 repeat
Terminate program execution
Stop

Start

Initialize count in C = 10

Initialize HL as source memory

pointer
Initialize DE as destination memory
pointer
Get the byte from the source
Store the byte in the destination
memory block
Increment source memory pointer
43

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

Increment destination memory pointer

Decrement count

NoIs count = 0?

Yes
End

PROGRAM 13:
PROGRAM TO FIND MAXIMUM NUMBER IN THE ARRAY.
PROGERAM STATEMENT:
Given an array of numbers. Write a program in ALP of 8085 to find the maximum number
amongst the numbers in the array. Assume that the length of array is stored at memory location
D000H and the array beings from memory location D001H. Store the maximum number at
memory location E000H.
EXPLANATION:
For example: we have an array of 10 numbers. So we initialize the counter with 10. Also
we initialize a pointer to point these numbers.
Compare first number with initial maximum number, save number otherwise increment
pointer to compare next number. Decrement counter, compare till all the numbers are
compared. Store the maximum number in memory location E000H.
PROGRAM:
44

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

Label

BACK

SKIP:

Instruction
LDA D000H
MOV C, A
XRA A
LXI
H,
D001H
CMP M
JNC SKIP
MOV A,M

Comment
Load accumulator with count
Initialize counter
Initialize A = 0
Initialize memory pointer
Is number > maximum

INX H
DCR C
JNZ BACK
STA E000H

If number > maximum

interchange.
Increment memory pointer
Decrement counter
If count 0 repeat
Store maximum number

HLT

Terminate program execution

FLOWCHART:

Operation
A = 10H
C = 10H
A = 00H
H = D0H, L = 01H

Start

Initialize pointer

Initialize counter = 10
Initialize base pointer for array
Is Num > Max?

No

Yes
Save the number
45

then
HL = HL + 1
C=C1
E000H: Max. number
Result
Stop

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

Increment pointer
Decrement counter
Is count = 0?

No

Yes
Store the result at location E000H
Stop

PROGRAM: 14
PROGRAM TO FIND MINIMUM / SMALLEST NUMBER IN ARRAY.
PROGRAM STATEMENT:
Given an array of numbers. Write a program in ALP of 8085 to find the maximum number
amongst the numbers in the array. Assume that the length of array is stored at memory location
D000H and the array beings from memory location D001H. Store the maximum number at
memory location E000H.
EXPLANATION:
We have an array of 10 numbers for e.g. so we initialize the counter with 10. Also we
initialize a pointer to point these numbers.
Compare first number with initial number. If number < minimum number, save otherwise
increment pointer to compare next number. Decrement counter, compare till all the
numbers are compared. Store the maximum number in memory location E000H.
46

GP GANDHINAGAR

EC DEPARTMENT

(SEM-4)

PROGRAM:
Label

BACK:

SKIP:

Instruction
LDA D000H
MOV C, A
LXI H, D001H
MOV A, M
INX M
CMP M
JC SKIP
MOV A,M

Comment
Load counting accumulator
Initialize counter
Initialize memory pointer
Increment memory pointer
Is number < minimum
If number < minimum then
interchange
Increment memory pointer
Decrement counter
If count 0 repeat
Store minimum number
Terminate program execution

INX H
DCR C
JNZ BACK
STA E000H
HLT

FLOWCHART:

Start

Initialize pointer

Initialize counter = 10
Initialize base pointer for array
Is Num < min?

No

47

MALP-3341101

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)
Yes
Save the number
Increment pointer
Decrement counter
Is count = 0?

No

Yes
Store the result at location E000H
Stop

PROGRAM: 15
PROGRAM TO SORT THE NUMBERS IN ASCEDING ORDER.
PROGRAM STATEMETNT:
Write a program in assembly language of 8085 to sort the given N numbers from a block in
ascending order. Assume that the memory block beings at D000H.
EXPLANATION:
Consider that a block of N words is present. Now we have to arrange these N words in
ascending order, Let N = 4 for example. We will use HL as pointer to point the block of N
words.

48

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

Initially in the first iteration we compare first number with the second number. If first
number < second number, dont interchange the contents, otherwise if first number >
second number swap the contents.
In the next iteration we go on comparing the first number with third number. If first
number < third number, dont interchange the contents.
If first number > third number then swapping will be done.
Since the first two numbers are in ascending order the third number will go to first place,
first number in second place and second number will come in third place in the second
iteration only if first number > third number.
In the next iteration first number is compared with fourth number. So comparisons are
done till all N numbers are arranged in approximately n comparisons.

PROGRAM:
Label
Instruction
START
MVI B, 09
LXI H, D000H
BACK:

MVI C, 09H
MOV A, M
INX H
CMP M
JC SKIP
JZ SKIP
MOV D, M
MOV M, A
DCX H
MOV M, D
INX H

SKIP:

DCR C
JNZ BACK
DCR B
JNZ START
HLT

Comment
Initialize counter 1
Initialize memory pointer

Operation
B = 09H
H = D0H
L = 00H
Initialize counter 2
C = 09H
Get the number in accumulator
A M
Increment memory pointer
HL = HL +1
Compare number with next number
Compare
If less, dont interchange
If A < M dont
interchange
If equal, dont interchange
If A = M dont
interchange
Otherwise swap the contents
DM
MA
Interchange numbers
HL = HL 1
MD
Increment pointer to next memory HL = HL + 1
location
Decrement counter2
C=C1
If not zero, repeat
Decrement counter1
B=B1
If not zero, repeat
Terminate program execution
Stop

49

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

PROGRAM: 16
PROGRAM TO SORT THE NUMBERS IN DESCEDING ORDER.
PROGRAM STATEMETN:
Write a program in assembly language of 8085 to sort the given N words from a block in
descending order. Assume that the memory block beings at D000H.
EXPLANATION:
Consider that a block of N words is present.
Now we have to arrange these N number in descending order, Let N = 4 for example.
50

GP GANDHINAGAR

EC DEPARTMENT

MALP-3341101

(SEM-4)

We will use HL as pointer to point the block of N numbers.

Initially in the first iteration we compare the first number with the second number. If first
number > second number dont interchange the contents. If first number < second number
swap their contents. Now at the end of this iteration first two elements are sorted in
descending order.
In the next iteration we will compare the first number along with third. If first > third
dont interchange contents otherwise swap the contents. At the end of this iteration first
three elements are sorted in descending order. Go on comparing till all the elements are
arranged in descending order. This method requires approximately n comparisons.
PROGRAM:
Label
Instruction
Comment
Operation
START
MVI B, 09
Initialize counter 1
B = 09H
LXI H, D000H
Initialize memory pointer
H = D0H
L = 00H
BACK:
MVI C, 09H
Initialize counter 2
C = 09H
MOV A, M
Get the number in accumulator
A M
INX H
Increment memory pointer
HL = HL +1
CMP M
Compare number with next number
JC SKIP
If more, dont interchange
JZ SKIP
If equal, dont interchange
MOV D, M
Otherwise swap the contents
MOV M, A
Interchange numbers
MA
DCX H
Decrement memory point
HL = HL 1
MOV M, D
DM
INX H
Increment pointer to next memory HL = HL + 1
location
SKIP:
DCR C
Decrement counter2
C=C1
JNZ BACK
If not zero, repeat
DCR B
Decrement counter1
B=B1
JNZ START
If not zero, repeat
HLT
Terminate program execution
Stop
PRACTICAL-17
AIM : INTRODUCTION TO 8085 MICROPROCESSOR TRAINER KIT VMC-8501

51

GP GANDHINAGAR

EC DEPARTMENT

(SEM-4)

Steps to Enter Program :

52

MALP-3341101

GP GANDHINAGAR

EC DEPARTMENT

(SEM-4)
1.
2.
3.
4.
5.
6.

Reset
Exmem
Starting Address
Opcode
Next
Continue upto end of the program

Steps to Execute Program :

1.
2.
3.
4.

Reset
Go
Starting Address
Fill

Steps to see result :

1. Reset
2. Exmem
3. Address Store

53

MALP-3341101