60N03

Shenzhen Tuofeng Semiconductor Technology Co.
, Ltd
60N03
Power MOSFET
60 Amps,30Volts
N-Channel DPAK
Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.
60 AMPERES
30 VOLTS
RDS(on) = 6.0 m (Typ.)
Typical Applications
Power Supplies
Converters
Power Motor Controls
Bridge Circuits
N-Channel
D
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)

Symbol
Value
Unit
Drain-to-Source Voltage
Rating
VDSS
30
Vdc
Gate-to-Source Voltage - Continuous
VGS
20
Vdc
ID
60*
120
Adc
Drain Current - Continuous @ TA = 25C

Drain Current - Single Pulse (tp = 10 s)
Total Power Dissipation @ TA = 25C
Operating and Storage
Temperature Range
Single Pulse Drain-to-Source Avalanche
Energy - Starting TJ = 25C
(VDD = 28 Vdc, VGS = 10 Vdc,
IL = 17 Apk, L = 5.0 mH, RG = 25 )
Thermal Resistance
- Junction-to-Case
- Junction-to-Ambient (Note 1)
- Junction-to-Ambient (Note 2)
Maximum Lead Temperature for Soldering
Purposes, 1/8 from case for 10 seconds
IDM
PD
75
Watts
TJ, Tstg
- 55 to
150
EAS
733
mJ
RJC
RJA
RJA
1.65
67
120
TL
260
G
4
4
1 2
3
12
C/W
MARKING DIAGRAMS
& PIN ASSIGNMENTS
C
4
Drain
1. When surface mounted to an FR4 board using 1 pad size,

(Cu Area 1.127 in2).
2. When surface mounted to an FR4 board using the minimum recommended
pad size, (Cu Area 0.412 in2).
*Chip current capability limited by package.
60N03R
TFXXX
60N03R
TFXXX
1
Gate
2
Drain
60N03R
TF
XXX
4
Drain
3
Source
1
Gate
= Device code
= TuoFeng
= Year
2
Drain
3
Source
60N03
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted)
Characteristic
Symbol
Min
V(BR)DSS
30
Zero Gate Voltage Drain Current

(VGS = 0 Vdc, VDS = 24 Vdc)
IDSS
Gate-Body Leakage Current (VGS = 20 Vdc, VDS = 0 Vdc)
IGSS
VGS(th)
Typ
Max
Unit
Vdc
50
nAdc
100
nAdc
1.3
-
1.9
-3.8
2.2
-
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage (Note 3)
(VGS = 0 Vdc, ID = 250 Adc)
Temperature Coefficient (Positive)
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage (Note 3)
(VDS = VGS, ID = 250 Adc)
Threshold Temperature Coefficient (Negative)
Static Drain-to-Source On-Resistance (Note 3)
(VGS = 10 Vdc, ID = 40 Adc)
(VGS = 4.5 Vdc, ID = 20 Adc)
6.0
10.0
RDS(on)
Forward Transconductance (VDS = 15 Vdc, ID = 10 Adc) (Note 3)
Vdc
mV/C
m
gFS
20
Mhos
Ciss
2150
pF
Coss
680
Crss
260
td(on)
10
tr
18
td(off)
32
tf
15
QT
30
Q1
6.5
Q2
18.4
0.75
1.2
0.65
1.0
-
trr
39
ta
21
tb
18
Qrr
0.043
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = 24 Vdc,
Vd VGS = 0 Vdc,
Vd
f=1
1.0
0 MHz)
Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 4)
Turn-On Delay Time
Rise Time
Turn-Of f Delay Time
(VDD = 15 Vdc, ID = 15 Adc,

VGS = 10 Vdc,
Vdc
RG = 3.3 )
Fall Time
Gate
Ga
eC
Charge
a ge
(VDS = 24 Vdc,
Vd ID = 15 Adc,
Ad
VGS = 4.5
4 5 Vdc) (Note 3)
ns
nC
SOURCE-DRAIN DIODE CHARACTERISTICS

Forward On-Voltage
(IS = 2.3 Adc, VGS = 0 Vdc) (Note 3)
(IS = 30 Adc, VGS = 0 Vdc)
(IS = 2.3 Adc, VGS = 0 Vdc, TJ = 150C)
VSD
Reverse
e e se Recovery
eco e y Time
e
(IS = 2.3
2 3 Adc,
Ad VGS = 0 Vdc,
Vd
dIS/dt = 100 A/s) (Note 3)
Reverse Recovery Stored Charge
3. Pulse Test: Pulse Width 300 s, Duty Cycle 2%.
4. Switching characteristics are independent of operating junction temperatures.
Vdc
nss
C
60N03
3.8 V
40
10 V
8V
6V
30
5V
4.5 V
4V
60
TJ = 25C
VDS 10 V
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
50
3.6 V
3.4 V
20
3.2 V
10
3V
VGS = 2.8 V
TJ = 25C
30
20
TJ = 125C
10
TJ = -55C
0.5
1.5
2.5
3.5
4.5
VGS, GATE-T O-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.07
ID = 10 A
TJ = 25C
0.06
0.05
0.04
0.03
0.02
0.01
0
0
10
0.015
TJ = 25C
0.01
VGS = 4.5 V
VGS = 10 V
0.005
0
5
10
15
20
25
30
ID, DRAIN CURRENT (A)
Figure 3. On-Resistance versus

Gate-T o-Source Voltage
Figure 4. On-Resistance versus Drain Current

and Gate Voltage
1.8
1000
VGS = 0 V
ID = 30 A
VDS = 10 V
TJ = 125C
IDSS, LEAKAGE (nA)
1.6
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
RDS(on), DRAIN-TO-SOURCE RESISTANCE ()
RDS(on), DRAIN-TO-SOURCE RESISTANCE ()
40
RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED)
50
1.4
1.2
1.0
100
TJ = 100C
10
0.8
0.6
-50
1
-25
25
50
75
100
125
150
12
16
TJ, JUNCTION TEMPERATURE (C)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 5. On-Resistance Variation with

Temperature
Figure 6. Drain-To-Source Leakage

Current versus Voltage
20
60N03
C, CAPACITANCE (pF)
5000
Ciss
4500
TJ = 25C
4000
3500
3000 Crss
2500
Ciss
2000
1500
1000
Coss
500
Crss
VDS = 0 V VGS = 0 V
0
15
10
VGS
VDS
10
15
20
25
6
QT
VGS
2
ID = 15 A
TJ = 25C
0
16
24
32
Qg, TOTAL GATE CHARGE (nC)
GATE-T O-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
Figure 8. Gate-to-Source and

Drain-to-Source Voltage versus Total Charge
1000
5
IS, SOURCE CURRENT (AMPS)
VDD = 24 V
ID = 20 A
VGS = 10 V
t, TIME (ns)
Q2
Q1
100
tf
td(off)
tr
td(on)
10
VGS = 0 V
TJ = 25C
1
0
1
1
10
0.1
100
0.3
0.5
0.7
0.9
RG, GATE RESISTANCE ()
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation

versus Gate Resistance
Figure 10. Diode Forward Voltage versus

Current
60N03
ID , DRAIN CURRENT (AMPS)
100
100 s
di/dt
1 ms
VGS = 10 V
SINGLE PULSE
TC = 25C
10
ta
tb
TIME
dc
0.25 IS
tp
IS
0.1
trr
10 ms
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
IS
10
100
VDS, DRAINTOSOURCE VOLTAGE (VOLTS)
Figure 12. Diode Reverse Recovery Waveform
Figure 11. Maximum Rated Forward Biased

Safe Operating Area
Rthja(t), EFFECTIVE TRANSIENT

THERMAL RESISTANCE
1000
MOUNTED TO MINIMUM RECOMMENDED FOOTPRINT
DUTY CYCLE
100
D = 0.5
0.2
0.1
0.05
0.02
0.01
10
P(pk)
t1
0.1
t2
DUTY CYCLE, D = t1/t2
SINGLE PULSE
RJA(t) = r(t) RJA

D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) TA = P(pk) RJA(t)
0.01
1E05
1E04
1E03
1E02
1E01
t, TIME (seconds)
1E+00
Figure 13. Thermal Response - Various Duty Cycles
1E+01
1E+02
1E+03
60N03
PACKAGE DIMENSIONS
DPAK, STRAIGHT LEAD

CASE 369-07
ISSUE M
B
V
R
4
A
1
S
-TSEATING
PLANE
H
D
G
3 PL
0.13 (0.005)
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM
A
B
C
D
E
F
G
H
J
K
R
S
V
INCHES
MIN
MAX
0.235
0.250
0.250
0.265
0.086
0.094
0.027
0.035
0.033
0.040
0.037
0.047
0.090 BSC
0.034
0.040
0.018
0.023
0.350
0.380
0.175
0.215
0.050
0.090
0.030
0.050
STYLE 2:
PIN 1.
2.
3.
4.
GATE
DRAIN
SOURCE
DRAIN
MILLIMETERS
MIN
MAX
5.97
6.35
6.35
6.73
2.19
2.38
0.69
0.88
0.84
1.01
0.94
1.19
2.29 BSC
0.87
1.01
0.46
0.58
8.89
9.65
4.45
5.46
1.27
2.28
0.77
1.27
60N03R
PACKAGE DIMENSIONS
DPAK
CASE 369A-13
ISSUE AB
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
PLANE
-T-
R
4
A
S
K
F
J
L
H
D
2 PL
0.13 (0.005)
DIM
A
B
C
D
E
F
G
H
J
K
L
R
S
U
V
Z
INCHES
MIN
MAX
0.235
0.250
0.250
0.265
0.086
0.094
0.027
0.035
0.033
0.040
0.037
0.047
0.180 BSC
0.034
0.040
0.018
0.023
0.102
0.114
0.090 BSC
0.175
0.215
0.020
0.050
0.020
0.030
0.050
0.138
STYLE 2:
PIN 1.
2.
3.
4.
GATE
DRAIN
SOURCE
DRAIN
MILLIMETERS
MIN
MAX
5.97
6.35
6.35
6.73
2.19
2.38
0.69
0.88
0.84
1.01
0.94
1.19
4.58 BSC
0.87
1.01
0.46
0.58
2.60
2.89
2.29 BSC
4.45
5.46
0.51
1.27
0.51
0.77
1.27
3.51

60N03

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Shenzhen Tuofeng Semiconductor Technology Co.

MAXIMUM RATINGS (TJ = 25C unless otherwise noted)

Gate-to-Source Voltage - Continuous

Drain Current - Continuous @ TA = 25C

1. When surface mounted to an FR4 board using 1 pad size,

Zero Gate Voltage Drain Current

Gate-Body Leakage Current (VGS = 20 Vdc, VDS = 0 Vdc)

Forward Transconductance (VDS = 15 Vdc, ID = 10 Adc) (Note 3)

(VDD = 15 Vdc, ID = 15 Adc,

SOURCE-DRAIN DIODE CHARACTERISTICS

ID, DRAIN CURRENT (AMPS)

VGS, GATE-T O-SOURCE VOLTAGE (V)

Figure 1. On-Region Characteristics

Figure 2. Transfer Characteristics

VGS, GATE-T O-SOURCE VOLTAGE (V)

ID, DRAIN CURRENT (A)

Figure 3. On-Resistance versus

Figure 4. On-Resistance versus Drain Current

VDS, DRAIN-TO-SOURCE VOLTAGE (V)

RDS(on), DRAIN-TO-SOURCE RESISTANCE ()

RDS(on), DRAIN-TO-SOURCE RESISTANCE ()

RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED)

TJ, JUNCTION TEMPERATURE (C)

VDS, DRAIN-TO-SOURCE VOLTAGE (V)

Figure 5. On-Resistance Variation with

Figure 6. Drain-To-Source Leakage

VGS, GATE-T O-SOURCE VOLTAGE (V)

Qg, TOTAL GATE CHARGE (nC)

GATE-T O-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (V)

Figure 7. Capacitance Variation

Figure 8. Gate-to-Source and

RG, GATE RESISTANCE ()

VSD, SOURCE-TO-DRAIN VOLTAGE (V)

Figure 9. Resistive Switching Time Variation

Figure 10. Diode Forward Voltage versus

ID , DRAIN CURRENT (AMPS)

VDS, DRAINTOSOURCE VOLTAGE (VOLTS)

Figure 12. Diode Reverse Recovery Waveform

Figure 11. Maximum Rated Forward Biased

Rthja(t), EFFECTIVE TRANSIENT

MOUNTED TO MINIMUM RECOMMENDED FOOTPRINT

RJA(t) = r(t) RJA

Figure 13. Thermal Response - Various Duty Cycles

DPAK, STRAIGHT LEAD

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