CMOS, +1.8 V To +5.5 V/ Low-Voltage, 8-/16-Channel Multiplexers

a
CMOS, +1.8 V to +5.5 V/2.5 V, 2.5

Low-Voltage, 8-/16-Channel Multiplexers
ADG706/ADG707
FEATURES
+1.8 V to +5.5 V Single Supply
2.5 V Dual Supply
2.5 ON Resistance
0.5 ON Resistance Flatness
100 pA Leakage Currents
40 ns Switching Times
Single 16-to-1 Multiplexer ADG706
Differential 8-to-1 Multiplexer ADG707
28-Lead TSSOP Package
Low-Power Consumption
TTL/CMOS-Compatible Inputs
APPLICATIONS
Data Acquisition Systems
Communication Systems
Relay Replacement
Audio and Video Switching
Battery-Powered Systems
FUNCTIONAL BLOCK DIAGRAMS

ADG706
ADG707
S1
S1A
DA
S8A
D
S1B
DB
S16
S8B
1-OF-8
DECODER
1-OF-16
DECODER
A0 A1 A2 A3 EN
A0
A1
A2 EN
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG706 and ADG707 are low-voltage, CMOS analog

multiplexers comprising 16 single channels and eight differential
channels, respectively. The ADG706 switches one of 16 inputs
(S1S16) to a common output, D, as determined by the 4-bit
binary address lines A0, A1, A2, and A3. The ADG707 switches
one of eight differential inputs to a common differential output as
determined by the 3-bit binary address lines A0, A1, and A2.
An EN input on both devices is used to enable or disable the
device. When disabled, all channels are switched OFF.
1. Single-/dual-supply operation. The ADG706 and ADG707 are

fully specified and guaranteed with 3 V and 5 V single-supply
and 2.5 V dual-supply rails.
2. Low ON resistance (2.5 typical)
3. Low-power consumption (<0.01 W)
4. Guaranteed break-before-make switching action
5. Small 28-lead TSSOP package
Low-power consumption and operating supply range of 1.8 V to

5.5 V make the ADG706 and ADG707 ideal for battery-powered,
portable instruments. All channels exhibit break-before-make
switching action preventing momentary shorting when switching channels. These devices are also designed to operate from a
dual supply of 2.5 V.
These multiplexers are designed on an enhanced submicron process
that provides low-power dissipation yet gives high switching speed,
very low ON resistance, and leakage currents. ON resistance is in
the region of a few ohms and is closely matched between switches
and very flat over the full signal range. These parts can operate
equally well as either multiplexers or demultiplexers and have an
input signal range that extends to the supplies.
The ADG706 and ADG707 are available in small 28-lead TSSOP
packages.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2002-2016
ADG706/ADG707SPECIFICATIONS1 (V
Parameter
25C
ANALOG SWITCH
Analog Signal Range
ON Resistance (RON)
40C
to +85C
0 V to VDD
2.5
4.5
ON Resistance Match Between

Channels (RON)
ON Resistance Flatness (RFLAT(ON))
5
0.3
0.8
0.5
1.2
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
ADG706
ADG707
Channel ON Leakage ID, IS (ON)
ADG706
ADG707
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
0.01
0.1
0.01
0.4
0.2
0.01
0.4
0.2
= 5 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)
Unit
V
typ
max
typ
max
typ
max
Test Conditions/Comments
VS = 0 V to VDD, IDS = 10 mA;

Test Circuit 1
VS = 0 V to VDD, IDS = 10 mA
VDD = 5.5 V
VD = 4.5 V/1 V, VS = 1 V/4.5 V;
Test Circuit 2
VD = 4.5 V/1 V, VS = 1 V/4.5 V;
Test Circuit 3
1.5
1
nA typ
nA max
nA typ
nA max
nA max
nA typ
nA max
nA max
2.4
0.8
V min
V max
0.1
A typ
A max
pF typ
VIN = VINL or VINH
RL = 300 , CL = 35 pF, Test Circuit 5;

VS1 = 3 V/0 V, VS16 = 0 V/3 V
RL = 300 , CL = 35 pF;
VS = 3 V, Test Circuit 6
RL = 300 , CL = 35 pF;
RL = 300 , CL = 35 pF;
VS = 1 V, RS = 0 , CL = 1 nF;
Test Circuit 8
RL = 50 , CL = 5 pF, f = 10 MHz;
RL = 50 , CL = 5 pF, f = 1 MHz;
Test Circuit 9
RL = 50 , CL = 5 pF, f = 10 MHz;
RL = 50 , CL = 5 pF, f = 1 MHz;
Test Circuit 10
0.3
1.5
1
0.005
CIN, Digital Input Capacitance
DD
VD = VS = 1 V, or 4.5 V;
Test Circuit 4
DYNAMIC CHARACTERISTICS
tTRANSITION
40
Break-Before-Make Time Delay, tD
30
tON (EN)
32
tOFF (EN)
10
Charge Injection
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
pC typ
OFF Isolation
60
80
dB typ
dB typ
Channel-to-Channel Crosstalk
60
80
dB typ
dB typ
25
36
13
MHz typ
MHz typ
pF typ
RL = 50 , CL = 5 pF, Test Circuit 9

f = 1 MHz
180
90
pF typ
pF typ
f = 1 MHz
f = 1 MHz
200
100
pF typ
pF typ
f = 1 MHz
f = 1 MHz
0.001
A typ
A max
60
1
50
14
3 dB Bandwidth
ADG706
ADG707
CS (OFF)
CD (OFF)
ADG706
ADG707
CD, CS (ON)
ADG706
ADG707
POWER REQUIREMENTS
IDD
1.0
VDD = 5.5 V
Digital Inputs = 0 V or 5.5 V
NOTES
1
Temperature range is 40C to +85C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. B
SPECIFICATIONS
ADG706/ADG707
(VDD = 3 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)
Parameter
ANALOG SWITCH
Analog Signal Range
ON Resistance (RON)
25C
0 V to VDD
6
11

Channels (RON)
LEAKAGE CURRENTS
ADG706
ADG707
ADG706
ADG707
DIGITAL INPUTS
Input Current
IINL or IINH
40C
to +85C
0.01
0.1
0.01
0.4
0.2
0.01
0.4
0.2
12
0.4
1.2
3
5
45
V
typ
max
typ
max
typ
VS = 0 V to VDD, IDS = 10 mA;

Test Circuit 1
VDD = 3.3 V
VS = 3 V/1 V, VD = 1 V/3 V;
Test Circuit 2
VS = 3 V/1 V, VD = 1 V/3 V;
Test Circuit 3
1.5
1
nA typ
nA max
nA typ
nA max
nA max
nA typ
nA max
nA max
2.0
0.8
V min
V max
0.1
A typ
A max
pF typ
VIN = VINL or VINH

VS1 = 2 V/0 V, VS16 = 0 V/2 V
RL = 300 , CL = 35 pF;
RL = 300 , CL = 35 pF;
RL = 300 , CL = 35 pF;
VS = 1 V, RS = 0 , CL = 1 nF;
Test Circuit 8
RL = 50 , CL = 5 pF, f = 10 MHz;
RL = 50 , CL = 5 pF, f = 1 MHz;
Test Circuit 9
RL = 50 , CL = 5 pF, f = 10 MHz;
RL = 50 , CL = 5 pF, f = 1 MHz;
Test Circuit 10
0.3
1.5
1
0.005
DYNAMIC CHARACTERISTICS2
tTRANSITION
Unit
VS = VD = 1 V or 3 V;
Test Circuit 4
30
tON (EN)
40
tOFF (EN)
20
Charge Injection
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
pC typ
OFF Isolation
60
80
dB typ
dB typ
60
80
dB typ
dB typ
25
36
13
MHz typ
MHz typ
pF typ

f = 1 MHz
180
90
pF typ
pF typ
f = 1 MHz
f = 1 MHz
200
100
pF typ
pF typ
f = 1 MHz
f = 1 MHz
0.001
A typ
A max
75
1
70
28
3 dB Bandwidth
ADG706
ADG707
CS (OFF)
CD (OFF)
ADG706
ADG707
CD, CS (ON)
ADG706
ADG707
POWER REQUIREMENTS
IDD
1.0
NOTES
1
2
REV. B
VDD = 3.3 V
ADG706/ADG707
DUAL SUPPLY1 (V = +2.5 V 10%, V
DD
Parameter
ANALOG SWITCH
Analog Signal Range
ON Resistance (RON)
Channels (RON)
SS
= 2.5 V 10%, GND = 0 V, unless otherwise noted.)
25C
40C
to +85C
VSS to VDD
2.5
4.5
5
0.3
0.8
0.5
1.2
LEAKAGE CURRENTS
ADG706
ADG707
ADG706
ADG707
DIGITAL INPUTS
Input Current
IINL or IINH
DYNAMIC CHARACTERISTICS2
tTRANSITION
0.01
0.1
0.01
0.4
0.2
0.01
0.4
0.2
0.005
Unit
V
typ
max
typ
max
typ
max
VS = VSS to VDD, IDS = 10 mA;

Test Circuit 1
VS = VSS to VDD, IDS = 10 mA
VS = VSS to VDD, IDS = 10 mA
VDD = +2.75 V, VSS = 2.75 V
VS = +2.25 V/1.25 V, VD = 1.25 V/+2.25 V;
Test Circuit 2
VS = +2.25 V/1.25 V, VD = 1.25 V/+2.25 V;
Test Circuit 3
1.5
1
nA typ
nA max
nA typ
nA max
nA max
nA typ
nA max
nA max
1.7
0.7
V min
V max
0.1
A typ
A max
pF typ
VIN = VINL or VINH
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
pC typ

VS1 = 1.5 V/0 V, VS16 = 0 V/1.5 V
RL = 300 , CL = 35 pF;
VS = 1.5 V, Test Circuit 6
RL = 300 , CL = 35 pF;
RL = 300 , CL = 35 pF;
VS = 0 V, RS = 0 , CL = 1 nF;
Test Circuit 8
RL = 50 , CL = 5 pF, f = 10 MHz;
RL = 50 , CL = 5 pF, f = 1 MHz;
Test Circuit 9
RL = 50 , CL = 5 pF, f = 10 MHz;
RL = 50 , CL = 5 pF, f = 1 MHz;
Test Circuit 10
0.3
1.5
1
5
40
60
VS = VD = +2.25 V/1.25 V, Test Circuit 4
15
tON (EN)
32
tOFF (EN)
16
Charge Injection
OFF Isolation
60
80
dB typ
dB typ
60
80
dB typ
dB typ
25
36
13
MHz typ
MHz typ
pF typ

f = 1 MHz
180
90
pF typ
pF typ
f = 1 MHz
f = 1 MHz
200
100
pF typ
pF typ
f = 1 MHz
f = 1 MHz
A typ
A max
A typ
A max
VDD = +2.75 V
VSS = 2.75 V
1
50
3 dB Bandwidth
ADG706
ADG707
CS (OFF)
CD (OFF)
ADG706
ADG707
CD, CS (ON)
ADG706
ADG707
POWER REQUIREMENTS
IDD
26
0.001
1.0
ISS
0.001
1.0
NOTES
1
2
REV. B
ADG706/ADG707
ABSOLUTE MAXIMUM RATINGS 1
Storage Temperature Range . . . . . . . . . . . . 65C to +150C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150C
TSSOP Package
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 97.9C/W
JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 14C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . . 300C
IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . . . 220C
(TA = 25C unless otherwise noted.)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to 3.5 V
Analog Inputs2 . . . . . . . . . . . . . . VSS 0.3 V to VDD + 0.3 V or
30 mA, Whichever Occurs First
Digital Inputs2 . . . . . . . . . . . . . . . . . 0.3 V to VDD + 0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . 40C to +85C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum
rating may be applied at any one time.
2
Overvoltages at A, EN, S, or D will be clamped by internal diodes. Current should
be limited to the maximum ratings given.
ORDERING GUIDE
Z = RoHS Compliant Part.
PIN CONFIGURATIONS
VDD 1
28
VDD 1
28
DA
NC 2
27
VSS
DB 2
27
VSS
NC 3
26
S8
NC 3
26
S8A
S16 4
25
S7
S8B 4
25
S7A
S15 5
24
S6
S7B 5
24
S6A
S14 6
23
S5
S6B 6
23
S5A
S13 7
22
S4
TOP VIEW
S12 8 (Not to Scale) 21 S3
S5B 7
22
S11 9
20
S2
S3B 9
20
S2A
S10 10
19
S1
S2B 10
19
S1A
S9 11
18
EN
S1B 11
18
EN
GND 12
17
A0
GND 12
17
A0
NC 13
16
A1
NC 13
16
A1
A3 14
15
A2
NC 14
15
A2
ADG706
ADG707
S4A
TOP VIEW
S4B 8 (Not to Scale) 21 S3A
NC = NO CONNECT
NC = NO CONNECT
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG706/ADG707 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. B
WARNING!
ESD SENSITIVE DEVICE
ADG706/ADG707
Table I. ADG706 Truth Table
Table II. ADG707 Truth Table
A3
A2
A1
A0
EN
ON Switch
A2
A1
A0
EN
ON Switch Pair
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
NONE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
NONE
1
2
3
4
5
6
7
8
X = Dont Care
X = Dont Care
TERMINOLOGY
VDD
Most positive power supply potential
CD (OFF)
VSS
Most negative power supply in a dual-supply

application. In single-supply applications, this
should be tied to ground at the device.
OFF Switch drain capacitance. Measured

with reference to ground.
CD, CS (ON)
ON Switch capacitance. Measured with

reference to ground.
IDD
Positive supply current
CIN
Digital input capacitance
ISS
Negative supply current
tTRANSITION
GND
Ground (0 V) reference
Delay time measured between the 50% and

90% points of the digital inputs and the switch
ON condition when switching from one
address state to another
tON (EN)
Delay time between the 50% and 90% points

of the EN digital input and the Switch ON
condition
tOFF (EN)
Delay time between the 50% and 90% points

of the EN digital input and the Switch OFF
condition
Source terminal. May be an input or output.
Drain terminal. May be an input or output.
AX
Logic control input
EN
Active high device enable
VD (VS)
Analog voltage on terminals D, S
RON
Ohmic resistance between D and S
RON
ON Resistance match between any two channels,

i.e., RONmax RONmin
tOPEN
RFLAT(ON)
Flatness is defined as the difference between the

maximum and minimum value of ON resistance
as measured over the specified analog signal
range.
OFF Time measured between the 80% points

of both switches when switching from one
address state to another
Charge
Injection
Measure of the glitch impulse transferred from

the digital input to the analog output during
switching
IS (OFF)
Source leakage current with the Switch OFF
OFF Isolation
ID (OFF)
Drain leakage current with the Switch OFF
Measure of unwanted signal coupling through

an OFF switch
ID, IS (ON)
Channel leakage current with the Switch ON
Crosstalk
VINL
Maximum input voltage for Logic 0
Measure of unwanted signal that is coupled

through from one channel to another as a result
of parasitic capacitance
VINH
Minimum input voltage for Logic 1
Bandwidth
IINL(IINH)
Input current of the digital input
Frequency at which the output is attenuated

by 3 dB
CS (OFF)
OFF Switch Source Capacitance. Measured

with reference to ground.
ON Response
Frequency response of the ON Switch
Insertion
Loss
Loss due to the ON Resistance of

the switch
REV. B
Typical Performance Characteristics ADG706/ADG707

8
7
ON RESISTANCE
5
VDD = 3.3V
4
VDD = 4.5V
3
2
VDD = 5.5V
6
5
4
3
+85C
5
4
+25C
+85C
TPC 1. ON Resistance as a Function

of VD (VS) for Single Supply
0
2.75 2.00 1.00
0
1.00
2.00 2.75
VD OR VS, DRAIN OR SOURCE VOLTAGE V
0
1
2
3
4
5

of VD (VS) for Different Temperatures,
Single Supply

Dual Supply
0.3
TA = 25C
7
40C
1
2
3
4
1
5
VDD = 3V
VSS = 0V
VDD = 5V
VSS = 0V
TA = 25C
0.2
ON RESISTANCE
ON RESISTANCE
+25C
40C
VDD = +2.5V
VSS = 2.5V
5
4
3
+85C
5
4
40C
3
0
2
1
1
2
3
3
0

of VD (VS) for Dual Supply
0.1
0.1

Single Supply
0.2
0
0.2
ID (OFF)
0.2
CURRENT nA
0.1
0
ID, IS (ON)
0.1
IS (OFF)
VDD
VDD = +2.5V
VSS = 2.5V
TA = 25C
VDD
ID (OFF)
0.1
A3
S1
A2
S16
50
VS
ADG706*
A1
A0
EN**
0.1
2
3
4
VD (VD = VDD VS) V
TPC 6. Leakage Currents as a Function

of VD (VS)
0.3
VDD = 3V
VSS = 0V
TA = 25C
ID (OFF)
ID, IS (ON)
IS (OFF)
+25C
1.0
1.5
2.0
2.5
3.0
0
0.5
VD OR VS , DRAIN OR SOURCE VOLTAGE V
0.3
CURRENT nA
VDD = +2.5V
VSS = 2.5V
CURRENT nA
ON RESISTANCE
VDD = 2.7V
6
VDD = 5V
VSS = 0V
ON RESISTANCE
8
TA = 25C
VSS = GND
ID, IS (ON)
GND
IS (OFF)
VOUT
RL
50
VSS
VSS
0.2
0.2
0.3
0
2
3
4
1
VD (VD = VDD VS) V

of VD (VS)
REV. B
0.3
2.75 2.00 1.00
0
1.00 2.00
VD (VD = VDD VS) V
2.75

of VD (VS)
*SIMILAR CONNECTION FOR ADG707

**CONNECT TO 2.4V FOR BANDWIDTH MEASUREMENTS
OFF ISOLATION = 20LOG10(VOUT /VS)
VOUT WITH SWITCH
INSERTION LOSS = 20LOG10
VOUT WITHOUT SWITCH

of Temperature
ADG706/ADG707
0.8
0.5
VS = 1V/3V
TA = 25C
0.4
ID (OFF)
0.3
ADG706
IS (OFF)
0.2
0.1
CURRENT A
0.6
10m
1m
ATTENUATION dB
CURRENT nA
VDD = 3V
VSS = GND
VD = 3V/1V
0.7
ADG707
10
VDD = +5V
1
VDD = +3V
100n
8
10n
0
ID, IS (ON)
15
25
35 45
55
65
TEMPERATURE C
75
10
10k
85
1n
10
100M
20
10
40
60
10
80
20
100
30
1M
10M
FREQUENCY Hz
100M
TPC 13. OFF Isolation vs. Frequency
40
3
10k
100k
1k
FREQUENCY Hz
1M
10M
VDD = +2.5V
VSS = 2.5V
VDD = 5V
VSS = GND
100k
100
TPC 12. Supply Currents vs. Input

Switching Frequency
20
VDD = 5V
TA = 25C
QINJ pC
ATTENUATION dB
10M
TPC 11. ON Response vs. Frequency
120
30k
1M
FREQUENCY Hz
TPC 10. Leakage Currents as a

Function of Temperature
20
100k
ATTENUATION dB
0.1
5
VDD = +2.5V
VSS = 2.5V
100
VDD = 3V
VSS = GND
VDD = 5V
TA = 25C
40
60
80
100
0
1
2
VOLTAGE V
TPC 14. Charge Injection vs.

Source Voltage
120
30k
100k
1M
10M
FREQUENCY Hz
100M
TPC 15. Crosstalk vs. Frequency
REV. B
ADG706/ADG707
TEST CIRCUITS
IDS
VDD
VSS
VDD
VSS
V1
S1
IDOFF
S2
A
VD
S16
VS
EN
VS
0.8V
GND
RON = V1/VDS
Test Circuit 1. ON Resistance
ISOFF
VDD
VSS
VDD
VSS
Test Circuit 3. ID (OFF)
S1
VSS
VDD
VSS
D
S1
D
S2
VS
VDD
VD
A
VD
S16
S16
0.8V
EN
IDON
EN
VS
2.4V
GND
GND
Test Circuit 4. ID (ON)
Test Circuit 2. IS (OFF)
VDD
VSS
VDD
VSS
3V
VIN
50
ADDRESS
DRIVE (VIN)
VS1
S1
A3
A2
S1 THRU S15
A1
ADG706* S16
50%
0V
VS16
VS1
A0
VOUT
D
2.4V
50%
RL
300
EN
GND
CL
35pF
90%
VOUT
90%
VS16
t TRANSITION
t TRANSITION
Test Circuit 5. Switching Time of Multiplexer, tTRANSITION
VIN
50
VDD
VSS
VDD
VSS
3V
A3
S1
A2
S1 THRU S15
A1
ADG706* S16
VS
ADDRESS
DRIVE (VIN)
0V
A0
EN
GND
VS
VOUT
D
2.4V
RL
300
CL
35pF
VOUT
80%
t OPEN
Test Circuit 6. Break-Before-Make Delay, tOPEN
REV. B
80%
ADG706/ADG707
VDD
VSS
VDD
VSS
3V
VS
S1
A3
ENABLE
DRIVE (VIN)
t OFF (EN)
ADG706*
A1
VO
D
EN
VOUT
RL
300
GND
50
0.9VO
0.9VO
A0
VIN
50%
0V
S2 THRU S16
A2
50%
OUTPUT
CL
35pF
0V
t ON(EN)
Test Circuit 7. Enable Delay, tON (EN), tOFF (EN)
VDD
VSS
VDD
VSS
A3
3V
A2
LOGIC
INPUT (VIN)
ADG706*
A1
0V
A0
S
VOUT
RS
CL
1nF
EN
VS
VIN
VOUT
VOUT
QINJ = CL VOUT
GND
Test Circuit 8. Charge Injection
VDD
VDD
VDD
S1
A3
A2
50
S16
A1
50
A0
EN**
GND
ADG706*
A0
S1
VOUT
RL
50
VSS
50
VS
VSS
VOUT WITHOUT SWITCH
VOUT
RL
50
S2
S16
GND

**CONNECT TO 2.4V FOR BANDWIDTH MEASUREMENTS
OFF ISOLATION = 20LOG10(VOUT /VS)
VOUT WITH SWITCH
INSERTION LOSS = 20LOG10
2.4V
EN
A2
VS
ADG706*
A1
VDD
A3
VSS
VSS

CHANNEL-TO-CHANNEL CROSSTALK = 20LOG10(VOUT/VS )
Test Circuit 10. Channel-to-Channel Crosstalk
Test Circuit 9. OFF Isolation and Bandwidth
10
REV. B
ADG706/ADG707
OUTLINE DIMENSIONS
9.80
9.70
9.60
28
15
4.50
4.40
4.30
6.40 BSC
1
14
PIN 1
0.65
BSC
0.15
0.05
COPLANARITY
0.10
0.30
0.19
1.20 MAX
SEATING
PLANE
0.20
0.09
8
0
COMPLIANT TO JEDEC STANDARDS MO-153-AE
28-Lead Thin Shrink Small Outline Package [TSSOP]

(RU-28)
Dimensions shown in millimeters
REV. B
11
0.75
0.60
0.45
ADG706/ADG707
Revision History
Location
Page
3/16Data Sheet changed from REV. A to REV. B.

Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5/02Data Sheet changed from REV. 0 to REV. A.
Edits to FEATURES and PRODUCT HIGHLIGHTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Edits to ABSOLUTE MAXIMUM RATINGS notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Edits to TPCs 2, 3, 4, 69, 12, 14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Edits to Test Circuits 9 and 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12
REV. B

CMOS, +1.8 V To +5.5 V/ Low-Voltage, 8-/16-Channel Multiplexers

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CMOS, +1.8 V to +5.5 V/2.5 V, 2.5

FUNCTIONAL BLOCK DIAGRAMS

The ADG706 and ADG707 are low-voltage, CMOS analog

1. Single-/dual-supply operation. The ADG706 and ADG707 are

Low-power consumption and operating supply range of 1.8 V to

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

ON Resistance Match Between

= 5 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)

VS = 0 V to VDD, IDS = 10 mA;

VIN = VINL or VINH

RL = 300 , CL = 35 pF, Test Circuit 5;

CIN, Digital Input Capacitance

Break-Before-Make Time Delay, tD

RL = 50 , CL = 5 pF, Test Circuit 9

ON Resistance Match Between

CIN, Digital Input Capacitance

VS = 0 V to VDD, IDS = 10 mA;

VIN = VINL or VINH

RL = 300 , CL = 35 pF, Test Circuit 5

Break-Before-Make Time Delay, tD

RL = 50 , CL = 5 pF, Test Circuit 9

= 2.5 V 10%, GND = 0 V, unless otherwise noted.)

VS = VSS to VDD, IDS = 10 mA;

VIN = VINL or VINH

RL = 300 , CL = 35 pF, Test Circuit 5

VS = VD = +2.25 V/1.25 V, Test Circuit 4

Break-Before-Make Time Delay, tD

RL = 50 , CL = 5 pF, Test Circuit 9

Storage Temperature Range . . . . . . . . . . . . 65C to +150C

(TA = 25C unless otherwise noted.)

Z = RoHS Compliant Part.

Table II. ADG707 Truth Table

Most positive power supply potential

Most negative power supply in a dual-supply

OFF Switch drain capacitance. Measured

ON Switch capacitance. Measured with

Positive supply current

Digital input capacitance

Negative supply current

Delay time measured between the 50% and

Delay time between the 50% and 90% points

Delay time between the 50% and 90% points

Source terminal. May be an input or output.

Drain terminal. May be an input or output.

Logic control input

Active high device enable

Analog voltage on terminals D, S

Ohmic resistance between D and S

ON Resistance match between any two channels,

Flatness is defined as the difference between the

OFF Time measured between the 80% points

Measure of the glitch impulse transferred from

Source leakage current with the Switch OFF

Drain leakage current with the Switch OFF

Measure of unwanted signal coupling through

Channel leakage current with the Switch ON

Maximum input voltage for Logic 0

Measure of unwanted signal that is coupled