AN Balachandran PDF
AN Balachandran PDF
AN Balachandran PDF
Input/Output (GPIO)
Sasang Balachandran
11/08/2009
ECE 480 Design team 3
Keywords
Executive Summary
lower and performance of embedded systems increase, the need to provide flexibility in
can be programmed to be used to either accept input or provide output to external devices
depending on user desires and applications requirements. The variable methods of data
handling implemented in these pins, such as ADC conversion and interrupt handling,
Introduction
Generally there are multiple GPIO pins on a single MCU for the use of multiple
data from some external source is being fed into the system to be manipulated at a desired
time and location. Output can also be performed on GPIOs, where formatted date can be
are usually arranged into groups of 8 pins where signals can be sent or received to and
from other devices. In many applications, the GPIOs can be configured as interrupt lines
for a CPU to signal immediate processing of input lines. In many newer designs, they
also have the ability to control and use Direct Memory Access (DMA) to transfer blocks
of data in a more efficient manner. Essentially all ports can be tailored to fit specific
Objectives
General Purpose I/O (GPIO) pins are single need to be provided to be versatile to
digital and analog signals for ADC conversions. To provide efficiency the signals must
be signals individually controllable on a particular chip board. Each GPIO should be able
to define either an input mode or an output mode for individual pins on the chip. Finally
the pins must be extendable for a wide array of applications and functional uses that
On the LM3S8962 the GPIO modules consist of seven separate blocks, each of
these blocks will corresponding to individual ports on the GPIO interface, the ports in
order are: (Port A, Port B, Port C, Port D, Port E, Port F, Port G). The GPIO module on
this board supports up to 42 programmable input or output pins depending on the specific
input and output, specific programmable control for GPIO interrupts which include
interrupt generation masking, ADC sampling, programmable control for GPIO pad,
On the 8962 the data control registers allow software to configure the separate
programmable modes on the GPIOs. This is done by configuring the data direction
registers on the pins as either input or output for the lines. The data registers themselves
will contain information to be driven out of the system or new data thats entered the
system. An example of the seven physical blocks of the GPIO is illustrated below:
Interrupt Handling
In general, the interrupt capabilities of each of the ports are maintained by seven
of the available registers. These registers define the source of the interrupts, the type of
interrupt signal and even the edge property of the signal. In the case where one of more of
the input pins triggers an interrupt, the signals are optimized where only a single interrupt
For the 8962, specific input/output pins can be assigned to be watched for
interrupts where the interrupt handling function can trigger a function or certain actions
reading active and pending interrupts and displaying them to an OLED using output
debug on a systematic basis in essential to efficient code design. The GPIO pins can be
an effective way to monitor and display information about the system in a real time basis.
GPIO pins can be used at any time in test execution to display any pertinent
information about the program. By providing different messages at different stages to the
GPIO ports, a program or sequence of operations can be easily followed on the hardware
level.
Register Controls
implementation on the 8962 will be used as an example. The two registers that will be
discussed are the data registers and the data direction registers.
When writing code to manipulate the values in them, values should be written to
GPIODATA. These values will be transferred through the GPIO ports depending on the
directionality of the port, which will be discussed next. In order to write to GPIODATA,
the corresponding bits in the mask must be set to High. If this is not the case, the bit
values will not change by a write sequence. This is inversely true for values read from a
register. Bits that are 1 in the address mask cause the corresponding bits in GPIODATA
to be read, and bits that are 0 in the address mask cause the corresponding bits in
GPIODATA to be read as 0.Finally all bits in the registers are cleared in the event of a
reset. A simple mapping of the registers can be seen from the details on the LM3S8962
datasheet:
Conclusion
The reason we need pins that provide general purpose use is to provide an
interface that can be controlled by various devices and similarly be used to control the
programmed to control lines on the GPIO though register setup, these in turn can be
rearrangement of the pins on the board. The ability to program directionality for
individual applications and the functionality to handle interrupts and analog signals make
application code developed for one purpose easily extendable to other applications
through limited editing. Time and efficiency for repetitive modes are the highest priority
when using GPIOs and variability of modern processors certainly provide these required
responsibilities.
References
[2] Luminary Micro Technical Staff, LM3S8962 Evaluation Board, User's Manual, Texas
Instruments, 2009. Available at: http://www.luminarymicro.com/index.php?
option=com_remository&func=download
&id=523&chk=222579d07d3e13fde74ae411749ae30e&Itemid=591