Industrial Security System Using Microcontroller Regulated Power Supply
Industrial Security System Using Microcontroller Regulated Power Supply
Industrial Security System Using Microcontroller Regulated Power Supply
This type of regulation is ideal for having a simple variable bench power
supply. Actually this is quite important because one of the first projects a
hobbyist should undertake is the construction of a variable regulated
power supply. While a dedicated supply is quite handy e.g. 5V or 12V, it's
much handier to have a variable supply on hand, especially for testing.
Most digital logic circuits and processors need a 5 volt power supply. To
use these parts we need to build a regulated 5 volt source. Usually you
start with an unregulated power To make a 5 volt power supply, we use a
LM7805 voltage regulator IC (Integrated Circuit). The IC is shown below.
PROGRAMMING ALGORITHM
Before programming the AT89S52, the address, data, and control signals
should be set up according to the “Flash Programming Modes” (Table 22-1) and
Figure 22-1 and Figure 22-2. To program the AT89S52, take the following
steps: 1. Input the desired memory location on the address lines. 2. Input the
appropriate data byte on the data lines. 3. Activate the correct combination of
control signals. 4. Raise EA/VPP to 12V. 5. Pulse ALE/PROG once to program
a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and
typically takes no more than 50 μs. Repeat steps 1 through 5, changing the
address and data for the entire array or until the end of the object file is
reached.
Data Polling:
The AT89S52 features Data Polling to indicate the end of a byte write cycle.
Dur-ing a write cycle, an attempted read of the last byte written will result in
the complement of the written data on P0.7. Once the write cycle has been
completed, true data is valid on all outputs, and the next cycle may begin. Data
Polling may begin any time after a write cycle has been initiated.
Ready/Busy:
Program Verify:
If lock bits LB1 and LB2 have not been programmed, the programmed code
data can be read back via the address and data lines for verification.
The status of the individ-ual lock bits can be verified directly by reading them
back. Reading the Signature Bytes:
The signature bytes are read by the same procedure as a nor-mal verification
of locations 000H, 100H, and 200H, except that P3.6 and P3.7 must be pulled
to a logic low. The values returned are as follows. (000H) = 1EH indicates
manufactured by Atmel (100H) = 52H indicates AT89S52 (200H) = 06H
Chip Erase:
Programming the Flash – Serial Mode The Code memory array can be
programmed using the serial ISP interface while RST is pulled to VCC. The
serial interface consists of pins SCK, MOSI (input) and MISO (output). After
RST is set high, the Programming Enable instruction needs to be executed first
before other operations can be executed. Before a reprogramming sequence can
occur, a Chip Erase operation is required. The Chip Erase operation turns the
content of every memory location in the Code array into FFH. Either an
external system clock can be supplied at pin XTAL1 or a crystal needs to be
connected across pins XTAL1 and XTAL2. The maximum serial clock (SCK)
frequency should be less than 1/16 of the crystal frequency. With a 33 MHz
oscillator clock, the maximum SCK frequency is 2 MHz.
To program and verify the AT89S52 in the serial programming mode, the
following sequence is recommended: 1. Power-up sequence: a. Apply power
between VCC and GND pins. b. Set RST pin to “H”. If a crystal is not connected
across pins XTAL1 and XTAL2, apply a 3 MHz to 33 MHz clock to XTAL1 pin
and wait for at least 10 milliseconds. 2. Enable serial programming by sending
the Programming Enable serial instruction to pin MOSI/P1.5. The frequency of
the shift clock supplied at pin SCK/P1.7 needs to be less than the CPU clock at
XTAL1 divided by 16. 3. The Code array is programmed one byte at a time in
either the Byte or Page mode. The write cycle is self-timed and typically takes
less than 0.5 ms at 5V. 4. Any memory location can be verified by using the
Read instruction which returns the content at the selected address at serial
output MISO/P1.6. 5. At the end of a programming session, RST can be set low
to commence normal device operation. Power-off sequence (if needed ): 1. Set
XTAL1 to “L” (if a crystal is not used). 2. Set RST to “L”. 3. Turn VCC power off.
Data Polling:
The Data Polling feature is also available in the serial mode. In this mode,
during a write cycle an attempted read of the last byte written will result in the
complement of the MSB of the serial output byte on MISO.