j177 PDF
j177 PDF
j177 PDF
DATA SHEET
J174; J175;
J176; J177
P-channel silicon field-effect
transistors
Product specification April 1995
File under Discrete Semiconductors, SC07
Philips Semiconductors Product specification
J174; J175;
P-channel silicon field-effect transistors
J176; J177
DESCRIPTION
Silicon symmetrical p-channel
junction FETs in a plastic TO-92
envelope and intended for application
with analog switches, choppers,
commutators etc.
A special feature is the
interchangeability of the drain and 1
handbook, halfpage
2
source connections. 3 d
g
s
PINNING MAM388
1 = source
2 = gate
3 = drain
Note: Drain and source are Fig.1 Simplified outline and symbol, TO-92.
interchangeable.
Drain-source ON-resistance
−VDS = 0.1 V; VGS = 0 RDS on max. 85 125 250 300 Ω
April 1995 2
Philips Semiconductors Product specification
J174; J175;
P-channel silicon field-effect transistors
J176; J177
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Drain-source voltage ± VDS max. 30 V
Gate-source voltage VGSO max. 30 V
Gate-drain voltage VGDO max. 30 V
Gate current (DC) −IG max. 50 mA
Total power dissipation
up to Tamb = 50 °C Ptot max. 400 mW
Storage temperature range Tstg −65 to +150 °C
Junction temperature Tj max. 150 °C
THERMAL RESISTANCE
From junction to ambient in free air Rth j-a = 250 K/W
STATIC CHARACTERISTICS
Tj = 25 °C unless otherwise specified J174 J175 J176 J177
Gate cut-off current
VGS = 20 V; VDS = 0 IGSS max. 1 1 1 1 nA
Drain cut-off current
−VDS = 15 V; VGS = 10 V −IDSX max. 1 1 1 1 nA
Drain current
min. 20 7 2 1.5 mA
−VDS = 15 V; VGS = 10 V −IDSS
max. 135 70 35 20 mA
Gate-source breakdown voltage
IG = 1 µA; VDS = 0 V(BR)GSS min. 30 30 30 30 V
Gate-source cut-off voltage
min. 5 3 1 0.8 V
−ID = 10 nA; VDS = −15 V VGS off
max. 10 6 4 2.25 V
Drain-source ON-resistance
−VDS = 0.1 V; VGS = 0 RDSon max. 85 125 250 300 Ω
April 1995 3
Philips Semiconductors Product specification
J174; J175;
P-channel silicon field-effect transistors
J176; J177
DYNAMIC CHARACTERISTICS
Tj = 25 °C unless otherwise specified
Input capacitance, f = 1 MHz
VGS = 10 V; VDS = 0 V Cis typ. 8 pF
VGS = VDS = 0 Cis typ. 30 pF
Feedback capacitance, f = 1 MHz
VGS = 10 V; VDS = 0 V Crs typ. 4 pF
Switching times (see Fig.2 + 3) J174 J175 J176 J177
Delay time td typ. 2 5 15 20 ns
Rise time tr typ. 5 10 20 25 ns
Turn-on time ton typ. 7 15 35 45 ns
Storage time ts typ. 5 10 15 20 ns
Fall time tf typ. 10 20 20 25 ns
Turn-off time typ. 15 30 35 45 ns
toff
50 Ω INPUT
Vout 10%
RL
10% 10%
90% 90%
50 Ω
tf tr
MBK292 ts td MBK293
Fig.2 Switching times test circuit. Fig.3 Input and output waveforms;
td + tr = ton ; ts + tf = toff.
April 1995 4
Philips Semiconductors Product specification
J174; J175;
P-channel silicon field-effect transistors
J176; J177
PACKAGE OUTLINE
d A L
1
e1
2
D e
b1
L1
0 2.5 5 mm
scale
UNIT A b b1 c D d E e e1 L L1(1)
Note
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
April 1995 5
Philips Semiconductors Product specification
J174; J175;
P-channel silicon field-effect transistors
J176; J177
DEFINITIONS
April 1995 6