STM32 P107
STM32 P107
STM32 P107
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STM32-P107
EN DE FR
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STM32-P107 development board
Users Manual
Page 1
INTRODUCTION
STM32-P107 prototype board provides easy way for developing and prototyping
with the new STM32F107VCT6 connectivity line microcontroller, produced by
STMicroelectronics. STM32-P107 has JTAG port for programming and debugging,
USB_OTG, user button, two status leds, and most of the GPIOs are on extension
headers where you can connect your additional circuits.
BOARD FEATURES
ELECTROSTATIC WARNING
Page 2
BOARD USE REQUIREMENTS
Cables: The cable you will need depends on the programmer/debugger you use. If
you use ARM-JTAG, you will need LPT cable, if you use ARM-JTAG-EW, ARM-
USB-OCD, ARM-USB-OCD-H, ARM-USB-TINY, or ARM-USB-TINY-H you will
need 1.8 meter USB A-B cable, for ARM-USB-OCD and ARM-USB-OCD-H you will
need RS232 cable, too.
PROCESSOR FEATURES
STM32-P107 board use ARM-based 32-bit microcontroller STM32F107VCT6 with
these features:
– Core: ARM 32-bit Cortex™-M3 CPU
– 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1)
performance at 0 wait state memory access
– Single-cycle multiplication and hardware division
– Memories
– 256 Kbytes of Flash memory
– 64 Kbytes of SRAM
– Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR, and programmable voltage detector (PVD)
– 25 MHz crystal oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 40 kHz RC with calibration
– 32 kHz oscillator for RTC with calibration
– Low power
– Sleep, Stop and Standby modes
– VBAT supply for RTC and backup registers
– 2 × 12-bit, 1 µs A/D converters (16 channels)
– Conversion range: 0 to 3.6 V
– Sample and hold capability
– Temperature sensor
– up to 2 MSps in interleaved mode
– 2 × 12-bit D/A converters
– DMA: 12-channel DMA controller
Page 3
– Supported peripherals: timers, ADCs, DAC, I2Ss, SPIs, I2Cs and
USARTs
– Debug mode
– Serial wire debug (SWD) & JTAG interfaces
– Cortex-M3 Embedded Trace Macrocell™
– 80 fast I/O ports
– 80 I/Os, all mappable on 16 external interrupt vectors and almost all 5
V-tolerant
– 10 timers
– four 16-bit timers, each with up to 4 IC/OC/PWM or pulse counter and
quadrature (incremental) encoder input
– 1 × 16-bit motor control PWM timer with dead-time generation and
emergency stop
– 2 × watchdog timers (Independent and Window)
– SysTick timer: a 24-bit downcounter
– 2 × 16-bit basic timers to drive the DAC
– 14 communication interfaces
– 2 × I2C interfaces (SMBus/PMBus)
– 5 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)
– 3 SPIs (18 Mbit/s), 2 with a multiplexed I2S interface that offers audio
class accuracy via advanced PLL schemes
– 2 × CAN interfaces (2.0B Active) with 512 bytes of dedicated SRAM
– USB 2.0 full-speed device/host/OTG controller with on-chip PHY that
supports HNP/SRP/ID with 1.25 Kbytes of dedicated SRAM
– 10/100 Ethernet MAC with dedicated DMA and SRAM (4 Kbytes):
IEEE1588 hardware support, MII/RMII available on all packages
– CRC calculation unit, 96-bit unique ID
Page 4
BLOCK DIAGRAM
Page 5
MEMORY MAP
Page 6
3.3V
1
3.3V_MCU_E
CLOSE
2
U1
50 23 WKUP VBUS
VDD PA0/WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR/TIM5_CH1/ETH_MII_CRS_WKUP PA0
75 24 ETH_RMII_REF_CLK O H HN1x3 USB CIRCUIT
1
2
3
VDD PA1/USART2_RTS/ADC12_IN1/TIM5_CH2/TIM2_CH2/ETH_MII_RX_CLK/ETH_RMII_REF_CLK ETH_RMII_MDIO
USB_HOST
100 VDD 25 ETH_RMII_MDIO R22
28 PA2/USART2_TX/TIM5_CH3/ADC12_IN2/TIM2_CH3/ETH_MII_MDIO/ETH_RMII_MDIO 26 OTG_VBUS +5V_HOST_PWR USB_HOST
VDD PA3 0R
11 PA3/USART2_RX/TIM5_CH4/ADC12_IN3/TIM2_CH4/ETH_MII_COL 29 CS_MMC CS_MMC +5V_OTG_PWR +5V_HOST_PWR +5V_HOST_PWR 1
VDD PA4/SPI1_NSS/DAC_OUT1/USART2_CK/ADC12_IN4 PA4 0R(NA)
30 PA5 USB_HOST_D- USB_HOST_D- 2
PA5/SPI1_SCK/DAC_OUT2/ADC12_IN5 31 USB_HOST_D+ USB_HOST_D+ 3
PA6
USB
+
C36
10 68 OTG_VBUS 1 8
VSS PA9/USART1_TX/TIM1_CH2/OTG_FS_VBUS #ENA OUT_A
C16 100nF
C17 100nF
C18 100nF
C19 100nF
C20 100nF
27 69 2 7 FB 0 8 0 5 /6 0 0 R/2 0 0 m A (2 0 1 2 0 9 -6 0 1 )
OTG_ID HN1x3 47k USB_A
10k
VSS O H FLAG_A
1
2
3
PA10/USART1_RX/TIM1_CH3/OTG_FS_ID IN
C35
99
VSS
70 OTG_DM USB_VBUSON 3 6
74 PA11/USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM 71 4
FLAG_B GND
5
2
VSS
OTG_DP USB_HOST_D+
C37 100nF
49 PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP 72 TMS TMS 3.3V USB_OTG_D+ USB_FAULT
#ENB OUT_B
VSS PA13/JTMS/SWDIO 76 TCK TCK LM3526-L
1
CLOSE
PA14/JTCK/SWCLK U6
100nF
1.5k
33k
77 TDI
3.3VA_MCU_E
FB0805/600R/200mA(201209-601) VDDA
+
35 5 2 3.3V
C21 C22 PB0/ADC12_IN8/TIM3_CH3/ETH_MII_RXD2/TIM1_CH2N PB0 USB_D- USB_OTG
36 OTG_DM 22R R24 4 3
100nF PB1/ADC12_IN9/TIM3_CH4/ETH_MII_RXD3/TIM1_CH3N PB1
R20
19 37 PB2/BOOT1
R19
10uF/6.3V/TANT VSSA O H HN1x3 USB_OTG
1
2
3
SCHEMATIC
1
2
3
ETH_RMII_RXD0 ETH_RMII_RXD0 10k 10k 10k 10k NA CD/DAT3/CS
CS_MMC CS_MMC 1M R5
PC4/ADC12_IN14/ETH_MII_RXD0/ETH_RMII_RXD0 34 ETH_RMII_RXD1 ETH_RMII_RXD1 1 2 3 SPI3_MOSI SPI3_MOSI 10k R4
3.3V
PC5/ADC12_IN15/ETH_MII_RXD1/ETH_RMII_RXD1 CMD/DI
C12 B0_0/B0_1 12 63 STAT1 TRST 3 4 6
OSC_IN PC6/I2S2_MCK/TIM3_CH1 PC6 VSS
27pF 64 STAT2 PC7 TDI 5 6 4
PC7/I2S3_MCK/TIM3_CH2 VDD
R14 65 PC8 TMS 7 8 5 SPI3_SCK
Q1 PC8/TIM3_CH3 CLK/SCLK
Q25.000MHz/HC-49SM(SMD)/20pF NA 66 PC9 TCK 9 10 7 SPI3_MISO SPI3_MISO 100k R3
PC9/TIM3_CH4 DAT0/DO
C13 R15 13 78 SPI3_SCK SPI3_SCK R69 10k R70 10k 11 12 8 100k R2
OSC_OUT PC10/UART4_TX/USART3_TX/SPI3_SCK DAT1/RES
27pF 25MHZ R16 150R 79 SPI3_MISO PC10 SPI3_MISO TDO 13 14 1 100k R1
PC11/UART4_RX/USART3_RX/SPI3_MISO DAT2/RES
NA 80 SPI3_MOSI PC11 SPI3_MOSI RST 15 16 L5
PC12/UART5_TX/USART3_CK/SPI3_MOSI
+
1
2
PE6 38
PE7/TIM1_ETR
PD6/USART2_RX 88 USB_VBUSON PD6 HN1x2 ETHERNET UEXT
PE7 39 PD7/USART2_CK 55 USART3_TX
PE8/TIM1_CH1N PD8 U2 R61 R62 R63
PE8 40 PD8/USART3_TX/ETH_MII_RX_DV 56 USART3_RX UEXT
PE9/TIM1_CH1 PD9/USART3_RX/ETH_MII_RX_D0 PD9 4.7k 4.7k 33k
PE9 41 57 RST 28 55 ETH_RMII_TXD0 1 2
PE10 PE10/TIM1_CH2N PD10/USART3_CK/ETH_MII_RX_D1 PD10 RESET TXD0
42 58 USART3_CTS R34 10k 27 56 ETH_RMII_TXD1 USART2_TX 3 4 USART2_RX
PE11 PE11/TIM1_CH2 PD11/USART3_CTS/ETH_MII_RX_D2 PD11 PWRDWN TXD1
43 59 USART3_RTS PD12 ETH_RMII_MDC 42 57 I2C1_SCL 5 6 I2C1_SDA
PE12 PE12/TIM1_CH3N PD12/TIM4_CH1/USART3_RTS/ETH_MII_RX_D3 MDC TXD2
44 PE13/TIM1_CH3 60 PD13 ETH_RMII_MDIO 41 MDIO 58 SPI3_MISO 7 8 SPI3_MOSI
PE13 ETH_RMII_MDINT 45 PD13/TIM4_CH2 61 ETH_RMII_MDINT 61 TXD3 52 SPI3_SCK 9 10 CS_UEXT
PE14/TIM1_CH4 PD14/TIM4_CH3 PD14 MDINT TX_ER/TXD4
USB_FAULT 46 62 PD15 R35 10k 15 53
PE15/TIM1_BKIN PD15/TIM4_CH4 IREF TX_CLK
R36 4.99k/1% 54 ETH_RMII_TX_EN BH10S
3.3V R37 10k 6 TX_EN
STM32F107VCT6 FDE
R38 10k 5 47 ETH_RMII_RXD0
MF0 RXD0
Page 7
R39 10k 4 46 ETH_RMII_RXD1
MF1 RXD1
R40 10k 3 44
MF2 RXD2
R41 10k 2 43
MF3 RXD3
R42 10k 1 51
MF4 RX_ER/RXD4
R43 10k 64 49 3.3V
CFG0 RX_CLK
R44 10k 63 48 ETH_RMII_CRS_DV
RS232 BUTTONS CFG1 RX_DV
MII_AVDD
MII_AVDD
MII_AVDD
MII_AVDD
NA(49.9/1%)
100nF 2 5
R30 TD-
5 TAMPER 9 29 100nF R54 330R AG
NA(1 0pF)
NA(1 0pF)
T1103NE-DTSM-21R(12x12x4.3mm)
T1IN T1OUT VCCA3 CRS AY YELLOW
USART3_RTS 10 7 RTS 1 R29 17 LEDTR R56 330R KY 1:1
T2IN T2OUT R33 VCCA4 KY 75 75
3
R25 2 6 TAMPER 100R/1% WKUP 33 7
RJ45 SIDE
T1103NE-DTSM-21R(12x12x4.3mm)
C29
100nF STE101P L1 L4
C44 100nF
C45 100nF
C46 100nF
C47 100nF
C48 100nF
FB0805/600R/200mA(201209-601) FB0805/600R/200mA(201209-601)
R46
25MHZ R45
ETH_RMII_REF_CLK C54
C53
NA 100nF 100nF
R10 3.3V
+5V 3.3V 3.3VA
470R RESET CIRCUIT
PWR_LED 3.3V
2
RED(GYX-SD-TC0805SYRK) 3.3V_E
STATUS LEDS
G1 PB2/BOOT1 R76
PWR_SEL CLOSE
1
DB104(SMD) VR1(5.0V) +5V_JTAG 1 2 VR2(3.3V) STAT2
AME1085 +5V_OTG_PWR 3 4 LM1117IMPX-ADJ STAT1 10k 0 1
PWR_JACK 3.3VA_E
3
VI
2 +5V_EXT 5 6 IN OUT 1 2
VO
1
2
3
R73
GND/ADJ HN2x3 ADJ/GND CLOSE U4 10k
1
R6 C11 R59 R60 N A (S TM1001RW X 6F)
YDJ-1136 R74 B1_0/B1_1
100R/1% R8 470R 470R RST
2 VCC RESET 1 HN1x3
240R/1%
C4
+
C5
+
C7
+
C9
C10
100nF
C6
6VAC
330R
+
(6.5-9)VDC C1 C2 GND
3
R75
470uF/16VDC GND 100R/1%
100nF C3
R9 STAT1 STAT2
100nF
100nF
C8
R7 GNDA_E STM32-P107
300R/1% 1 2
2.2uF/6.3V
CLOSE 100nF
NA(10uF/6.3V)
NA(10uF/6.3V)
T1107A(6x3,8x2,5mm)
http://www.olimex.com/dev
BOARD LAYOUT
RESET CIRCUIT
STM32-P107 reset circuit includes JTAG connector pin 15, U2 (STE101P) pin 28
(RESET), R73(10k), R74(330Ohm), R75(100Ohm/1%), C55(100nF), STM32F107 pin
14 (NRST) and RESET button.
CLOCK CIRCUIT
Quartz crystal 25 MHz is connected to STM32F107 pin 12 (OSC_IN) and pin 13
(OSC_OUT).
Quartz crystal 32.768kHz is connected to STM32F107 pin 8 (PC14/OSC32_IN) and
pin 9 (PC15/OSC32_OUT).
Page 8
JUMPER DESCRIPTION
PWR_SEL
When position 1-2 is shorted – the board is power supplied from JTAG.
When position 3-4 is shorted – the board is power supplied from USB_OTG.
When position 5-6 is shorted – the board is power supplied from External power
source.
Default state is – position 5-6 – shorted.
B0_0/B0_1
When this jumper is in position B0_1 – BOOT0 is connected to 3.3V, and when the
jumper is in position B0_0 – BOOT0 is connected to GND.
Default state is B0_0.
B1_0/B1_1
When this jumper is in position B1_1 – BOOT1 is connected to 3.3V, and when the
jumper is in position B1_0 – BOOT1 is connected to GND.
Default state is B1_0.
VBUS
When is in position “H” - connects +5V_HOST_PWR to OTG_VBUS.
When is in position “O” - connects +5V_OTG_PWR to OTG_VBUS.
Default state is “O”.
USB_D+
When is in position “H” - connects USB_HOST_D+ to OTG_DP.
When is in position “O” - connects USB_OTG_D+ to OTG_DP.
Default state is “O”.
USB_D-
When is in position “H” - connects USD_HOST_D- to OTG_DM.
When is in position “O” - connects USB_OTG_D- to OTG_DM.
Default state is “O”.
PWDW_D
When is closed – disables Ethernet transceiver (STE101P) Power Down Mode.
STE101P is active.
Default state is closed.
3.3V_MCU_E
Enable microcontroller 3.3V power supply
Default state is closed.
Page 9
3.3V_E
Enable regulator VR2 (3.3V) - LM1117
Default state is closed.
3.3VA_E
Enables board 3.3V analog power supply.
Default state is closed.
3.3VA_MCU_E
Enables microcontroller 3.3V analog power supply.
Default state is closed.
GNDA_E
Enables board analog GND.
Default state is closed.
R-T
Connects RST to TRST
Default state is open.
INPUT/OUTPUT
Page 10
CONNECTOR DESCRIPTIONS
JTAG
The JTAG connector allows the software debugger to talk via a JTAG (Joint Test Action
Group) port directly to the core. Instructions may be inserted and executed by the core thus allowing
STM32F107 memory to be programmed with code and executed step by step by the host software.
For more details refer to IEEE Standard 1149.1 - 1990 Standard Test Access Port and Boundary
Scan Architecture and STM32F107 datasheets and users manual.
PWR_JACK
Page 11
USB_HOST
1 +5V_HOST_PWR
2 USB_HOST_D-
3 USB_HOST_D+
4 GND
USB_OTG
3V_BAT
1 VBAT
2 GND
RS232
Page 12
UEXT
Pin # Signal Name
1 3.3V
2 GND
3 USART2_TX
4 USART2_RX
5 I2C1_SCL
6 I2C1_SDA
7 SPI3_MISO
8 SPI3_MOSI
9 SPI3_SCK
10 CS_UEXT
LAN
Pin # Signal Name Chip Side Pin # Signal Name Chip Side
2 TX- 6 VDD
3 VDD 7 RX+
Page 13
SD/MMC
1 MCIDAT2
2 CS_MMC
3 SPI3_MOSI
4 3.3V
5 SPI3_SCK
6 GND
7 SPI3_MISO
8 MCIDAT1
9 Not connected
10 Not connected
11 Not connected
12 Not connected
Page 14
MECHANICAL DIMENSIONS
Page 15
AVAILABLE DEMO SOFTWARE
– Blinking LED Demo software for EW-ARM 5.50
– Ethernet Demo software for EW-ARM 5.50
– USB Demo software for EW-ARM 5.50
– SD card Demo software for EW-ARM 5.50
Page 16
ORDER CODE
STM32-P107 – assembled and tested
How to order?
You can order to us directly or by any of our distributors.
Check our web www.olimex.com/dev for more info.
Revision history:
REV. Initial - create December 2009
REV.A - edited by TU December 2010
REV. B - Demo Software added and mechanical dimensions – more
detailed
REV. C - Changed schematic to Rev. A and added more programmers in
BOARD USE REQUIREMENTS.
REV. D - edited June 2011 – changed schematic
Page 17
Disclaimer:
© 2011 Olimex Ltd. All rights reserved. Olimex®, logo and combinations thereof, are registered trademarks of
Olimex Ltd. Other terms and product names may be trademarks of others.
The information in this document is provided in connection with Olimex products. No license, express or implied
or otherwise, to any intellectual property right is granted by this document or in connection with the sale of
Olimex products.
Neither the whole nor any part of the information contained in or the product described in this document may be
adapted or reproduced in any material from except with the prior written permission of the copyright holder.
The product described in this document is subject to continuous development and improvements. All particulars
of the product and its use contained in this document are given by OLIMEX in good faith. However all warranties
implied or expressed including but not limited to implied warranties of merchantability or fitness for purpose are
excluded.
This document is intended only to assist the reader in the use of the product. OLIMEX Ltd. shall not be liable for
any loss or damage arising from the use of any information in this document or any error or omission in such
information or any incorrect use of the product.
Page 18
EN - For pricing and availability in your local country please visit one of the below links:
DE - Informationen zu Preisen und Verfügbarkeit in Ihrem Land erhalten Sie über die unten aufgeführten Links:
FR - Pour connaître les tarifs et la disponibilité dans votre pays, cliquez sur l'un des liens suivants:
STM32-P107
EN DE FR
This Datasheet is presented by Dieses Datenblatt wird vom Cette fiche technique est
the manufacturer Hersteller bereitgestellt présentée par le fabricant