Regulador de Freq RTM876-660 - REALTEK
Regulador de Freq RTM876-660 - REALTEK
Regulador de Freq RTM876-660 - REALTEK
General Application:
Others Features
Rev0.96
Advanced Application
PD Functionality
PD CPU CPU# PCIE PCIE# LINK PCIF/PCI 48/24 REF SATA
Driven or Driven or
1 Low
Low
Low
Low Low Low Low Low Low
CPU_STOP# Functionality
CPU_STOP# CPU CPU# PCIE PCIE# LINK PCIF/PCI 48/24 REF SATA
1 Normal Normal Normal Normal Normal Normal Normal Normal Normal
Driven or
0 Low
Low Normal Normal Normal Normal Normal Normal Normal
Rev0.96
F r
RTM876-660
Pin Description
Note : (*) Internal 120K pull-up resistors present, (**) Internal 120K pull-down resistors present, [#] mean active when pull low.
Internal
Pin No. Pin Name Pull Type Description
PCI - 1 O 3.3V 33MHz PCI output.
low 3.3V LVTTL CLKREQ function selection pin for PCIE7/6(SELECT by CR02[7],CR20[7-6])
1 **CLKREQ#A I 0 = pcie free running
1 = CLKREQ stop
2 GND G Ground pin.
**FS_A low I 1.8V LVTTL frequency selection pin., refer to HW latch frequency table
3 PCI - 2 O 3.3V 33MHz PCI output.
*FS_B high I 1.8V LVTTL frequency selection pin. ., refer to HW latch frequency table
4 PCI - 3 O 3.3V 33MHz PCI output.
5 VDD_3.3 P 3.3V power input pin.
high 3.3V LVTTL CPU mode selection pin.
*SEL_P4_K8# I 0 = K8 mode
6 1 = P4 mode
PCI - 4 O 3.3V 33MHz PCI output.
*SEL_0 high I 3.3V LVTTL chipset mode selection pin. Refer to CHIPSET SELECT table
7 PCI - 5 O 3.3V 33MHz PCI output.
PCI – 6F O 3.3V 33MHz PCI output.
8 **SYNC low I 1.8V LVTTL frequency selection pin. ., refer to HW latch frequency table
9 VDD_3.3 P 3.3V power input pin.
low 3.3V LVTTL frequency selection pin.
**Sel24_48# I 1 = 24MHz
10 0 = 48MHz
24_48M O 3.3V 24/48MHz PCI output.
**Sel_1 low I 3.3V LVTTL chipset mode selection pin. . Refer to CHIPSET SELECT table
11 12_48M O 3.3V 12_48MHz frequency output pin, selected by chipset selection table
12 GND G Ground pin.
13 VDD_3.3 P 3.3V power input pin.
Link – 0 O 3.3V 66/133 MHz PCI output. Refer to chipset selection table
14 DOT96 O 0.8V DOT96 “true” differential output. Refer to chipset selection table
SATA O 0.8V PCIE “true” differential output. Refer to chipset selection table
Link – 1 O 3.3V 66/133 MHz PCI output. Refer to chipset selection table
15 DOT96# O 0.8V DOT96 “complementary” differential output. Refer to chipset selection table
SATA# O 0.8V PCIE “complementary” differential output. Refer to Refer to chipset selection table
16 GND G Ground pin.
17 VDD_3.3 P 3.3V power input pin.
SATA O 0.8V SATA “true” differential output.
18 PCIE - 0 O 0.8V PCIE “true” differential output.
SATA# O 0.8V SATA “complementary” differential output.
19 PCIE – 0# O 0.8V PCIE “complementary” differential output.
20 GND G Ground pin.
21 PCIE - 1 O 0.8V PCIE “true” differential output.
22 PCIE - 1# O 0.8V PCIE “complementary” differential output.
23 GND G Ground pin.
24 PCIE - 2 O 0.8V PCIE “true” differential output.
25 PCIE - 2# O 0.8V PCIE “complementary” differential output.
26 VDD_3.3 P 3.3V power input pin.
27 PCIE - 3 O 0.8V PCIE “true” differential output.
28 PCIE - 3# O 0.8V PCIE “complementary” differential output.
29 PCIE – 6# O 0.8V PCIE “complementary” differential output.
30 PCIE - 6 O 0.8V PCIE “true” differential output.
31 GND G Ground pin.
32 PCIE – 7# O 0.8V PCIE “complementary” differential output.
Rev0.96
Rev0.96
Register Description
Rev0.96
Rev0.96
Rev0.96
Rev0.96
F r e e D a t a s
RTM876-660
PIN38 PIN56
PLL1 PLL3 Remark
Turbo-1 Turbo-0
ROM Power-on Default
0 0 CR12/13h
CR11/13h / Normal Programmable
Rev0.96
Rev0.96
Rev0.96
Rev0.96
Bit[3] RESERVED R 0
HCLK divider
000 = PLL1/2 100 = PLL1/8 ROM/REG
Bit[2:0] 001 = PLL1/3 101 = PLL1/5
R/W
010 = PLL1/4 110 = Reserved
[010]
011 = PLL1/6 111 = Reserved
Bit3 RESERVED R 0
PCI-E divider
000 = PLL1/8 100 = Reserved ROM/REG
Bit[2:0] 001 = PLL1/10 101 = Reserved R/W
010 = PLL3/8 110 = Reserved
[000]
011 = PLL2 fix100 111 = Reserved
Rev0.96
Rev0.96
Block Mode
1 7 1 1 8 1 8 1
8 1 8 1 8 1 1
Block Write
1 7 1 1 8 1 1 7 1 1
8 1 8 1 8 1 8 1 1
Block Read
Word Mode
1 7 1 1 8 1 8 1 8 1 1
Write Word
1 7 1 1 8 1 1 7 1 1
8 1 8 1 1
Read Word
Rev0.96
C
D
E E1
A1
e B
Rev0.96
Fig-1 shows the equivalent circuits of crystal and oscillation circuits within RTM867 series.
CRYSTAL RTM363
C1 XTALI
X pF 2~3pF
Cs
Rs
Co
Ls XTALO
X pF
C2 14.3181MHz 2~3pF
1
Fs ≅
2π Ls * Cs
1
Fp ≅
Ls * Cs * Co
2π
Cs + Co
Cs
Fo = Fs * 1 +
Co + CL
Rev0.96
To operate between Fs and Fp requires external load capacitance. So C1 and C2 must be used.
RTM363
C1 XTALI
54 pF 2~3pF
14.318MHz
Y1
Clitter
54 pF
XTALO
C2 2~3pF
In ideal case, ignore the Clitter at suggested C1=C2=54pF, the equivalent load capacitance is:
According to Table-1, the crystal with CL=28pF is adapted. But in most case, the litter capacitor (Clitter) generated by
PCB trace is existent. So the real CL is
Rev0.96
CL (pF) 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
C1=C2 (pF) 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62
For detail application about the selection of C1 & C2, please refer to crystal design guide.
Rev0.96
Lead(Pb)-free Package
RTM876-660
AAAAAAA LXXXV
For products with lead-free package, a ‘L’ letter is shown in the beginning of the last group of numbers. Otherwise,
only 4 numbers will be shown in the last group of numbers.
Ordering Information
Rev0.96