TH3122 004 PDF
TH3122 004 PDF
TH3122 004 PDF
Pin Diagram
Features and Benefits
SOIC16
K-Bus Transceiver:
VS 1 16 VCC
PNP-open emitter driver with slew rate control and current limitation
EN 2 15 SENSE
BUS input voltage -24V ... 30V (independently of VS) VTR 3 14 RESET
ISO 9141 and ODBII compliant GND 4 13 GND
TH3122
GND GND
Possibility of BUS wake up
5 12
BUS 6 11 TxD
Operating voltage VS = 5.5 ... 16 V SI 7 10 RxD
SO SEN/STA
Very low standby current consumption <100 µ A
8 9
Ordering Information
Part No. Temperature Code Package Code
General Description
The TH3122 consists of a low drop voltage functions make it possible to develop simple, but
regulator 5V/100mA and a K-Bus transceiver. The powerful and cheap nodes in K-Bus systems.
transceiver is suitable for K-Bus systems conform The wide output current area and the configurable
to ISO 9141. reset time and reset voltage works together with
The combination of voltage regulator and bus many different microcontrollers.
transceiver in combination with the monitoring
Functional Diagram
VS VCC
Power Supply
EN Over Temp
+5V
7.8V SENSE
6.8V
+5V
Reset-Logic
VTR RESET
VTR-Logic
OSC
Wake-up
VthH
VthL
RxD
Bus-Logic TxD
BUS pnp Control
slew rate
foldback
SEN/STA
+5V
SI
VTHSI_H
VTHSI_L
SO
Functional Description
The TH3122 consists of a voltage regulator 5V/100mA Also integrated into the transceiver are a voltage and
and a K-Bus transceiver, which is a bi-directional bus time controlled reset management, power down, wake
interface device for data transfer between K-Bus and the up function and a universal comparator for extended
K-Bus protocol controller. applications.
to Wake-up
tdebWake
Logic
tdebBUS VthH
RxD Control- VthL
logic
POR
VBAT
Bit-Compare pnp-
POR
Constant-Low
Control BUS
VCC
VCC - slew rate
- IB
- foldback
TxD ESD
Vref
VCC OSC
Biasing
SENSE ESD
K-BUS Interface
The BUS Interface builds the connection between the
electromagnetic emission of the bus line, the TH3122
serial 5V bus line of the protocol controller and the 12V
has an integrated slew rate control.
K-Bus line.
The transceiver consists of a pnp-driver with slew rate
Receive Mode
control and fold-back characteristic and contains also in
the receiver a high voltage comparator followed by a The data at the pin BUS will be transferred to the pin
debouncing unit. RxD. Short spikes on the bus signal are suppressed by
the implemented debouncing circuit.
Transmit Mode
BUS
During the transmission the data at the pin TxD will be
transferred to the pin BUS. To minimize the
< tdebH < tdebL
SEN/STA
RxD
tdebH tdebL
BUS
t < trec
Figure 5 - Bit Compare Pulse Diagram
SEN/STA TxD
SEN/STA =”0”
transmission path is enabled tlow tena
SEN/STA =”1”
transmission path is disabled
Figure 6 - Constant Low Pulse Diagram
VCC
VRES1/2
VTR with R ≥ 50k Ω to GND VRES = VRES1 = 3.15V 15ms
tRes trr VTR with R ≥ 50k Ω to VCC VRES = VRES2 = 4.65V 15ms
RESET
VTR-Programming
The voltage on VTR input is read out if the voltage at this
Figure 7 - Initialization pin is higher than VRESEIN . This value defines the reset
switch off voltage VRES. With the next oscillator cycle it
The input EN has an internal pull down resistor. If switches on the pull up current source if VTR=low or the
EN=high, the internal pull down current is switched off to pull down current source if VTR=high. The sources are
minimize the quiescent current. active for one oscillator cycle. The level changes during
RESET Output this procedure on VTR, which depends on the external
pull up or pull down resistors control the reset time tRes
The RESET output is switched from low to high if VS is
switched on and VCC>VRESEIN after the time tRES.
If the voltage VCC drops below VRES1 or VRES2 then the RESET Temperature Limitation
output is switched from high to low after the time trr has been If the junction temperature 150ºC < Tj < 170ºC the over
reached. temperature recognition will be active and the regulator
The voltage level for VRES1 and VRES2 and the voltage and the BUS driver will be switched off. After Tj
corresponding times tRES can be programmed via the falls below 140ºC the TH3122 will be initialized,
analogue input VTR. independently of the voltage levels on EN and BUS.
The function of the TH3122 is possible between TAmax
Wake up with BUS traffic and the switch off temperature, but small parameter
differences can appear.
If the regulator is put in standby mode it can be woken
up with the BUS interface. Every pulse on the BUS (high
pulse or low pulse) with a pulse width of min. 45 µ s will Low Voltage Detection VS
switch on the regulator. Low voltage on VS is monitored on SENSE output.
After the BUS has woken up the regulator, it can only be If VS has reached the level of VS =6.8V then the SENSE
switched off with a high level followed by a low level on output generates low level. The normal
the EN pin. operating range is VS > 7.8V and the SENSE output
generates a high level.
Reset Programming on VTR
With the VTR pin the reset switches off levels and delay Universal Comparator
time can be programmed. The TH3122 consist of a universal comparator for
The voltage on VCC influences the reset function. general use. The positive input of this comparator is
connected to the pin SI. The input voltage range of SI is
0V...VS. The input voltage is compared with a fixed
reference voltage at high or low level and the comparator
output SO drives a 5V digital signal.
Application Hints
Regulator Circuitry
Operating during Disturbances
The choice and dimension of the capacitor on VCC is
The absence of VS ,VCC or GND connection or ground determined by application point of view. Important
shift either alone or in any combination, do not influence parameters are the current difference on load changes
or disturb the communication between other bus nodes. and the maximum short time voltage drop.
The VCC pin must be connected to a min. 2 µ F
Undervoltage
capacitor for stable operating of the regulator in the
The reset unit secures the correct behavior of the driver whole operating range.
during undervoltage. The inputs have pull-up or pull-
down characteristics and have therefore defined voltage Short Circuit Proof
levels.
All in- and outputs are short circuit proof to battery and
With 4.5V ≤ VCC ≤ 5.25V the bus connection operates ground. A thermal shut down circuit prevents VCC and
within the correct parameters . BUS from any damage.
If VRES1 ≤ VCC ≤4.5V the TxD signal is transmitted to the
bus. The receive mode is also active. Baud Rate
If VCC < VRES1the bus driver is tristate. The TH3122 has a maximum Baud rate of 9600 Baud
SENSE and SO output the correct signal if VCC > VRES . (CBUS < 25nF, RPU > 400 Ω).
The specificated values of the input voltages on SO can’t
guaranteed.
Application Circuitry
There should be used an LC-Filter to minimize the influence of EMI on the BUS lines.
Electrical Specification
All voltages are referenced to ground (GND). Positive any of these limits may do so. Long term exposure to
currents flow into the IC. The absolute maximum ratings limiting values may affect the reliability of the device.
given in the table below are limiting values that do not Reliable operation of the TH3122 is only specified within
lead to a permanent damage of the device but exceeding the limits shown in ”Operating conditions”.
Operating Conditions
-1.0 16
T ≤ 500 ms - 40
-24 30
Input voltage at pin BUS [2] VINBUS V
T ≤ 500 ms - 40
Input voltage at pin VTR, TxD, SEN/STA, SO, RESET, SENSE VIN -0.3 VCC+0.3 V
Input current for short circuit of pin VS and VCC IShort -500 500 mA
______________________________
[1]
Junction temperature is defined in IEC 747-1
[2]
The current and voltage values are valid independent from each other.
[3]
The maximum power dissipation is defined by the ambient temperature and the thermal resistance. It can be calculated with
P0 =(VS-VCC)*IVCC+PBUS. PBUS is the BUS driver output with normally ≤25 mW
[4]
see over temperature protection
Static Characteristics
(VS = 5.25 to 16V, VCC= 4.75 to 5.25V, TA = -40 to +125°C, unless otherwise specified)
Linear Regulator
5.5V ≤ VS ≤ 16V
VCCn 4.95 5.0 5.05 V
TA = 25°C
Power-on-reset threshold “VCC on” VRESEIN refered to VCC, VS > 4.6V 4.5 4.65 4.8 V
SENSE-Output
Enable-Input EN
Hysteresis VHYS 30 mV
K-Bus-Interface
0 ≤ VBUS ≤ 40 V
1300
Input restistance BUS RINBUS TA ≤ 125 °C kΩ
VBUS = -25V
60
TA ≤ 125 °C
VS = 12V, SENSE = low
1.2
IOUT = 40 mA
Output voltage BUS VBUS V
VS = 12V, SENSE = low
1.0
IOUT = 25 mA
Current limitation BUS ILIM VBUS > 2.5V 40 100 mA
Dynamic Characteristics
(5.25V ≤ VS ≤ 16V, 4.75V ≤ VCC ≤ 5.25V, -40°C ≤ TA ≤ 125°C, unless otherwise specified)
RESET
K-Bus-Interface
Debouncing time BUS tdebBUS High pulse or low pulse 1.5 2.8 4.0 µs
Inhibit time for transmit BUS, TxD tena 0.92 1.33 1.8 ms
Pin Description
VS 1 16 VCC
EN 2 15 SENSE
VTR 3 14 RESET
GND 4 13 GND
TH3122
GND 5 12 GND
BUS 6 11 TxD
SI 7 10 RxD
SO 8 9 SEN/STA
1 VS Supply voltage
3 VTR I Analogue Input - definition of reset time und Reset voltage level
4 GND Ground
5 GND Ground
8 SO O 5V-Comparator Output
12 GND Ground
13 GND Ground
Mechanical Specifications
E H
1 2 3
A1 A α
e b L
D E H A A1 e b L α
min 10.1 7.40 10.00 2.35 0.10 0.33 0.40 0°
1.27
max 10.5 7.60 10.65 2.65 0.30 0.51 1.27 8°
Assembly Information
This Melexis device is classified and qualified regarding soldering technology, solderability and moisture sensitivity level,
as defined in this specification, according to following test methods:
IPC/JEDEC J-STD-020
Moisture/Reflow Sensitivity Classification For Nonhermetic Solid State Surface Mount Devices
(classification reflow profiles according to table 5-2)
EIA/JEDEC JESD22-A113
Preconditioning of Nonhermetic Surface Mount Devices Prior to Reliability Testing
(reflow profiles according to table 2)
CECC00802
Standard Method For The Specification of Surface Mounting Components (SMDs) of Assessed Quality
EIA/JEDEC JESD22-B106
Resistance to soldering temperature for through-hole mounted devices
EN60749-15
Resistance to soldering temperature for through-hole mounted devices
MIL 883 Method 2003 / EIA/JEDEC JESD22-B102
Solderability
For all soldering technologies deviating from above mentioned standard conditions (regarding peak temperature,
temperature gradient, temperature profile etc) additional classification and qualification tests have to be agreed upon with
Melexis.
The application of Wave Soldering for SMD’s is allowed only after consulting Melexis regarding assurance of adhesive
strength between device and board.
Based on Melexis commitment to environmental responsibility, European legislation (Directive on the Restriction of the
Use of Certain Hazardous substances, RoHS) and customer requests, Melexis has installed a roadmap to qualify their
package families for lead free processes also.
Various lead free generic qualifications are running, current results on request.
For more information on Melexis lead free statement see quality page at our website:
http://www.melexis.com/html/pdf/MLXleadfree-statement.pdf
ESD Precautions
Disclaimer
Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its
Term of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the
information set forth herein or regarding the freedom of the described devices from patent infringement.
Melexis reserves the right to change specifications and prices at any time and without notice. Therefore,
prior to designing this product into a system, it is necessary to check with Melexis for current information.
This product is intended for use in normal commercial applications. Applications requiring extended
temperature range, unusual environmental requirements, or high reliability applications, such as military,
medical life-support or life-sustaining equipment are specifically not recommended without additional
processing by Melexis for each application.
The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not be
liable to recipient or any third party for any damages, including but not limited to personal injury, property
damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential
damages, of any kind, in connection with or arising out of the furnishing, performance or use of the
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