Clipper & Clamper
Clipper & Clamper
There are a variety of diode networks called clippers that have the ability to “clip” off
a portion of the input signal without distorting the remaining part of the alternating
waveform.
Depending on the orientation of the diode, the positive or negative region of the input
signal is “clipped” off.
There are two general categories of clippers: series and parallel. The series
configuration is defined as one where the diode is in series with the load, while the
parallel variety has the diode in a branch parallel to the load.
In this diode clipping circuit, the diode is forward biased (anode more positive than cathode)
during the positive half cycle of the sinusoidal input waveform. For the diode to become
forward biased, it must have the input voltage magnitude greater than +0.7 volts (0.3 volts for
a germanium diode).
When this happens the diodes begins to conduct and holds the voltage across itself constant at
0.7V until the sinusoidal waveform falls below this value. Thus the output voltage which is
taken across the diode can never exceed 0.7 volts during the positive half cycle.
During the negative half cycle, the diode is reverse biased (cathode more positive than anode)
blocking current flow through itself and as a result has no effect on the negative half of the
sinusoidal voltage which passes to the load unaltered. Then the diode limits the positive half
of the input waveform and is known as a positive clipper circuit.
Here the reverse is true. The diode is forward biased during the negative half cycle of the
sinusoidal waveform and limits or clips it to -0.7 volts while allowing the positive half cycle
to pass unaltered when reverse biased. As the diode limits the negative half cycle of the input
voltage it is therefore called a negative clipper circuit.
Clipping of Both Half Cycles
If we connected two diodes in inverse parallel as shown, then both the positive and negative
half cycles would be clipped as diode D1 clips the positive half cycle of the sinusoidal input
waveform while diode D2 clips the negative half cycle. Then diode clipping circuits can be
used to clip the positive half cycle, the negative half cycle or both.
For ideal diodes the output waveform above would be zero. However, due to the forward bias
voltage drop across the diodes the actual clipping point occurs at +0.7 volts and -0.7 volts
respectively. But we can increase this ±0.7V threshold to any value we want up to the
maximum value, (VPEAK) of the sinusoidal waveform either by connecting together more
diodes in series creating multiples of 0.7 volts, or by adding a voltage bias to the diodes.
Likewise, by reversing the diode and the battery bias voltage, when a diode conducts the
negative half cycle of the output waveform is held to a level -VBIAS – 0.7V as shown.
A variable diode clipping or diode limiting level can be achieved by varying the bias voltage
of the diodes. If both the positive and the negative half cycles are to be clipped, then two
biased clipping diodes are used. But for both positive and negative diode clipping, the bias
voltage need not be the same. The positive bias voltage could be at one level, for example 4
volts, and the negative bias voltage at another, for example 6 volts as shown.
When the voltage of the positive half cycle reaches +4.7 V, diode D1 conducts and limits the
waveform at +4.7 V. Diode D2 does not conduct until the voltage reaches –6.7 V. Therefore,
all positive voltages above +4.7 V and negative voltages below –6.7 V are automatically
clipped.
The advantage of biased diode clipping circuits is that it prevents the output signal from
exceeding preset voltage limits for both half cycles of the input waveform, which could be an
input from a noisy sensor or the positive and negative supply rails of a power supply.
If the diode clipping levels are set too low or the input waveform is too great then the
elimination of both waveform peaks could end up with a square-wave shaped waveform.
Clamper Circuit
A clamp circuit adds the positive or negative dc component to the input signal so as to push it
either on the positive side, as illustrated in figure (a) or on the negative side, as illustrated in
figure (b).
Note : The clamper is also referred to as an DC restorer and ac signal level shifter.
The circuit will be called a positive clamper, when the signal is pushed upward by the circuit.
When the signal moves upward, as shown in figure (a), the negative peak of the signal
coincides with the zero level.
The circuit will be called a negative clamper, when the signal is pushed downward by the
circuit. When the signal is pushed on the negative side, as shown in figure (b), the positive
peak of the input signal coincides with the zero level.
The important points regarding clamping circuits are:
(i) The shape of the waveform will be the same, but its level is shifted either upward or
downward,
(ii) There will be no change in the peak-to-peak or rms value of the waveform due to the
clamping circuit. Thus, the input waveform and output waveform will have the same peak-to-
peak value that is, 2Vmax. This is shown in the figure above. It must also be noted that same
readings will be obtained in the ac voltmeter for the input voltage and the clamped output
voltage.
(iii) There will be a change in the peak and average values of the waveform. In the figure
shown above, the input waveform has a peak value of Vmax and average value over a
complete cycle is zero. The clamped output varies from 2 Vmax and 0 (or 0 and -2Vmax). Thus
ths peak value of the clamped output is 2Vmax and average value is Vmax.
(iv) The values of the resistor R and capacitor C affect the waveform.
(v) The values for the resistor R and capacitor C should be determined from the time constant
equation of the circuit, t = RC. The values must be large enough to make sure that the voltage
across the capacitor C does not change significantly during the time interval the diode is non-
conducting. In a good clamper circuit, the circuit time constant t = RC should be at least ten
times the time period of the input signal voltage.
Note: It is advantageous to first consider the condition under which the diode becomes
forward biased.
Consider a negative clamping circuit, a circuit that shifts the original signal in a vertical
downward direction, as shown in the figure below. The diode D will be forward biased and
the capacitor C is charged with the polarity shown, when an input signal is applied.
During the interval 0 to T/2 the network will appear as shown in Fig. below, with the diode in
the “on” state effectively “shorting out” the effect of the resistor R. The resulting RC time
constant is so small (R determined by the inherent resistance of the network) that the
capacitor will charge to V volts very quickly. During this interval the output voltage is
directly across the short circuit and vo = 0 V. When the input switches to the -V state, the
network will appear as shown in Fig. below, with the open-circuit equivalent for the diode
determined by the applied signal and stored voltage across the capacitor both “pressuring”
current through the diode from cathode to anode. Now that R is back in the network the time
constant determined by the RC and it can be assumed on an approximate basis that the
capacitor holds onto all its charge during this period.
Applying Kirchhoff’s voltage law around the input loop will result in
The resulting output waveform given below with the input signal. The output signal is
clamped to 0 V for the interval 0 to T/2 but maintains the same total swing (2V) as the input.
A positive clamper can also explained in similar way by changing the orientation of the Diode in the
above circuits.
Reference