A B C D E

1 1

JASAA
2

Orlando 10A/10AG 2

LA3831P REV 1.0 Schematic

3 3

AMD Turion,Sempron/ATI RX690/RS690MC / ATI SB600

2007-08-06 Rev. 1.0

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title
SCHEMATIC MB A3831
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 1 of 46
A B C D E
 A B C D E

Compal confidential JASAA Orlando10A FUNCTION BLOCK DIAGRAM

File Name : JASAA Orlando10A LA3831P
P/N :
Clock Generator Thermal Sensor AMD S1 CPU 638 pin
ICS951462AGLFT GMT G781P8F 533/667MHz FANController PAGE 41
(1.8V) SO-DIMM x 2(DDRII)
4
PAGE 13 PAGE 6 Turion 64 X2 Memory Bus BANK 0,1,2,3
4

PAGE 8,9
Turion 64 DC/DC Interface PAGE 42
CPU VID Sempron
PAGE 1,2,3,4,5,6,7
Power Buttom
PAGE 6 HT PAGE 39
16x16 1000MHZ

CRT Conn. x1 PCI-E HD DVD

page 15
PAGE 24

ATI-RX/RS690MC x1 PCI-E Mini Card-WLAN

LVDS Conn
page 15
PAGE 24
VGA M26P Embeded
TV-OUT Conn. x1 PCI-E New Card
3 3
page 14 465 pin BGA PAGE 28
PAGE 10,11,12
LAN
HDMI Conn. VGA Conn x1 PCI-E RJ-45
RTL8111B-1G
PAGE 25
page 20 page 15 RTL8101E-10/100M
A-Link Express II
PAGE 25
x4 PCIE
USB 2.0 480MHz(5V) USB Port * 6 (Port 0, 1 Finger Printer (Port 2)
33MHz (3.3V) PCI
4, 5, 6, 7) PAGE 30 PAGE 30
Primary SATA
3.3V,5V
ATI-SB600 SATA
1.5GHz(150MB/s)
SATA HDD0
Int. Camera (Port 8)
PAGE 30
Bluetooth (Port 3)
PAGE 30
PAGE 21
CardBus/ 5IN1/ 1394 548 pin BGA
PCI8412-1394/CardBus/5IN1
NewCard (Port 9)
SATA SATA HDD1 PAGE 29
PAGE 16,17,18,19 PAGE 21
Secondary
2
PAGE 22, 23
PATAATA-100 (5V) IDE ODD DCIN&DETECTOR 2

PAGE 28 PAGE 36

LPC
33MHz (3.3V) BATT CONN/OTP
PAGE 37

Azalia
1394-Port 5 IN 1 Conn Debug Port Embedded Controller 24MHz(3.3V) CHARGER
PAGE 34 HD CODEC Audio Amplifier PAGE 38
PAGE 22 PAGE 22 ENE KB926 PAGE 30 ALC268-GR APA2057APAGE 27
PAGE 26
Int. 3V/5V/
K/B PAGE 39
SPI PS2
Matrix
MDC w/Rev1.5 Audio Amplifier
Track Scan PAGE 29 APA2068 PAGE 27 1.8V/1.2V
BIOS PAGE 40
Pad KB
PAGE 31 PAGE 33 PAGE 33
Audio Amplifier 2.5V/0.9V/1.5V
APA3010APAGE 28 PAGE 41

1 1
CPU_CORE
PAGE 42

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title
SCHEMATIC MB A3831
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 2 of 46
A B C D E
 A B C D E

SIGNAL
Voltage Rails STATE SLP_S3# SLP_S5# +VALW +V +VS Clock

Full ON HIGH HIGH ON ON ON ON

Power Plane Description S1 S3 S5
S1(Power On Suspend) HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) ON ON ON
1 B+ AC or battery power rail for power circuit. ON ON ON S3 (Suspend to RAM) LOW HIGH ON ON OFF OFF 1

+RTCVCC RTC power ON ON ON

S4 (Suspend to Disk) LOW LOW ON OFF OFF OFF
+VSB B+ switched power rail ON ON ON
+5VALW 5V always on power rail ON ON ON S5 (Soft OFF) LOW LOW ON OFF OFF OFF
+3VALW 3.3V always on power rail ON ON ON
+1.2VALW 1.2V always on power rail ON ON ON
+1.8V 1.8V power rail ON ON OFF
ID Table for AD channel
+0.9V 0.9V switched power rail ON ON OFF
+5VS 5VS switched power rail ON OFF OFF Vcc 3.3V +/- 5%
+3VS 3.3VS switched power rail ON OFF OFF Ra 100K +/- 5%
+2.5VS 2.5VS switched power rail ON OFF OFF Board ID Rb V AD_BID min V AD_BID typ V AD_BID max
+1.8VS 1.8VS switched power rail ON OFF OFF 0 0 0 V 0 V 0 V
+1.5VS 1.5VS switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+CPU_CORE Core voltage for CPU ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+1.2V_HT 1.2VS switched power rail ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
2 2

4 56K +/- 5% 1.036 V 1.185 V 1.264 V

5 100K +/- 5% 1.453 V 1.650 V 1.759 V
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts BTN_ID BTO BOM STURCTURE
1394/ CardBus/ 5IN1 AD20 2/ 2 PIRQE/F/G 0
1
2
3
EC SM Bus1 address EC SM Bus2 address 4
5
3 3
Device HEX Address Device HEX Address 6
Smart Battery 16H 0001 011X b CPU Thermal-G781P8F 98H 1001 100X b 7
24C16 A0H 1010 000X b VGA Thermal-

ATi SB600 SM Bus address

SM Bus0 address SM Bus1 address
Device HEX Address
Clock GEN.
(ICS951462AGLFT)

DDR DIMM0 A4
DDR DIMM1 A6
4
Mini Card-WLAN 4

Mini Card-3G
New Card

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title
SCHEMATIC MB A3831
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 3 of 46
A B C D E
 5 4 3 2 1

H_CADIP[0..15] H_CADOP[0..15]
10 H_CADIP[0..15] H_CADOP[0..15] 10
D D
H_CADIN[0..15] H_CADON[0..15]
10 H_CADIN[0..15] H_CADON[0..15] 10

+1.2V_HT
JP27A
D4 VLDT_A3 VLDT_B3 AE5 1 2
VLDT=500mA D3 AE4 C107 4.7U_0805_10V4Z
VLDT_A2 VLDT_B2
D2 VLDT_A1 VLDT_B1 AE3
D1 VLDT_A0 VLDT_B0 AE2

H_CADIP15 N5 T4 H_CADOP15
H_CADIN15 L0_CADIN_H15 L0_CADOUT_H15 H_CADON15
P5 L0_CADIN_L15 L0_CADOUT_L15 T3
H_CADIP14 M3 V5 H_CADOP14
H_CADIN14 L0_CADIN_H14 L0_CADOUT_H14 H_CADON14
M4 L0_CADIN_L14 L0_CADOUT_L14 U5
H_CADIP13 L5 V4 H_CADOP13
H_CADIN13 L0_CADIN_H13 L0_CADOUT_H13 H_CADON13
M5 L0_CADIN_L13 L0_CADOUT_L13 V3
H_CADIP12 K3 Y5 H_CADOP12
H_CADIN12 L0_CADIN_H12 L0_CADOUT_H12 H_CADON12
K4 W5
H_CADIP11
H_CADIN11
H_CADIP10
H3
H4
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
AB5
AA5
H_CADOP11
H_CADON11
H_CADOP10
+1.2V_HT

250 mil
VLDT CAP.
G5 L0_CADIN_H10 L0_CADOUT_H10 AB4
H_CADIN10 H5 AB3 H_CADON10
H_CADIP9 L0_CADIN_L10 L0_CADOUT_L10 H_CADOP9
F3 L0_CADIN_H9 L0_CADOUT_H9 AD5
H_CADIN9 F4 AC5 H_CADON9 1 1 1 1 1 1
C H_CADIP8 L0_CADIN_L9 L0_CADOUT_L9 H_CADOP8 C102 C103 C101 C104 C106 C112 C
E5 L0_CADIN_H8 L0_CADOUT_H8 AD4
H_CADIN8 F5 AD3 H_CADON8 4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J
H_CADIP7 L0_CADIN_L8 L0_CADOUT_L8 H_CADOP7
N3 L0_CADIN_H7 L0_CADOUT_H7 T1
H_CADIN7 H_CADON7 2 2 2 2 2 2
N2 L0_CADIN_L7 L0_CADOUT_L7 R1
HTT Interface

H_CADIP6 L1 U2 H_CADOP6
H_CADIN6 L0_CADIN_H6 L0_CADOUT_H6 H_CADON6
M1 L0_CADIN_L6 L0_CADOUT_L6 U3
H_CADIP5 L3 V1 H_CADOP5
H_CADIN5 L2
L0_CADIN_H5
L0_CADIN_L5
L0_CADOUT_H5
L0_CADOUT_L5 U1 H_CADON5 Near CPU Socket
H_CADIP4 J1 W2 H_CADOP4
H_CADIN4 L0_CADIN_H4 L0_CADOUT_H4 H_CADON4
K1 L0_CADIN_L4 L0_CADOUT_L4 W3
H_CADIP3 G1 AA2 H_CADOP3
H_CADIN3 L0_CADIN_H3 L0_CADOUT_H3 H_CADON3
H1 L0_CADIN_L3 L0_CADOUT_L3 AA3
H_CADIP2 G3 AB1 H_CADOP2
H_CADIN2 L0_CADIN_H2 L0_CADOUT_H2 H_CADON2
G2 L0_CADIN_L2 L0_CADOUT_L2 AA1
H_CADIP1 E1 AC2 H_CADOP1
H_CADIN1 L0_CADIN_H1 L0_CADOUT_H1 H_CADON1
F1 L0_CADIN_L1 L0_CADOUT_L1 AC3
H_CADIP0 E3 AD1 H_CADOP0
H_CADIN0 L0_CADIN_H0 L0_CADOUT_H0 H_CADON0
E2 L0_CADIN_L0 L0_CADOUT_L0 AC1

10 H_CLKIP1 J5 L0_CLKIN_H1 L0_CLKOUT_H1 Y4 H_CLKOP1 10

10 H_CLKIN1 K5 L0_CLKIN_L1 L0_CLKOUT_L1 Y3 H_CLKON1 10
10 H_CLKIP0 J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 H_CLKOP0 10
10 H_CLKIN0 J2 L0_CLKIN_L0 L0_CLKOUT_L0 W1 H_CLKON0 10
+1.2V_HT
R52 2 1 51_0402_1% P3 T5
R51 L0_CTLIN_H1 L0_CTLOUT_H1
2 1 51_0402_1% P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5
H_CTLIP0 N1 R2 H_CTLOP0
B 10 H_CTLIP0 L0_CTLIN_H0 L0_CTLOUT_H0 H_CTLOP0 10 B
H_CTLIN0 P1 R3 H_CTLON0
10 H_CTLIN0 L0_CTLIN_L0 L0_CTLOUT_L0 H_CTLON0 10
FOX_PZ63823-284S-41F

Athlon 64 S1
Processor Socket
AMD : 49.9 1%
ATI : 51 1%

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 4 of 46
5 4 3 2 1
 A B C D E

Processor DDR2 Memory Interface

9 DDR_B_D[63..0]
JP27C
DDR_A_D[63..0] 8
+1.8V DDR_B_D63 AD11 AA12 DDR_A_D63
DDR_B_D62 MB_DATA63 MA_DATA63 DDR_A_D62
AF11 MB_DATA62 MA_DATA62 AB12
DDR_B_D61 AF14 AA14 DDR_A_D61
MB_DATA61 MA_DATA61
2 DDR_B_D60 AE14 MB_DATA60 MA_DATA60 AB14 DDR_A_D60
R91 DDR_B_D59 Y11 W11 DDR_A_D59
1K_0402_1% DDR_B_D58 MB_DATA59 MA_DATA59 DDR_A_D58
AB11 MB_DATA58 MA_DATA58 Y12
4 +CPU_M_VREF DDR_B_D57 AC12 AD13 DDR_A_D57 4
DDR_B_D56 MB_DATA57 MA_DATA57 DDR_A_D56
AF13 AB13
1

DDR_B_D55 MB_DATA56 MA_DATA56 DDR_A_D55

AF15 MB_DATA55 MA_DATA55 AD15

1000P_0402_50V7K
0.1U_0402_16V4Z DDR_B_D54 AF16 AB15 DDR_A_D54
MB_DATA54 MA_DATA54
2

1 1 DDR_B_D53 AC18 AB17 DDR_A_D53

MB_DATA53 MA_DATA53
C151

C156
R90 DDR_B_D52 AF19 Y17 DDR_A_D52
1K_0402_1% DVT: Change to SE074102K80 DDR_B_D51 MB_DATA52 MA_DATA52 DDR_A_D51
AD14 MB_DATA51 MA_DATA51 Y14
DDR_B_D50 AC14 W14 DDR_A_D50
2 2 DDR_B_D49 MB_DATA50 MA_DATA50 DDR_A_D49
AE18 W16
1

DDR_B_D48 MB_DATA49 MA_DATA49 DDR_A_D48

AD18 MB_DATA48 MA_DATA48 AD17
PLACE CLOSE TO PROCESSOR DDR_B_D47 AD20 Y18 DDR_A_D47
DDR_B_D46 MB_DATA47 MA_DATA47 DDR_A_D46
WITHIN 1.5 INCH AC20 MB_DATA46 MA_DATA46 AD19
+CPU_M_VREF DDR_B_D45 AF23 AD21 DDR_A_D45
JP27B +0.9V DDR_B_D44 MB_DATA45 MA_DATA45 DDR_A_D44
AF24 MB_DATA44 MA_DATA44 AB21
DDR_A_CLK2 DDR_B_D43 AF20 AB18 DDR_A_D43
DDR_B_D42 MB_DATA43 MA_DATA43 DDR_A_D42
W17 M_VREF VTT1 D10 1 AE20 MB_DATA42 MA_DATA42 AA18
Need to link SD000006980 C10 DDR_B_D41 AD22 AA20 DDR_A_D41
TP2 VTT_SENSE VTT2 C148 DDR_B_D40 MB_DATA41 MA_DATA41 DDR_A_D40
Y10 VTT_SENSE VTT3 B10 AC22 MB_DATA40 MA_DATA40 Y20
AD10 1.5P_0402_50V9C DDR_B_D39 AE25 AA22 DDR_A_D39
VTT4 DDR_A_CLK#2 2 DDR_B_D38 MB_DATA39 MA_DATA39 DDR_A_D38
VTT5 W10 AD26 MB_DATA38 MA_DATA38 Y22
+1.8V R331 1 2 M_ZN AE10 AC10 DDR_B_D37 AA25 W21 DDR_A_D37
R335 2 M_ZN VTT6 MB_DATA37 MA_DATA37
1 39.2_0402_1% M_ZP AF10
M_ZP VTT7 AB10 DDR_A_CLK1 DDR_B_D36 AA26 MB_DATA36 MA_DATA36 W22 DDR_A_D36
39.2_0402_1% AA10 1 DDR_B_D35 AE24 AA21 DDR_A_D35
VTT8 DDR_B_D34 MB_DATA35 MA_DATA35 DDR_A_D34
VTT9 A10 AD24 MB_DATA34 MA_DATA34 AB22
C150 DDR_B_D33 AA23 AB24 DDR_A_D33
DDR_CS3_DIMMA# 1.5P_0402_50V9C MB_DATA33 MA_DATA33
V19 Y16 DDR_A_CLK2 DDR_B_D32 AA24 Y24 DDR_A_D32

DDRII Cmd/Ctrl//Clk
8 DDR_CS3_DIMMA# MA0_CS_L3 MA0_CLK_H2 DDR_A_CLK2 8 2 MB_DATA32 MA_DATA32
DDR_CS2_DIMMA# J22 AA16 DDR_A_CLK#2 DDR_A_CLK#1 DDR_B_D31 G24 H22 DDR_A_D31
8 DDR_CS2_DIMMA# MA0_CS_L2 MA0_CLK_L2 DDR_A_CLK#2 8 MB_DATA31 MA_DATA31
DDR_CS1_DIMMA# V22 E16 DDR_A_CLK1 DDR_B_D30 G23 H20 DDR_A_D30
8 DDR_CS1_DIMMA# MA0_CS_L1 MA0_CLK_H1 DDR_A_CLK1 8 MB_DATA30 MA_DATA30
DDR_CS0_DIMMA# T19 F16 DDR_A_CLK#1 DDR_B_D29 D26 E22 DDR_A_D29
8 DDR_CS0_DIMMA# MA0_CS_L0 MA0_CLK_L1 DDR_A_CLK#1 8 MB_DATA29 MA_DATA29
3 DDR_B_CLK2 DDR_B_D28 C26 E21 DDR_A_D28 3
DDR_CS3_DIMMB# DDR_B_CLK2 DDR_B_D27 MB_DATA28 MA_DATA28 DDR_A_D27
9 DDR_CS3_DIMMB# Y26 MB0_CS_L3 MB0_CLK_H2 AF18 DDR_B_CLK2 9 1 G26 MB_DATA27 MA_DATA27 J19
DDR_CS2_DIMMB# J24 AF17 DDR_B_CLK#2 DDR_B_D26 G25 H24 DDR_A_D26
9 DDR_CS2_DIMMB# MB0_CS_L2 MB0_CLK_L2 DDR_B_CLK#2 9 MB_DATA26 MA_DATA26
DDR_CS1_DIMMB# W24 A17 DDR_B_CLK1 C149 DDR_B_D25 E24 F22 DDR_A_D25
9 DDR_CS1_DIMMB# MB0_CS_L1 MB0_CLK_H1 DDR_B_CLK1 9 1.5P_0402_50V9C MB_DATA25 MA_DATA25
DDR_CS0_DIMMB# U23 A18 DDR_B_CLK#1 DDR_B_D24 E23 F20 DDR_A_D24
9 DDR_CS0_DIMMB# MB0_CS_L0 MB0_CLK_L1 DDR_B_CLK#1 9 2 MB_DATA24 MA_DATA24

DDRII Data
DDR_B_CLK#2 DDR_B_D23 C24 C23 DDR_A_D23
DDR_CKE1_DIMMB DDR_B_ODT1 DDR_B_D22 MB_DATA23 MA_DATA23 DDR_A_D22
9 DDR_CKE1_DIMMB H26 MB_CKE1 MB0_ODT1 W23 DDR_B_ODT1 9 B24 MB_DATA22 MA_DATA22 B22
DDR_CKE0_DIMMB J23 W26 DDR_B_ODT0 DDR_B_CLK1 DDR_B_D21 C20 F18 DDR_A_D21
9 DDR_CKE0_DIMMB MB_CKE0 MB0_ODT0 DDR_B_ODT0 9 MB_DATA21 MA_DATA21
DDR_CKE1_DIMMA J20 V20 DDR_A_ODT1 1 DDR_B_D20 B20 E18 DDR_A_D20
8 DDR_CKE1_DIMMA MA_CKE1 MA0_ODT1 DDR_A_ODT1 8 MB_DATA20 MA_DATA20
DDR_CKE0_DIMMA J21 U19 DDR_A_ODT0 DDR_B_D19 C25 E20 DDR_A_D19
8 DDR_CKE0_DIMMA MA_CKE0 MA0_ODT0 DDR_A_ODT0 8 MB_DATA19 MA_DATA19
C568 DDR_B_D18 D24 D22 DDR_A_D18
8 DDR_A_MA[15..0] DDR_B_MA[15..0] 9 1.5P_0402_50V9C MB_DATA18 MA_DATA18
DDR_A_MA15 K19 J25 DDR_B_MA15 DDR_B_D17 A21 C19 DDR_A_D17
DDR_A_MA14 MA_ADD15 MB_ADD15 DDR_B_MA14 DDR_B_CLK#1 2 DDR_B_D16 MB_DATA17 MA_DATA17 DDR_A_D16
K20 MA_ADD14 MB_ADD14 J26 D20 MB_DATA16 MA_DATA16 G18
DDR_A_MA13 V24 W25 DDR_B_MA13 DDR_B_D15 D18 G17 DDR_A_D15
DDR_A_MA12 MA_ADD13 MB_ADD13 DDR_B_MA12 DDR_B_D14 MB_DATA15 MA_DATA15 DDR_A_D14
K24 MA_ADD12 MB_ADD12 L23 C18 MB_DATA14 MA_DATA14 C17
DDR_A_MA11 L20 L25 DDR_B_MA11 DDR_B_D13 D14 F14 DDR_A_D13
DDR_A_MA10 MA_ADD11 MB_ADD11 DDR_B_MA10 DDR_B_D12 MB_DATA13 MA_DATA13 DDR_A_D12
R19 MA_ADD10 MB_ADD10 U25 C14 MB_DATA12 MA_DATA12 E14
DDR_A_MA9 L19 L24 DDR_B_MA9 DDR_B_D11 A20 H17 DDR_A_D11
DDR_A_MA8 MA_ADD9 MB_ADD9 DDR_B_MA8 DDR_B_D10 MB_DATA11 MA_DATA11 DDR_A_D10
L22 MA_ADD8 MB_ADD8 M26 A19 MB_DATA10 MA_DATA10 E17
DDR_A_MA7 L21 L26 DDR_B_MA7 DDR_B_D9 A16 E15 DDR_A_D9
DDR_A_MA6 MA_ADD7 MB_ADD7 DDR_B_MA6 DDR_B_D8 MB_DATA9 MA_DATA9 DDR_A_D8
M19 MA_ADD6 MB_ADD6 N23 A15 MB_DATA8 MA_DATA8 H15
DDR_A_MA5 M20 N24 DDR_B_MA5 DDR_B_D7 A13 E13 DDR_A_D7
DDR_A_MA4 MA_ADD5 MB_ADD5 DDR_B_MA4 DDR_B_D6 MB_DATA7 MA_DATA7 DDR_A_D6
M24 MA_ADD4 MB_ADD4 N25 D12 MB_DATA6 MA_DATA6 C13
DDR_A_MA3 M22 N26 DDR_B_MA3 DDR_B_D5 E11 H12 DDR_A_D5
DDR_A_MA2 MA_ADD3 MB_ADD3 DDR_B_MA2 DDR_B_D4 MB_DATA5 MA_DATA5 DDR_A_D4
N22 MA_ADD2 MB_ADD2 P24 G11 MB_DATA4 MA_DATA4 H11
DDR_A_MA1 N21 P26 DDR_B_MA1 DDR_B_D3 B14 G14 DDR_A_D3
DDR_A_MA0 MA_ADD1 MB_ADD1 DDR_B_MA0 DDR_B_D2 MB_DATA3 MA_DATA3 DDR_A_D2
R21 MA_ADD0 MB_ADD0 T24 A14 MB_DATA2 MA_DATA2 H14
DDR_B_D1 A11 F12 DDR_A_D1
DDR_A_BS#2 MB_DATA1 MA_DATA1
8 DDR_A_BS#2 K22 MA_BANK2 MB_BANK2 K26 DDR_B_BS#2 DDR_B_BS#2 9
DDR_B_D0 C11 MB_DATA0 MA_DATA0 G12 DDR_A_D0
2 DDR_A_BS#1 2
8 DDR_A_BS#1 R20 MA_BANK1 MB_BANK1 T26 DDR_B_BS#1 DDR_B_BS#1 9 9 DDR_B_DM[7..0] DDR_A_DM[7..0] 8
DDR_A_BS#0 T22 U26 DDR_B_BS#0 DDR_B_DM7 AD12 Y13 DDR_A_DM7
8 DDR_A_BS#0 MA_BANK0 MB_BANK0 DDR_B_BS#0 9 MB_DM7 MA_DM7
DDR_B_DM6 AC16 AB16 DDR_A_DM6
DDR_A_RAS# MB_DM6 MA_DM6
8 DDR_A_RAS# T20 MA_RAS_L MB_RAS_L U24 DDR_B_RAS# DDR_B_RAS# 9
DDR_B_DM5 AE22 MB_DM5 MA_DM5 Y19 DDR_A_DM5
DDR_A_CAS# U20 V26 DDR_B_CAS# DDR_B_DM4 AB26 AC24 DDR_A_DM4
8 DDR_A_CAS# MA_CAS_L MB_CAS_L DDR_B_CAS# 9 MB_DM4 MA_DM4
DDR_A_WE# U21 U22 DDR_B_WE# DDR_B_DM3 E25 F24 DDR_A_DM3
8 DDR_A_WE# MA_WE_L MB_WE_L DDR_B_WE# 9 MB_DM3 MA_DM3
DDR_B_DM2 A22 E19 DDR_A_DM2
FOX_PZ63823-284S-41F DDR_B_DM1 MB_DM2 MA_DM2 DDR_A_DM1
B16 MB_DM1 MA_DM1 C15
Athlon 64 S1 DDR_B_DM0 A12 E12 DDR_A_DM0
Processor MB_DM0 MA_DM0
Socket DDR_B_DQS7 AF12 W12 DDR_A_DQS7
9 DDR_B_DQS7 MB_DQS_H7 MA_DQS_H7 DDR_A_DQS7 8
DDR_B_DQS#7 AE12 W13 DDR_A_DQS#7
9 DDR_B_DQS#7 MB_DQS_L7 MA_DQS_L7 DDR_A_DQS#7 8
DDR_B_DQS6 AE16 Y15 DDR_A_DQS6
9 DDR_B_DQS6 MB_DQS_H6 MA_DQS_H6 DDR_A_DQS6 8
DDR_B_DQS#6 AD16 W15 DDR_A_DQS#6
9 DDR_B_DQS#6 MB_DQS_L6 MA_DQS_L6 DDR_A_DQS#6 8
DDR_B_DQS5 AF21 AB19 DDR_A_DQS5
9 DDR_B_DQS5 MB_DQS_H5 MA_DQS_H5 DDR_A_DQS5 8
DDR_B_DQS#5 AF22 AB20 DDR_A_DQS#5
9 DDR_B_DQS#5 MB_DQS_L5 MA_DQS_L5 DDR_A_DQS#5 8
DDR_B_DQS4 AC25 AD23 DDR_A_DQS4
9 DDR_B_DQS4 MB_DQS_H4 MA_DQS_H4 DDR_A_DQS4 8
DDR_B_DQS#4 AC26 AC23 DDR_A_DQS#4
9 DDR_B_DQS#4 MB_DQS_L4 MA_DQS_L4 DDR_A_DQS#4 8
DDR_B_DQS3 F26 G22 DDR_A_DQS3
9 DDR_B_DQS3 MB_DQS_H3 MA_DQS_H3 DDR_A_DQS3 8
DDR_B_DQS#3 E26 G21 DDR_A_DQS#3
9 DDR_B_DQS#3 MB_DQS_L3 MA_DQS_L3 DDR_A_DQS#3 8
DDR_B_DQS2 A24 C22 DDR_A_DQS2
9 DDR_B_DQS2 MB_DQS_H2 MA_DQS_H2 DDR_A_DQS2 8
DDR_B_DQS#2 A23 C21 DDR_A_DQS#2
9 DDR_B_DQS#2 MB_DQS_L2 MA_DQS_L2 DDR_A_DQS#2 8
DDR_B_DQS1 D16 G16 DDR_A_DQS1
9 DDR_B_DQS1 MB_DQS_H1 MA_DQS_H1 DDR_A_DQS1 8
DDR_B_DQS#1 C16 G15 DDR_A_DQS#1
9 DDR_B_DQS#1 MB_DQS_L1 MA_DQS_L1 DDR_A_DQS#1 8
DDR_B_DQS0 C12 G13 DDR_A_DQS0
9 DDR_B_DQS0 MB_DQS_H0 MA_DQS_H0 DDR_A_DQS0 8
DDR_B_DQS#0 B12 H13 DDR_A_DQS#0
9 DDR_B_DQS#0 MB_DQS_L0 MA_DQS_L0 DDR_A_DQS#0 8

FOX_PZ63823-284S-41F
1 1
Athlon 64 S1
Processor Socket

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 5 of 46
A B C D E
 5 4 3 2 1

+2.5VDDA
VDDA=300mA
L16
+2.5VS 1 2 3300P_0402_50V7K DVT:Change to 47k
A:Need to re-Link "SGN00000200" 1 FBM_L11_201209_300L_0805
1 1 1 CH751H-40PT_SOD323-2
C119 + 2 1 2 1
+1.8V PCIRST# 16,22
100U_D2_10VM 4.7U_0805_10V4Z C132 C131 C139 R37 47K_0402_5% D46
H_PWRGD 0.22U_0603_16V4Z 1 2
16 H_PWRGD

2
2 2 2 2

B
R38 300_0402_5% 1 R35
2 MAINPWON 37,38,40

1
JP27D Q10 0_0402_5%

E
R87 F8 AF6 CPU_THERMTRIP#_R 3 1 1 R36
2
VDDA2 THERMTRIP_L H_THERMTRIP# 16

C
680_0402_5% F9 AC7 CPU_PROCHOT#_1.8 0_0402_5%
VDDA1 PROCHOT_L MMBT3904_SOT23-3
D @ D
LDT_RST# B7

2
H_PWRGD RESET_L
A:PA_IXP600AD12 A7 PWROK
LDT_STOP# F10 LDTSTOP_L
VID5 A5 VID5 43
LDT_STOP# 2 1 CPU_SIC AF4 C6
11,16 LDT_STOP# SIC VID4 VID4 43
R332 300_0402_5% AF5 A6
SID VID3 VID3 43
2

VID2 A4 VID2 43
R89 +1.2V_HT R53 1 2 44.2_0402_1% CPU_HTREF1 P6 C5
HTREF1 VID1 VID1 43
680_0402_5% R54 1 2 44.2_0402_1% CPU_HTREF0 R6 B5
HTREF0 VID0 VID0 43
R53&R54 place them to CPU within 1" AC6 CPU_PRESENT# +1.8V 2 1
1

CPU_PRESENT_L R41 @ 10K_0402_5%

A:PA_IXP600AD12 43 CPU_VCC_SENSE F6 VDD_FB_H
E6 A3 TP15 1 2
43 CPU_VSS_SENSE VDD_FB_L PSI_L

2
B
R43 300_0402_5%
W9 Q11
41 VDDIOFB_H VDDIO_FB_H PSI# 43

E
LDT_RST# TP1 Y9 CPU_PROCHOT#_1.8 3 11 R42
2
16 LDT_RST# VDDIO_FB_L H_PROCHOT# 16

C
0_0402_5%
2

13 CPUCLK0_H 1 2 3900P_0402_50V7K CPU_CLKIN_SC_P A9 CLKIN_H

@ MMBT3904_SOT23-3 @
R44 C547 CPU_CLKIN_SC_N A8 CLKIN_L

1
680_0402_5%
CPU_DBRDY G10 E10 CPU_DBREQ#
R333 DBRDY DBREQ_L
1

A:PA_IXP600AD12 169_0402_1% CPU_TMS AA9

CPU_TCK TMS CPU_TDO
AC9 AE9

2
CPU_TRST# TCK TDO
13 CPUCLK0_L 1 2 AD9 TRST_L
C545 3900P_0402_50V7K CPU_TDI AF9 R88
TDI 80.6_0402_1%
CPU_TEST25_H_BYPASSCLK_H E9 C9 CPU_TEST29_H_FBCLKOUT_P 1 2
C CPU_TEST25_L_BYPASSCLK_L TEST25_H TEST29_H CPU_TEST29_L_FBCLKOUT_N C
E8 TEST25_L TEST29_L C8
CPU_TEST19_PLLTEST0 G9
+1.8V CPU_TEST18_PLLTEST1 TEST19
H10 TEST18 ROUTE AS 80 Ohm DIFFERENTIAL PAIR

MISC
AA7 TEST13 PLACE IT CLOSE TO CPU WITHIN 1"
2 1 CPU_TEST25_H_BYPASSCLK_H C2
R86 510_0402_5% TP4 TEST9 TP8
D7 TEST17 TEST24 AE7
TP5 E7 AD7 TP9 +1.8V
CPU_TEST25_L_BYPASSCLK_L TP6 TEST16 TEST23 TP10
2 1 F7 TEST15 TEST22 AE8
R48 510_0402_5% TP3 C7 AB8 CPU_TEST21_SCANEN
CPU_TEST19_PLLTEST0 TP11 TEST14 TEST21 TP7 VID1
2 1 AC8 TEST12 TEST20 AF7 1 2
R49 300_0402_5% R47 300_0402_5%
2 1 CPU_TEST18_PLLTEST1 C3 J7 CPU_PRESENT# 1 2
R50 300_0402_5% TEST7 TEST28_H R56 1K_0402_5%
AA6 TEST6 TEST28_L H8
THERMDC_CPU W7 AF8 CPU_TEST26_BURNIN# 1 2
THERMDA_CPU THERMDC TEST27 CPU_TEST26_BURNIN# R57 300_0402_5%
W8 THERMDA TEST26 AE6
Y6 TEST3 TEST10 K8
AB6 TEST2 TEST8 C4
CPU_TEST21_SCANEN 1 2
P20 H16 R55 300_0402_5%
Thermal Sensor P19
RSVD0
RSVD1
RSVD8
RSVD9 B18
N20
GMT G781P8F B: Change to GMT G781P8F from DVT. N19
RSVD2
RSVD3 RSVD10 B3
RSVD11 C1
+3VS H6
RSVD12
1 RSVD13 G6
C111 U6 D5
THERMDA_CPU 2 RSVD14
DXP+ VCC 1
2200P_0402_50V7K R24
B 2 THERMDC_CPU 3 RSVD15 B
DXN- ALERT# 6 1 RSVD16 W18
R26 RSVD4 RSVD17 R23
8 4 C105 R25 AA8
15,31 EC_SMB_CK2 SCLK THERM# RSVD5 RSVD18
0.1U_0402_16V4Z P22 H18
2 RSVD6 RSVD19
15,31 EC_SMB_DA2 7 SDATA GND 5 R22 RSVD7 RSVD20 H19

G781P8F_MSOP8 +1.8V FOX_PZ63823-284S-41F

@ 220_0402_5% R77

@ 220_0402_5% R76

@ 220_0402_5% R75

@ 220_0402_5% R74

@ 220_0402_5% R73
HDT Connector
1

1
2

2
CPU_DBREQ#
CPU_DBRDY TP20
CPU_TCK
CPU_TMS +3VS
CPU_TDI
CPU_TRST#

14
CPU_TDO TP18 U20D
12 LDT_RST#

P
TP19 HDT_RST# A
11 O
B 13 SB_PWRGD 16,31

G
A NOTE: HDT TERMINATION IS REQUIRED A
SN74LVC08APW_TSSOP14
FOR REV. Ax SILICON ONLY.

7
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 6 of 46
5 4 3 2 1
 5 4 3 2 1

JP27F
AA4 VSS1 VSS66 J6
+CPU_CORE +CPU_CORE AA11 J8
JP27E VSS2 VSS67
AA13 J10
VDD(+CPU_CORE) decoupling. AC4
AD2
VDD1
VDD2
VDD43
VDD44
V12
V14
AA15
AA17
VSS3
VSS4
VSS5
VSS68
VSS69
VSS70
J12
J14
G4 VDD3 VDD45 W4 AA19 VSS6 VSS71 J16
H2 VDD4 VDD46 Y2 AB2 VSS7 VSS72 J18
+CPU_CORE J9 J15 AB7 K2
VDD5 VDD47 VSS8 VSS73
J11 VDD6 VDD48 K16 AB9 VSS9 VSS74 K7
J13 VDD7 VDD49 L15 AB23 VSS10 VSS75 K9
K6 VDD8 VDD50 M16 AB25 VSS11 VSS76 K11
1 1 1 1 1 1 K10 VDD9 VDD51 P16 AC11 VSS12 VSS77 K13
D 45level K12 T16 AC13 K15 D
+ C544 + C576 + C560 + C602 + C785 + C786 VDD10 VDD52 VSS13 VSS78
K14 VDD11 VDD53 U15 AC15 VSS14 VSS79 K17
45@ 820U_E9_2_5V_M_R7 330U_D2_2.5VY_R9M 330U_D2_2.5VY_R9M 330U_D2_2.5VY_R9M 330U_D2_2.5VY_R9M 330U_D2_2.5VY_R9M L4 V16 AC17 L6
VDD12 VDD54 +1.8V VSS15 VSS80
@ @ L7 AC19 L8
2 2 2 2 2 2 VDD13 VSS16 VSS81
L9 VDD14 AC21 VSS17 VSS82 L10
L11 VDD15 VDDIO1 H25 AD6 VSS18 VSS83 L12
L13 J17 AD8 L14
Near CPU Socket M2
VDD16
VDD17
VDDIO2
VDDIO3 K18 AD25
VSS19
VSS20
VSS84
VSS85 L16
M6 VDD18 VDDIO4 K21 AE11 VSS21 VSS86 L18
M8 VDD19 VDDIO5 K23 AE13 VSS22 VSS87 M7
+CPU_CORE

Power
M10 VDD20 VDDIO6 K25 AE15 VSS23 VSS88 M9
N7 VDD21 VDDIO7 L17 AE17 VSS24 VSS89 M11
N9 VDD22 VDDIO8 M18 AE19 VSS25 VSS90 M17
N11 VDD23 VDDIO9 M21 AE21 VSS26 VSS91 N4
1 1 1 1 1 1 1 1 1 P8 VDD24 VDDIO10 M23 AE23 VSS27 VSS92 N8
C123 C146 C125 C144 C122 C124 C145 C126 C142 P10 M25 B4 N10
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M VDD25 VDDIO11 VSS28 VSS93
R4 VDD26 VDDIO12 N17 B6 VSS29 VSS94 N16
R7 VDD27 VDDIO13 P18 B8 VSS30 VSS95 N18
2 2 2 2 2 2 2 2 2

Ground
R9 VDD28 VDDIO14 P21 B9 VSS31 VSS96 P2
R11 VDD29 VDDIO15 P23 B11 VSS32 VSS97 P7
T2 VDD30 VDDIO16 P25 B13 VSS33 VSS98 P9
+CPU_CORE +CPU_CORE +CPU_CORE T6 R17 B15 P11
VDD31 VDDIO17 VSS34 VSS99
T8 VDD32 VDDIO18 T18 B17 VSS35 VSS100 P17
T10 VDD33 VDDIO19 T21 B19 VSS36 VSS101 R8
T12 VDD34 VDDIO20 T23 B21 VSS37 VSS102 R10
1 1 1 1 T14 VDD35 VDDIO21 T25 B23 VSS38 VSS103 R16
C143 C138 C129 C136 U7 U17 B25 R18
0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.01U_0402_25V4Z 180P_0402_50V8J VDD36 VDDIO22 VSS39 VSS104
U9 VDD37 VDDIO23 V18 D6 VSS40 VSS105 T7
U11 VDD38 VDDIO24 V21 D8 VSS41 VSS106 T9
C 2 2 2 2 C
U13 V23 D9 T11
Under CPU Socket V6
VDD39
VDD40
VDDIO25
VDDIO26 V25 D11
VSS42
VSS43
VSS107
VSS108 T13
V8 VDD41 VDDIO27 Y25 D13 VSS44 VSS109 T15
V10 VDD42 D15 VSS45 VSS110 T17
D17 VSS46 VSS111 U4
D19 VSS47 VSS112 U6
FOX_PZ63823-284S-41F D21 VSS48 VSS113 U8
D23 U10
VDDIO decoupling. Athlon 64 S1
Processor Socket
D25
E4
VSS49
VSS50
VSS51
VSS114
VSS115
VSS116
U12
U14
F2 VSS52 VSS117 U16
F11 VSS53 VSS118 U18
F13 VSS54 VSS119 V2
+1.8V F15 V7
+1.8V VSS55 VSS120
F17 VSS56 VSS121 V9
F19 VSS57 VSS122 V11
F21 VSS58 VSS123 V13
1 1 1 1 F23 VSS59 VSS124 V15
C153 C152 C155 C154 F25 V17
22U_0805_6.3V6M 22U_0805_6.3V6M 0.22U_0603_16V4Z 0.22U_0603_16V4Z VSS60 VSS125
H7 VSS61 VSS126 W6
H9 VSS62 VSS127 Y21
2 2 2 2
H21 VSS63 VSS128 Y23
H23 VSS64 VSS129 N6
J4 VSS65
+0.9V FOX_PZ63823-284S-41F
Under CPU Socket Near Power Supply
B
VTT decoupling. 1
+ C577
Athlon 64 S1
Processor Socket
B

220U_Y_4VM
2
Between CPU Socket and DIMM
+1.8V

+0.9V
1 1 1 1
C163 C177 C164 C172
0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z
2 2 2 2 1 1 1 1 1 1 1 1
C556 C555 C548 C549 C559 C554 C552 C550
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_50V7K 1000P_0402_50V7K 180P_0402_50V8J 180P_0402_50V8J

180PF Qt'y follow the distance between 2 2 2 2 2 2 2 2

+1.8V +1.8V CPU socket and DIMM0. <2.5inch>

1 1 1 1 1 1
Near CPU Socket Right side.
C159 C160 C157 C158 C165 C176 +0.9V DVT: Change to SE074102K80
0.01U_0402_25V4Z 0.01U_0402_25V4Z 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2
1 1 1 1 1 1 1 1
C140 C137 C133 C134 C130 C127 C147 C128
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_50V7K 1000P_0402_50V7K 180P_0402_50V8J 180P_0402_50V8J
+1.8V
2 2 2 2 2 2 2 2
A A

1
1 1 1 1
+ C652 Near CPU Socket Left side.
C183 C182 C162 C161 220U_Y_4VM
4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z
2 2 2 2 2 @ Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 7 of 46
5 4 3 2 1
 5 4 3 2 1

+1.8V +DIMM_VREF JP31 +1.8V +0.9V +1.8V

1 2 RP6
VREF VSS DDR_A_D4 DDR_A_D[0..63] DDR_A_MA7
3 VSS DQ4 4 DDR_A_D[0..63] 5 8 1 1 2
DDR_A_D0 5 6 DDR_A_D5 DDR_A_MA11 7 2 C238 0.1U_0402_16V4Z
DDR_A_D1 DQ0 DQ5 DDR_A_DM[0..7] DDR_A_MA4
7 DQ1 VSS 8 DDR_A_DM[0..7] 5 6 3 1 2
9 10 DDR_A_DM0 DDR_A_MA6 5 4 C204 0.1U_0402_16V4Z
DDR_A_DQS#0 VSS DM0 DDR_A_DQS[0..7]
11 DQS0# VSS 12 DDR_A_DQS[0..7] 5
DDR_A_DQS0 13 14 DDR_A_D6 47_0804_8P4R_5%
DQS0 DQ6 DDR_A_D7 DDR_A_MA[0..15] RP4
15 VSS DQ7 16 DDR_A_MA[0..15] 5
DDR_A_D2 17 18 B: Swap. DDR_CS2_DIMMA# 8 1 1 2
DDR_A_D3 DQ2 VSS DDR_A_D12 DDR_A_DQS#[0..7] DDR_CKE0_DIMMA C290 0.1U_0402_16V4Z
19 DQ3 DQ12 20 DDR_A_DQS#[0..7] 5 7 2
21 22 DDR_A_D13 DDR_A_MA12 6 3 1 2
DDR_A_D8 VSS DQ13 DDR_A_BS#2 C655 0.1U_0402_16V4Z
23 DQ8 VSS 24 5 4
D DDR_A_D9 25 26 DDR_A_DM1 D
DQ9 DM1 47_0804_8P4R_5%
27 VSS VSS 28
DDR_A_DQS#1 29 30 RP7
DQS1# CK0 DDR_A_CLK1 5
DDR_A_DQS1 31 32 DDR_A_MA0 8 1 1 2
DQS1 CK0# DDR_A_CLK#1 5
33 34 DDR_A_MA2 7 2 C274 0.1U_0402_16V4Z
DDR_A_D10 VSS VSS DDR_A_D14 DDR_A_RAS#
35 DQ10 DQ14 36 6 3 1 2
DDR_A_D11 37 38 DDR_A_D15 +DIMM_VREF +1.8V DDR_A_BS#1 5 4 C654 0.1U_0402_16V4Z
DQ11 DQ15 DVT: Change to SE074102K80
39 VSS VSS 40
47_0804_8P4R_5%

2
RP3

0.1U_0402_16V4Z
1000P_0402_50V7K
41 42 1 1 R148 B: Swap. 8 1 1 2
VSS VSS

C249
DDR_A_D16 43 44 DDR_A_D20 1K_0402_1% DDR_A_MA9 7 2 C196 0.1U_0402_16V4Z
DQ16 DQ20

C243
DDR_A_D17 45 46 DDR_A_D21 DDR_A_MA8 6 3 1 2
DQ17 DQ21 DDR_A_MA5 C244 0.1U_0402_16V4Z
47 48 5 4

1
DDR_A_DQS#2 VSS VSS 2 2
49 DQS2# NC 50
DDR_A_DQS2 51 52 DDR_A_DM2 47_0804_8P4R_5%
DQS2 DM2 RP21
53 VSS VSS 54

2
DDR_A_D18 55 56 DDR_A_D22 DDR_A_MA3 8 1 1 2
DDR_A_D19 DQ18 DQ22 DDR_A_D23 R132 DDR_A_MA1 C254 0.1U_0402_16V4Z
57 DQ19 DQ23 58 7 2
59 60 1K_0402_1% DDR_A_MA10 6 3 1 2
DDR_A_D24 VSS VSS DDR_A_D28 DDR_A_BS#0 C199 0.1U_0402_16V4Z
61 DQ24 DQ28 62 5 4
DDR_A_D25 63 64 DDR_A_D29

1
DQ25 DQ29 47_0804_8P4R_5%
65 VSS VSS 66
DDR_A_DM3 67 68 DDR_A_DQS#3 RP20
DM3 DQS3# DDR_A_DQS3 DDR_A_WE#
69 NC DQS3 70 8 1 1 2
71 72 DDR_A_CAS# 7 2 C232 0.1U_0402_16V4Z
DDR_A_D26 VSS VSS DDR_A_D30 DDR_CS1_DIMMA#
73 DQ26 DQ30 74 6 3 1 2
DDR_A_D27 75 76 DDR_A_D31 DDR_A_ODT1 5 4 C213 0.1U_0402_16V4Z
DQ27 DQ31
77 VSS VSS 78
C DDR_CKE0_DIMMA 79 80 DDR_CKE1_DIMMA 47_0804_8P4R_5% C
5 DDR_CKE0_DIMMA CKE0 NC/CKE1 DDR_CKE1_DIMMA 5
81 82 RP5
DDR_CS2_DIMMA# VDD VDD DDR_A_MA15 DDR_CS0_DIMMA#
5 DDR_CS2_DIMMA# 83 NC NC/A15 84 8 1 1 2
DDR_A_BS#2 85 86 DDR_A_MA14 DDR_A_ODT0 7 2 C185 0.1U_0402_16V4Z
5 DDR_A_BS#2 BA2 NC/A14
87 88 DDR_A_MA13 6 3 1 2
DDR_A_MA12 VDD VDD DDR_A_MA11 DDR_CS3_DIMMA# C218 0.1U_0402_16V4Z
89 A12 A11 90 5 4
DDR_A_MA9 91 92 DDR_A_MA7
DDR_A_MA8 A9 A7 DDR_A_MA6 47_0804_8P4R_5%
93 A8 A6 94
95 96 RP8
DDR_A_MA5 VDD VDD DDR_A_MA4 DDR_CKE1_DIMMA
97 A5 A4 98 8 1 1 2
DDR_A_MA3 99 100 DDR_A_MA2 DDR_A_MA14 7 2 C293 0.1U_0402_16V4Z
DDR_A_MA1 A3 A2 DDR_A_MA0 DDR_A_MA15
101 A1 A0 102 6 3 1 2
103 104 5 4 C258 0.1U_0402_16V4Z
DDR_A_MA10 VDD VDD DDR_A_BS#1
105 A10/AP BA1 106 DDR_A_BS#1 5
DDR_A_BS#0 107 108 DDR_A_RAS# 47_0804_8P4R_5%
5 DDR_A_BS#0 BA0 RAS# DDR_A_RAS# 5
DDR_A_WE# 109 110 DDR_CS0_DIMMA#
5 DDR_A_WE# WE# S0# DDR_CS0_DIMMA# 5
111 VDD VDD 112
DDR_A_CAS# 113 114 DDR_A_ODT0
5 DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 5
DDR_CS1_DIMMA# 115 116 DDR_A_MA13
5 DDR_CS1_DIMMA# NC/S1# NC/A13
117 VDD VDD 118
DDR_A_ODT1 119 120 DDR_CS3_DIMMA#
5 DDR_A_ODT1 NC/ODT1 NC DDR_CS3_DIMMA# 5
121 VSS VSS 122
DDR_A_D32 123 124 DDR_A_D36
DDR_A_D33 DQ32 DQ36 DDR_A_D37
125 DQ33 DQ37 126
127 VSS VSS 128
DDR_A_DQS#4 129 130 DDR_A_DM4
DDR_A_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_A_D38
DDR_A_D34 VSS DQ38 DDR_A_D39
135 DQ34 DQ39 136
B DDR_A_D35 B
137 DQ35 VSS 138
139 140 DDR_A_D44
DDR_A_D45 VSS DQ44 DDR_A_D40
141 DQ40 DQ45 142
DDR_A_D41 143 144
DQ41 VSS DDR_A_DQS#5
145 VSS DQS5# 146
DDR_A_DM5 147 148 DDR_A_DQS5
DM5 DQS5
149 VSS VSS 150
DDR_A_D42 151 152 DDR_A_D46
DDR_A_D43 DQ42 DQ46 DDR_A_D47
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_A_D48 157 158 DDR_A_D52
DDR_A_D49 DQ48 DQ52 DDR_A_D53
159 DQ49 DQ53 160
161 VSS VSS 162
163 NC,TEST CK1 164 DDR_A_CLK2 5
165 VSS CK1# 166 DDR_A_CLK#2 5
DDR_A_DQS#6 167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 DQS6 DM6 170
171 VSS VSS 172
DDR_A_D50 173 174 DDR_A_D54
DDR_A_D51 DQ50 DQ54 DDR_A_D55
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_A_D56 179 180 DDR_A_D60
DDR_A_D57 DQ56 DQ60 DDR_A_D61
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_A_DM7 185 186 DDR_A_DQS#7
DM7 DQS7# DDR_A_DQS7
187 VSS DQS7 188
DDR_A_D58 189 190
DDR_A_D59 DQ58 VSS DDR_A_D62
191 192
A
9,13,17,24,29 SMB_CK_DAT0
193
195
DQ59
VSS
DQ62
DQ63 194
196
DDR_A_D63 DIMM0 RVS H:5.2mm (BOT) A
SDA VSS R121 2
9,13,17,24,29 SMB_CK_CLK0 197 SCL SAO 198 1 0_0402_5%
199 200 R123 2 1 0_0402_5%
+3VS VDDSPD SA1
1
C237 PTI_A5652D-A0G16-P
0.1U_0402_16V4Z
2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 8 of 46
5 4 3 2 1
 5 4 3 2 1

+DIMM_VREF +1.8V +0.9V +1.8V

JP33 +1.8V RP23
1 2 DDR_B_D[0..63] DDR_B_RAS# 8 1 2 1
VREF VSS DDR_B_D4 DDR_B_D[0..63] 5 DDR_B_BS#1 C246 0.1U_0402_16V4Z
3 VSS DQ4 4 7 2
DDR_B_D0 5 6 DDR_B_D5 DDR_B_DM[0..7] DDR_B_MA0 6 3 1 2
DQ0 DQ5 DDR_B_DM[0..7] 5
DDR_B_D1 7 8 DDR_B_MA2 5 4 C245 0.1U_0402_16V4Z
DQ1 VSS

1000P_0402_50V7K
1 9 10 DDR_B_DM0 DDR_B_DQS[0..7]
DDR_B_DQS#0 VSS DM0 DDR_B_DQS[0..7] 5 47_0804_8P4R_5%
11 DQS0# VSS 12
DDR_B_MA[0..15]
C203
DDR_B_DQS0 13 14 DDR_B_D6 DDR_B_MA[0..15] 5
DQS0 DQ6 DDR_B_D7 RP13
15 VSS DQ7 16
2 DDR_B_D2 DDR_B_DQS#[0..7] DDR_B_MA4
17 DQ2 VSS 18 DDR_B_DQS#[0..7] 5 8 1 2 1
DDR_B_D3 19 20 DDR_B_D12 DDR_B_MA6 7 2 C261 0.1U_0402_16V4Z
DQ3 DQ12 DDR_B_D13 DDR_B_MA7
21 VSS DQ13 22 6 3 1 2
D DDR_B_D8 23 24 DDR_B_MA11 5 4 C267 0.1U_0402_16V4Z D
DDR_B_D9 DQ8 VSS DDR_B_DM1
25 DQ9 DM1 26
27 28 47_0804_8P4R_5%
DVT: Change to SE074102K80 DDR_B_DQS#1 VSS VSS
29 DQS1# CK0 30 DDR_B_CLK1 5
DDR_B_DQS1 31 32 RP10
DQS1 CK0# DDR_B_CLK#1 5
33 VSS VSS 34 8 1 2 1
DDR_B_D10 35 36 DDR_B_D14 DDR_CKE0_DIMMB 7 2 C257 0.1U_0402_16V4Z
DDR_B_D11 DQ10 DQ14 DDR_B_D15 DDR_CS2_DIMMB#
37 DQ11 DQ15 38 6 3 1 2
39 40 DDR_B_BS#2 5 4 C268 0.1U_0402_16V4Z
VSS VSS
47_0804_8P4R_5%
41 VSS VSS 42
DDR_B_D16 43 44 DDR_B_D20 RP9
DDR_B_D17 DQ16 DQ20 DDR_B_D21 DDR_B_MA9
45 DQ17 DQ21 46 8 1 2 1
47 48 DDR_B_MA12 7 2 C277 0.1U_0402_16V4Z
DDR_B_DQS#2 VSS VSS DDR_B_MA8
49 DQS2# NC 50 6 3 1 2
DDR_B_DQS2 51 52 DDR_B_DM2 DDR_B_MA5 5 4 C695 0.1U_0402_16V4Z
DQS2 DM2
53 VSS VSS 54
DDR_B_D18 55 56 DDR_B_D22 47_0804_8P4R_5%
DDR_B_D19 DQ18 DQ22 DDR_B_D23
57 DQ19 DQ23 58
59 60 RP11
DDR_B_D24 VSS VSS DDR_B_D28 DDR_B_MA3
61 DQ24 DQ28 62 8 1 2 1
DDR_B_D25 63 64 DDR_B_D29 DDR_B_MA1 7 2 C222 0.1U_0402_16V4Z
DQ25 DQ29 DDR_B_MA10
65 VSS VSS 66 6 3 1 2
DDR_B_DM3 67 68 DDR_B_DQS#3 DDR_B_BS#0 5 4 C241 0.1U_0402_16V4Z
DM3 DQS3# DDR_B_DQS3
69 NC DQS3 70
71 72 47_0804_8P4R_5%
DDR_B_D26 VSS VSS DDR_B_D30
73 DQ26 DQ30 74
DDR_B_D27 75 76 DDR_B_D31 RP12
C
DQ27 DQ31 DDR_B_WE# C
77 VSS VSS 78 8 1 2 1
DDR_CKE0_DIMMB 79 80 DDR_CKE1_DIMMB DDR_B_CAS# 7 2 C229 0.1U_0402_16V4Z
5 DDR_CKE0_DIMMB CKE0 NC/CKE1 DDR_CKE1_DIMMB 5
81 82 DDR_B_ODT1 6 3 1 2
DDR_CS2_DIMMB# VDD VDD DDR_B_MA15 DDR_CS1_DIMMB# C273 0.1U_0402_16V4Z
5 DDR_CS2_DIMMB# 83 NC NC/A15 84 5 4
DDR_B_BS#2 85 86 DDR_B_MA14
5 DDR_B_BS#2 BA2 NC/A14
87 88 47_0804_8P4R_5%
DDR_B_MA12 VDD VDD DDR_B_MA11
89 A12 A11 90
DDR_B_MA9 91 92 DDR_B_MA7 RP22
DDR_B_MA8 A9 A7 DDR_B_MA6 DDR_CS3_DIMMB#
93 A8 A6 94 8 1 2 1
95 96 DDR_B_MA13 7 2 C658 0.1U_0402_16V4Z
DDR_B_MA5 VDD VDD DDR_B_MA4 DDR_B_ODT0
97 A5 A4 98 6 3 1 2
DDR_B_MA3 99 100 DDR_B_MA2 DDR_CS0_DIMMB# 5 4 C256 0.1U_0402_16V4Z
DDR_B_MA1 A3 A2 DDR_B_MA0
101 A1 A0 102
103 104 47_0804_8P4R_5%
DDR_B_MA10 VDD VDD DDR_B_BS#1
105 A10/AP BA1 106 DDR_B_BS#1 5
DDR_B_BS#0 107 108 DDR_B_RAS# RP14
5 DDR_B_BS#0 BA0 RAS# DDR_B_RAS# 5
DDR_B_WE# 109 110 DDR_CS0_DIMMB# 8 1 2 1
5 DDR_B_WE# WE# S0# DDR_CS0_DIMMB# 5
111 112 DDR_B_MA14 7 2 C215 0.1U_0402_16V4Z
DDR_B_CAS# VDD VDD DDR_B_ODT0 DDR_B_MA15
5 DDR_B_CAS# 113 CAS# ODT0 114 DDR_B_ODT0 5 6 3 1 2
DDR_CS1_DIMMB# 115 116 DDR_B_MA13 DDR_CKE1_DIMMB 5 4 C235 0.1U_0402_16V4Z
5 DDR_CS1_DIMMB# NC/S1# NC/A13
117 VDD VDD 118
DDR_B_ODT1 119 120 DDR_CS3_DIMMB# 47_0804_8P4R_5%
5 DDR_B_ODT1 NC/ODT1 NC DDR_CS3_DIMMB# 5
121 VSS VSS 122
DDR_B_D32 123 124 DDR_B_D36
DDR_B_D33 DQ32 DQ36 DDR_B_D37
125 DQ33 DQ37 126
127 VSS VSS 128
DDR_B_DQS#4 129 130 DDR_B_DM4
DDR_B_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_B_D38
B DDR_B_D34 VSS DQ38 DDR_B_D39 B
135 DQ34 DQ39 136
DDR_B_D35 137 138
DQ35 VSS DDR_B_D44
139 VSS DQ44 140
DDR_B_D40 141 142 DDR_B_D45
DDR_B_D41 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDR_B_DQS#5
DDR_B_DM5 VSS DQS5# DDR_B_DQS5
147 DM5 DQS5 148
149 VSS VSS 150
DDR_B_D42 151 152 DDR_B_D46
DDR_B_D43 DQ42 DQ46 DDR_B_D47
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_B_D48 157 158 DDR_B_D52
DDR_B_D49 DQ48 DQ52 DDR_B_D53
159 DQ49 DQ53 160
161 VSS VSS 162
163 NC,TEST CK1 164 DDR_B_CLK2 5
165 VSS CK1# 166 DDR_B_CLK#2 5
DDR_B_DQS#6 167 168
DDR_B_DQS6 DQS6# VSS DDR_B_DM6
169 DQS6 DM6 170
171 VSS VSS 172
DDR_B_D50 173 174 DDR_B_D54
DDR_B_D51 DQ50 DQ54 DDR_B_D55
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_B_D56 179 180 DDR_B_D60
DDR_B_D57 DQ56 DQ60 DDR_B_D61
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_B_DM7 185 186 DDR_B_DQS#7
DM7 DQS7# DDR_B_DQS7
187 VSS DQS7 188
DDR_B_D58 189 190
A
DDR_B_D59 191
193
DQ58
DQ59
VSS
DQ62 192
194
DDR_B_D62
DDR_B_D63
+3VS
DIMM1 RVS H:9.2mm (BOT) A
VSS DQ63
8,13,17,24,29 SMB_CK_DAT0 195 SDA VSS 196
8,13,17,24,29 SMB_CK_CLK0 197 198 R423 1 2 4.7K_0402_5%
SCL SAO
+3VS 199 VDDSPD SA1 200 2 1
1 R427 0_0402_5%

C207
0.1U_0402_16V4Z
P-TWO_A5692B-A0G16-P Security Classification Compal Secret Data Compal Electronics, Inc.
2 Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 9 of 46
5 4 3 2 1
 5 4 3 2 1

PCIE_GTX_C_MRX_P[0..15] PCIE_MTX_C_GRX_P[0..15]
15 PCIE_GTX_C_MRX_P[0..15] PCIE_MTX_C_GRX_P[0..15] 15
PCIE_GTX_C_MRX_N[0..15] PCIE_MTX_C_GRX_N[0..15]
15 PCIE_GTX_C_MRX_N[0..15] PCIE_MTX_C_GRX_N[0..15] 15

U5B

PCIE_GTX_C_MRX_P15 G5 PART 2 OF 5 J1 PCIE_MTX_GRX_P15 C99 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P15

PCIE_GTX_C_MRX_N15 GFX_RX0P GFX_TX0P PCIE_MTX_GRX_N15 C100 1
G4 GFX_RX0N GFX_TX0N H2 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N15
PCIE_GTX_C_MRX_P14 J8 K2 PCIE_MTX_GRX_P14 C98 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P14
PCIE_GTX_C_MRX_N14 GFX_RX1P GFX_TX1P PCIE_MTX_GRX_N14 C97
J7 GFX_RX1N GFX_TX1N K1 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N14
PCIE_GTX_C_MRX_P13 J4 K3 PCIE_MTX_GRX_P13 C96 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P13
PCIE_GTX_C_MRX_N13 GFX_RX2P GFX_TX2P PCIE_MTX_GRX_N13 C95 VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N13
D J5 GFX_RX2N GFX_TX2N L3 1 2 D
PCIE_GTX_C_MRX_P12 L8 L1 PCIE_MTX_GRX_P12 C94 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P12
PCIE_GTX_C_MRX_N12 GFX_RX3P GFX_TX3P PCIE_MTX_GRX_N12 C91
L7 GFX_RX3N GFX_TX3N L2 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N12
PCIE_GTX_C_MRX_P11 L4 N2 PCIE_MTX_GRX_P11 C90 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P11
PCIE_GTX_C_MRX_N11 GFX_RX4P GFX_TX4P PCIE_MTX_GRX_N11 C89 VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N11
L5 GFX_RX4N GFX_TX4N N1 1 2
PCIE_GTX_C_MRX_P10 M8 P2 PCIE_MTX_GRX_P10 C88 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P10
PCIE_GTX_C_MRX_N10 GFX_RX5P GFX_TX5P PCIE_MTX_GRX_N10 C84
M7 GFX_RX5N GFX_TX5N P1 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N10
PCIE_GTX_C_MRX_P9 M4 P3 PCIE_MTX_GRX_P9 C83 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P9
PCIE_GTX_C_MRX_N9 GFX_RX6P GFX_TX6P PCIE_MTX_GRX_N9 C82 VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N9
M5 GFX_RX6N GFX_TX6N R3 1 2
PCIE_GTX_C_MRX_P8 P8 R1 PCIE_MTX_GRX_P8 C81 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P8
GFX_RX7P GFX_TX7P

PCIE GFX I/F

PCIE_GTX_C_MRX_N8 P7 R2 PCIE_MTX_GRX_N8 C80 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N8
PCIE_GTX_C_MRX_P7 GFX_RX7N GFX_TX7N PCIE_MTX_GRX_P7 C79 1
P4 GFX_RX8P GFX_TX8P T2 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P7
PCIE_GTX_C_MRX_N7 P5 U1 PCIE_MTX_GRX_N7 C78 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N7
PCIE_GTX_C_MRX_P6 GFX_RX8N GFX_TX8N PCIE_MTX_GRX_P6 C77 1
R4 GFX_RX9P GFX_TX9P V2 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P6
PCIE_GTX_C_MRX_N6 R5 V1 PCIE_MTX_GRX_N6 C76 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N6
PCIE_GTX_C_MRX_P5 GFX_RX9N GFX_TX9N PCIE_MTX_GRX_P5 C74 1
R7 GFX_RX10P GFX_TX10P V3 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P5
PCIE_GTX_C_MRX_N5 R8 W3 PCIE_MTX_GRX_N5 C73 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N5
PCIE_GTX_C_MRX_P4 GFX_RX10N GFX_TX10N PCIE_MTX_GRX_P4 C72 1
U4 GFX_RX11P GFX_TX11P W1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P4
PCIE_GTX_C_MRX_N4 U5 W2 PCIE_MTX_GRX_N4 C71 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N4
PCIE_GTX_C_MRX_P3 GFX_RX11N GFX_TX11N PCIE_MTX_GRX_P3 C68 1
W4 GFX_RX12P GFX_TX12P Y2 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P3
PCIE_GTX_C_MRX_N3 W5 AA1 PCIE_MTX_GRX_N3 C64 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N3
PCIE_GTX_C_MRX_P2 GFX_RX12N GFX_TX12N PCIE_MTX_GRX_P2 C63 1
Y4 GFX_RX13P GFX_TX13P AA2 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P2
PCIE_GTX_C_MRX_N2 Y5 AB2 PCIE_MTX_GRX_N2 C60 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N2
PCIE_GTX_C_MRX_P1 GFX_RX13N GFX_TX13N PCIE_MTX_GRX_P1 C59 1
V9 GFX_RX14P GFX_TX14P AB1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P1
PCIE_GTX_C_MRX_N1 W9 AC1 PCIE_MTX_GRX_N1 C56 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N1
PCIE_GTX_C_MRX_P0 GFX_RX14N GFX_TX14N PCIE_MTX_GRX_P0 C46 1
AB7 GFX_RX15P GFX_TX15P AE3 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P0
PCIE_GTX_C_MRX_N0 AB6 AE4 PCIE_MTX_GRX_N0 C45 1 2VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_N0
GFX_RX15N GFX_TX15N

25 PCIE_MRX_C_LANTX_P2 Y7 GPP_RX2P GPP_TX2P AD4 PCIE_MTX_LANRX_P2 C53 1 2 0.1U_0402_16V7K

PCIE_MTX_C_LANRX_P2 25
C
25 PCIE_MRX_C_LANTX_N2 AA7 GPP_RX2N GPP_TX2N AE5 PCIE_MTX_LANRX_N2 C52 1 2 0.1U_0402_16V7K PCIE_MTX_C_LANRX_N2 25
C

24 PCIE_MRX_C_WLANTX_P3 AB9 GPP_RX3P GPP_TX3P AD5 PCIE_MTX_WLANRX_P3 C44 1 2 WLAN@ 0.1U_0402_16V7K PCIE_MTX_C_WLANRX_P3 24
24 PCIE_MRX_C_WLANTX_N3 AA9 GPP_RX3N PCIE I/F GPP GPP_TX3N AD6 PCIE_MTX_WLANRX_N3 C43 1 2 WLAN@ 0.1U_0402_16V7K PCIE_MTX_C_WLANRX_N3 24

16 SB_RX2P W11 AD8 SB_TX2P_C C48 1 2 0.1U_0402_16V7K

GPP_RX0P(SB_RX2P) GPP_TX0P(SB_TX2P) SB_TX2P 16
16 SB_RX2N W12 AE8 SB_TX2N_C C49 1 2 0.1U_0402_16V7K
GPP_RX0N(SB_RX2N) GPP_TX0N(SB_TX2N) SB_TX2N 16 H_CADOP[0..15] H_CADIP[0..15]
4 H_CADOP[0..15] H_CADIP[0..15] 4
H_CADON[0..15] H_CADIN[0..15]
4 H_CADON[0..15] H_CADIN[0..15] 4
16 SB_RX3P AA11 AD7 SB_TX3P_C C51 1 2 0.1U_0402_16V7K
GPP_RX1P(SB_RX3P) GPP_TX1P(SB_TX3P) SB_TX3P 16
16 SB_RX3N AB11 AE7 SB_TX3N_C C50 1 2 0.1U_0402_16V7K
GPP_RX1N(SB_RX3N) GPP_TX1N(SB_TX3N) SB_TX3N 16
U5A

H_CADOP15 R19 P21 H_CADIP15

SB_TX0P_C C40 HT_RXCAD15P HT_TXCAD15P
16 SB_RX0P W14 SB_RX0P SB_TX0P AE9 1 2 0.1U_0402_16V7K SB_TX0P 16
H_CADON15 R18 HT_RXCAD15N PART 1 OF 5 HT_TXCAD15N P22 H_CADIN15
16 SB_RX0N W15 AD10 SB_TX0N_C C39 1 2 0.1U_0402_16V7K H_CADOP14 R21 P18 H_CADIP14
SB_RX0N SB_TX0N SB_TX0N 16 HT_RXCAD14P HT_TXCAD14P
H_CADON14 R22 P19 H_CADIN14
SB_TX1P_C C42 HT_RXCAD14N HT_TXCAD14N
16 SB_RX1P AB12 SB_RX1P PCIE I/F SB SB_TX1P AC8 1 2 0.1U_0402_16V7K SB_TX1P 16
H_CADOP13 U22 HT_RXCAD13P HT_TXCAD13P M22 H_CADIP13
16 SB_RX1N AA12 AD9 SB_TX1N_C C41 1 2 0.1U_0402_16V7K H_CADON13 U21 M21 H_CADIN13
SB_RX1N SB_TX1N SB_TX1N 16 HT_RXCAD13N HT_TXCAD13N
H_CADOP12 U18 M18 H_CADIP12
R22 562_0402_1% H_CADON12 HT_RXCAD12P HT_TXCAD12P H_CADIN12
AA14 PCE_ISET(NC) PCE_PCAL(PCE_CALRP) AD11 1 2 U19 HT_RXCAD12N HT_TXCAD12N M19
AB14 AE11 R23 1 2 2K_0402_1% +VDDA12_PKG2 H_CADOP11 W19 L18 H_CADIP11
PCE_TXISET(NC) PCE_NCAL(PCE_CALRN) H_CADON11 HT_RXCAD11P HT_TXCAD11P H_CADIN11
W20 HT_RXCAD11N HT_TXCAD11N L19
H_CADOP10 AC21 G22 H_CADIP10
VGAR3@
216MQA6AVA11FG_FCBGA465_RS690M H_CADON10 HT_RXCAD10P HT_TXCAD10P H_CADIN10
AB22 HT_RXCAD10N HT_TXCAD10N G21
H_CADOP9 AB20 J20 H_CADIP9
H_CADON9 HT_RXCAD9P HT_TXCAD9P H_CADIN9
AA20 HT_RXCAD9N HT_TXCAD9N J21
H_CADOP8 AA19 F21 H_CADIP8
B H_CADON8 HT_RXCAD8P HT_TXCAD8P H_CADIN8 B
Y19 HT_RXCAD8N HT_TXCAD8N F22
H_CADOP7 T24 N24 H_CADIP7
H_CADON7 HT_RXCAD7P HT_TXCAD7P H_CADIN7
R25 HT_RXCAD7N HT_TXCAD7N N25
H_CADOP6 U25 L25 H_CADIP6
H_CADON6 HT_RXCAD6P HT_TXCAD6P H_CADIN6
U24 HT_RXCAD6N HT_TXCAD6N M24
H_CADOP5 V23 K25 H_CADIP5
H_CADON5 HT_RXCAD5P HT_TXCAD5P H_CADIN5
U23 HT_RXCAD5N HT_TXCAD5N K24
H_CADOP4 V24 J23 H_CADIP4
H_CADON4 HT_RXCAD4P HT_TXCAD4P H_CADIN4
V25 HT_RXCAD4N HT_TXCAD4N K23

HYPER TRANSPORT I/F

H_CADOP3 AA25 G25 H_CADIP3
H_CADON3 HT_RXCAD3P HT_TXCAD3P H_CADIN3
AA24 HT_RXCAD3N HT_TXCAD3N H24
H_CADOP2 AB23 F25 H_CADIP2
H_CADON2 HT_RXCAD2P HT_TXCAD2P H_CADIN2
AA23 HT_RXCAD2N HT_TXCAD2N F24
H_CADOP1 AB24 E23 H_CADIP1
H_CADON1 HT_RXCAD1P HT_TXCAD1P H_CADIN1
AB25 HT_RXCAD1N HT_TXCAD1N F23
H_CADOP0 AC24 E24 H_CADIP0
H_CADON0 HT_RXCAD0P HT_TXCAD0P H_CADIN0
AC25 HT_RXCAD0N HT_TXCAD0N E25

4 H_CLKOP1 W21 HT_RXCLK1P HT_TXCLK1P L21 H_CLKIP1 4

4 H_CLKON1 W22 HT_RXCLK1N HT_TXCLK1N L22 H_CLKIN1 4

4 H_CLKOP0 Y24 HT_RXCLK0P HT_TXCLK0P J24 H_CLKIP0 4

4 H_CLKON0 W25 HT_RXCLK0N HT_TXCLK0N J25 H_CLKIN0 4
H_CTLOP0 P24 N23 H_CTLIP0
4 H_CTLOP0 HT_RXCTLP HT_TXCTLP H_CTLIP0 4
H_CTLON0 P25 P23 H_CTLIN0
4 H_CTLON0 HT_RXCTLN HT_TXCTLN H_CTLIN0 4
R46 1 2 49.9_0402_1% A24 C25 R39 1 2 100_0402_1%
A HT_RXCALP HT_TXCALP A
+VDDHT_PKG R40 1 2 49.9_0402_1% C24 D24
HT_RXCALN HT_TXCALN

VGAR3@
216MQA6AVA11FG_FCBGA465_RS690M

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 10 of 46
5 4 3 2 1
 +1.8VS

+3VS L50
1 1 AVDDI=250mA
L11 AVDD=100mA +LPVDD 1 2 +1.8VS
C515 C519 1 2 +AVDD 1 1 MBC1608121YZF_0603
0.1U_0402_16V4Z 2.2U_0603_6.3V4Z FBM-L11-201209-300LMA30T_0805 1 1
2 2 C504 C513
GND to B20 C108 C115 0.1U_0402_16V4Z 2.2U_0603_6.3V4Z
0.1U_0402_16V4Z 2.2U_0603_6.3V4Z 2 2
2 2
+1.8VS +AVDDQ 1 2UMA_TV_CRMA U5C
L12 R317UMA@ 150_0402_1% MBC1608121YZF_0603
1 2 1 2UMA_TV_LUMA B22 AVDD1 PART 3 OF 5 TXOUT_L0P B14 UMA_TXOUT0+ 15 GND to E14
MBC1608121YZF_0603 1 1 AVDDQ=200mA R316UMA@ 150_0402_1% C22 B15
AVDD2 TXOUT_L0N UMA_TXOUT0- 15
1 2 UMA_CRT_R G17 AVSSN1 TXOUT_L1P B13 UMA_TXOUT1+ 15
C113 C523 R299 UMA@ 150_0402_1% H17 A13 L14
AVSSN2 TXOUT_L1N UMA_TXOUT1- 15
2.2U_0603_6.3V4Z 1U_0402_6.3V4Z 1 2 UMA_CRT_G +1.8VS A20 H14 +LVDDR18D 1 2 +1.8VS
2 2 AVDDDI TXOUT_L2P UMA_TXOUT2+ 15
R297 UMA@ 150_0402_1% B20 G14 1 1
AVSSDI TXOUT_L2N UMA_TXOUT2- 15
GND to A22 1 2 UMA_CRT_B TXOUT_L3P D17
R295 UMA@ 150_0402_1% +AVDDQ A21 E17 C109 C116
AVDDQ TXOUT_L3N 0.1U_0402_16V4Z 2.2U_0603_6.3V4Z
A22 AVSSQ 2 2

CRT/TVOUT
TXOUT_U0P A15 UMA_TZOUT0+ 15
+1.8VS +NB_PLLVDD UMA_TV_CRMA C21 MBC1608121YZF_0603
14 UMA_TV_CRMA C TXOUT_U0N B16 UMA_TZOUT0- 15 GND to A14, D12
L13 UMA_TV_LUMA C20 C17
14 UMA_TV_LUMA Y TXOUT_U1P UMA_TZOUT1+ 15
1 2 1 2 UMA_TV_COMPS D19 COMP TXOUT_U1N C18 UMA_TZOUT1- 15
MBK2012221YZF 0805 1 1 PLLVDD18=625mA R300 @ 75_0402_1% B17
TXOUT_U2P UMA_TZOUT2+ 15
UMA_CRT_R E19 A17 L54
14 UMA_CRT_R RED TXOUT_U2N UMA_TZOUT2- 15
C114 C522 UMA_CRT_G F19 A18 +LVDDR33A 1 2 +3VS
14 UMA_CRT_G GREEN TXOUT_U3P
2.2U_0603_6.3V4Z 1U_0402_6.3V4Z UMA_CRT_B G19 B18 LVDDR33=180mA 1 1
2 2 14 UMA_CRT_B BLUE TXOUT_U3N
14 UMA_CRT_VSYNC C6 DACVSYNC
GND to B10 A5 E15 C505 C537
14 UMA_CRT_HSYNC DACHSYNC TXCLK_LP UMA_TXCLK+ 15
D15 0.1U_0402_16V4Z 4.7U_0805_10V4Z
TXCLK_LN UMA_TXCLK- 15 2 2
R58 1 2 715_0402_1% B21 H15
RSET TXCLK_UP UMA_TZCLK+ 15
TXCLK_UN G15 UMA_TZCLK- 15
+3VS UMA_CRT_SCL
14 UMA_CRT_SCL B6 DACSCL GND to C15
UMA_CRT_SDA A6 D14 +LPVDD

LVTM
UMA_CRT_SCL 14 UMA_CRT_SDA DACSDA LPVDD
2 1 LPVSS E14
R68 4.7K_0402_5% UMA@ +NB_PLLVDD A10
UMA_CRT_SDA PLLVDD(PLLVDD18) +LVDDR18D
2 1 B10 PLLVSS LVDDR18D_1 A12

1
R61 4.7K_0402_5% UMA@ B12 +3VS C499
LVDDR18D_2 +LVDDR33A 0.1U_0402_16V4Z

PLL PWR
+NB_HTPVDD B24 HTPVDD LVDDR18A_1(LVDDR33_1) C12
+1.8VS +NB_HTPVDD B25 C13 R1218
L52 HTPVSS LVDDR18A_2(LVDDR33_2) 2K_0402_5%

14
1 2 C10 A16 U20A
15,17,24,25,29,31,35 NB_RST#

2
MBC1608121YZF_0603 NB_PWRGD SYSRESET# LVSSR1 LVDS_ENBKL
1 1 HTPVDD=200mA C11 A14 1

P
31 NB_PWRGD POWERGOOD LVSSR3 A
NB_LDTSTOP# C5 D12 3 UMA_ENBKL 31
C514 C520 LDTSTOP# LVSSR5 NB_PWRGD O
16 ALLOW_LDTSTOP B5 ALLOW_LDTSTOP LVSSR6 C19 2 B

G
@ 10U_0805_10V4Z 1U_0402_6.3V4Z C15

PM
2 2 R45 2 LVSSR7 +3VS
1 10K_0402_5% C23 C16 SN74LVC08APW_TSSOP14

7
HTTSTCLK LVSSR8
GND to B25 13 HTREFCLK B23 HTREFCLK

14
R65 2 1 10K_0402_5% C2 F14 U20B
+1.2V_HT +PLLVDD12 TVCLKIN LVSSR12 LVDS_ENVDD
F15 4

P
L15 LVSSR13 A
13 NB_REFCLK B11 OSCIN O 6 UMA_ENVDD 15

1
CLOCKs
1 2 +PLLVDD12 A11 OSCOUT(PLLVDD12) 5 B

G
MBC1608121YZF_0603 1 1 PLLVDD12=70mA SN74LVC08APW_TSSOP14
13 GFX_PCIE F2 R1219

7
C117 C110 GFX_CLKP LVDS_ENVDD 2K_0402_5%
13 GFX_PCIE# E1 GFX_CLKN LVDS_DIGON E12
2.2U_0603_6.3V4Z 1U_0402_6.3V4Z G12 LVDS_ENBKL

2
2 2 LVDS_BLON
13 SBLINKCLK G1 SB_CLKP LVDS_BLEN F12
13 SBLINKCLK# G2 SB_CLKN
DVO_D0(GPP_TX0P) AD14 PCIE_MTX_DVDRX_P0 C409 1 2 DVD@ 0.1U_0402_16V7K
PCIE_MTX_C_DVDRX_P0 24
R298 2 1 @ 3K_0402_5% DFT_GPIO0 D6 AD15 PCIE_MTX_DVDRX_N0 C414 1 2 DVD@ 0.1U_0402_16V7K
DFT_GPIO0 DVO_D1(GPP_TX0N) PCIE_MTX_C_DVDRX_N0 24
R301 2 1 @ 3K_0402_5% DFT_GPIO1 D7 AE15
R59 @ 3K_0402_5% DFT_GPIO2 DFT_GPIO1 DVO_D2(DEBUG6)
2 1 C8 DFT_GPIO2 DVO_D3(GPP_RX0P) AD16 PCIE_MRX_C_DVDTX_P0 24
R67 2 1 @ 3K_0402_5% DFT_GPIO3 C7 AE16
DFT_GPIO3 DVO_D4(GPP_RX0N) PCIE_MRX_C_DVDTX_N0 24
R60 2 1 @ 3K_0402_5% DFT_GPIO4 B8 AC17
R66 @ 3K_0402_5% DFT_GPIO5 DFT_GPIO4 DVO_D5(DEBUG9)
2 1 A8 DFT_GPIO5 DVO_D6(DEBUG10) AD18
DVO_D7(GPP_TX1N) AE19 PCIE_MTX_NEWRX_N1 C62 1 2 NEW@ 0.1U_0402_16V7K
PCIE_MTX_C_NEWRX_N1 29

DVO
16 BMREQ# B2 AD19 PCIE_MTX_NEWRX_P1 C61 1 2 NEW@ 0.1U_0402_16V7K
PCIE_MTX_C_NEWRX_P1 29

MIS.
UMA_LCD_CLK BMREQ# DVO_D8(GPP_TX1P)
15 UMA_LCD_CLK A2 I2C_CLK DVO_D9(GPP_RX1N) AE20 PCIE_MRX_C_NEWTX_N1 29
15 UMA_LCD_DAT UMA_LCD_DAT B4 AD20
+3VS I2C_DATA DVO_D10(GPP_RX1P) PCIE_MRX_C_NEWTX_P1 29
C:Set to UMA@ AA15 THERMALDIODE_P DVO_D11(DEBUG15) AE21
AB15 THERMALDIODE_N
2 1 UMA_LCD_CLK AD13
R64 UMA@ 4.7K_0402_5% DVO_VSYNC(DEBUG0)
C14 TMDS_HPD DVO_DE(DEBUG2) AC13
2 1 UMA_LCD_DAT +3VS R71 2 1 @ 4.7K_0402_5% B3 AE13
R62 UMA@ 4.7K_0402_5% R72 DDC_DATA DVO_HSYNC(DEBUG1)
1 2 4.7K_0402_5% C3 TESTMODE DVO_IDCKP(DEBUG14) AE17
NB_STRAP_DATA A3 AD17
STRP_DATA DVO_IDCKN(DEBUG13)
1 2 NB_STRAP_DATA
R70 10K_0402_5% VGAR3@
216MQA6AVA11FG_FCBGA465_RS690M
1 2 +1.8VS
R63 @ 10K_0402_5% RS690 RS690 only
DFT_GPIO0 DFT_GPIO1 DFT_GPIO[4:2] DFT_GPIO5
2

+3VS
PULL HIGH
10K_0402_5%

POWER PLAY HI: 1.2V (internally

R79

LOW: 1.0V Memory Bypass the loading These pin straps are used to configure PCI-E GPP mode: Enable debug bus via the memory
1
10K_0402_5%

Won't Support in IALAA pulled high) side port of EEPROM straps IO pads, if available in the package
111: register defined (register default to Config E) DEFAULT
2 1

not available and use Hardware 110: 4-0-0-0-0 Config A

B

R69

default values 101: 4-4 Config B use default values DEFAULT

Q12 DEFAULT 100: 4-2-2 Config C
2
E

3 1 NB_LDTSTOP# DEFAULT 011: 4-2-1-1 Config D

6,16 LDT_STOP#
C

MMBT3904_SOT23-3 I2C Master can 010: 4-1-1-1-1 Config E

PULL Memory load strap values others: register defined (register default to Config E)
C: Change R69 to 10K for AMD recommand
LOW side port from EEPROM if
available connected, or use use the memory data bus
default values if to output the debug bus
not connected

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 11 of 46
 5 4 3 2 1

+1.2V_HT U5E

A25 VSS1
2 1 F11 VSS2 PAR 5 OF 5 VSSA2 V12
C57 @ 330U_D2E_2.5VM

+
D23 VSS3 VSSA3 V11
L43 E9 V14
C54 VSS4 VSSA4
1 2 +1.2V_HT G11 VSS5 VSSA5 F3
10U_0805_10V4Z VDDA_12=2.5A FBMA-L11-201209-221LMA30T_0805 Y23 V15
C55 U5D VSS6 VSSA6
P11 VSS7 VSSA7 A1
10U_0805_10V4Z +VDDA12
AA17 VDD_HT1 PART 4 OF 5 VDDA12_1 B1
C447 10U_0805_10V4Z
R24 VSS8 VSSA8 H1
D VDD_HT(I/O only)=800mA AB17 VDD_HT2 VDDA12_2 C1 AE18 VSS9 VSSA9 G3 D
C442 1 2 1U_0402_6.3V4Z AB19 D1 M15 J2
C456 1U_0402_6.3V4Z VDD_HT3 VDDA12_3 C58 10U_0805_10V4Z VSS10 VSSA10
1 2 AC18 VDD_HT4 VDDA12_4 D2 J22 VSS11 VSSA11 H3
C465 1 2 1U_0402_6.3V4Z AC19 D3 G23
C445 1U_0402_6.3V4Z VDD_HT5 VDDA12_5 VSS12
1 2 AC20 VDD_HT6 VDDA12_6 E2 J12 VSS13 VSSA13 J6
C432 1 2 1U_0402_6.3V4Z AD21 E3 C521 10U_0805_10V4Z L12
VDD_HT7 VDDA12_7 VSS14
AD22 VDD_HT8 VDDA12_8 F4 L14 VSS15 VSSA15 F1
AD23 VDD_HT9 VDDA12_9 E6 L20 VSS16 VSSA16 L6
AD24 G7 C500 1 2 1U_0402_6.3V4Z L23 M2
VDD_HT10 VDDA12_10 C441 1U_0402_6.3V4Z VSS17 VSSA17
AE23 VDD_HT11 VDDA12_11 L9 1 2 M11 VSS18 VSSA18 M6
+1.8VS AE24 M9 C453 1 2 1U_0402_6.3V4Z M20 J3
VDD_HT12 VDDA12_12 C512 1U_0402_6.3V4Z VSS19 VSSA19
AE25 VDD_HT13 1 2 M23 VSS20 VSSA20 P6

POWER
W17 A4 C506 1 2 1U_0402_6.3V4Z M25 T1
C492 VDD_HT14 VDDC_1 VSS21 VSSA21
1 2 1U_0402_6.3V4Z Y17 VDD_HT15 VDDC_2 A7 C463 1 2 1U_0402_6.3V4Z N12 VSS22 VSSA22 N3
C489 1 2 1U_0402_6.3V4Z A9 N14
VDDC_3 VSS23
J14 VDD18_1 VDDC_4 A19 VSSA24 R6
VDD_18=2mA J15 VDD18_2 VDDC_5 B9 L24 VSS25 VSSA25 U2
L45 B19 P13 T3
VDDC_6 VSS26 VSSA26
2 1 AB3 C9 P20 U3

GROUND
+1.2V_HT +VDDA12 +VDDA12 VDDA18_1(VDDA12_13) VDDC_7 VSS27 VSSA27
FBMA-L11-201209-221LMA30T_0805 AB4 D9 P15 U6
VDDA18_2(VDDA12_14) VDDC_8 L41 1 VSS28 VSSA28
10U_0805_10V4Z
VDDA_12=2.5A AC3 VDDA18_3(VDDA12_15) VDDC_9 D20 +1.2V_HT 2 +NB_VDDC R12 VSS29
C448 AD2 G20 FBMA-L11-201209-221LMA30T_0805 R14 Y1
C493 1U_0402_6.3V4Z VDDA18_4(VDDA12_16) VDDC_10 L44 1 VSS30 VSSA30
1 2 AE1 VDDA18_5(VDDA12_17) VDDC_11 H11 2 R20 VSS31
C470 1 2 1U_0402_6.3V4Z AE2 J11 FBMA-L11-201209-221LMA30T_0805 W23 W6
C490 1U_0402_6.3V4Z VDDA18_6(VDDA12_18) VDDC_12 VSS32 VSSA32
1 2 U7 VDDA18_7(VDDA12_19) VDDC_13 J19 Y25 VSS33 VSSA33 AC2
C486 1 2 1U_0402_6.3V4Z W7 L11 VDD_CORE=5A AD25 Y3
VDDA18_8(VDDA12_20) VDDC_14 VSS34 VSSA34
VDDC_15 L13 U20 VSS35 VSSA35 Y9
D11 VDDR3_1 VDDC_16 L15 H25 VSS36 VSSA36 Y11
+3VS E11 VDDR3_2 VDDC_17 L17 W24 VSS37 VSSA93 Y12
C VDDR3=70mA M12 Y22 Y14 C
VDDC_18 @ VSS38 VSSA94
AC12 VDD_DVO1(VDDR_1) VDDC_19 M14 AC23 VSS39 VSSA95 AA3

330U_D2E_2.5VM

330U_D2E_2.5VM
C510

C491

C480

C483

C485

C471

C479

C474

C502

C529

C530
1 2 AD12 VDD_DVO2(VDDR_2) VDDC_20 N11 1 1 D25 VSS40 VSSA37 R9
C511 2.2U_0603_6.3V4Z AE12 N13 1 1 1 1 1 1 1 1 1 1 1 G24 AD1
VDD_DVO3(VDDR_3) VDDC_21 VSS41 VSSA38

C424

C787
2 1 N15 + + AC14 AC5
C498 0.1U_0402_16V4Z +NB_VDDPLL VDDC_22 VSS42 VSSA39
E7 VDDA12(VDDPLL_1) VDDC_23 P12 VSSA40 AC6

10U_0805_10V4Z

10U_0805_10V4Z
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
F7 VDDA12(VDDPLL_2) VDDC_24 P14 AC22 VSS44 VSSA41 AC7
2 2 2 2 2 2 2 2 2 2 2 2 2
F9 VSSA12(VSSPLL_1) VDDC_25 P17 R23 VSS45 VSSA42 AD3
+1.8VS G9 VSSA12(VSSPLL_2) VDDC_26 R11 C4 VSS46 VSSA43 AC9
VDDC_27 R13 AE22 VSS47 VSSA44 AC10
2 1 +VDDHT_PKG D22 VDDHT_PKG VDDC_28 R15 T23 VSS48 VSSA45 G6
C433 1U_0402_6.3V4Z +VDDA12_PKG1 M1 U11 T25 Y15
VDDA12_PKG1 VDDC_29 VSS49 VSSA46
2 1 +VDDA12_PKG2 AC11 VDDA12_PKG2 VDDC_30 U12 AE14 VSS50 VSSA47 AC4
C446 1U_0402_6.3V4Z U14 R17 P9
VDDC_31 VSS51 VSSA48
2 1 VDDC_32 U15 H23 VSS52 VSSA49 AE6
C430 1U_0402_6.3V4Z M17 AE10
VGAR3@
216MQA6AVA11FG_FCBGA465_RS690M ATi Recommend VSS53 VSSA50
A23 VSS54 VSSA51 M3
L49 AC15
+NB_VDDPLL VSS55
+1.2V_HT 1 2 F17 VSS56
MBC1608121YZF_0603 +VDDA12_PKG1
1 2 VDDPLL=50mA D4 VSS57
C516 C501 M13
4.7U_0805_10V4Z 1U_0402_6.3V4Z VSS59
1 AC16 VSS60
2 1
H12 VSS61
C484 B7 VSS62
4.7U_0805_10V4Z
2
GND to F9, G9.
B VGAR3@
216MQA6AVA11FG_FCBGA465_RS690M B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 12 of 46
5 4 3 2 1
 A B C D E F G H

+3VS_CLK
+3VSNeed
VDD=500mA +3VS
to link "SM010007E00" VDDA=50mA
L57 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 2 +3VS_CLK L17
CHB2012U121_0805 +3VS_CLK_VDDA 1 2

@10U_0805_10V4Z
1 1 1 1 1 1 1 1 1 1 1 1 MBC1608121YZF_0603

10U_0805_10V4Z
C592 C590 C595 C593 C170 C636 C167 C594 C171

0.1U_0402_16V4Z
VDD_48=50mA

C168

C169

C179
L56 2 2 2 2 2 2 2 2 2 2 2 2
1 +3VS 1 2 +3VS_CLK_VDD48 10U_0805_10V4Z @ 10U_0805_10V4Z 1
MBC1608121YZF_0603 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

C588 C596
2.2U_0603_6.3V4Z 0.1U_0402_16V4Z CPUCLK0_H 6
2 1

1
U25
R101
+3VS_CLK 54 50 261_0402_1%
VDDCPU VDDA
14 VDDSRC GNDA 49
L58 23

2
VDDSRC CPUCLK0 R99 1
+3VS 1 2 +3VS_CLK_VDDREF 28 VDDSRC CPUCLK8T0 56 2 47.5_0402_1%
MBC1608121YZF_0603 44 55 CPUCLK0# R100 1 2 47.5_0402_1% CPUCLK0_L 6
VDDSRC CPUCLK8C0
1 2 +3VS_CLK_VDD48 5 VDD48 CPUCLK8T1 52
39 VDDATIG CPUCLK8C1 51
C599 C597 +3VS_CLK_VDDREF 2 SBLINKCLK 1 2
VDDREF SBLINKCLK_R R366 33_0402_5% SBLINKCLK R356 49.9_0402_1%
2.2U_0603_6.3V4Z 0.1U_0402_16V4Z 60 VDDHTT SRCCLKT6 16 1 2 SBLINKCLK 11
2 1 SBLINKCLK#_R R365 33_0402_5% SBLINKCLK# SBLINKCLK#
SRCCLKC6 17 1 2 SBLINKCLK# 11 1 2
53 41 GFX_PCIE_R R397 1 2 33_0402_5% GFX_PCIE GFX_PCIE 11 R355 49.9_0402_1%
GNDCPU ATIGCLKT0 GFX_PCIE_R# R396 33_0402_5% GFX_PCIE# GFX_PCIE
15 GNDSRC ATIGCLKC0 40 1 2 GFX_PCIE# 11 1 2
22 37 R92 49.9_0402_1%
GNDSRC ATIGCLKT1 GFX_PCIE#
29 GNDSRC ATIGCLKC1 36 1 2
45 35 R93 49.9_0402_1%
GNDSRC ATIGCLKT2
VDD_REF=50mA 8 GND48 ATIGCLKC2 34
38 GNDATIG ATIGCLKT3 30
1 31 SBSRCCLK 1 2
C603 GNDREF ATIGCLKC3 SBSRCCLK_R R360 33_0402_5% SBSRCCLK R354 49.9_0402_1%
58 GNDHTT SRCCLKT5 18 1 2 SBSRCCLK 16
33P_0402_50V8J 19 SBSRCCLK_R# R359 1 2 33_0402_5% SBSRCCLK# SBSRCCLK# 16 SBSRCCLK# 1 2
XTALIN_CLK SRCCLKC5 CLK_PCIE_VGA_R R373 VGA@ 33_0402_5% CLK_PCIE_VGA R353 49.9_0402_1%
1 2 3 X1 SRCCLKT4 20 1 2 CLK_PCIE_VGA 15
2 21 CLK_PCIE_VGA_R# R372 1 2 VGA@ 33_0402_5% CLK_PCIE_VGA# CLK_PCIE_VGA 1 2 VGA@ 2
SRCCLKC4 CLK_PCIE_VGA# 15
1

2
Y3 XTALOUT_CLK 4 24 R352 49.9_0402_1%
X2 SRCCLKT3 CLK_PCIE_VGA# 1
SRCCLKC3 25 2 VGA@
R390 26 CLK_DVD_R R377 1 2 DVD@ 33_0402_5% CLK_DVD R351 49.9_0402_1%
SRCCLKT2 CLK_DVD 24
@ 1M_0402_5% 27 CLK_DVD_R# R376 1 2 DVD@ 33_0402_5% CLK_DVD# CLK_PCIE_LAN 1 2
CLK_DVD# 24
2

CLK_RESET SRCCLKC2 CLK_NEW_R R404 NEW@33_0402_5% CLK_NEW R102 49.9_0402_1%

11 47 1 2 CLK_NEW 29
1

RESET_IN# SRCCLKT0 CLK_NEW_R# R403 NEW@33_0402_5% CLK_NEW# CLK_PCIE_LAN#

1 2 61 NC SRCCLKC0 46 1 2 CLK_NEW# 29 1 2
14.31818MHZ_20P_6X1430004201 43 CLK_PCIE_LAN_R R402 1 2 33_0402_5%
CLK_PCIE_LAN R103 49.9_0402_1%
SRCCLKT1 CLK_PCIE_LAN 25
C631 42 CLK_PCIE_LAN_R# R401 1 2 33_0402_5%
CLK_PCIE_LAN# CLK_NEW 1 2 NEW@
SRCCLKC1 CLK_PCIE_LAN# 25
33P_0402_50V8J 12 CLK_WLAN_R R368 1 2 WLAN@ 33_0402_5% CLK_WLAN R407 49.9_0402_1%
SRCCLKT7 CLK_WLAN 24
13 CLK_WLAN_R# R367 1 2 WLAN@ 33_0402_5% CLK_WLAN# CLK_NEW# 1 2 NEW@
SRCCLKC7 CLK_WLAN# 24
R406 49.9_0402_1%
+3VS_CLK 9 57 CLKREQ_WLAN# CLK_DVD 1 2 DVD@
8,9,17,24,29 SMB_CK_CLK0 SMBCLK CLKREQA# CLKREQ_WLAN# 24
8,9,17,24,29 SMB_CK_DAT0 10 32 CLKREQ_DVD# R371 49.9_0402_1%
SMBDAT CLKREQB# CLKREQ_DVD# 24
33 CLKREQ_NEW# CLK_DVD# 1 2 DVD@
CLKREQC# CLKREQ_NEW# 29
1 2 CLK_RESET R370 49.9_0402_1%
R378 10K_0402_5% 1 2 CLKIREF 48 7 CLK_CB R369 1 2 33_0402_5% CLK_48M_CB 22 CLK_WLAN 1 2 WLAN@
R394 475_0402_1% IREF 48MHz_1 CLK_USB R379
31 CLK_RESET_R 1 2 48MHz_0 6 1 2 33_0402_5% USBCLK_EXT 17 R362 49.9_0402_1%
R1220 @ 0_0402_5% CLK_WLAN# 1 2 WLAN@
PLACE CLOSE TO U62 R361 49.9_0402_1%
WITHIN 0.5 INCH 63 FS1 R95 1 2 33_0402_5%
FS1/REF1 CLK_14M_SIO 35
64 FS0 R94 1 2 33_0402_5% SB_OSC_INT 17
FS0/REF0 FS2 R96 33_0402_5%
FS2/REF2 62 2 1 NB_REFCLK 11
59 CLK_HTREFCLK R97 1 2 33_0402_5% HTREFCLK HTREFCLK 11
HTTCLK0

ICS951462AGLFT_TSSOP64

HTREFCLK 1 2
3 +3VS R107 49.9_0402_1% 3

CLKREQ_WLAN# 1 2
+3VS_CLK R398 100K_0402_5%
CLKREQ_DVD# 1 2
R386 100K_0402_5%
EXT CLK FREQUENCY SELECT TABLE(MHZ) 1 CLKREQ_NEW# 1 2

1
2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%
R395 100K_0402_5%
R104

R105

R106
FS2 FS1 FS0 CPU SRCCLK HTT PCI USB COMMENT
[2:1]
2

2
0 0 0 Hi-Z 100.00 Hi-Z Hi-Z 48.00 Reserved
0 0 1 X 100.00 X/3 X/6 48.00 Reserved FS0
FS1
0 1 0 180.00 100.00 60.00 30.00 48.00 Reserved FS2
1

1
2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

0 1 1 220.00 100.00 36.56 73.12 48.00 Reserved

R108

R109

R110

1 0 0 100.00 100.00 66.66 33.33 48.00 Reserved

1 0 1 133.33 100.00 66.66 33.33 48.00 Reserved
2

1 1 1 200.00 100.00 66.66 33.33 48.00 Normal ATHLON64 operation @ @ @

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 13 of 46
A B C D E F G H
 A B C D E

CRT CONNECTOR
1 2
15 VGA_CRT_R
R1178 VGA@ 0_0402_5%
CRT_R
NON76@
CRT_R_L
CRT Conn.
11 UMA_CRT_R 1 2 1 2
R1179 UMA@ 0_0402_5% L6 FBMA-10-100505-121T_0402 JP24
15 VGA_CRT_G 1 2 12 12
R1180 VGA@ 0_0402_5% NON76@ CRT_R_L 11
CRT_G CRT_G_L 11
11 UMA_CRT_G 1 2 1 2 10 10
1 R1181 UMA@ 0_0402_5% L4 FBMA-10-100505-121T_0402 CRT_G_L 9 1
9
15 VGA_CRT_B 1 2 8 8
R1182 VGA@ 0_0402_5% NON76@ CRT_B_L 7
CRT_B CRT_B_L 7
11 UMA_CRT_B 1 2 1 2 6 6
R1183 UMA@ 0_0402_5% L3 FBMA-10-100505-121T_0402 CRT_HSYNC 5 5

150_0402_1%

150_0402_1%

150_0402_1%

22P_0402_25V8K

22P_0402_25V8K

22P_0402_25V8K

6P_0402_50V8K

6P_0402_50V8K

6P_0402_50V8K
CRT_VSYNC 4 4

1
1 1 1 1 1 1 CRT_DDC_DAT 3
R20 R19 R16 C17 C25 C37 C21 C16 C13 CRT_DDC_CLK 3
2 2
+5VS 1 1
2 2 2 2 2 2

2
13 GND1
NON76@ NON76@ NON76@ NON76@ NON76@ 14
NON76@ GND2
NON76@ NON76@ NON76@ ACES_87213-1200G
C:Move pi circuit to daugther board
PreMP: Change BOM sturcture for EMI issue

2 2

+3VS DVT:For ATi DDC PA request

C: VGA level shift
circuit on VGA/B, remove

2
G
1 2 UMA@ extra components
11 UMA_CRT_SDA
1 2 CRT_HSYNC R1184 UMA@ 0_0402_5% 2N7002_SOT23-3 Q4
11 UMA_CRT_HSYNC
R1185 UMA@ 0_0402_5% 1 2 3 1 CRT_DDC_DAT
15 VGA_DDC_DATA +3VS
R1186 VGA@ 0_0402_5%

D
15 VGA_CRT_HSYNC 1 2
R1187 VGA@ 0_0402_5%

2
G
2 R1231 1
1 2 UMA@ Q5 0_0402_5% VGA@
15 VGA_CRT_VSYNC
R1189 VGA@ 0_0402_5% 1 2 3 1 CRT_DDC_CLK
15 VGA_DDC_CLK
CRT_VSYNC R1188 VGA@ 0_0402_5%

D
11 UMA_CRT_VSYNC 1 2
R1191 UMA@ 0_0402_5% 1 2 2N7002_SOT23-3 DVT:For ATi DDC PA request
11 UMA_CRT_SCL C:BOM structure for UMA/VGA
R1190 UMA@ 0_0402_5%
2 R1232 1
0_0402_5% VGA@

D4 D5
3 @ DAN217_SC59 @ DAN217_SC59 3

1
TV-OUT CONNECTOR

3
+3VS

1 2 C524
1 2 @ 22P_0402_50V8J
15 VGA_TV_LUMA
R288 VGA@ 0_0402_5%
1 2 TV_LUMA 1 2
11 UMA_TV_LUMA
R287 UMA@ 0_0402_5% L51 MBK1608121YZF_0603

1 2 TV_CRMA 1 2
15 VGA_TV_CRMA
R290 VGA@ 0_0402_5% L53 MBK1608121YZF_0603
1 2 JP26
11 UMA_TV_CRMA
R289 UMA@ 0_0402_5% 1 2 C528 TV_CRMA_L 4 4
1

1 1 @ 22P_0402_50V8J TV_LUMA_L 3 6
R307 3
2 5
150_0402_1% R310
150_0402_1%
C533
100P_0402_25V8K
C517
100P_0402_25V8K
1
C536
1
C535
1
2
1
TV-OUT Conn.
2 2 ALLTO_C10877-104A1-L_4P 1. Y ground
2

2 2 2. C ground
100P_0402_25V8K 100P_0402_25V8K 3. Y (luminance+sync)
4 4. C (crominance) 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 14 of 46
A B C D E
 5 4 3 2 1

VGA BOARD Conn. (ATi Support Only) +3V_SB

LCD/PANEL BD. Conn.
11 UMA_ENVDD 1 2
R1 UMA@ 0_0402_5%

3
S
JP23 +3VS
G
B+ VGA_ENVDD ENVDD 2
1 2 +1.8VS
Q1
3 4

1
+LCDVDD D AO3413_SOT23

1
5 6
7 8 PCIE_MTX_C_GRX_N[0..15]
80mil
R2
9 10 PCIE_MTX_C_GRX_N[0..15] 10

1
2K_0402_5% 1
11 12 PCIE_MTX_C_GRX_P[0..15] C4
PCIE_MTX_C_GRX_P[0..15] 10

2
13 14

1
D R5 D
15 16 PCEI_GTX_C_MRX_N[0..15] 470_0805_5% R6 @ 4.7U_0805_10V4Z
17 18 PCIE_GTX_C_MRX_N[0..15] 10 2
100_0402_5%

1 2
19 20 PCEI_GTX_C_MRX_P[0..15]
+2.5VS 21 22 PCIE_GTX_C_MRX_P[0..15] 10

3
D S

2
23 24 Q2
G
25 26 2 2 +LCDVDD Width: 80mils
G Q3
+1.5VS 27 28 2N7002_SOT23-3 S D AO3413_SOT23

1
29 30
31 32 EC_SMB_CK2 6,31 +LCDVDD
33 34 EC_SMB_DA2 6,31

1
35 36 +3VS 1
37 38 C3 R7
39 40 80mil
0.047U_0402_16V7K 100K_0402_5%
41 42 +5VALW 2
1

2
PCEI_GTX_C_MRX_P15 43 44 PCIE_MTX_C_GRX_P15 C2
PCEI_GTX_C_MRX_N15 45 46 PCIE_MTX_C_GRX_N15 @ 4.7U_0805_10V4Z C1
47 48 0.1U_0402_16V4Z
PCEI_GTX_C_MRX_P14 49 50 PCIE_MTX_C_GRX_P14 2
PCEI_GTX_C_MRX_N14 51 52 PCIE_MTX_C_GRX_N14
53 54
PCEI_GTX_C_MRX_P13 55 56 PCIE_MTX_C_GRX_P13 +3VS
PCEI_GTX_C_MRX_N13 57 58 PCIE_MTX_C_GRX_N13 +INV
59 60 BKOFF#
61 62 1 2
PCEI_GTX_C_MRX_P12 PCIE_MTX_C_GRX_P12 R279 4.7K_0402_5% L34
PCEI_GTX_C_MRX_N12 63 64 PCIE_MTX_C_GRX_N12
65 66 B+ 1 2

0.1U_0402_25V4K
FBMA-L11-201209-221LMA30T_0805 1 1
PCEI_GTX_C_MRX_P11 67 68 PCIE_MTX_C_GRX_P11 C390
PCEI_GTX_C_MRX_N11 69 70 PCIE_MTX_C_GRX_N11
71 72 JP3
C C389 68P_0402_50V8J C
PCEI_GTX_C_MRX_P10 73 74 PCIE_MTX_C_GRX_P10 LCD_TZOUT1+ 2 2
75 76 2 2 1 1
PCEI_GTX_C_MRX_N10 PCIE_MTX_C_GRX_N10 4 3
77 78 LCD_EDID_DATA 4 3 LCD_TXCLK+
79 80 6 6 5 5
PCEI_GTX_C_MRX_P9 PCIE_MTX_C_GRX_P9 LCD_EDID_CLK 8 7 LCD_TXCLK- JP4
PCEI_GTX_C_MRX_N9 81 82 PCIE_MTX_C_GRX_N9 8 7
83 84 10 10 9 9 42 GND GND 41
DAC_BRIG 12 11 LCD_TXOUT1+ LCD_TZCLK+ 40 39 LCD_TZOUT0-
PCEI_GTX_C_MRX_P8 85 86 PCIE_MTX_C_GRX_P8 BKOFF# 12 11 LCD_TXOUT1- LCD_TZCLK- 40 39 LCD_TZOUT0+
87 88 14 14 13 13 38 38 37 37
PCEI_GTX_C_MRX_N8 PCIE_MTX_C_GRX_N8 INVT_PWM 16 15 LCD_TXOUT2+ 36 35 LCD_TZOUT2-
89 90 16 15 LCD_TXOUT2- 36 35 LCD_TZOUT2+
91 92 +3VS 18 18 17 17 34 34 33 33
PCEI_GTX_C_MRX_P7 PCIE_MTX_C_GRX_P7 +LCDVDD_C 20 19 LCD_TXOUT0+ 32 31 LCD_TZOUT1-
PCEI_GTX_C_MRX_N7 93 94 PCIE_MTX_C_GRX_N7 +LCDVDD_C 20 19 LCD_TXOUT0- 32 31 LCD_TZOUT1+
95 96 22 22 21 21 30 30 29 29
97 98 24 24 23 23 28 28 27 27
PCEI_GTX_C_MRX_P6 PCIE_MTX_C_GRX_P6 26 25 2 LCD_EDID_DATA 26 25 LCD_TXCLK+
PCEI_GTX_C_MRX_N6 99 100 PCIE_MTX_C_GRX_N6 26 25 C415 LCD_EDID_CLK 26 25 LCD_TXCLK-
101 102 28 28 27 27 24 24 23 23
+INV 30 29 +INV 0.1U_0402_16V4Z 22 21
PCEI_GTX_C_MRX_P5 103 104 PCIE_MTX_C_GRX_P5 30 29 DAC_BRIG 22 21 LCD_TXOUT1+
105 106 31 DAC_BRIG 20 20 19 19
PCEI_GTX_C_MRX_N5 PCIE_MTX_C_GRX_N5 1 BKOFF# LCD_TXOUT1-
107 108 GND1 31 31 BKOFF# 18 18 17 17
32 31 INVT_PWM INVT_PWM 16 15 LCD_TXOUT2+
PCEI_GTX_C_MRX_P4 109 110 PCIE_MTX_C_GRX_P4 GND2 16 15 LCD_TXOUT2-
111 112 +3VS 14 14 13 13
PCEI_GTX_C_MRX_N4 PCIE_MTX_C_GRX_N4 +LCDVDD 1 2 12 11 LCD_TXOUT0+
113 114 @ ACES_88242-3001 L36 0_0805_5% +LCDVDD_C 12 11 LCD_TXOUT0-
115 116 10 10 9 9
PCEI_GTX_C_MRX_P3 PCIE_MTX_C_GRX_P3 1 8 7
PCEI_GTX_C_MRX_N3 117 118 PCIE_MTX_C_GRX_N3 8 7
119 120 6 6 5 5
C394 + 4 3
PCEI_GTX_C_MRX_P2 121 122 PCIE_MTX_C_GRX_P2 22U_A_4VM 4 3
123 124 +INV 2 2 1 1 +INV
PCEI_GTX_C_MRX_N2 PCIE_MTX_C_GRX_N2
125 126 2 ACES_88242-4001
PCEI_GTX_C_MRX_P1 127 128 PCIE_MTX_C_GRX_P1
B PCEI_GTX_C_MRX_N1 129 130 PCIE_MTX_C_GRX_N1 B
131 132
PCEI_GTX_C_MRX_P0 133 134 PCIE_MTX_C_GRX_P0 DAC_BRIG
135 136 1 2
PCEI_GTX_C_MRX_N0 PCIE_MTX_C_GRX_N0 C407 68P_0402_50V8J
137 138 INVT_PWM LCD_EDID_CLK R8 1
139 140 1 2 2 UMA@ 0_0402_5% UMA_LCD_CLK UMA_LCD_CLK 11
CLK_PCIE_VGA C401 68P_0402_50V8J LCD_EDID_DATA R9 1 2 UMA@ 0_0402_5% UMA_LCD_DAT UMA_LCD_DAT 11
20 VGA_HPD 141 142 CLK_PCIE_VGA 13
CLK_PCIE_VGA# 1 2 BKOFF#
20 VGA_DVI_SCLK 143 144 CLK_PCIE_VGA# 13
C413 68P_0402_50V8J LCD_TXCLK- R255 1 2 UMA@ 0_0402_5%
20 VGA_DVI_SDATA 145 146 UMA_TXCLK- 11
147 148 1 2LCD_EDID_CLK LCD_TXCLK+ R256 1 2 UMA@ 0_0402_5%
UMA_TXCLK+ 11
C9 68P_0402_50V8J
20 VGA_DVI_TXC- 149 150
20 VGA_DVI_TXC+ 151 152 1 2LCD_EDID_DATA LCD_TXOUT0- R257 1 2 UMA@ 0_0402_5%
UMA_TXOUT0- 11
C7 68P_0402_50V8J LCD_TXOUT0+ R258 1 2 UMA@ 0_0402_5%
153 154 UMA_TXOUT0+ 11
20 VGA_DVI_TXD0- 155 156 EMI
LCD_EDID_DATA LCD_TXOUT1- R259 1 2 UMA@ 0_0402_5%
20 VGA_DVI_TXD0+ 157 158 UMA_TXOUT1- 11
LCD_EDID_CLK LCD_TXOUT1+ R260 1 2 UMA@ 0_0402_5%
159 160 UMA_TXOUT1+ 11
20 VGA_DVI_TXD1- 161 162 LCD_TXCLK- LCD_TXOUT2- R268 1 2 UMA@ 0_0402_5%
20 VGA_DVI_TXD1+ 163 164 UMA_TXOUT2- 11
LCD_TXCLK+ LCD_TXOUT2+ R269 1 2 UMA@ 0_0402_5%
165 166 UMA_TXOUT2+ 11
20 VGA_DVI_TXD2- 167 168 LCD_TXOUT0- LCD_TZOUT0- R261 1 2 UMA@ 0_0402_5%
20 VGA_DVI_TXD2+ 169 170 UMA_TZOUT0- 11
LCD_TXOUT0+ LCD_TZOUT0+ R262 1 2 UMA@ 0_0402_5%
171 172 UMA_TZOUT0+ 11
VGA_TV_LUMA LCD_TXOUT1-
14 VGA_TV_LUMA 173 174
VGA_TV_CRMA LCD_TXOUT1+ LCD_TZOUT1- R266 1 2 UMA@ 0_0402_5%
14 VGA_TV_CRMA 175 176 UMA_TZOUT1- 11
VGA_ENVDD LCD_TXOUT2- LCD_TZOUT1+ R267 1 2 UMA@ 0_0402_5%
177 178 UMA_TZOUT1+ 11
VGA_ENBKL LCD_TXOUT2+
31 VGA_ENBKL 179 180 DVT:For ATi DDC PA request
+5VS LCD_TZOUT2- R263 1 2 UMA@ 0_0402_5%
29,31,36,39 SUSP# 181 182 UMA_TZOUT2- 11
LCD_TZOUT0- LCD_TZOUT2+ R264 1 2 UMA@ 0_0402_5%
11,17,24,25,29,31,35 NB_RST# 183 184 UMA_TZOUT2+ 11
VGA_CRT_VSYNC LCD_TZOUT0+
14 VGA_CRT_VSYNC 185 186
VGA_CRT_HSYNC LCD_TZOUT1- LCD_TZCLK- R271 1 2 UMA@ 0_0402_5%
A 14 VGA_CRT_HSYNC 187 188 UMA_TZCLK- 11 A
VGA_DDC_CLK LCD_TZOUT1+ LCD_TZCLK+ R270 1 2 UMA@ 0_0402_5%
14 VGA_DDC_CLK 189 190 UMA_TZCLK+ 11
VGA_DDC_DATA LCD_TZOUT2-
14 VGA_DDC_DATA 191 192 DVT: Add UMA@
+HDMI_5V_OUT LCD_TZOUT2+
VGA_CRT_R 193 194
14 VGA_CRT_R 195 196
VGA_CRT_G LCD_TZCLK-
14 VGA_CRT_G 197 198
VGA_CRT_B LCD_TZCLK+
14 VGA_CRT_B 199 200
ACES_88386-1K71
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
DVT:For ATi DDC PA request Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 15 of 46
5 4 3 2 1
 5 4 3 2 1

U26A B:Swap PCICLK7 and PCICLK2 for debug CLK fail issue.
SB600 SB U2
PCICLK0 PCICLK0 18
PCICLK1 T2 PCICLK1 18
13 SBSRCCLK J24 U1 PCICLK2 R419 1 2 22_0402_5%

PCI CLKS
PCIE_RCLKP PCICLK2 CLK_PCI_SIO 35
13 SBSRCCLK# J25 V2 PCICLK3 R421 1 2 22_0402_5%
PCIE_RCLKN PCICLK3 CLK_PCI_CB 22
PCICLK4 W3 PCICLK4 18
C632 1 2 0.1U_0402_16V7K SB_RX0P_C P29 U3 PCICLK5 R136 1 2 22_0402_5%
10 SB_RX0P PCIE_TX0P PCICLK5 CLK_PCI_EC 31

PCI EXPRESS INTERFACE

C635 1 2 0.1U_0402_16V7K SB_RX0N_C P28 V1
10 SB_RX0N PCIE_TX0N PCICLK6 PCICLK6 18
C641 1 2 0.1U_0402_16V7K SB_RX1P_C M29 T1 B:Change to 8.2K_0402
10 SB_RX1P PCIE_TX1P SPDIF_OUT/PCICLK7/GPIO41
C642 1 2 0.1U_0402_16V7K SB_RX1N_C M28
10 SB_RX1N PCIE_TX1N
C634 1 2 0.1U_0402_16V7K SB_RX2P_C K29 AJ9 PCIRST# PCIRST# 2 1
10 SB_RX2P PCIE_TX2P PCIRST# PCIRST# 6,22
D C633 1 2 0.1U_0402_16V7K SB_RX2N_C K28 R415 8.2K_0402_5% D
10 SB_RX2N PCIE_TX2N PCI_AD[0..31]
C640 1 2 0.1U_0402_16V7K SB_RX3P_C H29 PCI_AD[0..31] 18,22
10 SB_RX3P PCIE_TX3P
C639 1 2 0.1U_0402_16V7K SB_RX3N_C H28 W7 PCI_AD0
10 SB_RX3N PCIE_TX3N AD0/ROMA18
Y1 PCI_AD1
AD1/ROMA17 PCI_AD2
10 SB_TX0P T25 PCIE_RX0P AD2/ROMA16 W8
10 SB_TX0N T26 W5 PCI_AD3
PCIE_RX0N AD3/ROMA15 PCI_AD4
10 SB_TX1P T22 PCIE_RX1P AD4/ROMA14 AA5
10 SB_TX1N T23 Y3 PCI_AD5
PCIE_RX1N AD5/ROMA13 PCI_AD6
10 SB_TX2P M25 PCIE_RX2P AD6/ROMA12 AA6
10 SB_TX2N M26 AC5 PCI_AD7
PCIE_RX2N AD7/ROMA11 PCI_AD8
10 SB_TX3P M22 PCIE_RX3P AD8/ROMA9 AA7
10 SB_TX3N M23 AC3 PCI_AD9
PCIE_RX3N AD9/ROMA8 PCI_AD10
AD10/ROMA7 AC7
R412 2 1 562_0402_1% E29 AJ7 PCI_AD11
R411 PCIE_CALRP AD11/ROMA6
+PCIE_VDDR 2 1 2.05K_0402_1% E28 PCIE_CALRN AD12/ROMA5 AD4 PCI_AD12
AB11 PCI_AD13
R413 AD13/ROMA4
2 1 0_0402_5% E27 PCIE_CALI AD14/ROMA3 AE6 PCI_AD14
AC9 PCI_AD15
AD15/ROMA2 PCI_AD16
AD16/ROMD0 AA3
AC26 AJ4 PCI_AD17
6 H_PWRGD CPU_PG/LDT_PG AD17/ROMD1
W26 AB1 PCI_AD18
INTR/LINT0 AD18/ROMD2 PCI_AD19
W24 NMI/LINT1 AD19/ROMD3 AH4
W25 AB2 PCI_AD20
INIT# AD20/ROMD4 PCI_AD21
AA24 SMI# AD21/ROMD5 AJ3
6,11 LDT_STOP# AA23 AB3 PCI_AD22
SLP#/LDT_STP# AD22/ROMD6 PCI_AD23
AA22 IGNNE#/SIC AD23/ROMD7 AH3
PCI_AD24

CPU
AA26 A20M#/SID AD24 AC1
Y27 AH2 PCI_AD25
ALLOW_LDTSTOP FERR# AD25 PCI_AD26
11 ALLOW_LDTSTOP AA25 STPCLK#/ALLOW_LDTSTP AD26 AC2
C +1.8VS AH9 AH1 PCI_AD27 C
C:Change to 10K for AMD recommand CPU_STP#/DPSLP_3V# AD27 PCI_AD28
B24 DPSLP_OD#/GPIO37 AD28 AD2
2 1 ALLOW_LDTSTOP W23 DPRSLPVR AD29 AG2 PCI_AD29
R112 10K_0402_5% AC25 AD1 PCI_AD30
6 LDT_RST# LDT_RST#/DPRSTP#/PROCHOT# AD30
+3V_SB AG1 PCI_AD31
AD31
AB9 PCI_C/BE#0 22

PCI INTERFACE
EC_SWI# CBE0#/ROMA10
29,31 EC_SWI# A3 PCI_PME#/GEVENT4# CBE1#/ROMA1 AF9 PCI_C/BE#1 22

ACPI / WAKE UP EVENTS

1 2 EC_SWI# B2 AJ5 PCI_C/BE#2 22
R416 100K_0402_5% RI#/EXTEVNT0# CBE2#/ROMWE#
31 PM_SLP_S3# F7 SLP_S3# CBE3# AG3 PCI_C/BE#3 22
31 PM_SLP_S5# A5 SLP_S5# FRAME# AA2 PCI_FRAME# 22
31 PBTN_OUT# E3 PWR_BTN# DEVSEL#/ROMA0 AH6 PCI_DEVSEL# 22
6,31 SB_PWRGD B5 PWR_GOOD IRDY# AG5 PCI_IRDY# 22
1 2 SB_TEST0 B3 AA1 PCI_TRDY# 22
R125 @ 2.2K_0402_5% SB_TEST0 SUS_STAT# TRDY#/ROMOE#
G9 TEST0 PAR/ROMA19 AF7 PCI_PAR 22
1 2 SB_TEST1 SB_TEST1 E9 Y2 PCI_STOP# 22
R127 @ 2.2K_0402_5% SB_TEST2 TEST1 STOP#
F9 TEST2 PERR# AG8 PCI_PERR# 22
1 2 SB_TEST2 D9 AC11 PCI_SERR# 22
R126 @ 2.2K_0402_5% S3_STATE/GEVENT5# SERR#
F4 SYS_RESET#/GPM7# REQ0# AJ8
1 2 H_THERMTRIP# E7 AE2
R129 @ 4.7K_0402_5% WAKE#/GEVENT8# REQ1#
C2 BLINK/GPM6# REQ2# AG9 PCI_REQ#2 22
1 2 H_PROCHOT# H_THERMTRIP# G7 AH8
6 H_THERMTRIP# SMBALERT#/THRMTRIP#/GEVENT2# REQ3#/GPIO70
R1217 @ 4.7K_0402_5% AH5 TP16
REQ4#/GPIO71
D7 LPC_PME#/GEVENT3# GNT0# AD11
C25 LPC_SMI#/EXTEVNT1# GNT1# AF2
31 GATEA20 AF26 GA20IN GNT2# AH7 PCI_GNT#2 22
31 EC_KBRST# AG26 KBRST# GNT3#/GPIO72 AB12
AG4 TP14
GNT4#/GPIO73
31,35 LPC_AD0 AG24 LAD0 CLKRUN# AG7
31,35 LPC_AD1 AG25 LAD1 LOCK# AF6
B
LPC

B
31,35 LPC_AD2 AH24 LAD2
31,35 LPC_AD3 AH25 LAD3 INTE#/GPIO33 AD3 PCI_PIRQE# 22
31,35 LPC_FRAME# AF24 LFRAME# INTF#/GPIO34 AF1 PCI_PIRQF# 22
AJ24 LDRQ0# INTG#/GPIO35 AF4 PCI_PIRQG# 22
35 LPC_DRQ1# AH26 LDRQ1#/GNT5#/GPIO68 INTH#/GPIO36 AF3
W22
11 BMREQ#
22,31,35 SERIRQ AF23
BMREQ#/REQ5#/GPIO65
SERIRQ + RTC Battery
SB_32KHI D2 D3 TP17 +RTCBATT
X1 RTCCLK
XTAL

F5 H_PROCHOT#
RTC_IRQ#/GPIO69 H_PROCHOT# 6

1
RTC

SB_32KHO C1 E1 +SB_VBAT D35

X2 VBAT BAS40-04_SOT23-3
RTC_GND D1

218S6ECLA13FG_FCBGA548_SB600
R422 +SB_VBAT R437 +RTCVCC
20M_0603_5% SB600R3@ 120_0402_5%

2
2 1 1 2 1 2 +CHGRTC
1 1 R436 120_0402_5% 1
W=20mils C700
C688

2
C250 C251
1 2 SB_32KHI 0.1U_0402_16V4Z 1U_0402_6.3V4Z J4 0.1U_0402_16V4Z

2
2 2 @ JUMP_43X39 2
12P_0402_50V8J Y4
1

1
4 OUT NC 3
R417

1
20M_0603_5% 1 2 Close to SB600 pin E1
IN NC
A A
32.768KHZ_12.5P_1TJS125BJ4A421P
C679
2

SB_32KHO
1 2

12P_0402_50V8J

PreMP: Change for RTC timer Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 16 of 46
5 4 3 2 1
 5 4 3 2 1

U26B
C662 0.01U_0402_25V7K SATA_STX_DRX_P0
21 SATA_STX_C_DRX_P0
C665
1
1
2
2 0.01U_0402_25V7K SATA_STX_DRX_N0
AH21
AJ21
SATA_TX0+ SB600 SB AB29
21 SATA_STX_C_DRX_N0 SATA_TX0- IDE_IORDY IDE_SDIORDY 29
C767 1 2 0.01U_0402_25V7K SATA_STX_DRX_P1 AH18 AA28
21 SATA_STX_C_DRX_P1 SATA_TX1+ IDE_IRQ INT_IRQ15 29
C768 1 2 0.01U_0402_25V7K SATA_STX_DRX_N1 AJ18 AA29
21 SATA_STX_C_DRX_N1 SATA_TX1- IDE_A0 IDE_SDA0 29
AH13 SATA_TX2+ IDE_A1 AB27 IDE_SDA1 29
AH14 SATA_TX2- IDE_A2 Y28 IDE_SDA2 29
AJ11 SATA_TX3+ IDE_DACK# AB28 IDE_SDDACK# 29
AH11 SATA_TX3- IDE_DRQ AC27 IDE_SDDREQ 29
D 10P_0402_50V8J 2 1 C195 SATA_X1 AC29 D
IDE_IOR# IDE_SDIOR# 29

SERIAL ATA
21 SATA_DTX_C_SRX_P0 AJ20 SATA_RX0+ IDE_IOW# AC28 IDE_SDIOW# 29

1
21 SATA_DTX_C_SRX_N0 AH20 SATA_RX0- IDE_CS1# W28 IDE_SDCS1# 29
Y2 R113 AJ17 W27
21 SATA_DTX_C_SRX_P1 SATA_RX1+ IDE_CS3# IDE_SDCS3# 29
25MHZ_20P AH17 IDE_SDD[0..15] 29
21 SATA_DTX_C_SRX_N1 SATA_RX1-
10M_0402_5% AJ16 AD28 IDE_SDD0
2
SATA_RX2+ IDE_D0/GPIO15 IDE_SDD1
AH16 AD26

2
10P_0402_50V8J SATA_RX2- IDE_D1/GPIO16
2 1 C186 SATA_X2 AJ13 SATA_RX3+ IDE_D2/GPIO17 AE29 IDE_SDD2
AH12 AF27 IDE_SDD3
SATA_RX3- IDE_D3/GPIO18 IDE_SDD4
IDE_D4/GPIO19 AG29
2 1 SATA_CAL AF12 AH28 IDE_SDD5
R118 1K_0402_1% SATA_CAL IDE_D5/GPIO20 IDE_SDD6
AJ28 B:1.Add PU R479 for BT_DET#

P-ATA 66/100
SATA_X1 IDE_D6/GPIO21 IDE_SDD7 +3VS
AD16 SATA_X1 IDE_D7/GPIO22 AJ27 2.Chg. BT_DET# from GPIO0 to GPIO51.
AH27 IDE_SDD8
SATA_X2 IDE_D8/GPIO23 IDE_SDD9 BT_DET# 10K_0402_5% 2 R479
AD18 SATA_X2 IDE_D9/GPIO24 AG27 1
+3VS R120 1 2 10K_0402_5% IDE_D10/GPIO25 AG28 IDE_SDD10
AC12 AF28 IDE_SDD11
33 HDD_LED# SATA_ACT#/GPIO67 IDE_D11/GPIO26
AF29 IDE_SDD12
IDE_D12/GPIO27

OSC / RST
AE28 IDE_SDD13
NB_RST#_R IDE_D13/GPIO28 IDE_SDD14 +3VS
AG10 A_RST# IDE_D14/GPIO29 AD25
1 2 NB_RST#_R 31 EC_RSMRST#
EC_RSMRST# E2 RSMRST# IDE_D15/GPIO30 AD29 IDE_SDD15
R119 8.2K_0402_5% B23 5IN1_EN 1 2
13 SB_OSC_INT 14M_OSC
J3 R128 1K_0402_5%
SPI_DI/GPIO12
1 2 EC_RSMRST# SPI_DO/GPIO11 J6 0: 5IN1 Disable
R134 2.2K_0402_5% A17 G3

SPI ROM
13 USBCLK_EXT USBCLK SPI_CLK/GPIO47 CAM_PW 30 1: 5IN1 Enable
SPI_HOLD#/GPIO31 G2 B:Chg. name to 5IN1_EN
C:Change to 11.3K for USB logo 2 1 USB_RCOMP A14 G6
R414 11.3K_0402_1% USB_RCOMP SPI_CS#/GPIO32
TP13 A10 C23 +3VS
C TP12 USB_ATEST0 LAN_RST#/GPIO13 C
A11 USB_ATEST1 ROM_RST#/GPIO14 G5
+3VALW 1 2
C780
29 USBP9+ H12 R124 100K_0402_5%
USB_HSDP9+ CIR_EN#
1 2 29 USBP9- G12 USB_HSDM9- FANOUT0/GPIO3 M4 1 2
30 USBP8+ E12 T3 R122 CIR@ 1K_0402_5%
USB_HSDP8+ FANOUT1/GPIO48
5

U40 0.1U_0402_16V4Z D12 V4

30 USBP8- USB_HSDM8- FANOUT2/GPIO49

USB INTERFACE
1 E14 A:ISKAA-Add for CIR floating casue S3 shut down issue
P

B 30 USBP7+ USB_HSDP7+
NB_RST# 4 D14 N3 B:Chg. name to CIR_EN#
11,15,24,25,29,31,35 NB_RST# Y 30 USBP7- USB_HSDM7- FANIN0/GPIO50
2 NB_RST#_R 30 USBP6+ G14 P2 BT_DET#
A USB_HSDP6+ FANIN1/GPIO51 BT_DET# 30
G

30 USBP6- H14 USB_HSDM6- FANIN2/GPIO52 W4 SPK_SEL 26

30 USBP5+ D16
3

TC7SH08FU_SSOP5 USB_HSDP5+ DVT: follow IALAA

30 USBP5- E16 USB_HSDM5- TEMP_COMM P5
30 USBP4+ D18 P7 5IN1_EN
USB_HSDP4+ TEMPIN0/GPIO61 CIR_EN#
30 USBP4- E18 USB_HSDM4- TEMPIN1/GPIO62 P8
30 USBP3+ G16 USB_HSDP3+ TEMPIN2/GPIO63 T8 SB_INT_FLASH_SEL 32
1 2 30 USBP3- H16 USB_HSDM3- TEMPIN3/TALERT#/GPIO64 T7 EC_THERM# 31
R1221 @ 0_0402_5%

HW MONITOR
30 USBP2+ G18 USB_HSDP2+
30 USBP2- H18 USB_HSDM2- VIN0/GPIO53 V5 SUBWOOFER 26
30 USBP1+ D19 USB_HSDP1+ VIN1/GPIO54 L7
30 USBP1- E19 USB_HSDM1- VIN2/GPIO55 M8
30 USBP0+ G19 USB_HSDP0+ VIN3/GPIO56 V6
DVT: Follow IALAA and Modified BOM H19 M6
30 USBP0- USB_HSDM0- VIN4/GPIO57
VIN5/GPIO58 P4
31 EC_SCI# A8 USB_OC0#/GPM0# VIN6/GPIO59 M7
B8 USB_OC1#/GPM1# VIN7/GPIO60 V7
29 EXP_CPPE# C7 USB_OC2#/GPM2#

USB OC
C8 N2 AZ_BITCLK 33_0402_5% 2 1 R158 AZ_BITCLK_HD 26
31 EC_LID_OUT# USB_OC3#/GPM3# AZ_BITCLK AZ_SDOUT

AZALIA
A6 USB_OC4#/GPM4# AZ_SDOUT M2
B6 K2 AZ_BITCLK MDC@ 33_0402_5% 2 1 R160 AZ_BITCLK_MD 29
B USB_OC5#/DDR3_RST#/GPM5# AZ_SDIN3/GPIO46 AZ_SYNC AZ_SDIN3_HD 26 B
B4 USB_OC6#/GEVENT6# AZ_SYNC L3
C4 K3 AZ_RST#
31 EC_SMI# USB_OC7#/GEVENT7# AZ_RST#
C5 33_0402_5% 2 1 R161 AZ_SDOUT_HD 26
USB_OC8#/AZ_DOCK_RST#/GPM8#
C6 USB_OC9#/SLP_S2/GPM9# AC_BITCLK/GPIO38 L1
L2 AZ_SDOUT MDC@ 33_0402_5% 2 1 R163 AZ_SDOUT_MD 29
AC_SDOUT/GPIO39 AC97_SDOUT 18
A27 L4

AC97
SSMUXSEL/SATA_IS3#/GPIO0 ACZ_SDIN0/GPIO42 AZ_SDIN0_MD 29
A26 ROM_CS#/GPIO1 ACZ_SDIN1/GPIO43 J2
27 SB_SPKR B26 J4 33_0402_5% 2 1 R155 AZ_SYNC_HD 26
SPKR/GPIO2 ACZ_SDIN2/GPIO44
B27 SMARTVOLT/SATA_IS2#/GPIO4 AC_SYNC/GPIO40 M3
D23 L5 AZ_SYNC MDC@ 33_0402_5% 2 1 R157 AZ_SYNC_MD 29
SHUTDOWN#/GPIO5 AC_RST#/GPIO45
GPIO/ SMBUS

SIDERST# B29
+3VS 29 SIDERST# GHI#/SATA_IS1#/GPIO6
A23 WD_PWRGD/GPIO7
C26 E23 33_0402_5% 2 1 R152 AZ_RST_HD# 26
DDC1_SDA/GPIO8 NC1
D26 DDC1_SCL/GPIO9 NC2 AC21
C28 AD7 AZ_RST# MDC@ 33_0402_5% 2 1 R154 AZ_RST_MD# 29
R409 SATA_IS0#/GPIO10 NC3
1 2 10K_0402_5% SIDERST# A4 LLB#/GPIO66 NC4 AE7
NC5 AA4
R410 1 2 2.2K_0402_5% SMB_CK_CLK0 8,9,13,24,29 SMB_CK_CLK0 SMB_CK_CLK0 C27 T4
SMB_CK_DAT0 SCL0/GPOC0# NC6
8,9,13,24,29 SMB_CK_DAT0 B28 SDA0/GPOC1# NC7 D4
R408 1 2 2.2K_0402_5% SMB_CK_DAT0 AB19
SB600R3@ NC8
C3 SCL1/GPOC2#
F3 AZ_RST# 2 1
SDA1/GPOC3# 10K_0402_5% R140

218S6ECLA13FG_FCBGA548_SB600 A:PA_IXP600AF3 reserve for SB600 prior to A21.

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 17 of 46
5 4 3 2 1
 5 4 3 2 1

D D

Standard Straps
+3VS +3VS +3VS +3VS +3VS Debug Straps
1

1
R418 R139 R420 R146 R145
16,22 PCI_AD28
@ 2.2K_0402_5% @ 10K_0402_5% 10K_0402_5% 10K_0402_5% @ 10K_0402_5%
16,22 PCI_AD27
16,22 PCI_AD26
16,22 PCI_AD25
2

2
17 AC97_SDOUT 16,22 PCI_AD24
16 PCICLK4

1
16 PCICLK6
R149 R142 R151 R138 R150
16 PCICLK1
@ 2.2K_0402_5% @ 2.2K_0402_5% @ 2.2K_0402_5% @ 2.2K_0402_5% @ 2.2K_0402_5%
16 PCICLK0
1

2
R133 R147 R144
10K_0402_5% @ 10K_0402_5% 10K_0402_5%
2

2
C C

PCI_CLK4 PCI_CLK6 PCI_CLK1 PCI_CLK0 PCI_AD23

AC_SDOUT <PCICLK4> <PCICLK6> <CLK_PCI_LAN> <PCICLK0> PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 <A11 only>
ROM TYPE:
PULL USE USE INT. CPU IF=AMD H, H = Reserve USE USE PCI USE ACPI USE IDE USE DEFAULT DISABLE
HIGH DEBUG PLL48 PULL LONG PLL BCLK PLL PCIE STRAPS BOOTFAIL
H, L = LPC ROM DEFAULT
STRAPS DEFAULT HIGH RESET TIMER
L, H = SPI ROM DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT

IGNORE L, L = FWH ROM

PULL DEBUG USE EXT. CPU IF=Intel PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM ENABLE
LOW STRAPS 48MHZ LOW SHORT PCI PLL ACPI PLL PCIE STRAPS BOOTFAIL
<int'l PD> RESET BCLK TIMER
DEFAULT
DEFAULT

B Un-Used Inputs Setting--GPIO pins Un-Used Inputs Setting--GPM pins Un-Used Inputs Setting--GPM pins B

GPIO4/SMARTVOLT/SATA_IS2# Config. GPIO to Output Mode. GPIO56/VIN3 Config. GPIO to Output Mode. GPM5#/DDR3_RST#/USB_OC5# Config. for internal PU.

GPIO5/SHUTDOWN# Config. GPIO to Output Mode. GPIO57/VIN4 Config. GPIO to Output Mode. GEVENT5#/S3_STATE Config. for internal PU.

GPIO7/WD_PWRGD Config. GPIO to Output Mode. GPIO58/VIN5 Config. GPIO to Output Mode.

GPIO8/DDC1_SDA Config. GPIO to Output Mode. GPIO59/VIN6 Config. GPIO to Output Mode.

GPIO9/DDC1_SCL Config. GPIO to Output Mode. GPIO60/VIN7 Config. GPIO to Output Mode.

GPIO10/SATA_IS0# Config. GPIO to Output Mode. GPIO61/TEMPIN0 Config. GPIO to Output Mode.

GPIO41/PCICLK7/SPDIF_OUT Config. GPIO to Output Mode.

GPIO50/FANIN0 Config. GPIO to Output Mode.

GPIO51/FANIN1 Config. GPIO to Output Mode. GPOC2#/SCL1 Config. GPIO to Output Mode.
A A

GPIO52/FANIN2 Config. GPIO to Output Mode. GPOC3#/SDA1 Config. GPIO to Output Mode.

GPIO53/VIN0 Config. GPIO to Output Mode.

Security Classification Compal Secret Data Compal Electronics, Inc.
GPIO54/VIN1 Config. GPIO to Output Mode. Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
GPIO55/VIN2 Config. GPIO to Output Mode. AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 18 of 46
5 4 3 2 1
 +3VS
B:Update footprint w/o L64
wrong polar mark. +1.2V_HT 1 2 +PLLVDD_ATA
MBC1608121YZF_0603
U26C C671 2 1 1U_0402_6.3V4Z SB_PLLVDDSATA_12=65mA U26D
2 1 C657 A25 VDDQ_1 SB600 SB
220U_Y_4VM

+
C190 1 2 1U_0402_6.3V4Z SB_VDD_33=150mA
A28
C29
VDDQ_2 SB600 SB A20
+PLLVDD_ATA AD14
AJ10
PLLVDD_SATA_1 AVSS_SATA_1 AB14
AB16
C227 1U_0402_6.3V4Z VDDQ_3 VSS_2 L22 PLLVDD_SATA_2 AVSS_SATA_2
1 2 D24 A21 AB18
C193 1 2 1U_0402_6.3V4Z L9
VDDQ_4
VDDQ_5
POWER VSS_3
VSS_4 A29 +3VS 1 2 +XTLVDD_ATA +XTLVDD_ATA AC16 XTLVDD_SATA
AVSS_SATA_3
AVSS_SATA_4 AC14
C200 1 2 1U_0402_6.3V4Z L21 B1 MBC1608121YZF_0603 SB_AVDDC_33=5mA AC18
C240 1U_0402_6.3V4Z VDDQ_6 VSS_5 C209 AVSS_SATA_5
1 2 M5 VDDQ_7 VSS_6 B7 2 1 1U_0402_6.3V4Z AVSS_SATA_6 AC19

SATA Analog PWR

C191 1 2 1U_0402_6.3V4Z P3 B25 +1.2V_SATA AE14 AD12
C233 0.1U_0402_16V4Z VDDQ_8 VSS_7 AVDD_SATA_1 AVSS_SATA_7
1 2 P9 VDDQ_9 VSS_8 C21 AE16 AVDD_SATA_2 AVSS_SATA_8 AD19
C226 1 2 0.1U_0402_16V4Z T5 C22 AE18 AD21
C210 0.1U_0402_16V4Z VDDQ_10 VSS_9 L63 AVDD_SATA_3 AVSS_SATA_9
1 2 V9 VDDQ_11 VSS_10 C24 SB_AVDDSATA_12=300mA AE19 AVDD_SATA_4 AVSS_SATA_10 AE12
C676 1 2 0.1U_0402_16V4Z W2 D6 +1.2V_HT 2 1 +1.2V_SATA AF19 AE21
VDDQ_12 VSS_11 AVDD_SATA_5 AVSS_SATA_11

3.3V I/O PWR

W6 E24 FBMA-L11-201209-221LMA30T_0805 AF21 AF11
VDDQ_13 VSS_12 AVDD_SATA_6 AVSS_SATA_12
W21 VDDQ_14 VSS_13 F2 AG22 AVDD_SATA_7 AVSS_SATA_13 AF14

+
W29 VDDQ_15 VSS_14 F23 2 1 AG23 AVDD_SATA_8 AVSS_SATA_14 AF16
L20 AA12 G1 C668 22U_A_4VM AH22 AF18
VDDQ_16 VSS_15 C661 AVDD_SATA_9 AVSS_SATA_15
+1.2V_HT 1 2 +1.2VS_SB_VDD AA16 VDDQ_17 VSS_16 J1 1 2 1U_0402_6.3V4Z AH23 AVDD_SATA_10 AVSS_SATA_16 AG11
MBK2012221YZF 0805 AA19 J8 C197 1 2 1U_0402_6.3V4Z AJ12 AG12
VDDQ_18 VSS_17 C194 AVDD_SATA_11 AVSS_SATA_17
AC4 VDDQ_19 VSS_18 L6 1 2 0.1U_0402_16V4Z AJ14 AVDD_SATA_12 AVSS_SATA_18 AG13
AC23 L8 C206 1 2 0.1U_0402_16V4Z AJ19 AG14
VDDQ_20 VSS_19 AVDD_SATA_13 AVSS_SATA_19
+

2 1 AD27 VDDQ_21 VSS_20 M9 AJ22 AVDD_SATA_14 AVSS_SATA_20 AG16

C202 22U_A_4VM AE1 M12 AJ23 AG17
C208 1U_0402_6.3V4Z VDDQ_22 VSS_21 AVDD_SATA_15 AVSS_SATA_21
1 2 AE9 VDDQ_23 VSS_22 M15 AVSS_SATA_22 AG18
C219 1 2 1U_0402_6.3V4Z AE23 M18 +3V_SB B9 AG19
C205 1U_0402_6.3V4Z VDDQ_24 VSS_23 +3V_SB AVDDTX_0 AVSS_SATA_23
1 2 AH29 VDDQ_25 VSS_24 N13 B11 AVDDTX_1 AVSS_SATA_24 AG20
C216 1 2 1U_0402_6.3V4Z AJ2 N17 SB_AVDDTX_33=250mA B13 AG21
VDDQ_26 VSS_25 AVDDTX_2 AVSS_SATA_25

USB Analog PWR

C220 1 2 0.1U_0402_16V4Z AJ6 P1 B16 AH10
VDDQ_27 VSS_26 AVDDTX_3 AVSS_SATA_26
AJ26 VDDQ_28 VSS_27 P6 SB_AVDDRX_33=250mA B18 AVDDTX_4 AVSS_SATA_27 AH19

+
C214 1 2 0.1U_0402_16V4Z P21 2 1 A9
VSS_28 C669 22U_A_4VM AVDDRX_0
+1.2VS_SB_VDD M13 VDD_1 VSS_29 R12 B10 AVDDRX_1
M17 R15 C224 1 2 1U_0402_6.3V4Z B12 A16
VDD_2 VSS_30 C228 1U_0402_6.3V4Z AVDDRX_2 AVSS_USB_1
SB_VDD_12=500mA N12 VDD_3 VSS_31 R18 1 2 B14 AVDDRX_3 AVSS_USB_2 C9

Core PWR
N15 T6 C211 1 2 1U_0402_6.3V4Z B17 C10
VDD_4 VSS_32 C212 0.1U_0402_16V4Z AVDDRX_4 AVSS_USB_3
N18 VDD_5 VSS_33 T9 1 2 AVSS_USB_4 C11
R13 U13 C673 1 2 0.1U_0402_16V4Z SB_AVDDC_33=15mA C12
VDD_6 VSS_34 C675 0.1U_0402_16V4Z AVSS_USB_5
R17 VDD_7 VSS_35 U17 1 2 +3V_SB A12 AVDDC AVSS_USB_6 C13
+3V_SB U12 V3 C14
VDD_8 VSS_36 AVSS_USB_7
U15 VDD_9 VSS_37 V8 A13 AVSSC AVSS_USB_8 C16
+

USB PHY Digi. PWR

2 1 U18 VDD_10 VSS_38 V12 AVSS_USB_9 C17
C678 22U_A_4VM V13 V15 +1.2V_SB A18 C18
C253 1U_0402_6.3V4Z VDD_11 VSS_39 +3V_SB USB_PHY_1.2V_1 AVSS_USB_10
1 2 V17 VDD_12 VSS_40 V18 A19 USB_PHY_1.2V_2 AVSS_USB_11 C19
C230 1 2 1U_0402_6.3V4Z V21 SB_AVDDCK_12=90mA B19 C20
C234 0.1U_0402_16V4Z VSS_41 USB_PHY_1.2V_3 AVSS_USB_12
1 2 +3V_SB A2 S5_3.3V_1 VSS_42 W1 B20 USB_PHY_1.2V_4 AVSS_USB_13 D11
A7 S5_3.3V_2 VSS_43 W9 B21 USB_PHY_1.2V_5 AVSS_USB_14 D21
SB_S5_33=15mA F1 Y29 C670 1 2 2.2U_0603_6.3V4Z E11
S5_3.3V_3 3.3V Standby PWR VSS_44 C221 1 AVSS_USB_15
J5 S5_3.3V_4 VSS_45 AA11 2 0.1U_0402_16V4Z SB_AVDD_33=1mA AVSS_USB_16 E21
J7 S5_3.3V_5 VSS_46 AA14 +SB_AVDD N1 AVDD AVSS_USB_17 F11
+1.2V_SB K1 S5_3.3V_6 VSS_47 AA18 GND to A13 AVSS_USB_18 F12
VSS_48 AC6 M1 AVSS HW Monitor PWR AVSS_USB_19 F14
G4 AC24 +1.2V_SB F16
+1.2V_SB S5_1.2V_1 VSS_49 AVSS_USB_20
C248 2 1 0.1U_0402_16V4Z H1 AD9 F18
C239 0.1U_0402_16V4Z S5_1.2V_2 1.2V Standby PWR VSS_50 AVSS_USB_21
2 1 SB_AVDDCK_12=80mA H2 S5_1.2V_3 VSS_51 AD23 +1.8VS AVSS_USB_22 F19
C686 2 1 0.1U_0402_16V4Z H3 AE3 C198 2 1 1U_0402_6.3V4Z AA27 F21
S5_1.2V_4 VSS_52 CPU_PWR AVSS_USB_23

Special PWR/GND
C682 2 1 0.1U_0402_16V4Z AE27 C666 2 1 1U_0402_6.3V4Z 1 SB_CPU_PWR=10mA G11
C242 @ 10U_0805_10V4Z VSS_53 C667 1U_0402_6.3V4Z AVSS_USB_24
2 1 VSS_54 AG6 2 1 +V5_VREF AE11 V5_VREF AVSS_USB_25 G21
+PCIE_VDDR F27 AJ1 C201 2 1 1U_0402_6.3V4Z C188 SB_V5_VREF_5=5mA H11
PCIE_VDDR_1 VSS_55 0.1U_0402_16V4Z AVSS_USB_26
F28 AJ25 A24 H21
PCIE_VDDR_2 VSS_56 2 +3.3V_AVDDCK
SB_AVDDCK_33=10mA AVDDCK_3.3V AVSS_USB_27
SB_PCIEPVDDR_12=450mA F29 PCIE_VDDR_3 VSS_57 AJ29 AVSS_USB_28 J11
G26 PCIE_VDDR_4 +1.2V_AVDDCK A22 AVDDCK_1.2V AVSS_USB_29 J12
PCIE Analog PWR

L60 G27 SB_AVDDCK_12=40mA J14

PCIE_VDDR_5 AVSS_USB_30
+1.2V_HT 2 1 +PCIE_VDDR G28 PCIE_VDDR_6 B22 AVSSCK AVSS_USB_31 J16
FBMA-L11-201209-221LMA30T_0805 G29 J18
PCIE_VDDR_7 AVSS_USB_32
J27 PCIE_VDDR_8 PCIE_VSS_1 D27 AVSS_USB_33 J19
+

2 1 J29 PCIE_VDDR_9 PCIE_VSS_2 D28

C646 22U_A_4VM L25 D29
C187 1U_0402_6.3V4Z PCIE_VDDR_10 PCIE_VSS_3
1 2 L26 PCIE_VDDR_11 PCIE_VSS_4 F26
C192 1 2 1U_0402_6.3V4Z L29 G23
C189 1U_0402_6.3V4Z PCIE_VDDR_12 PCIE_VSS_5 L65
1 2 N29 PCIE_VDDR_13 PCIE_VSS_6 G24
C648 1 2 0.1U_0402_16V4Z G25 +3VS 1 2 +SB_AVDD 218S6ECLA13FG_FCBGA548_SB600
C649 PCIE_VSS_7
1 2 0.1U_0402_16V4Z +PCIE_PVDD U29 PCIE_PVDD PCIE_VSS_8 H27 MBC1608121YZF_0603
PCIE_VSS_9 J23
U28 J26 C685 1 2 2.2U_0603_6.3V4Z
L59 PCIE_PVSS PCIE_VSS_10
SB_PCIEPVDD_12=35mA PCIE_VSS_11 J28
+1.2V_HT 2 1 +PCIE_PVDD K27 C683 1 2 0.1U_0402_16V4Z L61
FBMA-L11-201209-221LMA30T_0805 PCIE_VSS_12
V29 PCIE_VSS_42 PCIE_VSS_13 L22 +3VS 1 2 +3.3V_AVDDCK
V28 L23 GND to M1 MBC1608121YZF_0603
C650 1 1U_0402_6.3V4Z PCIE_VSS_41 PCIE_VSS_14
2 V27 PCIE_VSS_40 PCIE_VSS_15 L24
1 2 V26 L27 C659 1 2 2.2U_0603_6.3V4Z
C647 22U_0805_6.3V6M PCIE_VSS_39 PCIE_VSS_16
V25 PCIE_VSS_38 PCIE_VSS_17 L28
V24 M21 C660 1 2 0.1U_0402_16V4Z
PCIE_VSS_37 PCIE_VSS_18
GND to U28 V23 PCIE_VSS_36 PCIE_VSS_19 M24
V22 PCIE_VSS_35 PCIE_VSS_20 M27 GND to B22
U27 PCIE_VSS_34 PCIE_VSS_21 N27
T29 PCIE_VSS_33 PCIE_VSS_22 N28
T28 P22 +5VS R131 1 2 1K_0402_5% +V5_VREF
PCIE_VSS_32 PCIE_VSS_23 D8 L62
T27 SB600R3@
PCIE_VSS_31 PCIE_VSS_24 P23 2 2 SB600R3@
T24 PCIE_VSS_30 PCIE_VSS_25 P24 +3VS 2 1 +1.2V_HT 1 2 +1.2V_AVDDCK
T21 P25 C225 C223 MBC1608121YZF_0603
PCIE_VSS_29 PCIE_VSS_26 CH751H-40PT_SOD323-2 1U_0603_10V4Z
P27 PCIE_VSS_28 PCIE_VSS_27 P26 0.1U_0402_16V4Z
1 1 C663 1 2 2.2U_0603_6.3V4Z
218S6ECLA13FG_FCBGA548_SB600
C664 1 2 0.1U_0402_16V4Z

GND to B22

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 19 of 46
 5 4 3 2 1

+3VS

1
+HDMI_5V_OUT
R429 R431 R430
HDMI@ @ @
2.2K_0402_5% 24K_0402_5% 24K_0402_5%

1
D10 F1 @ 1A_6VDC_MINISMDC110 R1176 R1177
D 2 1 2 1 HDMI@ HDMI@ D
+5VS +HDMI_5V_OUT
VGA_HPD 19.1K_0402_1% 19.1K_0402_1%
J1 15 VGA_HPD

2
G
RB491D_SOT23

2
1 2 Q134
1 2 VGA_DVI_SDATA HDMI_SDATA
1 15 VGA_DVI_SDATA 3 1
@ JUMP_43X79 C270

D
HDMI@ 2N7002_SOT23-3

2
G
0.1U_0402_16V4Z HDMI@
2 Q135
VGA_DVI_SCLK 3 1 HDMI_SCLK
15 VGA_DVI_SCLK

D
2N7002_SOT23-3
HDMI@

HDMI Connector
L68 L66
VGA_DVI_TXD1+ 4 3 HDMI_R_D1+ VGA_DVI_TXC+ 4 3 HDMI_R_CK+
15 VGA_DVI_TXD1+ 4 3 15 VGA_DVI_TXC+ 4 3 JP35
HDMI_HPD 19
VGA_DVI_TXD1- HDMI_R_D1- VGA_DVI_TXC- HDMI_R_CK- HP_DET
15 VGA_DVI_TXD1- 1 1 2 2 15 VGA_DVI_TXC- 1 1 2 2 +HDMI_5V_OUT 18 +5V
17 DDC/CEC_GND
HDMI@ WCM2012F2S-900T04_0805 HDMI@ WCM2012F2S-900T04_0805 HDMI_SDATA 16
HDMI_SCLK SDA
15 SCL
C 14 C
Reserved
13 CEC
HDMI_R_CK- 12 20
CK- GND
11 CK_shield GND 21
HDMI_R_CK+ 10 22
HDMI_R_D0- CK+ GND
9 D0- GND 23
L69 L67 8 D0_shield
HDMI_R_D0+ 7
VGA_DVI_TXD2+ HDMI_R_D2+ VGA_DVI_TXD0+ HDMI_R_D0+ HDMI_R_D1- D0+
15 VGA_DVI_TXD2+ 4 4 3 3 15 VGA_DVI_TXD0+ 4 4 3 3 6 D1-
5 D1_shield
HDMI_R_D1+ 4
VGA_DVI_TXD2- HDMI_R_D2- VGA_DVI_TXD0- HDMI_R_D0- HDMI_R_D2- D1+
15 VGA_DVI_TXD2- 1 1 2 2 15 VGA_DVI_TXD0- 1 1 2 2 3 D2-
2 D2_shield
HDMI@ WCM2012F2S-900T04_0805 HDMI@ WCM2012F2S-900T04_0805 HDMI_R_D2+ 1 D2+
TYCO_1939864-1
HDMI@
PVT: Delete all co-lay resistors.

+HDMI_5V_OUT

C783 2
0.1U_0402_16V4Z HDMI_HPD
B HDMI@ B

5
1
1

P
OE#

2
2 4 VGA_HPD R1225 2 C784
A Y 100K_0402_5% 0.1U_0402_16V4Z

G
U41 HDMI@ HDMI@
SN74AHCT1G125GW_SOT353-5

3
HDMI@ 1

1
A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401498
Date: Thursday, November 25, 2010 Sheet 20 of 46
5 4 3 2 1
 5 4 3 2 1

SATA HDD Conn.

+5VS
Place closely JP25 SATA CONN.
JP34
D D
1 1 1 1 1 GND 1
C684 C680 C687 C689 C690 2
A+ SATA_STX_C_DRX_P0 17
A- 3 SATA_STX_C_DRX_N0 17
10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 4
2 2 2 2 2 GND SATA_DTX_SRX_N0 C699
B- 5 1 2 0.01U_0402_25V7K SATA_DTX_C_SRX_N0 17
6 SATA_DTX_SRX_P0 C698 1 2 0.01U_0402_25V7K
B+ SATA_DTX_C_SRX_P0 17
GND 7

+3VS 8
V33 +3VS
V33 9
V33 10
GND 11
1 1 1 1 GND 12
C697 C691 C693 C696 13
GND
V5 14 +5VS
@ 10U_0805_10V4Z @ 0.1U_0402_16V4Z @ 0.1U_0402_16V4Z @ 0.1U_0402_16V4Z 15
2 2 2 2 V5
V5 16
GND 17
Reserved 18
GND 19
V12 20
24 GND V12 21
23 GND V12 22

OCTEK_SAT-22SO1G_RV

C C

2HDD@ JP55

+5VS
Place closely JP55 SATA CONN. GND 1
A+ 2 SATA_STX_C_DRX_P1 17
A- 3 SATA_STX_C_DRX_N1 17
GND 4
1 1 1 1 1 5 SATA_DTX_SRX_N1 C769 1 2 0.01U_0402_25V7K
B- SATA_DTX_C_SRX_N1 17
C775 C776 C777 C778 C779 6 SATA_DTX_SRX_P1 C770 1 2 0.01U_0402_25V7K
B+ SATA_DTX_C_SRX_P1 17
GND 7
10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2HDD@ 2 2HDD@ 2 2 2
2HDD@ 2HDD@ 2HDD@

VCC3.3 8
VCC3.3 9
VCC3.3 10
GND 11
GND 12
GND 13
VCC5 14 +5VS
VCC5 15
VCC5 16
B B
GND 17
RESERVED 18
GND 19
24 GND VCC12 20
23 GND VCC12 21
VCC12 22

SUYIN_127043FB022G345ZR_NR

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 21 of 46
5 4 3 2 1
 5 4 3 2 1

+3VS +AVDD_7412
+3VS
MBK1608301YZF_0603 MBK1608301YZF_0603 +3VS
2 1 0.1U_0402_16V4Z 0.01U_0402_25V4Z +CB_VDDPLL33 0.01U_0402_25V4Z 1 2

L25 1 1 1 1 1 1 1 1 1 1 L26 0.1U_0402_16V4Z

C275 C279 C281 C289 C278 C282 C294 C296 C299 C298

0.1U_0402_16V4Z 10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z C288

2 2 2 2 2 2 2 2 2 2
PCI8402:5IN1 + 1394 C291
0.01U_0402_25V4Z C295 0.01U_0402_25V4Z 0.1U_0402_16V4Z
1 2 4.7U_0805_10V4Z
0.1U_0402_16V4Z
+3VS
D D
1 2
C319 1U_0603_10V4Z
0.1U_0402_16V4Z 0.01U_0402_25V4Z
1 1 1 1 2
C343 C302 C286 C301 C284 +VCC_5IN1

U15

U19
P13
P14

P15

K19

W8
1U_0603_10V4Z

K1

P1
U11B 2 2 2 2 1
0.1U_0402_16V4Z 0.01U_0402_25V4Z

VCCP
VCCP
AVDD_33
AVDD_33
AVDD_33

VDDPLL_33
VDDPLL_15

VR_PORT
VR_PORT
M1 PCI_AD31
AD31 PCI_AD30 MSBS_SDCMD_SMWE#
AD30 M2 1 2
M3 PCI_AD29 R176 100K_0402_5%
AD29 PCI_AD28
AD28 M6
MC_PWRON# C8 M5 PCI_AD27 SMRE 1 2
SM_RB F8
MC_PWR_CTRL_0
MC_PWR_CTRL_1/SM_R/B#
AD27
AD26 N1 PCI_AD26 5 IN 1 LED R168 100K_0402_5%
N2 PCI_AD25
AD25 PCI_AD24 +5VS SDWP#_SMCE#
AD24 N3 1 2
P3 PCI_AD23 R187 100K_0402_5%
SD_CD# AD23 PCI_AD22
E9 SD_CD# AD22 R1

1
DVT:Change R213 and R214 from 22 to 33ohm MS_CD# A8 R2 PCI_AD21 PCI_AD[0..31] SM_RB 1 2
MS_CD# AD21 PCI_AD[0..31] 16,18
B8 P5 PCI_AD20 R254 R167 22K_0402_5%
SM_CD# AD20 PCI_AD19
AD19 R3
SDCLK 2 1 T1 PCI_AD18 120_0402_5%
R213 33_0402_5% AD18 PCI_AD17
T2

2 2
MSCLK MSCLK_SDCLK_SMELWP# AD17 PCI_AD16
2 1 A7 MS_CLK/SD_CLK/SM_EL_WP# AD16 W4
R214 33_0402_5% MSBS_SDCMD_SMWE# E8 W7 PCI_AD15
SMELWP# MSD3_SDD3_SMD3 MS_BS/SD_CMD/SM_WE# AD15 PCI_AD14 D24
2 1 B6 MS_DATA3/SD_DAT3/SM_D3 AD14 R8
R215 22_0402_5% MSD2_SDD2_SMD2 A6 U8 PCI_AD13
MSD1_SDD1_SMD1 C7
MS_DATA2/SD_DAT2/SM_D2
MS_DATA1/SD_DAT1/SM_D1
AD13
AD12 V8 PCI_AD12 HT-191NB_BLUE_0603 +3VS 5 In 1 Card Power Switch
MSD0_SDD0_SMD0 B7 W9 PCI_AD11
MS_SDIO(DATA0)/SD_DAT0/SM_D0 AD11 PCI_AD10 +VCC_5IN1
V9

1 1
AD10 PCI_AD9
AD9 U9

2
C PCI_AD8 D C
AD8 R9
V10 PCI_AD7 5IN1_LED 2 Q32 R182 U9
SMRE AD7 PCI_AD6 G 10K_0402_5%
A4 SD_CLK/SM_RE# AD6 U10 1 GND OUT 8

2
CLK_48M_CB SDCMD_SMALE C5 R10 PCI_AD5 S 2N7002_SOT23-3 2 7

3
SDD0_SMD4 SD_CMD/SM_ALE AD5 PCI_AD4 R225 IN OUT
C6 W11 3 6

1
SD_DAT0/SM_D4 AD4 IN OUT
2

SDD1_SMD5 A5 V11 PCI_AD3 10K_0402_5% MC_PWRON# 4 5 1

R196 SDD2_SMD6 SD_DAT1/SM_D5 AD3 PCI_AD2 EN# FLG
B5 SD_DAT2/SM_D6 AD2 U11
@ 33_0402_5% SDD3_SMD7 E6 P11 PCI_AD1 G528P1UF_SO8 C292 C297 C283

1
SDWP#_SMCE# SD_DAT3/SM_D7 AD1 PCI_AD0
E7 SD_WP/SM_CE# AD0 R11
0.1U_0402_16V4Z 2
1

1 G5 4.7U_0805_10V4Z
SC_PWR_CTRL 1U_0603_10V4Z
C/BE3# P2 PCI_C/BE#3 16
C320 SMCLE B4 U5
SM_CLE C/BE2# PCI_C/BE#2 16
@ 22P_0402_50V8J XD_CD# A3 V7
2 XD_CD#/SM_PHYS_WP#
PCI7412 C/BE1#
C/BE0# W10
PCI_C/BE#1
PCI_C/BE#0
16
16 +VCC_5IN1
U7 PCI_PAR 16 CLK_PCI_CB
R173 1 PAR
2 1K_0402_1% P12 TEST0 FRAME# R6 PCI_FRAME# 16

1
CLK_48M_CB F1 W5 PCI_TRDY# 16
13 CLK_48M_CB CLK_48 TRDY#
+3VS R181 1 2 4.7K_0402_5%P17 V5 PCI_IRDY# 16 R189 R188
PHY_TEST_MA IRDY# @ 10_0402_5%
STOP# V6 PCI_STOP# 16
56.2_0402_1%

56.2_0402_1%
1U_0402_6.3V4Z

2 U6 DEVICE_ID 470_0805_5%
DEVSEL# PCI_DEVSEL# 16
1

C280 N5 2 R184 1 PCI_AD20

1 2
IDSEL

2
R177 R178 R186 6.34K_0402_1% R7 100_0402_5% 1
PERR# PCI_PERR# 16 D
1 2 T18 R0 W6 R194 Q23
1 SERR# PCI_SERR# 16
T19 R1 L3 100_0402_5% C309 MC_PWRON# 2
REQ# PCI_REQ#2 16
JP37 XTPBIAS0 R13 TPBIAS0 L2 8402@ @ 22P_0402_50V8J G
PCI_GNT#2 16
2

XTPA0+ GNT# 2 2N7002_SOT23-3

V14 TPA0P S

3
5 4 XTPA0- CLK_PCI_CB
6 3 W14 TPA0N PCLK L1 CLK_PCI_CB 16
XTPB0+ V13 TPB0P K3
7 2 PRST# PCIRST# 6,16
XTPB0- W13 TPB0N K5
8 1 GRST#
56.2_0402_1%

56.2_0402_1%

1 2 W17 TPBIAS1 L5
RI_OUT#/PME#
5 in 1 CardReader Conn.
1

B C285 1U_0402_6.3V4Z R192 B

V16 TPA1P
AMP_440168-2 R170 W16 TPA1N J5 1 2 +3VS
R179 R180 SUSPEND#
1 2 1K_0402_1% V15 TPB1P 43K_0402_5% JP36
R169 1 2 1K_0402_1%W15 TPB1N H3 +VCC_5IN1 41 15 +VCC_5IN1
SPKROUT PCM_SPK 27 XD-VCC SD-VCC
CPS R12 CPS R193 1 2 43K_0402_5% 9
2

MSD0_SDD0_SMD0 MS-VCC
MFUNC0 G1 PCI_PIRQE# 16 33 XD-D0
5.1K_0402_1%
220P_0402_50V8J

X_OUT R18 H5 MSD1_SDD1_SMD1 34 4 IN 1 CONN 16 SDCLK

XO MFUNC1 PCI_PIRQF# 16 XD-D1 SD_CLK
1

C276 1 X_IN R19 H2 MSD2_SDD2_SMD2 35 19 MSD0_SDD0_SMD0

XI MFUNC2 PCI_PIRQG# 16 XD-D2 SD-DAT0
R175 H1 MSD3_SDD3_SMD3 36 20 MSD1_SDD1_SMD1
MFUNC3 SERIRQ 16,31,35 XD-D3 SD-DAT1
J1 DEVICE_ID SDD0_SMD4 37 11 MSD2_SDD2_SMD2
MFUNC4 5IN1_LED SDD1_SMD5 XD-D4 SD-DAT2 MSD3_SDD3_SMD3
MFUNC5 J2 38 XD-D5 SD-DAT3 12
2 SDD2_SMD6 MSBS_SDCMD_SMWE#
J3 2 1 +3VS 39 13
2

MFUNC6 R191 10K_0402_5% SDD3_SMD7 XD-D6 SD-CMD SD_CD#

40 XD-D7 SD-CD-SW 21
SCL G2 1 R200 2 300_0402_5% SD-CD-COM 22
+3VS G3 1 2 MSBS_SDCMD_SMWE# 30 43 SDWP#_SMCE#
SDA XD-WE SD-WP-SW
VSSPLL

R199 300_0402_5% SMELWP# 31 44

XD-WP SD-WP-COM
AGND
AGND
AGND

K2 SDCMD_SMALE 29
VR_EN# XD_CD# XD-ALE MSCLK
23 XD-CD MS-SCLK 8
R174 1 2 CPS SM_RB 25 4 MSD0_SDD0_SMD0

MSCLK
XD-R/B MS-DATA0
2

SDCLK
4.7K_0402_5% PCI7412ZHK_PBGA257 1 SMRE 26 3 MSD1_SDD1_SMD1
R14
U13
U14

R17

8412@ SDWP#_SMCE# XD-RE MS-DATA1 MSD2_SDD2_SMD2

CLOSE TO CHIP R190 C311 SMCLE
27
28
XD-CE MS-DATA2 5
7 MSD3_SDD3_SMD3
18P_0402_50V8J C310 X_OUT 1K_0402_1% 0.1U_0402_16V4Z XD-CLE MS-DATA3 MS_CD#
MS-INS 6
2

2
2 MSBS_SDCMD_SMWE#
32 2
1

XD-GND MS-BS
2

R1233 R1234 24 14
X2 XD-GND SD-GND
SD-GND 17
24.576MHz_16P_3XG-24576-43E1 6.8_0402_5% 6.8_0402_5% 42 1

GND
GND
C:Change to 6.18 for EMI solution N.C. MS-GND
18 10
1

1
N.C. MS-GND
1 1
18P_0402_50V8J C304 X_IN TAITW_R007-530-L3

47
48
C788 C789 B:IALAA only to add Pin47
1P_0402_16VCB 1P_0402_16VCB and Pin48 to link to GND.
A 2 2 A

Bottom Side, Normal Insertion

Security Classification
2007/3/8
Compal Secret Data
2008/3/8 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 22 of 46
5 4 3 2 1
 5 4 3 2 1

+3VS

0.1U_0402_16V4Z
D D

C287 C308 C303

0.1U_0402_16V4Z 0.1U_0402_16V4Z

A15

P10
F12
F14

L14
J19

J14

P6
P8
F6
F9

L6
J6
U11A

VCCB
VCCB

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C10 CAD31/D10
A10 CAD30/D9
F11 CAD29/D1 DATA/VD2/VPPD1 B9
E11 CAD28/D8 CLOCK/VD1/VCCD0# A9
C11 CAD27/D0 LATCH/VD3/VPPD0 C9
B13 CAD26/A0
C13 CAD25/A1
A14 CAD24/A2
B14 CAD23/A3
B15 CAD22/A4
E14 CAD21/A5
A16 CAD20/A6
D19 CAD19/A25
E17 CAD18/A7 RSVD/D2 B10
F15 CAD17/A24 RSVD/VD0/VCCD1# C4
H19 CAD16/A17 RSVD D1
J17 CAD15/IOWR# RSVD E1
J15 E2 +3VS
CAD14/A9 RSVD
J18 CAD13/IORD# RSVD E3
K15 CAD12/A11 RSVD F2
C C
K17 CAD11/OE# RSVD F3
K18 F5 R216 0_0402_5%
CAD10/CE2# RSVD
L15 CAD9/A10 RSVD G6 2 1
L18 CAD8/D15 RSVD H17
L19 CAD7/D7 RSVD M19
M17 CAD6/D13
M18 CAD5/D6
N19 CAD4/D12 NC A2
M15 CAD3/D5 NC A17
N17 CAD2/D11 NC A18
N18 CAD1/D4 NC B1
P19 CAD0/D3 NC B2
NC B3
B17
E13
E18
CC/BE3#/REG# PCI 7412 NC
NC B18
B19
CC/BE2#/A12 NC
H18 CC/BE1#/A8 NC C1
L17 CC/BE0#/CE1# NC C2
NC C3
H14 CPAR/A13 NC C16
E19 CFRAME#/A23 NC C17
G15 CTRDY#/A22 NC C18
F17 CIRDY#/A15 NC C19
G18 CSTOP#/A20 NC D2
F19 CDEVSEL#/A21 NC D3
H15 CBLOCK#/A19 NC D17
G19 CPERR#/A14 NC D18
C12 CSERR#/WAIT# NC E5
C14 CREQ#/INPACK# NC N14
G17 CGNT#/WE# NC P18
A12 CSTSCHG/BVD1(STSCHG#/RI#) NC T3
A11 CCLKRUN#/WP(IOIS16#) NC T17
B B
F18 CCLK/A16 NC U1
E12 CINT#/READY(IREQ#) NC U2
NC U3
C15 CRST#/RESET NC U4
NC U12
B12 CAUDIO/BVD2(SPKR#) NC U16
NC U17
N15 CCD1#/CD1# NC U18
B11 CCD2#/CD2# NC V1
A13 CVS1/VS1# NC V2
B16 CVS2/VS2# NC V3
NC V4
NC V12
E10 A_USB_EN# NC V17
NC V18
NC V19
NC W2
NC W3
NC W12
W18
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

NC

8412@ PCI7412ZHK_PBGA257
F7
F10
F13
G14
H6
K6
K14
M14
N6
P7
P9

A A

Security Classification
2007/3/8
Compal Secret Data
2008/3/8 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 23 of 46
5 4 3 2 1
 +3VALW_DVD +3VS

Mini-Express Card for HDDVD

1 1
1 C391 C423
C729 DVD@ DVD@
@ 4.7U_0805_10V4Z 0.1U_0402_16V4Z
0.1U_0402_16V4Z 2 2
2
+3VS +1.5VS

JP5 +1.5VS
1 1 2 2
3 3 4 4
5 5 6 6
13 CLKREQ_DVD# 7 7 8 8 1 1
9 10 C725 C723
9 10 DVD@ DVD@ C724
13 CLK_DVD# 11 11 12 12
13 14 0.01U_0402_25V7K 0.1U_0402_16V4Z 4.7U_0805_10V4Z
13 CLK_DVD 13 14 2 2
15 15 16 16 DVD@
17 17 18 18
19 19 20 20
21 22 NB_RST#
21 22 +3VALW_DVD
11 PCIE_MRX_C_DVDTX_N0 23 23 24 24 1 2 +3VALW
25 26 R485 @ 0_0603_5% Small/B already had ESD IC
11 PCIE_MRX_C_DVDTX_P0 25 26
27 27 28 28
29 30 R278 @ 0_0402_5% SMB_CK_CLK0 SMB_CK_CLK0 8,9,13,17,29
29 30 R275 @ 0_0402_5% SMB_CK_DAT0
11 PCIE_MTX_C_DVDRX_N0 31 31 32 32 SMB_CK_DAT0 8,9,13,17,29
11 PCIE_MTX_C_DVDRX_P0 33 33 34 34
35 35 36 36
37 37 38 38
+3VS 39 39 40 40 A51 request to reserve from ISKAA
41 41 42 42
43 43 44 44
45 45 46 46
47 47 48 48
49 49 50 50
51 51 52 52

53 GND1 GND2 54

FOX_AS0B226-S40N-7F
DVD@

Mini-Express Card for WLAN

+3VS +1.5VS +3V_WLAN

+3VS_WLAN 1
R294
2
0_1206_5%
Kill SWITCH
1 1 WLAN@ 1 1 1 +3VALW
C461 C543 C495 C469 C386
WLAN@ WLAN@ C467 WLAN@ WLAN@ C487 WLAN@
0.01U_0402_25V4Z 0.1U_0402_16V4Z WLAN@ 0.01U_0402_25V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z
2 2 4.7U_0805_10V4Z 2 2 2 +3VALW
WLAN@

2
D14

@ DAN217_SC59

2
SW5 R246
5 100K_0402_5%

1
G2
G1 4
+3V_WLAN +1.5VS +3VS_WLAN

1
A: For WLAN Wake up event.
JP7 3
PCIE_WAKE# PCIE_WAKE# 3
1 2 31 PCIE_WAKE# 1 1 2 2 2 2 KILL_SW# 31
R323 100K_0402_5% 3 4 1
30 WLAN_BT_DATA 3 4 1
30 WLAN_BT_CLK 5 5 6 6
7 8 1BS003-1210L_3P
13 CLKREQ_WLAN# 7 8
9 10 WLAN@
9 10
13 CLK_WLAN# 11 11 12 12
13 CLK_WLAN 13 13 14 14
15 16 +3V_WLAN
15 16
17 17 18 18
19 20 XMIT_OFF# C387 WLAN@ 0.1U_0402_16V4Z
19 20 NB_RST#
21 21 22 22 NB_RST# 11,15,17,25,29,31,35 1 2
10 PCIE_MRX_C_WLANTX_N3 23 23 24 24 +3V_WLAN
10 PCIE_MRX_C_WLANTX_P3 25 25 26 26

5
27 27 28 28
29 30 SMB_CK_CLK0 2 D25

P
29 30 31 WL_OFF# B
31 32 SMB_CK_DAT0 4 3G_OFF# 1 2 XMIT_OFF#
10 PCIE_MTX_C_WLANRX_N3 31 32 Y
33 34 KILL_SW# 1
10 PCIE_MTX_C_WLANRX_P3 33 34 A

G
35 36 WLAN@ CH751H-40PT_SOD323-2
35 36 U15
37 38

3
37 38
39 39 40 40 WLAN@ NC7SZ08P5X_NL_SC70-5
41 41 42 42 A:Add USB I/F with WLAN conn.,
43 43 44 44 reserve to support Realtek WLAN.
45 45 46 46
47 47 48 48
49 49 50 50
51 51 52 52

53 GND1 GND2 54

FOX_AS0B226-S40N-7F
WLAN@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 24 of 46
 5 4 3 2 1

1 2 +3V_LAN
R25 +3V_LAN
3.6K_0402_5%
U4
U2
C92 1 2 0.1U_0402_16V7K PCIE_PTX_IRX_P2 29 45 4 5 2
10 PCIE_MRX_C_LANTX_P2 HSOP EEDO DO GND
47 3 6 C47 2 2 2 2 2
C93 EDDI/AUX DI NC
10 PCIE_MRX_C_LANTX_N2 1 2 0.1U_0402_16V7K PCIE_PTX_IRX_N2 30 HSON EESK 48 2 SK NC 7 C468 C450 C436 C475 C481
EECS 44 1 CS VCC 8 +3V_LAN
1 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
10 PCIE_MTX_C_LANRX_P2 23 HSIP AT93C46-10SI-2.7_SO8 0.1U_0402_16V4Z 1 1 1 1 1

10 PCIE_MTX_C_LANRX_N2 24 HSIN
LED3 54
LED2 55
D LAN_LINK# D
13 CLK_PCIE_LAN 26 REFCLK_P LED1 56
C:For 8111C only. 57 LAN_ACTIVITY# +LAN_VDD18
LED0
13 CLK_PCIE_LAN# 27 REFCLK_N
C:Power cap balance.
8111C@ 20 3 LAN_MDI0+ +AVDD18
11,15,17,24,29,31,35 NB_RST# PERSTB MDIP0
R483 0_0603_5% 4 LAN_MDI0- R293 0_0603_5%
+LAN_CTRL15 MDIN0 LAN_MDI1+ 8111B@
+3V_LAN 1 2 MDIP1 6 2 2 2 2 2 2
+LAN_CTRL18 1 7 LAN_MDI1- C466 C451 C472 C460 C455
VCTRL18 MDIN1 C440
1

2 +LAN_CTRL15 63 9 LAN_MDI2+ 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

C727 VCTRL15 MDIP2 LAN_MDI2- 1 1 1 1 1 1
MDIN2 10
D49 8111C@ 100M@ R284 1 2 2K_0402_1% 64 12 LAN_MDI3+
MMGZ5226BPT 0.1U_0402_16V4Z RSET MDIP3 LAN_MDI3-
2 1 MDIN3 13
@ 1 R283 1G@ 2.49K_0402_1%
2

EC_PME# 19
31 EC_PME# LANWAKEB
VDD15 15 +LAN_VDD15
21 +LAN_VDD15
R291 1 VDD15
+3VS 2 1K_0402_1% 36 ISOLATEB VDD15 32
33 CLKREQ_LAN 1 2 +LAN_VDD15
R292 VDD15 R480 0_0603_5% R481 8111C@
VDD15 38 10mil
LAN_X1 60 41 8111B@ 2 2 2 2 2 2 0_0603_5%
CKXTAL1 VDD15 C454 C476 C478 C459 C435 C437
VDD15 43 B:Reserve for 8111C.
B:1.For 8111C only. 15K_0402_5% LAN_X2 61 49 B:Mount for 8101E and 8111B.
CKXTAL2 VDD15 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2.Chg. 100U to 22Ux2 bec'z no enough space. VDD15 52
1 1 1 1 1 1
VDD15 58
+3V_LAN 1 2 +3V_LAN_R 62
R482 0_0603_5% GVDD
8111C@ VDD33 16 +3V_LAN
65 37 +3V_LAN
EXPOSE_PAD VDD33
A:For LAN Wake up 1 2 VDD33 53
+3V_LAN 25 46 +AVDD33 1 2
C438 C429 EGND VDD33 L47 0_0603_5%
1 2
C 1000P_0402_50V7K +AVDD33 C434 C439 C
0.1U_0402_16V4Z 31 EGND AVDD33 2
EC_PME# 8111B@ 2 1
1 2 8111B@
100K_0402_5% R31 59 10U_0805_10V4Z 0.1U_0402_16V4Z
AVDD33 2 1
DVT: Change to SE074102K80 17
Y1 NC +3V_LAN +3V_LAN
18 NC AVDD18 5 +LAN_VDD18 Mount for 8111B Only
LAN_X1 2 1LAN_X2 35 8
NC AVDD18
34 NC AVDD18 11
25MHZ_20P 39 14
NC AVDD18

3
1 1 40 Q42 Q6
C65 C66 NC
42 NC
50 22 +AVDD18 +LAN_CTRL18 1 +LAN_CTRL15 1
27P_0402_50V8J 27P_0402_50V8J NC EVDD18 8111B@ 8111B@
2 2
51 NC 40mil 40mil
28 2SB1188T100R_SC62-3 2SB1188T100R_SC62-3
EVDD18

2
8111B@ RTL8111B_QFN64 L46 40mil
Mount for 8101E Only 1 2 +LAN_VDD18 40mil
8101E@ 0_0603_5% 1 2 +LAN_VDD15
1 L48 0_0603_5% 1
C: Add Inductor 4.7uH L78
Place Close to Chip 1 2
2
C477 C482 +
8101E@
+ C464
1
C473
8101E@ 8111C@ 4.7UH_1008HC-472EJFS-A_5%_1008 8101E@ 8111B@ 8111B@
+LAN_VDD18 8101E@ R26 2 1 49.9_0402_1% LAN_MDI0- 0.1U_0402_16V4Z 22U_A_4VM 22U_A_4VM 1000P_0402_50V7K
1 1 1 2 2 2
C449 2 1 R24 2 1 49.9_0402_1% LAN_MDI0+
C444 + +
0.01U_0402_25V4Z 8101E@ 8101E@ C452
22U_A_4VM 22U_A_4VM DVT: Change to SE074102K80
8101E@ 2 2
1

8101E@ R28 2 1 49.9_0402_1% LAN_MDI1-

8101E@ 8101E@ C458 2 1 R27 2 1 49.9_0402_1% LAN_MDI1+
R82 R83
B 0_0402_5% 0_0402_5% 0.01U_0402_25V4Z B
8101E@ Mount for 8111C Only LAN Conn.
Place Close to Chip
2

JP28
+3V_LAN 12 Amber LED+
U23 LAN_ACTIVITY# 2 R387 1 300_0402_5% 11 Amber LED-
1 SHLD2 16
1 24 C601 RJ45_MIDI3- 8
LAN_MDI3- TCT1 MCT1 RJ45_MIDI3- 68P_0402_50V8J PR4-
2 TD1+ MX1+ 23 SHLD1 15
LAN_MDI3+ 3 22 RJ45_MIDI3+ RJ45_MIDI3+ 7
TD1- MX1- 2 PR4+
4 21 RJ45_MIDI1- 6
LAN_MDI2- TCT2 MCT2 RJ45_MIDI2- PR2-
5 TD2+ MX2+ 20
LAN_MDI2+ 6 19 RJ45_MIDI2+ RJ45_MIDI2- 5
TD2- MX2- PR3-
7 18 RJ45_MIDI2+ 4
LAN_MDI1- TCT3 MCT3 RJ45_MIDI1- PR3+
8 TD3+ MX3+ 17
LAN_MDI1+ 9 16 RJ45_MIDI1+ RJ45_MIDI1+ 3
TD3- MX3- PR2+
10 15 RJ45_MIDI0- 2
LAN_MDI0- TCT4 MCT4 RJ45_MIDI0- PR1-
11 TD4+ MX4+ 14 SHLD2 14
LAN_MDI0+ 12 13 RJ45_MIDI0+ RJ45_MIDI0+ 1
TD4- MX4- PR1+
SHLD1 13
LAN_LINK# 2 R345 1 10 Green LED-
1

1 1 1 300_0402_5%
1G@ R84 R81 9
C118 C120 NS892402 C565 +3V_LAN Green LED+
0.1U_0402_16V4Z 0.1U_0402_16V4Z 75_0402_1% 75_0402_1% 68P_0402_50V8J C166 TYCO_3-440470-4
1

2 2 C:Change for EMI 2 RJ45_GND LANGND

1G@ 1G@ 1 1 1 2
2

R80 R78 1 1
C121 C135 1000P_1206_2KV7K C141 C174
A 75_0402_1% 75_0402_1% A
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 0.1U_0402_16V4Z 4.7U_0805_10V4Z
1G@ 1G@
2

RJ45_GND 2 2
PreMP:Change C118,C120,C121,C135
for EMI solution

Place these components

colsed to LAN chip Security Classification Compal Secret Data Compal Electronics, Inc.
GST5009 for GIGA LAN Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

TST1284 for 10/100 LAN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 25 of 46
5 4 3 2 1
 5 4 3 2 1

Fix 4.75V Output

HD Audio Codec +5VALW
U31
+VDDA
+5VALW U36 +VDDA
+VDDA
4 VIN VOUT 5 4.75v +VDDA

0.1U_0402_16V4Z
1 VIN VOUT 5

2
2 DELAY SENSE or ADJ 6
R221 C:BOM structure change for APL5151 2 GND
7 ERROR CNOISE 1
C376 @ 69.8K_0603_1% 1 1 3 4 1
C380 C353 SHDN# BP
@ 8 3

1
SD GND @ 4.7U_0805_10V4Z C753 C754 C755
4.7U_0805_10V4Z 2
@ SI9182DH-AD-T1-E3_MSOP8 4.7U_0805_10V4Z APL5151-475BC-TRL_SOT23-5 @ 4.7U_0805_10V4Z
2 2 C756 2
@

1
D GMT982 C360 0.22U_0402_6.3V6K D
0.1U_0402_16V4Z R222 0.1U_0402_16V4Z 1
@
29,31,33,36,41 SYSON @ 24K_0402_1%
SYSON
Moat Bridge

2
+3V_DVDD
+AVDD_HD
40mil L27
L29 1 2 0.1U_0402_16V4Z 680P_0402_50V7K 0.1U_0402_16V4Z 10U_0805_10V4Z 20mil 1 2
+VDDA +3VS
FBMA-L11-160808-800LMT_0603 1 1 1 1 1 1 1 FBMA-L11-160808-800LMT_0603
C373 C372 C359 C366 C327 C331 C332 C328
C371
10U_0805_10V4Z
2 2 2 2 2 2
0.1U_0402_16V4Z 2 680P_0402_50V7K

25

38

9
0.1U_0402_16V4Z U29
100P_0402_25V8K 1 2

AVDD1

AVDD2

DVDD_IO
DVDD
@
@ C368 C367
CAMERA@ CAMERA@ @ 10P_0402_50V8J @ 10P_0402_50V8J
2 1
+MIC2_VREFO 1 R380 2 1 2 14 NC LINE_OUT_L 35 AMP_SPK_L
AMP_SPK_L 27
JP16 4.7K_0402_5% C3371 2 100P_0402_25V8K SPK output to AMP
4 NC2 2 2 INT_MIC C3381 2 1U_0402_6.3V4Z 15 NC 36 AMP_SPK_R
LINE_OUT_R AMP_SPK_R 27
3 NC1 1 1 2 1 C3461 2 1U_0402_6.3V4Z
C591 C345 100P_0402_25V8K MIC2_L 16 39
MIC2_L HP_OUT_L AMP_HP_L 27
C CAMERA@ CAMERA@ 220P_0402_50V8J CAMERA@ HP output to AMP C
ACES_85204-0200N @ MIC2_R 17 MIC2_R 41
HP_OUT_R AMP_HP_R 27
1 2
C7491 2 100P_0402_50V8J @ LINE1_C_L 23 LINE1_L 45
28 LINE1_L C750 1U_0402_6.3V4Z NC
1 2 LINE1_C_R 24 LINE1_R 46
28 LINE1_R C7511 DMIC_CLK
2 1U_0402_6.3V4Z @
C752 100P_0402_50V8J 18 CD_L 43 AZ_BITCLK_HD
C714 1 NC
2 1U_0402_6.3V4Z
C711 1 2 100P_0402_50V8J 20 CD_R 44
NC

2
@ 100P_0402_25V8K 19 CD_GND
R454
@ C350 1 2 6 AZ_BITCLK_HD @ 10_0402_5%
BIT_CLK AZ_BITCLK_HD 17
MIC1_L 1 2 MIC1_C_L 21
28 MIC1_L MIC1_L
C351 1U_0402_6.3V4Z

1
MIC1_R 1 2 MIC1_C_R 22 8 AZ_SDIN3_HD_R 1 2
28 MIC1_R MIC1_R SDATA_IN AZ_SDIN3_HD 17
C356 1 2 1U_0402_6.3V4Z R453 33_0402_5%
@ C355 100P_0402_25V8K 12 37 AMP_SUB 28
27 MONO_IN PCBEEP MONO_OUT
1 2 1
@ C707 100P_0402_25V8K 29 C708
LINE1_VREFO @ 10P_0402_50V8J
17 AZ_RST_HD# 11 RESET#
GPIO1 31 SPDIF_SENSE 28 2
B:Chg. to link w/ SB600 bec'z chg. to KB926.
17 AZ_SYNC_HD 10 SYNC
28
10mil
MIC1_VREFO_L +MIC1_VREFO_L
17 AZ_SDOUT_HD 5 SDATA_OUT
32
10mil
MIC1_VREFO_R +MIC1_VREFO_R
17 SPK_SEL 2
3
GPIO0
30
10mil
17 SUBWOOFER GPIO3 MIC2_VREFO +MIC2_VREFO
SENSE_A 10U_0805_10V4Z
B 28 HP_SENSE
R455
2 1
39.2K_0402_1% SENSE_B
13
34
SENSE A
27
10mil C720 1 2
B
SENSE B VREF
28 MIC_SENSE 1 2
R456 20K_0402_1% 47 40 1 2
EAPD JDREF C721 100P_0402_25V8K
28 LINE_SENSE 1 2
R1207 10K_0402_1% 48 SPDIFO NC 33 1 @
1 2
R464 CAMERA@ 20K_0402_1% 4 26 R224
DVSS1 AVSS1 20K_0402_1%
31 EAPD 7 DVSS2 AVSS2 42
28 SPDIF
2

ALC268-GR_LQFP48

AGND
DGND

DGND To AGND Bypass

Sense Pin Impedance Codec Signals
1 2
39.2K PORT-A (PIN 39, 41) R247 0_0603_5%
1 2
R207 0_0603_5%
20K PORT-B (PIN 21, 22) 1
R206
2
0_0603_5%
SENSE A
10K PORT-C (PIN 23, 24)

A 5.1K PORT-D (PIN 35, 36) A

DGND AGND
39.2K PORT-E (PIN 14, 15)

20K PORT-F (PIN 16, 17)

SENSE B
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title
10K PORT-G (PIN 43, 44)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
5.1K PORT-H (PIN 45, 46) DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 26 of 46
5 4 3 2 1
 A B C D E

HP_EN +5VS
HP_EN 28,31
1
Volume Control

1
C325
@ 0.01U_0402_25V4Z +3VS
2 R205
100K_0402_5% +HVDD +3VS

1
2
R201 C717 R457
28,31 EC_EAPD_R# 2 1 @ 0_0402_5% EC_EAPD# +3VS 1 2 100K_0402_5%

1
1 +5VS 1 2 0_0603_5%
R487 @ W=20mil R463 R460 0.1U_0402_16V4Z

2
5
4 C326 1 2 0_0603_5% SW6 10K_0402_5% 10K_0402_5% +3VS 4
+3VS

1
0.01U_0402_25V4Z @ R486 1

DIP
2

10U_0805_10V4Z
0.1U_0402_16V4Z

1U_0402_6.3V4Z
1 2

NC
2

2
C790 C365 2 4 C710
A Y

@
PreMP: reserve for +HVDD power 2 1 2
A

G
R461 10K_0402_5% 74LVC1G14GW_SOT353-5 2
2 1 U32 U28

3
COM 1 1 CD1# VCC 14
+5VS 2 13
D1 CD2#
W=80mil 3 CP1 D2 12
C713
B 3 1 2 4 SD1# CP2 11
R462 10K_0402_5%

0.1U_0402_16V4Z
1 1 5 Q1 SD2# 10

680P_0402_50V7K

10U_0805_10V4Z
C715 C716

0.1U_0402_16V4Z

1U_0402_6.3V4Z

0.01U_0402_25V4Z

0.01U_0402_25V4Z
1 2 1 6 Q1# Q2 09 1

DIP
C357 C335 C718 C374 7 08
SW_XRE094_3P GND Q2#
2 2 74LCX74MTC_TSSOP14

4
2 1 2 2

11

19

10
20
ENCODER_DIR 31

1
U30
ENCODER_PULSE 31

CVDD

HVDD

PVDD
PVDD

VDD
AMP_SPK_R 1 2 AMPR
26 AMP_SPK_R
C340 0.22U_0402_10V4Z 3 22
INR_A ROUT+ H_SPK_R+ 28
AMP_SPK_L 1 2 AMPL 5 21
26 AMP_SPK_L
C348
R208 1
0.22U_0402_10V4Z
2 100K_0402_5% AMP_EN# 27
INL_A ROUT-
8
H_SPK_R- 28

H_SPK_L+ 28
APA2068 Medium Range Amplifier
3
/AMP EN LOUT+ +5VSA 3
LOUT- 9 H_SPK_L- 28
+5VS R223 1 2 100K_0402_5% HP_EN 24 HP_EN
HP_R 17 HP_R 28
26 AMP_HP_R 1 2 AMP_RHPIN R458 1 2 AMP_RHPIN_L 4 INR_H HP_L 18 HP_L 28
C709 2.2U_0603_6.3V4Z 24K_0402_5% 6 INL_H
26 AMP_HP_L 1 2 AMP_LHPIN R459 1 2 AMP_LHPIN_L 1 1
C712 2.2U_0603_6.3V4Z 24K_0402_5% EC_EAPD# 26 +5VSA 0.1U_0402_16V4Z C730 C731
SET/SD# CVSS 5SPK@
CVSS 15
1 2 AMP_BEEP 28 5SPK@ 10U_0805_10V4Z
BEEP

1
C333 1U_0402_6.3V4Z R1192 2 2 U34
HVSS 16
AMP_CP+ 12 1 5SPK@ 10 1 SPK_MUTE 5SPK@
AMP_CP- CP+ C722 100K_0402_5% VDD MUTE R1193 1
2 1 14 CP- GND 2 15 VDD SHUTDOWN# 2 2 +5VSA
C719 2.2U_0603_6.3V4Z 100K_0402_5%

2.2U_0603_6.3V4Z
PGND 23
2 1 AMP_BIAS 25 7 9 M_SPK_L- 28

2
C344 2.2U_0603_6.3V4Z BIAS PGND 2 VOLUME VOLUME LOUT-
CGND 13 7 VOLUME
1 2 GND 29 ROUT- 16 M_SPK_R- 28

1
C336 0.1U_0402_16V4Z 8
Gain HP 0dB APA2057ARI-TRL_TSSOP28 R1194 VOLMAX
LOUT+ 11 M_SPK_L+ 28
5SPK@ 100K_0402_5% 1 R1195 2 13
SPK 10dB B:Co-Layout for 10K_0402_5% 5SPK@ SE/BTL#
ROUT+ 14 M_SPK_R+ 28
LIN- 6

2
APA2056A and APA2057A RIN- 3
LIN-
RIN-
GND 5
4 BYPASS GND 12
+3VS APA2068KAI-TRL_SOP16
+VDDA 1 1
0.1U_0402_16V4Z C732 C733 5SPK@
2.2U_0805_10V6K
1

5SPK@ 5SPK@
1

2 R445 2 2 2
10K_0402_5% R451
20K_0402_5% Pin2 /SD should be tied to 5V always and mute pin controled by EC_EAPD
EC Beep
2

C702 1 R446
31 BEEP# 2 1 2
1U_0402_6.3V4Z 560_0402_5% C706 C734
1 2 5SPK@ R1196 1K_0402_1% 0.47U_0402_6.3V6K
MONO_IN 26
AMP_SPK_L 1 2 1 2 1 2 LIN-
1U_0402_6.3V4Z +5VS 5SPK@ C735
PCI Beep R443 1 2 1U_0402_6.3V4Z 5SPK@

2
C701 1 2 1 2 2
17 SB_SPKR R452
1

1
1U_0402_6.3V4Z 560_0402_5% C R1197
Q60 2.4K_0402_5% 5.11K_0402_1% C736
2
B MMBT3904_SOT23-3 R1216 5SPK@ 33N_0402_16V7K
E 5SPK@ 100K_0402_5% 1 5SPK@
3

1
2
SPK_MUTE
CardBus Beep R448 C737
C703 1 2 1 2 R1198 1K_0402_1% 0.47U_0402_6.3V6K
22 PCM_SPK

1
1U_0402_6.3V4Z D AMP_SPK_R RIN-
560_0402_5% 1 2 1 2 1 2
1

2 PCMCIA@ PCMCIA@ D36 HP_EN 2 Q140 5SPK@ C738

G 2N7002_SOT23-3 1U_0402_6.3V4Z 5SPK@

2
C704 @ R447 S 5SPK@ 2

3
0.01U_0402_25V4Z 10K_0402_5% CH751H-40PT_SOD323-2 R1199
1 5.11K_0402_1% C739
PCMCIA@
2

5SPK@ 33N_0402_16V7K
1 5SPK@

1
1 1

A:Set PCMCIA@ on CardBus Beep circuit

B:Remove NSE_DPR circuit, bec'z chg. to KB926.

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 27 of 46
A B C D E
 5 4 3 2 1

+MIC1_VREFO_L +MIC1_VREFO_R
MICROPHONE
Tweeter Conn. IN JACK
10mil 10mil

1
R242 R243
JP39
4.7K_0402_5% 4.7K_0402_5% 5

2
L9 1 2 HLMA-160808-39NKT HSPK_R+ 4
27 H_SPK_R+ 26 MIC_SENSE
D L10 1 2 HLMA-160808-39NKT HSPK_R- 8 D
27 H_SPK_R-
MIC1_R 1 2 L33 MIC1_R_1 3
26 MIC1_R
D3 KC FBM-L11-160808-121LMT 0603 6
2 MIC1_L 1 2 L32 MIC1_L_1 2 7
26 MIC1_L
1 JP6 KC FBM-L11-160808-121LMT 0603 1

2
220P_0402_50V7K

220P_0402_50V7K
3 HSPK_R+ 1 1 1
1

SM05_SOT23
HSPK_R- 2 FOX_JA6033L-5S1-TR
@ SM05_SOT23 MSPK_R+ 2 C383 C384 @ AGND
3 3

1
MSPK_R- 4 4 2 2 J2 J3
5

1
L18 1 HLMA-160808-39NKT HSPK_L+ G5
27 H_SPK_L+ 2 6 JUMP_43X39 JUMP_43X39

1
L19 1 HLMA-160808-39NKT HSPK_L- G6 D17
27 H_SPK_L- 2 @ @

2
ACES_85205-04001
D6

2
2
1
3
@ SM05_SOT23
Medium SPK Conn. HEADPHONE OUT JACK
JP38
JP18 5
HSPK_L+ 1
HSPK_L- 1
2 2 26 HP_SENSE 4
5SPK@ MSPK_L+ 3 R245 8
L70 1 HLMA-160808-39NKT MSPK_R+ MSPK_L- 3 HP_R L31 1
27 M_SPK_R+ 2 4 4 27 HP_R 2 1 2 20_0402_1% HPR 3
L71 1 2 HLMA-160808-39NKT MSPK_R- 5 KC FBM-L11-160808-121LMT 0603 R244 6
27 M_SPK_R- G5
5SPK@ 6 HP_L L30 1 2 1 2 20_0402_1% HPL 2 7
G6 27 HP_L
C D39 KC FBM-L11-160808-121LMT 0603 1 C

10P_0402_50V8J

10P_0402_50V8J
2 ACES_85205-04001 1 1

2
1 R241 R240 FOX_JA6033L-5S1-TR
3 @ 47K_0402_5% @ 47K_0402_5% D18 AGND
@ C381 C382 @
SM05_SOT23 2 2

2
SM05_SOT23
5SPK@

1
L72 1 2 HLMA-160808-39NKT MSPK_L+
27 M_SPK_L+
L73 1 2 HLMA-160808-39NKT MSPK_L-
27 M_SPK_L-
5SPK@
D40

1
2 LINE IN JACK
3
@ JP51
SM05_SOT23 5

26 LINE_SENSE 4
8
Sub-woofer Conn. 26 LINE1_R
LINE1_R 1 2 L74
KC FBM-L11-160808-121LMT 0603
LINE1_R_1 3
6
LINE1_L 1 2 L75 LINE1_L_1 2 7
26 LINE1_L
KC FBM-L11-160808-121LMT 0603 1

2
220P_0402_50V7K

220P_0402_50V7K
1 1

SM05_SOT23
FOX_JA6033L-5S1-TR
C740 C741 @ AGND

SM05_SOT23 D42 2 2
B B
2

1
1 D41
3
@ JP52
INTSPK_SUB+ L76 1 2 HLMA-160808-39NKT SPK_SUB+
INTSPK_SUB- L77 1 HLMA-160808-39NKT SPK_SUB- 1 +3VS +5VS
2 2

2
ACES_85204-0200
R1200 R1201 S/PDIF OUT JACK
100K_0402_5% 100K_0402_5%
+5VS

1
5SPK@ 0_0603_5% JP53
+5VSA 1 2 26 SPDIF_SENSE 2 1 1
+5VS R218 1 2 CH751H-40_SC76 D43 2

3
S
R233 2SPK@ 0_0603_5% Q136 6

0.1U_0402_16V4Z
1
C742
1
C743
APA3011 Subwoofer Amplifier G
2 SPDIF_PLUG# 3

SUB@ SUB@ AO3413_SOT23 D 5

1
10U_0805_10V4Z
2 2
4

+5VSPDIF
20mil 26 SPDIF 7
8
10
INTSPK_SUB+ SUB@ U35 1
C745 6 VDD SHUTDOWN# 1 HP_EN 9
HP_EN 27,31
22K_0402_1% 2.2N_0603_100V7K C744
A 1 SUB@ 2 1 2 3 IN+ Vo+ 5
INTSPK_SUB+ 100P_0402_50V8J ACES_20234-0101
A
R1205 R1204 2
C746 1 2 1 R1206 2 4 IN- INTSPK_SUB- Normal OPEN
26 AMP_SUB
SUB@ 12K_0402_1% SUB@ 56K_0402_1% Vo- 8
SUB@ 2.2U_0603_6.3V6K 1 2 2 BYPASS
C747 GND 7
SUB@ 0.022U_0402_16V7K GND 9

C748
APA3011XA-TRL_MSOP8
SUB@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

SCHEMATIC MB A3831
SUB@ 2.2U_0603_6.3V6K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 28 of 46
5 4 3 2 1
 +5VS
Place Components closely to ODD Conn.
MDC 1.5 Conn. ODD CONN
1 1 1 1 1
+3V_SB C586 C579 C578 C580
C585
10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z
2 2 2 2 2
1 1 1
0.1U_0402_16V4Z 0.1U_0402_16V4Z
C569 C563 C562 +3VS
1000P_0402_50V7K MDC@ 0.1U_0402_16V4Z MDC@ 4.7U_0805_10V4Z
2 2 2 +3VS

14
U20C
1 2 IDE_SDIORDY 9

P
DVT: Change to SE074102K80 17 SIDERST# A
R382 4.7K_0402_5% 8 SIDE_RST#
NB_RST# O
11,15,17,24,25,31,35 NB_RST# 10 B

G
SN74LVC08APW_TSSOP14

7
JP14 +3V_SB

1 2 IDE_SDD[0..15]
GND1 RES0 17 IDE_SDD[0..15]
17 AZ_SDOUT_MD 3 IAC_SDATA_OUT RES1 4
5 GND2 3.3V 6
17 AZ_SYNC_MD 7 8 JP29
IAC_SYNC GND3 C771 1
17 AZ_SDIN0_MD 2 1 9 IAC_SDATA_IN GND4 10 2 @ 0.1U_0402_16V4Z 1 2 @ 0.1U_0402_16V4Z 2 1 C772
17 AZ_RST_MD# R357 MDC@ 33_0402_5% 11 12 AZ_BITCLK_MD 17 C773 1 2 @ 0.1U_0402_16V4Z 3 4 @ 0.1U_0402_16V4Z 2 1 C774
IAC_RESET# IAC_BITCLK SIDE_RST# IDE_SDD8
C571 5 6
R358 IDE_SDD7 7 8 IDE_SDD9
2 1 1 2 IDE_SDD6 9 10 IDE_SDD10

GND
GND
GND
GND
GND
GND
IDE_SDD5 11 12 IDE_SDD11
@ 10_0402_5% @ 10P_0402_50V8J IDE_SDD4 13 14 IDE_SDD12
MDC@ IDE_SDD3 15 16 IDE_SDD13

13
14
15
16
17
18
ACES_88018-124G IDE_SDD2 17 18 IDE_SDD14
IDE_SDD1 19 20 IDE_SDD15
Connector for MDC Rev1.5 IDE_SDD0 21 22 IDE_SDDREQ 17
23 24 IDE_SDIOR# 17
17 IDE_SDIOW# 25 26
IDE_SDIORDY 27 28
17 IDE_SDIORDY IDE_SDDACK# 17
17 INT_IRQ15 29 30
31 32 IDE_PDIAG# 1 2 R363 +5VS
17 IDE_SDA1
+3VS +3V_SB +1.5VS 33 34 100K_0402_5%
17 IDE_SDA0 IDE_SDA2 17
17 IDE_SDCS1# 35 36 IDE_SDCS3# 17
2 1 37 38 W=80mils
+5VS +5VS
R374 100K_0402_5% +5VS 39 40
1 1 1 1 1 1 41 42
C315 C306 C317 43 44 2 1
NEW@ C305 NEW@ C307 NEW@ C318 45 46
0.1U_0402_16V4Z @ 10U_0805_10V4Z 0.1U_0402_16V4Z @ 10U_0805_10V4Z 0.1U_0402_16V4Z @ 10U_0805_10V4Z 2 1 SEC_CSEL 47 48 C584 0.1U_0402_16V4Z
2 2 2 2 2 2 R348 470_0402_5% 49 50
53 54

SUYIN_800194MR050S110ZL

+3VALW_CARD +3VS_CARD +1.5VS_CARD

A:This symbol is for IALAA
Imax = 0.275A Imax = 1.35A Imax = 0.75A only, to add these two
pins for Boss Hole.
1 1 1 1 1 1
C312 C313 C321 C316 C323 C322
NEW@ NEW@ NEW@ NEW@ NEW@ NEW@
10U_0805_10V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2

B:relink DC030006O00.
JP20
+3V_SB
1 GND
17 USBP9- 2 USB_D-
U12 17 USBP9+ 3 USB_D+
1 2 CP_USB# 60mils CP_USB# 4 CPUSB#
R204 NEW@100K_0402_5% +3VS 5 7 +3VS_CARD 5
3.3Vin1 3.3Vout1 RSV
6 3.3Vin2 3.3Vout2 8 6 RSV
8,9,13,17,24 SMB_CK_CLK0 7 SMB_CLK
1 2EXP_CPPE# 8,9,13,17,24 SMB_CK_DAT0 8 SMB_DATA
R203 100K_0402_5% 40mil +1.5VS_CARD 9 +1.5V
+3V_SB 21 3.3Vaux_in Aux_out 20 +3VALW_CARD 10 +1.5V
16,31 EC_SWI# 11 WAKE#
share with USB OC PIN 40mil +3VALW_CARD
PERST#
12 +3.3VAUX
+1.5VS 18 1.5Vin1 1.5Vout1 16 +1.5VS_CARD 13 PERST#
19 1.5Vin2 1.5Vout2 17 +3VS_CARD 14 +3.3V
need always pull high CLKREQ#
15
16
+3.3V
CP_USB# EXP_CPPE# CLKREQ#
14 CPUSB# 17 EXP_CPPE# 17 CPPE#
EXP_CPPE# 15 23 18 31
CPPE# OC# 13 CLK_NEW# REFCLK- GND
15,31,36,39 SUSP# 4 STBY# 13 CLK_NEW 19 REFCLK+ GND 32
3 22 RCLKEN 20
26,31,33,36,41 SYSON SHDN# RCLKEN GND
NB_RST# 2 9 PERST# 11 PCIE_MRX_C_NEWTX_N1 21
+3VS +3VS SYSRST# PERST# PERn0
11 PCIE_MRX_C_NEWTX_P1 22 PERp0
23 29
GND

NC1
NC2
NC3
NC4
NC5

GND GND
11 PCIE_MTX_C_NEWRX_N1 24 PETn0 GND 30
1

+3VS R185 1 11 PCIE_MTX_C_NEWRX_P1 25

NEW@ C300 NEW@ PETp0
26
11

1
10
12
13
24

10K_0402_5% NEW@ TPS2231PWPR_PWP24 GND

C:Swap PCIE Tx/Rx signals.
1

0.1U_0402_16V4Z 27
R183 2 GND
28
2

GND
5

NEW@ U10
10K_0402_5% CLKREQ# 2 NEW@ TYCO_1759056-1
G Vcc

B
4 CLKREQ_NEW# 13
2

Y
1 A
1

D NC7SZ32P5X_NL_SC70-5
3

RCLKEN 2 Q22 NEW@

G 2N7002_SOT23-3 Security Classification Compal Secret Data Compal Electronics, Inc.
S NEW@ Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title
3

C:Chg. PN to SB770020010. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 29 of 46
 Int.Check
Camera
5VS or 3VS
Conn +CAM_VDD
USB CONN. WCM2012F2S-900T04_0805 +5VALW
W=20mils
4 4 3 3 D7
+5VALW 1 2 USBP1+_R
17 USBP1+
R484 CAMERA@ 0_0603_5% 1 USBP1-_R 4 2 USBP1-_R
+5VALW 17 USBP1- VIN IO1
+5VS 1 2 C566 1 2
JP11 R343 @ 0_0603_5% 0.1U_0402_16V4Z 1 2 USBP1+_R 3 IO2 GND 1
1 CAMERA@ L21
1

2
2 @ PRTR5V0U2X_SOT143-4
2 2 USBP8- 17
3 D_CAM@ +5VALW
3 USBP8+ 17
4 R1223 1M_0402_5%
4
5 5

3
S
6 R1224

1
GND1 G +5VALW
GND2 7 1 2 2
D_CAM@ Q141 L24
D9
ACES_88266-05001 100K_0402_5% 2 D D_CAM@ 4 3

1
CAMERA@ C782 AO3413_SOT23 4 3 USBP0+_R USBP0-_R
17 USBP0+ 4 VIN IO1 2

1
D D_CAM@ USBP0-_R
+CAM_VDD 17 USBP0-
2 Q142 1000P_0402_50V7K 1 2 USBP0+_R 3 1
17 CAM_PW 1 1 2 IO2 GND
G
D_CAM@ S DVT:Change to SE074102K80 WCM2012F2S-900T04_0805 @ PRTR5V0U2X_SOT143-4

3
+5VS 2N7002_SOT23-3
D32 +5VALW +USB_VCCC
4 2 USBP8- U7
VIN IO1
1 GND OUT 8
USBP8+ 3 1 2 7
IO2 GND IN OUT
3 IN OUT 6
@ PRTR5V0U2X_SOT143-4 4 5 1
EN# FLG
C231 G528P1UF_SO8 C672
@ 4.7U_0805_10V4Z 0.1U_0402_16V4Z
2
DVT:Change to SE074102K80
+3VS

DVT: Update CIR Footprint to IR_TSOP6238-TR_4P

Fingerprint Conn 31 USB_EN#
USB_EN#
+USB_VCCC +USB_VCCC
1
C598 1 W=120mils
FP@ 1 1 1 1 1
0.1U_0402_16V4Z C681 + C643 C644 C677 C674
2 JP17 150U_Y_6.3VM C653 +

CIR C375 1
U33 1
2
2 2
0.1U_0402_16V4Z
1000P_0402_50V7K
2
@ 150U_D2_6.3VM
2
0.1U_0402_16V4Z
2 2
1000P_0402_50V7K

GND 17 USBP2- 3
CIR@ 17 USBP2+
4.7U_0805_10V4Z 2 4 JP30
GND 5
1 VCC VCC 5
+5VALW 2 R230 1 3 VCC
FP@ACES_85201-0505 USBP1-_R 2 D0- D1- 6 USBP0-_R
CIR@ 100_0805_5% USBP1+_R 3 7 USBP0+_R
D0+ D1+
31 CIR_IN 4 ROUT +3VS 4 VSS VSS 8
CIR@ TSOP6238TR_4P 10 9
D34 G2 G1
12 G4 G3 11
4 2 USBP2-
VIN IO1
USBP2+ 3 1
IO2 GND SUYIN_020122MR008S506ZL_8P
@ PRTR5V0U2X_SOT143-4

BlueTooth Interface
+5VS +3VS
USB Small Board
2

R347 C557
1M_0402_5% BT@ W=80mils
BT@ 0.1U_0402_16V4Z
+5VALW
3

S
R346 +USB_VCCA +USB_VCCB +USB_VCCA
1

G
1 2 2 U27 JP22
BT@ 100K_0402_5% Q52 1 8 1
BT@AO3413_SOT23 GND OUT 1
2
D 2 7 2
1

BT@ IN OUT 2
3 IN OUT 6 3 3
C558 1000P_0402_50V7K USB_EN# 4 5 4
EN# FLG 4
+BT_VCC 5 5
1

D 1 C705 G528P1UF_SO8 6 6
2 Q51 @ 4.7U_0805_10V4Z +5VALW 7
31 BT_PWR DVT: Change to SE074102K80 7
G BT@ 8
2N7002_SOT23-3 8
S 17 USBP5- 9
3

JP12 9
17 USBP4+ 10 10
1 1 +5VALW 17 USBP5+ 11 11
2 +USB_VCCB 12
17 USBP3+ 2 17 USBP4- 12
3 U37 13
17 USBP3- 3 13
24 WLAN_BT_CLK 4 4 1 GND OUT 8 14 14
17 BT_DET# 5 5 2 IN OUT 7 17 USBP7- 15 15
31 BT_RST# 6 6 3 IN OUT 6 17 USBP6+ 16 16
7 USB_EN# 4 5 17 USBP7+ 17
24 WLAN_BT_DATA (MAX=200mA) 7 EN# FLG 17
+BT_VCC 8 8 17 USBP6- 18 18
BT_DETACH 9 C757 G528P1UF_SO8 19
9 @ 4.7U_0805_10V4Z 19
10 10 20 20
1
ACES_87213-1000 Aces_88242-2001_20P
2

C570 C567 BT@

BT@ BT@
R477 2
BT@4.7K_0402_5%
10U_0805_10V4Z 0.1U_0402_16V4Z
1

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 30 of 46
 5 4 3 2 1

DVT:Change to SE074102K80 +3VALW

+3VALW
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 C572 1 1 2 2 C575 L55
C582 1 2 ECAGND 2 1
C540 C546 C600 C551 0_0603_5%
1000P_0402_50V7K1000P_0402_50V7K 0.1U_0402_16V4Z
2 2 2 2 1 1

111
125
0.1U_0402_16V4Z 0.1U_0402_16V4Z

22
33
96

67
9
U24
BATT_TEMPA 2 1 ECAGND

VCC
VCC
VCC
VCC
VCC
VCC

AVCC
C574 0.01U_0402_25V4Z

D D
CLK_PCI_EC 1 21 R364
16 GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F INVT_PWM 15
2 23 100K_0402_5%
16 EC_KBRST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 BEEP# 27
1

3 26 ADP_IR 1 2
16,22,35 SERIRQ SERIRQ# FANPWM1/GPIO12 ENCODER_DIR 27 ADP_I 39
R339 4 27
16,35 LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF 39
@ 10_0402_5% 5 1 2
16,35 LPC_AD3 LAD3
7 PWM Output C587 0.22U_0402_10V4Z
16,35 LPC_AD2 LAD2
8 63 BATT_TEMPA
16,35 LPC_AD1 BATT_TEMPA 38
2

LAD1 BATT_TEMP/AD0/GPIO38
1 16,35 LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_IR
BATT_OVP 39 +3VALW
ADP_I/AD2/GPIO3A 65
C553 CLK_PCI_EC 12 AD Input 66 MODE#
16 CLK_PCI_EC PCICLK AD3/GPIO3B MODE# 33
@ 22P_0402_50V8J 13 75 MODE# 2 1
2 11,15,17,24,25,29,35 NB_RST# PCIRST#/GPIO05 AD4/GPIO42 KILL_SW# 24
ECRST# 37 76 BTN_ID 100K_0402_5% R470
ECRST# SELIO2#/AD5/GPIO43 BTN_ID 33
17 EC_SCI# 20 SCI#/GPIO0E
36 STB_WLAN 38 CLKRUN#/GPIO1D
DAC_BRIG/DA0/GPIO3C 68 DAC_BRIG 15 Analog BTN ID definition,
EN_DFAN1/DA1/GPIO3D 70 EN_DFAN1 35 Please see page 3.
+3VALW R340 +3VALW
DA Output IREF/DA2/GPIO3E 71 IREF 39
47K_0402_5% KSI0 55 72
KSI0/GPIO30 DA3/GPIO3F EN_DFAN2 35
2 1 ECRST# KSI1 56 BTN_ID 2 1
33,34 EC_PLAYBTN# KSI1/GPIO31
KSI2 57 R383 100K_0402_5%
33,34 EC_STOPBTN# KSI2/GPIO32
2 1 KSI3 58 83
33,34 EC_FRDBTN# KSI3/GPIO33 PSCLK1/GPIO4A EC_EAPD_R# 27,28
C561 0.1U_0402_16V4Z KSI4 59 84
KSI4/GPIO34 PSDAT1/GPIO4B USB_EN# 30
KSI5 60 85
33,34 EC_REVBTN# KSI5/GPIO35 PSCLK2/GPIO4C WL_BT_LED# 33
KSI6 61 PS2 Interface 86 +5VS
KSI6/GPIO36 PSDAT2/GPIO4D SATTLATE_LED# 33
KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK 34
KSO0 39 88 TP_DATA TP_CLK 1 2
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA 34
KSO1 40 CLK_RESET_R 13 4.7K_0402_5% R338
KSO2 KSO1/GPIO21 TP_DATA
41 KSO2/GPIO22 1 2
C KSO3 42 97 STRAP 2 R471 1 4.7K_0402_5% 4.7K_0402_5% R337 C
KSO4 KSO3/GPIO23 SDICS#/GPXOA00
43 KSO4/GPIO24 SDICLK/GPXOA01 98 STB_LAN 36
KSO5
KSI[0..7] KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99 STB_SB 36
33,34 KSI[0..7] 45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 VGATE 43
KSO7 46 SPI Device Interface
KSO[0..17] KSO8 KSO7/GPIO27
33,34 KSO[0..17] 47 KSO8/GPIO28
KSO9 48 119
KSO9/GPIO29 SPIDI/RD# EC_SI_SPI_SO 32
KSO10 49 120
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI 32
KSO11 50 SPI Flash ROM 126 CIR_IN 1 R1226 2 +3VALW
KSO11/GPIO2B SPICLK/GPIO58 EC_SPICLK 32
KSO12 51 128 10K_0402_5%
KSO12/GPIO2C SPICS# SPI_CS# 32
KSO13 52
KSO14 KSO13/GPIO2D
53 KSO14/GPIO2E
KSO15 54 73 CIR_IN DVT:Add Pull high resistor
KSO15/GPIO2F CIR_RX/GPIO40 CIR_IN 30
KSO16 81 74
KSO16/GPIO48 CIR_RLC_TX/GPIO41 ENCODER_PULSE 27
KSO17 82 89
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 FSTCHG 39 +3VALW
BATT_CHGI_LED#/GPIO52 90 BATT_FULL_LED# 33
+5VALW 91
CAPS_LED#/GPIO53 CAPS_LED# 34
RP17 EC_SMB_CK1 77 GPIO 92 2 1
32,38 EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 BATT_CHG_LOW_LED# 33
1 8 EC_SMB_CK1 EC_SMB_DA1 78 93 R341 100K_0402_5%
32,38 EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 POWER_LED# 33
2 7 EC_SMB_DA1 EC_SMB_CK2 79 SM Bus 95 D33
6,15 EC_SMB_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON 26,29,33,36,41
3 6 EC_SMB_CK2 EC_SMB_DA2 80 121 1 2 ACIN_R
6,15 EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON 43 33,37 ACIN
4 5 EC_SMB_DA2 127 ACIN_R
AC_IN/GPIO59 CH751H-40PT_SOD323-2
4.7K_0804_8P4R_5%
16 PM_SLP_S3# 6 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 100 EC_RSMRST# 17
16 PM_SLP_S5# 14 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 101 EC_LID_OUT# 17
17 EC_SMI# 15 EC_SMI#/GPIO08 EC_ON/GPXO05 102 EC_ON 33
33 LID_SW# 16 LID_SW#/GPIO0A EC_SWI#/GPXO06 103 EC_SWI# 16,29
15,29,36,39 SUSP# 17 SUSP#/GPIO0B ICH_PWROK/GPXO06 104 SB_PWRGD 6,16
B B
16 PBTN_OUT# 18 PBTN_OUT#/GPIO0C GPO BKOFF#/GPXO08 105 BKOFF# 15
19 GPIO 106 +3VALW
25 EC_PME# EC_PME#/GPIO0D WL_OFF#/GPXO09 WL_OFF# 24
24 PCIE_WAKE# 25 EC_THERM#/GPIO11 GPXO10 107 ALI/MH# 38,39
35 FAN_SPEED1 28 FAN_SPEED1/FANFB1/GPIO14 GPXO11 108 VLDT_EN 36
35 FAN_SPEED2 29 FANFB2/GPIO15
35 E51_TXD 30 EC_TX/GPIO16
31 110 IE_BTN# 2 1
35 E51_RXD EC_RX/GPIO17 PM_SLP_S4#/GPXID1 NB_PWRGD 11
32 112 ENBKL 100K_0402_5% R330
33 ON/OFFBTN# ON_OFF/GPIO18 ENBKL/GPXID2
33 PWR_SUSP_LED 34 PWR_LED#/GPIO19 GPXID3 114 EAPD 26
34 NUM_LED# 36 NUMLED#/GPIO1A GPI GPXID4 115 EC_THERM# 17
R315 116
GPXID5 BT_PWR 30
CRY1 1 2CRY2 117 BT_RST# 30
GPXID6 IE_BTN#
GPXID7 118 IE_BTN# 33 2 1 VGA_ENBKL 15
@ 20M_0603_5% CRY1 122 0_0402_5% VGA@ R1173
CRY2 XCLK1
123 XCLK0 V18R 124
ENBKL 2 1 UMA_ENBKL 11
AGND

0_0402_5% UMA@ R1174

GND
GND
GND
GND
GND

1 1
C541 C542
1

KB926QFA1_LQFP128_14X14 2 1
11
24
35
94
113

69
15P_0402_50V8J

15P_0402_50V8J

Y5 @ 2K_0402_5% R1175
OUT
IN

2 2

ECAGND
NC

NC
2

A A
32.768KHZ_12.5P_1TJS125BJ4A421P

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title
DVT: Change value from 27p to 15p
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 31 of 46
5 4 3 2 1
 +3VALW

+5VALW C527 TEST@

+5VALW 2 1

1
0.1U_0402_16V4Z C538
1 2 R318 0.1U_0402_16V4Z
100K_0402_5%

U22

2
8 1 R305 TEST@
VCC A0 R325

5
7 2 U21 100K_0402_5%
WP A1 R303
6 3 1 2 2 INT_FLASH_EN# 1 2

G Vcc
31,38 EC_SMB_CK1 SCL A2 B
5 4 INT_SPI_CS# 1 2 4
31,38 EC_SMB_DA1 SDA GND Y
1 SPI_CS#
AT24C16AN-10SU-2-7_SO8 100K_0402_5% TEST@ 22_0402_5% A
NC7SZ32P5X_NL_SC70-5

3
TEST@

Add BOM structure for MP

SPI Flash (8Mb*1)

B:Chg. to SPI ROM.
+3VALW

1 20mils
C507 U19
8 VCC VSS 4
0.1U_0402_16V4Z
2
3 W
7 HOLD
Add BOM structure for MP SPI_CS# 1 2 INT_SPI_CS# 1
R472 0_0402_5% MP@ S
EC_SPICLK 1 2 SPI_CLK_R 6
31 EC_SPICLK C
R473 0_0402_5%
31 EC_SO_SPI_SI 2 1 EC_SO_SPI_SI_R 5 D Q 2 EC_SI_SPI_SO_R 2 1 EC_SI_SPI_SO 31
R474 0_0402_5% R475 0_0402_5%
SST25LF080A_SO8-200mil

JP50

31 SPI_CS# 1 1 2 2 +3VALW
EC_SI_SPI_SO_R 3 4 INT_FLASH_EN#
3 4 SPI_CLK_R
17 SB_INT_FLASH_SEL 5 5 6 6
7 8 EC_SO_SPI_SI_R
7 8
@ E&T_2941-G08N-00E~D

C:Chg. PN to LTC00000200

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 32 of 46
 5 4 3 2 1

SW/LED Connector Power Button Lid SW

D1 D2 For debug only +3VALW
2 MODE# 31 2 IE_BTN# 31
MODEBTN# 1 IEBTN# 1
BTN TOP

2
3 51_ON# 3 51_ON# +3VALW
R228 +3VALW
DAN202UT106_SC70-3 DAN202UT106_SC70-3

1
Add BOM structure for MP 100K_0402_5%
SW1 TEST@ D13 U14 R236

1
D JP2 2 APX9132ATI-TRL_SOT23-3 47K_0402_5% D
ON/OFFBTN# 31
ON/OFFBTN_R# 1 1 3 ON/OFFBTN_R# 1
IEBTN# 1 51_ON#
2 3 51_ON# 37

2
2
3 2 4 2 3

GND
31,34 KSO0 3 VDD VOUT LID_SW# 31
MODEBTN# 4 DAN202UT106_SC70-3
KSI1 4 SMT1-05-A_4P
31,34 EC_PLAYBTN# 5

6
5
5

1
D

10P_0402_50V8J
KSI2

0.1U_0402_16V4Z
31,34 EC_STOPBTN# 6 1 1 1

1
KSI3 6 Q38 D19 C378
31,34 EC_FRDBTN# 7 7 31 EC_ON 2
KSI5 8 G 2N7002_SOT23-3 C358 RLZ20A_LL34 C377
31,34 EC_REVBTN# 8

2
9 S 0.01U_0402_25V4Z
31 BTN_ID

3
9 R251 2 2 2
10

2
10
11 GND 10K_0402_5%
12 GND

1
ACES_85201-1005N

+5VALW SUSPEND LED

ACIN 31,37
SYSON
AC IN LED SYSON 26,29,31,36,41

3
47K

2
Q30 Q27

G
D20 Q37 2N7002_SOT23-3
+5VALW 1 2 2 1 1 3 10K 2 1 3
C R252 120_0402_5% HT-191NB_BLUE_0603 PWR_SUSP_LED 31 C
D

S
2N7002_SOT23-3
BATT CHARGE/FULL LED DTA114YKAT146_SOT23-3
D21

1
D22 R234 1 2 300_0402_5% 2 1
+5VALW 1 2 2 1 BATT_CHG_LOW_LED# BATT_CHG_LOW_LED# 31 HT-191UD_AMBER_0603
R231 300_0402_5% HT-191UD_AMBER_0603
D27
1
R232
2
120_0402_5%
2 1 BATT_FULL_LED#
HT-191NB_BLUE_0603
BATT_FULL_LED# 31
+5VALW
POWER LED
SYSON

3
47K

2
Q31 Q26

G
2N7002_SOT23-3
WL&BT LED 10K 2 1 3 POWER_LED# 31

S
D38 VF=1.9V
+5VS 1 2 2 1 DTA114YKAT146_SOT23-3
WL_BT_LED# 31
R250 WLAN@ 300_0402_5% WLAN@ HT-191UD_AMBER_0603
D26

1
1 2 2 1
R235 120_0402_5% HT-191NB_BLUE_0603

B B

+5VS

HDD LED Q130

2N7002_SOT23-3
Satellite LED
D23
3

47K Q33
D

+5VS 1 2 2 1 1 3
R253 SATEL@
120_0402_5% HT-191NB_BLUE_0603 DTA114YKAT146_SOT23-3
10K 2
G

SATTLATE_LED# 31
2

2 1 1 3
R476 100K_0402_5%
Q131
2N7002_SOT23-3
G

D15
2

HDD_LED# 17 VF=2.8V
1 2 2 1
R238 SATEL@ 100_0402_5%

SATEL@ 12-21-BHC-ZL1M2RY-2C_BLUE
D16

1 2 2 1
R239 SATEL@ 100_0402_5%
A A
SATEL@ 12-21-BHC-ZL1M2RY-2C_BLUE

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 33 of 46
5 4 3 2 1
 5 4 3 2 1

KEYBOARD CONN. KSI[0..7]

KSI[0..7] 31,33
KSO2 1
C630
2
100P_0402_25V8K
KSO1 1 2
KSO[0..17] C616 100P_0402_25V8K
KSO[0..17] 31,33
KSO0 1 2
TP CONN. JP19 DVT: Modify KSO[0..17] KSO4
C629
1
C615
100P_0402_25V8K
2
100P_0402_25V8K
34 1 2 +3VS
KSO16 R389 300_0402_5% KSO3 1 2
33 C628 100P_0402_25V8K
JP15 32 KSO17 KSO5
D
31 1 2 D
12 14 C614 100P_0402_25V8K
+5VS 12 G2 30 KSO14
11 11 29 1 2
TP_DATA 10 SW_R 1 2 KSO2 C627 100P_0402_25V8K
31 TP_DATA TP_CLK 10 C573 @ 33P_0402_50V8J 28 KSO1 KSO6
31 TP_CLK 9 9 27 1 2
8 SW_L 1 2 KSO0 C613 100P_0402_25V8K
8 C564 @ 33P_0402_50V8J 26 KSO4 KSO7
7 7 25 1 2
SW_R 6 TP_DATA 1 2 KSO3 C626 100P_0402_25V8K
6 C583 @ 33P_0402_50V8J 24 KSO5 KSO13
5 5 23 1 2
4 TP_CLK 1 2 KSO14 C612 100P_0402_25V8K
4 C581 @ 33P_0402_50V8J 22 KSO6 KSO8
3 3 21 1 2
2 KSO7 C625 100P_0402_25V8K
SW_L 2 20 KSO13 KSO9
1 1 G1 13 19 1 2
KSO8 C611 100P_0402_25V8K
E&T_6701-Q12N-00R 18 KSO9 KSO10
17 1 2
KSO10 C624 100P_0402_25V8K
16 KSO11 KSO11
15 1 2
KSO12 C610 100P_0402_25V8K
14 KSO15 KSO12
13 1 2
KSI7 C623 100P_0402_25V8K
12 KSI2 KSO15
11 1 2
KSI3 C609 100P_0402_25V8K
10 KSI4 KSI7 1 2
TP Button 9
8
7
KSI0
KSI5 KSI2
C622
1
100P_0402_25V8K
2
SW2 SW3 KSI6 C608 100P_0402_25V8K
SW_L SW_R 6 KSI1 KSI3
1 3 1 3 5 1 2
2 1 +3VS C621 100P_0402_25V8K
4 CAPS_LED# R388 300_0402_5% KSI4
2 4 2 4 3 CAPS_LED# 31 1 2
C C607 100P_0402_25V8K C
SMT1-05-A_4P SMT1-05-A_4P 2 NUM_LED# KSI0
NUM_LED# 31 1 2
6
5

6
5
1 C620 100P_0402_25V8K
ACES_88170-3400 KSI5 1 2
C606 100P_0402_25V8K
KSI6 1 2
C619 100P_0402_25V8K
KSI1 1 2
C605 100P_0402_25V8K
CAPS_LED# 1 2
C604 100P_0402_25V8K
KSO16 1 2
C618 100P_0402_25V8K @
NUM_LED# 1 2
C617 100P_0402_25V8K @
KSO17 1 2
C758 100P_0402_25V8K @

For EMI Request

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 34 of 46
5 4 3 2 1
 A B C D E

VS +5VS
FAN1 Conn FD2 FD3 FD5 FD6

@ @ @ @

1
3

1
S
2 1 FBFAN 5 PU5B R313

P
R309 10K_0402_5% + FAN1_ON
G
Q46 D30
ENFAN 0 7 2 1
100_0402_5%
2
1SS355_SOD323-2
2 1 6 AO3409_SOT23
31 EN_DFAN1 -

G
R281 10K_0402_5% P@ LM358DT_SO8 D FD7 FD8 FD9 FD10 FD11 FD12 FD13 FD14 FD15 FD16

1
2
JP8 1 1 1 1 1 1 1 1 1 1

2
R308 5 @ @ @ @ @ @ @ @ @ @
@ 10K_0402_5% +FAN1 GND
4 GND
1 1

1
1 3

1
D31 3 H2 H3 H4 H5 H6
2 2
+ BAS16_SOT23-3 1 H_S394D126 H_S394D118 H_S394D118 H_S394D118 H_S394D118
C508 1
2
22U_B_10VM ACES_85205-03001 @ @ @ @ @

2
2 C531
1 2

1
R314 5.1K_0402_5% @ 1000P_0402_50V7K
1
+3VS 1 2
R312 10K_0402_5% H7 H8 H9 H10 H11 H12 H13
H_C315D118 H_S394D118 H_C315D118 H_C315D118 H_C315D118 H_C315D118 H_C315D118
31 FAN_SPEED1
2 @ @ @ @ @ @ @

1
C532
0.01U_0402_50V7K
VS +5VS 1
FAN2 Conn DVT:Del@ and Change to 0.01u H14 H15 H16 H17 H19 H20
H_C315D118 H_C315D118 H_C315D157 H_C315D157 H_R197X102D126X24 H_C276D157
8

1
S
2 1 FBFAN2 3 U38A R1209 @ @ @ @ @ @
P

R1208 VGA@ 10K_0402_5% + FAN2_ON

G
Q137 D44
0 1VGA@2100_0402_5%
1 2

1
2 1 ENFAN2 2 AO3409_SOT23 1SS355_SOD323-2
31 EN_DFAN2 -
G

R1210 VGA@ 10K_0402_5% VGA@ LM358DT_SO8 D VGA@ VGA@

1
2
JP54
4

2
R1211 5
@ 10K_0402_5% +FAN2 GND H21 H23 H24 H25 H26 H27
4 GND
2 H_C276D157 H_C236D87 H_C236D87 H_C236D87 H_C236D87 H_C236D87 2

1
1 D45 3
1
3 @ @ @ @ @ @
2 2
+ 1

1
C759 VGA@ BAS16_SOT23-3 1
2
VGA@ 22U_B_10VM VGA@ ACES_85205-03001

2
2 C760
1 2
R1212 VGA@ 5.1K_0402_5% @ 1000P_0402_50V7K
1 H41 H29 H30 H31 H32 H33 H34
+3VS 1 2 H_C315D157 H_C236D126 H_C236D126 H_C236D138 H_C197D118 H_C236D118 H_C236D118
R1213 VGA@ 10K_0402_5%
@ @ @ @ @ @ @
31 FAN_SPEED2

1
2
C761
VGA@ 0.01U_0402_50V7K H35 H36 H37 H38 H39 H40
1 H_R197X102D126X24 H_R197X102D126X24 H_C276D157 H_C276D157 H_C236D87 H_C236D87

R428 DVT:Del@ and Change to 0.01u @ @ @ @ @ @

@ 0_0402_5%

1
H42 1 2 E51_TXD
+3VALW E51_TXD 31
R449
@ 0_0402_5%
E51_RXD 1 2 6 5 1 2 LPC_DRQ1#
31 E51_RXD LPC_DRQ1# 16
R426
0_0402_5%
SERIRQ 1 2 7 4 NB_RST# M1 M2 M3 M4 M5 M6 M7
16,22,31 SERIRQ NB_RST# 11,15,17,24,25,29,31
R450 H_C79D79N H_C79D79N H_C79D79N H_C79D79N H_C79D79N H_C79D79N H_C150D150N
3 0_0402_5% 3
LPC_AD3 8 3 LPC_AD2 @ @ @ @ @ @ @
16,31 LPC_AD3 LPC_AD2 16,31

1
LPC_AD1 9 2 LPC_AD0
16,31 LPC_AD1 LPC_AD0 16,31
M8 M9 M10 M11
LPC_FRAME# 10 1 H_C339D339N H_C106D106N H_O256X150D256X150N H_O256X150D256X150N
16,31 LPC_FRAME# CLK_PCI_SIO 16
2 R424 1 2 1 @ @ @ @
22_0402_5% C692

1
@ DEBUG_PAD
+3VS 22P_0402_50V8J

M12 M13 M14 M15 M16 M17 M18

R80x100 R80x100 R80x100 R80x100 R80x100 R80x100 R80x100
JP10
1
LPC Debug Port @ @ @ @ @ @ @
1
2
LPC Debug card

1
2
3 3
8

4 4
5 5 U38B
P

5 +
6 6 CLK_14M_SIO 13 0 7
7 LPC_AD0 6 M19 M20 M21 M22 M23 M24 M25
7 -
G

8 LPC_AD1 CLK_PCI_SIO2 R1222 1 2 1 VGA@ LM358DT_SO8 R80x100 R80x100 R80x100 R80x100 R80x100 R80x100 R80x100
8 LPC_AD2 22_0402_5% C781
9
4

9 LPC_AD3 @ @ @ @ @ @ @
10
10
11 LPC_FRAME# For EC 22P_0402_50V8J

1
11 LPC_DRQ1#
4 12 12 4
13 NB_RST#
13 R85
14 14 1 2 @ 0_0402_5% JP13
15 CLK_PCI_SIO 1
15 1 +5VALW
16 SERIRQ 2 E51_RXD
16 2 E51_TXD
17 17 3 3
18 4
18
19 19
4
@ ACES_85205-0400
Security Classification Compal Secret Data Compal Electronics, Inc.
20 20 Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

@ ACES_85201-2005
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 35 of 46
A B C D E
 A B C D E

+1.2VALW TO +1.2V_HT
+1.8V TO +1.8VS +5VALW +5VALW +5VALW
+1.2VALW +1.2V_HT
+1.8V +1.8VS

2
1 1 R197 R210 R211
Q14 C181 C178 4.7U_0805_10V4Z 10K_0402_5% 10K_0402_5%

470_0805_5%
8 1 1 2 10K_0402_5%
D S

2
7 2 Q41 C443

1
D S 2 2

470_0805_5%
6 3 R111 8 1 C431 VLDT_EN# SUSP SYSON#
D S D S 42 SUSP 42 SYSON#

2
5 D G 4 7 D S 2 10U_0805_10V4Z

1
1U_0402_6.3V4Z 2 1 R285 D D D
6 D S 3
1 SI4800BDY_SO8 1 R98 2 +VSB 5 4 2 Q24 2 Q28 2 Q29 1
31 VLDT_EN 15,29,31,39 SUSP# 26,29,31,33,41 SYSON

1
33K_0402_5% D G 1U_0402_6.3V4Z R286 2N7002_SOT23-3 2N7002_SOT23-3
4.7U_0805_10V4Z

1 G G G

2
82.5K_0603_1%
0.1U_0603_50V7K

C180-R SI4800BDY_SO8 2N7002_SOT23-3

4.7U_0805_10V4Z
1 1 1 2 +VSB S S S

3
1

1
D D

0.01U_0402_25V7K
C184 Q13 Q15 1

1
820K_0402_5%
2 VLDT_EN# 2 C462 C457-R 330K_0402_5% R478 R209 R212

1
2 C180 G 2N7002_SOT23-3G D Q43 Q44 D 100K_0402_5%
2 2N7002_SOT23-3 2 C457 SUSP 2 10K_0402_5% 10K_0402_5%
S S 2
2

1
2 2N7002_SOT23-3
G G

2
S 2N7002_SOT23-3 S

3
Change to 0603 50V7K

+0.9V +2.5VS
+3VALW TO +3VS
+5VALW TO +5VS +5VALW +5VSA

2
+3VALW +3VS
+5VALW +5VS U39 R433 R272
4.7U_0805_10V4Z 8 1 470_0805_5% @ 470_0805_5%
D S
1 1 7 D S 2

2
10U_0805_10V4Z
Q18 C264 C263 4.7U_0805_10V4Z 1 1 6 3 1 1

1
D S

470_0805_5%

10U_0805_10V4Z

10U_0805_10V4Z
8 1 Q36 C363 C362 1 1 5 4 C762 C763
D S D G
2

470_0805_5%
7 2 8 1 C764 C765 R1214
D S D S

1
2 2 R166 5SPK@ 5SPK@ AO4422_SO8 470_0805_5% D D
6 D S 3 7 D S 2
2 2 R237 @ 2 2
1U_0603_10V4Z
5 4 6 3 AOS 4422 2 SUSP 2 SUSP

1
D G 1U_0402_6.3V4Z D S 2 2 G G
5 D G 4
SI4800BDY_SO8 1 R137 2 +VSB 1U_0402_6.3V4Z 5SPK@ S Q57 S Q39
1

3
1
D
0.01U_0402_25V7K

330K_0402_5% SI4800BDY_SO8 1 R248 2N7002_SOT23-3 @ 2N7002_SOT23-3

4.7U_0805_10V4Z

1 1 2 +VSB

1
0.1U_0603_50V7K
10K_0402_5% Q138 SUSP
4.7U_0805_10V4Z
1 1 2
1

C262 D Q16 Q19 D 5VSA_GATE 5SPK@ 2N7002_SOT23-3 G

+VSB 2 1

1
C247 SUSP C379 D D R1215
2 2 S

3
2 2 2 G G C385 SUSP 47K_0402_5% 2
2 2
S 2N7002_SOT23-3 2N7002_SOT23-3 S 2 2 G G Q34 5SPK@ 1
3

1
Q35 2N7002_SOT23-3 D C766 +5VALW
S S

3
2N7002_SOT23-3 SUSP 2 Q139 5SPK@
G 2N7002_SOT23-3 0.1U_0603_50V7K

2
S 2
5SPK@

3
Change to 0603 50V7K
+3VALW TO +3V_LAN Change to 0603 50V7K R32
+3VALW TO +3V_SB +3VALW +3V_LAN STAR@
+3VALW +3V_SB PJ20 100K_0402_5%

1
PJ21 2 1
2 1 STB_LAN#
2 2 1 1
Q132 @ JUMP_43X79

1
Q133 @ JUMP_43X79 D

D
6 2 Q9

S
31 STB_LAN
D

6 5 4 G STAR@
S

5 4 2 1 1 S 2N7002_SOT23-3

3
2

1
10U_0805_10V4Z
2 1 1 1 1 1 C85 C86 +1.5VS
2
10U_0805_10V4Z

1 1 1 C252 C255 C75 C67 STAR@ STAR@ R29 R34

G
C272 C271 STAR@ STAR@ R143 10U_0805_10V4Z STAR@ 10U_0805_10V4Z STAR@ STAR@
G

2
10U_0805_10V4Z STAR@ 10U_0805_10V4Z 1U_0603_10V4Z STAR@ STAR@ STAR@ 2 2
1U_0603_10V4Z 470_0805_5% 100K_0402_5%
3

STAR@ STAR@ 2 2 470_0805_5% 2 2 SI3456BDV-T1-E3_TSOP6 R280

1 1

2
2 2 SI3456BDV-T1-E3_TSOP6 470_0805_5% +5VALW
1 1

D
D Q8 2 STB_LAN#

2
Q17 2 STB_SB# G
G +VSB 2 1 S STAR@ R165

1
STAR@ R30 STAR@ 2N7002_SOT23-3 D STAR@
+VSB 2 1 S
3

0.1U_0603_50V7K
R164 STAR@ 2N7002_SOT23-3 47K_0402_5% 1 2 SUSP 100K_0402_5%
1
3 D 3
0.1U_0603_50V7K

47K_0402_5% 1 G

1
1

D C269 STB_LAN# Q7 Q40

2 S

3
STB_SB# 2 Q20 STAR@ G STAR@ C87 2N7002_SOT23-3 STB_SB#
G STAR@ S 2N7002_SOT23-3 2 STAR@
3

1
2N7002_SOT23-3 2 D
S
3

C:Chg. PN to SB770020010. Change to 0603 50V7K 2 Q21

Change to 0603 50V7K 31 STB_SB
G STAR@
S 2N7002_SOT23-3
+1.2VALW TO +1.2V_SB

3
1
+3VALW TO +3V_WLAN +1.2VALW +1.2V_SB R172
+3VALW +3V_WLAN PJ23 STAR@
PJ22 2 1 100K_0402_5%
2 1 +5VALW
2 1

2
2 1 @ JUMP_43X79
@ JUMP_43X79 Q56 PreMP: ChangeC651 to 22_0805_5%

2
D

Q47 6
S
D

6 5 4 R324
S

2
5 4 2 1 1 STAR@
2

1 1 2 1 1 1 C651 C656 R405 100K_0402_5%

1 1 C494 C509 1 R320 C637 C645 STAR@ STAR@ STAR@
G

1
C518 C525 STAR@ STAR@ STAR@ STAR@ STAR@ STAR@ 22_0805_5% 470_0805_5%
G

STAR@ STAR@ STAR@ 10U_0805_10V4Z 1U_0603_10V4Z 470_0805_5% 10U_0805_10V4Z SI3456BDV-T1-E3_TSOP6 2 2

1U_0603_10V4Z STB_WLAN#
3

1
10U_0805_10V4Z SI3456BDV-T1-E3_TSOP6 2 2 2 2
10U_0805_10V4Z
1

1
2 2
10U_0805_10V4Z D

1
D Q50
+VSB 2 1 31 STB_WLAN 2
1

D R400 STAR@ Q54

+VSB 2 1 2 STB_SB# G STAR@
R306 STAR@ Q49 2 STB_WLAN# 47K_0402_5% G S 2N7002_SOT23-3

3
1

1
D
0.1U_0603_50V7K

47K_0402_5% G 1 S 3 STAR@
1

D
0.1U_0603_50V7K

1 S STAR@ STB_SB# 2 Q55 C638 2N7002_SOT23-3 R327

3

4 4
STB_WLAN# 2 Q48 C526 2N7002_SOT23-3 G STAR@ STAR@ STAR@
G STAR@ STAR@ S 2N7002_SOT23-3 100K_0402_5%
3

S 2N7002_SOT23-3 2
3

2
2 Change to 0603 50V7K

Change to 0603 50V7K

Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 36 of 46
A B C D E
 A B C D

VS
PR1
VIN VIN 1M_0402_1%
PL1 1 2
PF1 HCB4532KF-800T90_1812
DC301001N00

1
DC_IN_S1 1 2 DC_IN_S2 1 2

1
VS PR2
PJP1 10A_125V_451010MRL PR3 5.6K_0402_5% PR4
1 84.5K_0402_1% 10K_0402_1%
+
1 2 ACIN 31,33

2
1

1
2 PR5

2
+

8
PC1 PC2 PC3 PC4 22K_0402_1% PU1A
3 1000P_0402_50V7K 100P_0402_50V8J 1000P_0402_50V7K 100P_0402_50V8J 1 2 3

P
2

2
- + PACIN
1
O 1 PACIN 39 1

- 4 2 -

G
1

1
@ SINGA_2DW-0005-B03 PR6 LM393DG_SO8

4
PC5 20K_0402_1% PC6 PR7
0.1U_0402_16V7K PD1 10K_0402_1%

2
RLZ4.3B_LL34

2
0.068U_0402_10V6K 2
PR8
1 RTCVREF Vin Detector
10K_0402_1%
VIN 3.3V
High 18.384 17.901 17.430

2
Low 17.728 17.257 16.976
PD2
RLS4148_LL34-2

1
BATT+ 2 1

1
PD3 PR9 PR10
RLS4148_LL34-2 68_1206_5% 68_1206_5%
PQ1 1 2
PR12 PR11

2
200_0603_5% 1K_1206_5%
CHGRTCP 1 2 N1 3 1 VS
1

2 1 N3 1 2
VIN B+
1

1
2
PC8 PR13 2

PR14 PC7 0.1U_0603_25V7K PD4 1K_1206_5%

100K_0402_1% 0.22U_1206_25V7K RLS4148_LL34-2
2

2
2

33 51_ON# 1 2 1 2
PR15 TP0610K-T1-E3_SOT23-3 PR16
22K_0402_1% 1K_1206_5%

RTCVREF
1

PR18 PR19
PR17 100K_0402_1% 2.2M_0402_5%

1
200_0603_5% 1 2 2 1
PR21 PR22 PU2 G920AT24U_SOT89-3 VL PR20
560_0603_5% 560_0603_5% 3.3V 499K_0402_1%
2

1 2 1 2 3 2 N2
+CHGRTC OUT IN

2
1

8
PD6 PU1B
1

GND PD5 2 5

P
6,38,40 MAINPWON +
PC9 PC10 1 7
10U_0805_6.3V6M 1 1U_0805_25V4Z @ RLZ16B_LL34 O
39 ACON 3 6 2 1 VL
2

1
G
2

1
RB715F_SOT323-3 LM393DG_SO8 PR23 PR24

4
1

1
34K_0402_1% 499K_0402_1% PC11

1
PC12 PR26 1000P_0402_50V7K

2
1000P_0402_50V7K PC13 PR25 191K_0402_1%

2
1000P_0402_50V7K 66.5K_0402_1%

2
3 3

PJ1 PJ2 PQ2 PR27

1
D 47K_0402_1%
+3VALWP 2 2 1 1 +3VALW +1.8VP 2 2 1 1 +1.8V
PACIN
@ JUMP_43X118 @ JUMP_43X118 Precharge detector G
2 2 1

(5A,200mils ,Via NO.= 10) (8A,320mils ,Via NO.= 16) 15.97V/14.84V FOR S

3
PJ3 ADAPTOR

1
+5VALWP 2 1 +5VALW PJ4
2 1 +1.5VSP +1.5VS PQ3
2 2 1 1
@ JUMP_43X118 DTC115EUA_SC70-3
(5A,200mils ,Via NO.= 10) @ JUMP_43X118
RHU002N06_SOT323-3 2
PJ5 +5VALWP
(3.0A,120mils ,Via NO.=6)
+VSBP 2 2 1 1 +VSB
PJ6
@ JUMP_43X39 +0.9VP 2 1 +0.9V

3
2 1
(120mA,40mils ,Via NO.= 2) @ JUMP_43X79
(2A,80mils ,Via NO.= 4)

PJ7
+1.2VALWP 2 1 +1.2VALW
2 1
@ JUMP_43X118

(8A,320mils ,Via NO.=16)

4 4

PJ8
+2.5VSP 2 1 +2.5VS
2 1
@ JUMP_43X39

(1A,40mils ,Via NO.=2) Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 37 of 46
A B C D
 A B C D

PH1 under CPU botten side :

CPU thermal protection at 92 degree C
Recovery at 56 degree C

VL VS VL

2
VMB
PF2 PL2 PR28

1
1 1

PJP2 15A_65V_451015MRL HCB4532KF-800T90_1812 47K_0402_1%

1 BATT_S1 1 2 1 2 PH1 PC14
1 BATT+ MAINPWON 6,37,40
2 PR29 1K_0402_1% 100K_0603_1%_TH11-4H104FT 0.1U_0603_25V7K PR31

1
2 47K_0402_1%
3 3 1 2 1 2 +3VALWP

1
4 PR30 1 2

2
4 47K_0402_1% PC15 PR32 PQ4
5 5

8
6 1000P_0402_50V7K 13.7K_0402_1% PU3A DTC115EUA_SC70-3
6 PC126 PC127 PD7
7 1 2 3

P
7 +

1
10 8 2200P_0603_50V7K PC16 820P_0603_50V7K 1 2 1 2

2
GND 8 PR33 0.01U_0402_25V7K TM_REF1 O
11 GND 9 9 2 -

G
1K_0402_1% 1SS355_SOD323-2
OCTEK_BTJ-09HA1G LM393DG_SO8

4
2

3
2

0.22U_0805_16V7K
PR35

15.4K_0402_1%
PR34 100_0402_1%
ALI/MH# 31,39

1
PC17
100_0402_1%

1000P_0402_50V7K
PR36
1

2 1 VL

PC18
PR38 PR37

2
6.49K_0402_1% 100K_0402_1%

2
2 1 +3VALWP

1
PR39
100K_0402_1%
1

2
PR40
1K_0402_1%
2 2
2

PH2 near main Battery CONN :

BATT_TEMPA 31
BAT. thermal protection at 95 degree C
EC_SMB_DA1 31,32 Recovery at 59 degree C
EC_SMB_CK1 31,32

VL VL

2
PR41
PH2 47K_0402_1%
100K_0603_1%_TH11-4H104FT PR42
47K_0402_1%

1
1 2

PR43

8
13.7K_0402_1% PU3B
PQ5 TP0610K-T1-E3_SOT23-3 1 2 5 PD8

P
+
O 7 2 1
TM_REF1 6 -

G
3 3

B+ 3 1 +VSBP 1SS355_SOD323-2

1
LM393DG_SO8

4
0.22U_1206_25V7K

0.1U_0603_25V7K

PC19 PR44
1

100K_0402_1%

0.22U_0805_16V7K 13.7K_0402_1%

2
1

1
PR45

PC20

PC21

2
2

PR46
2

22K_0402_1%
VL 1 2
@ @
100K_0402_1%
2
PR47

PR48
1

0_0402_5% D
1 2 2 PQ6
40,41 POK
G RHU002N06_SOT323-3
0.1U_0402_16V7K

S
3
1

PC22
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 38 of 46
A B C D
 A B C D

PQ7

2
PR49 PC128 PC129
P2 Iadp=0~3.6A P3 0.02_2512_1% B+ 820P_0603_50V7K 0.022U_0603_50V7K 1 8
S D
PQ8 2 7

1
S D
PQ9 1 4 3 S D 6
5 4 PJ9 4 5
VIN D G G D
6 D S 3 1 S D 8 2 3 2 2 1 1 B++
7 2 2 7 @
D S S D @ JUMP_43X118 CSIP FDS4435BZ_SO8
8 D S 1 3 S D 6
4 5 PQ10 CSIN
G D PQ11
TP0610K-T1-E3_SOT23-3
FDS4435BZ_SO8
FDS4435BZ_SO8 1 S D 8

1
3 1 DCIN PQ12 2 7
P3 S D

1
1 1

DTC115EUA_SC70-3 3 6
S D

2
PC26 PC23 PC25 4 5
G D

1
PC27 0.1U_0603_25V7K 2FSTCHG PC24

2
1
5600P_0402_25V7K PR50 2 1 4.7U_1206_25V6K 4.7U_1206_25V6K

1
100K_0402_1% 4.7U_1206_25V6K FDS4435BZ_SO8
3

2
PQ13 PR51

2
1

3
200K_0402_1% PR54 100K_0402_1% PD9 1 2
SUSP# 15,29,31,36 VIN

2
PR53 1 2 RB715F_SOT323-3 PR55 PR52

3
1
47K_0402_1% PR56 6251VDD PU4 47K_0402_1%
2 PC28 0_0402_5% PC29 10K_0402_1% PD10
0.1U_0603_25V7K 2 1 PC30 1 24 DCIN 1 2 BATT+ 1 2
31 FSTCHG ACOFF 31
2

2
2.2U_0603_6.3V6K VDD DCIN

1
6251VDD 1 2

1
@ 0.1U_0603_25V7K 1SS355_SOD323-2

1
PR57 2 23 ACOFF#
PR58

2
ACSET ACPRN
1

10K_0402_1% PQ14 PR59

1

DTC115EUA_SC70-3 20_0603_5% 1 2 VIN

1
6251_EN 3 22 1 2 CSON
EN CSON

2
DTA144EUA_SC70-3 2 PC32 PC31 PQ16
31,38 ALI/MH# 200K_0402_1%
2 @ 680P_0402_50V7K 0.047U_0603_25V7M
PQ15 CSON1 2 4 21 1 2 CSOP PD11

1
CELLS CSOP PR60 2 1 2
DTC115EUA_SC70-3 20_0603_5% PQ18

3
1

1
PQ17 D D
1SS355_SOD323-2
1 2 5 20 1 2
3

ICOMP CSIN

5
6
7
8
2 PR62 PC33 6800P_0402_25V7K PC35 PR61 20_0603_5% DTC115EUA_SC70-3 PC34 2 PACIN
G 150K_0402_1% PC36 0.1U_0603_25V7K G

D
D
D
D

2
S 1 2 1 PR63 2 6 19 1 2 0.1U_0603_25V7K S
3

3
RHU002N06_SOT323-3 10K_0402_1% VCOMP CSIP PQ19
2

0.01U_0402_25V7K 1 2 PR64 RHU002N06_SOT323-3

G
S
S
S
PC37 1 PR65 2 7 18 LX_CHG 2.2_0603_5%
100P_0402_50V8J 100_0402_1% ICM PHASE SI4800BDY-T1-E3_SO8

4
3
2
1
6251VREF PR66 0_0603_5%

1
2
8 17 DH_CHG 2 1 PL3 2

31 ADP_I VREF UGATE

PC38 PR67 16UH_LF919AS-160M=P3_3.7A_20%
1 2 @ 0_0402_5% PR69 PC39 1 2 CHG 1 4 BATT+
1

D PQ20 PR71 BST_CHG 1 BST_CHGA 2

9 CHLIM BOOT 16 2 1

1
PACIN 1 2 2 1 2 0.1U_0402_16V7K 2.2_0603_5% 0.1U_0603_25V7K 2 3
37 PACIN 31 IREF

2
PR70 G 1
22K_0402_1% S 15.4K_0402_1% 10.7K_0402_1% 10 15 6251VDDP CH751H-40PT_SOD323-2 PR68
3

ACLIM VDDP

5
6
7
8
6251VREF 1 PR73 2 PD12 0.02_2512_1%

10U_1206_25V6M

10U_1206_25V6M
RHU002N06_SOT323-3 PR72 1 26251VDD

D
D
D
D
2
ACON 10K_0402_1% 11 14 4.7_0603_5%
37 ACON VADJ LGATE
1

1
2 PR75 1 PR74 PQ21
2

PQ22 10K_0402_1% PC41

G
S
S
S
DTC115EUA_SC70-3 12 13 PC40

2
GND PGND 4.7U_0805_6.3V6K SI4800BDY-T1-E3_SO8 PC42

4
3
2
1
ACOFF 2
ISL6251AHAZ-TR5283_QSOP24 DL_CHG
PR76
6251VREF 3 1 1 2
3

@ 28.7K_0402_1%
PR77
PQ23
@ 47K_0402_1%
BATT Type ALI/MH# Charge Current IREF CC=0.5~3A
2

@ SI2301BDS-T1-E3_SOT23-3
2

CV=12.6V(6 CELLS LI-ION)

IREF=1.016*Icharge 3 CELL 3.3V 1.5A 1.524V
IREF=0.508V~3.048V
6 CELL 3.3V 3.0A 3.048V
3 3

9 CELL 3.3V 3.0A 3.048V

RTC Battery VMB

Layout Note:

499K_0402_1% 340K_0402_1%
1. Under BATT1 battery Body, no Trace no Via

1
VS

PR78
2. BATT1 + - PIN keep out 80mil from other component ,trace and via

0.01U_0402_25V7K

2
75W Iadapter=0~3.947A PR49=0.02 ohm CP=3.71A PR73=10.7K

PC43
- +

1
BATT1 90W Iadapter=0~4.737A PR49=0.015 ohm CP=4.459A PR73=19.6K

PR80
2
2 1 +RTCBATT +RTCBATT 120W Iadapter=0~6.315A PR49=0.010 ohm CP=5.936A PR73=19.6K PR75=4.53K

2
8
PU5A
PR82
45@ RTCBATT 3

P
+
31 BATT_OVP 1 2 1 0
6251VREF 2
-

105K_0402_1%
10K_0402_1%

0.01U_0402_25V7K
6251_EN LM358DT_SO8
LI-3S :13.5V----BATT-OVP=1.5V
4
1

1
PR83

PC45
PR79
LI-4S :18V----BATT-OVP=2V

2
@ 100K_0402_1%
BATT-OVP=0.111*BATT+

2
2

4
PC44 C 4

CSON 1 2 2 PQ24
B @ 2SC2411KT146_SOT23-3
1

@ 0.01U_0402_25V7K E
3

PR81
@ 20K_0402_1%
Security Classification Compal Secret Data Compal Electronics, Inc.
2

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 39 of 46
A B C D
 5 4 3 2 1

PJ10
B+ 2 2 1 1
@ JUMP_43X118

4.7U_1206_25V6K

4.7U_1206_25V6K

4.7U_1206_25V6K

4.7U_1206_25V6K
PC46

1
PC47

PC48
2

1
PC49

PC50
@ 680P_0402_50V7K
+VCC_TPS51120 VL

2
D PR84 D

2
5.1_0603_5%
2 1

1U_0603_10V6K

10U_0805_10V4Z
1

1
PC51

PC52
2

5
6
7
8
0.1U_0603_25V7K
+5VALWP

D
D
D
D
PQ25

1
PC53
SI4800BDY-T1-E3_SO8
OCP=8A
+3VALWP

8
7
6
5

G
S
S
S
2
PQ26 PR85 +5VALWP

D
D
D
D

4
3
2
1
0_0603_5%
SI4800BDY-T1-E3_SO8 PU6 PL4
OCP=8A 1 2
22 21 PR86 PC54 3.3UH_SIL1045R-3R3PF_8.2A_30%
VIN VREG5

G
S
S
S
0_0603_5% 0.1U_0603_25V7K 1 2

5
6
7
8
+3VALWP

1000P_0402_50V7K
10.2K_0402_1%
PR87 20 28 1 2 1 2

1
2
3
4
0_0603_5% V5FILT VBST1 PQ27

2
PL5 1 2 PC55 PR90 9 27 DH_5V AO4712_SO8
EN5 DRVH1

1
PR89

PC56

330U_D3L_6.3VM_R25M
3.3UH_SIL1045R-3R3PF_8.2A_30% 0.1U_0603_25V7K 0_0603_5%
1000P_0402_50V7K

2 1 2 1 1 2 13 32 QFN 5X5 LL1 26 LX_5V PR88

VBST2 @ 4.7_1206_5%
4 1

2
1
10K_0402_1%
330U_D3L_6.3VM_R25M

DH_3V 14 25 DL_5V

12

1
DRVH2 DRVL1
1

8
7
6
5
+
PC58

PC57
1
PR91 LX_3V 15 24 @
+ LL2 PGND1
PR92

@4.7_1206_5% PC59
2

3
2
1

2
2
PC60

2.49K_0402_1%
C 16 1 @ 680P_0603_50V7K C
2

DRVL2 VO1
1

PR93
@ 4 17 3 FB5
PGND2 VFB1
1

PC61 2
PQ28 COMP1
8 7

1
@ 680P_0603_50V7K AO4712_SO8 VO2 COMP2 TPS51120_CS1
23
2

CS1
2
4.22K_0402_1%

FB3 6 18 TPS51120_CS2
1
2
3

VFB2 CS2
VREF2 4
PR94

12 EN2 TONSEL 31

1000P_0402_50V7K
1 2 29 EN1 GND 5
30
1

SKIPSEL
PR95 0_0402_5% PGOOD1
19 VREG3 PGOOD2 11
+VCC_TPS51120

PAD

1
PC62

14.7K_0402_1%
10 EN3

14.7K_0402_1%
32

33

2
VL

2
PR96
TPS51120RHBR_QFN32_5X5

PR97
2
+3.3V_RTC_LDO

0_0402_5%
806K_0603_1%
1

2
PR98

1
PR99

PR100
10U_0805_6.3V6M
10K_0402_1%

1
1
PC63

1
PR101
PD13
2

1
0_0402_5%

2
2 1 1 2 1 PR102 2 +3VALWP
6,37,38 MAINPWON VS

100K_0402_1%
2.2U_0805_25V6K
1

PC64 10K_0402_1%

2
0.047U_0603_16V7K RLZ5.1B_LL34
1

B B
PC65

PR103
2

1
@
POK 38,41

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/4/14 Deciphered Date 2007/12/9 Title
SCHEMATIC MB A3831
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 40 of 46
5 4 3 2 1
 A B C D

1 1

PJ11
2 1 B+
2 1

1
@ JUMP_43X118

1
PC66 PC67 PR104

1
4.7U_1206_25V6K 4.7U_1206_25V6K 0_1206_5%
PC68 PC69

2
+5VALWP 4.7U_1206_25V6K 4.7U_1206_25V6K

2
PD14

2
PC70

1
4.7U_0805_6.3V6K PC71 PR105

1
0.1U_0603_25V7K 2.2_0603_5% PC72

2
2.2U_0805_10V6K

2
DAP202U_SOT323-3

3
BST_1.2V-1

BST_1.8V-1
PC73 PC74

14

28
2
0.01U_0402_25V7K PU7 0.01U_0402_25V7K 2

8
7
6
5

5
6
7
8
2 1 12 SOFT1 17 2 1

VIN

VCC
D SOFT2
D
D
D

D
D
D
D
PQ29 PC75 PC76 PQ30
SI4800BDY-T1-E3_SO8 0.1U_0402_16V7K 0.1U_0402_16V7K SI4800BDY-T1-E3_SO8
2 1 1 2BST_1.8V-2 6 23 BST_1.2V-2
1 2 2 1
+1.8VP BOOT1 BOOT2
+1.2VALWP
G

G
S
S
S

S
S
S
PR106 PR107
0_0603_5% 0_0603_5%
1
2
3
4

4
3
2
1
+1.8VP PL6 1 2 DH_1.8V-1 5 24 DH_1.2V-1 1 2 DH_1.2V-2 PL7 +1.2VALWP
1.8U_D104C-919AS-1R8N_9.5A_30% PR111 UGATE1 UGATE2 PR112 1.8U_D104C-919AS-1R8N_9.5A_30%
1 2 LX_1.8V 0_0603_5% 4 PHASE1 PHASE2 25 0_0603_5% LX_1.2V 1 2
2

8
7
6
5

5
6
7
8
1

2
PR108 PR114 PR115
6 VDDIOFB_H
PR110 @ 4.7_1206_5% PQ31 1.54K_0402_1% 2K_0402_1% PR113
2

1 2 0_0402_5% PR116 AO4712_SO8 1 2 ISE_1.8V 7 22 ISE_1.2V 1 2 @ 4.7_1206_5% 1

ISEN1 ISEN2

1
0_0402_5%
21

@ PR109 4 DL_1.8V 2 27 DL_1.2V 4 PR118 + PC79

1
2

2 1
LGATE1 LGATE2

1
0_0402_5% 0_0402_5% PC81 PR119 220U_D2_4VM_R15
+ PC82 0.01U_0402_25V7K 2.21K_0402_1%
1

1
1

PC77 @ PC78
@PC78 PQ32 @ 680P_0603_50V8J 2

2
1

330U_D2E_2.5VM PR117 PC80 680P_0603_50V8J 3 26 AO4712_SO8

1
2
3

3
2
1

1
2 10.2K_0402_1% 0.01U_0402_25V7K PGND1 PGND2
2

9 20
2

VSE_1.8V VOUT1 VOUT2 VSE_1.2V

10 VSEN1 VSEN2 19
26,29,31,33,36 SYSON 1 2 8 EN1 EN2 21 1 2
PR120 15 16 PR121 POK 38,40
0_0402_5% PG1 PG2/REF 0_0402_5%

GND

DDR
11 OCSET1 OCSET2 18
1

1
2

1
PR122 PR123 PR124

13
1

1
3 3

10K_0402_1% PR125 PC83 ISL6227CAZ-T_SSOP28 @ 0_0402_5% 6.49K_0402_1%

@ 0_0402_5% @ 0.1U_0402_16V7K PR127 PR126 PC84
56K_0402_1% 100K_0402_1% @0.1U_0402_16V7K
2

2
1

2
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 41 of 46
A B C D
 5 4 3 2 1

D D
PJ12 PU8
+3VS 2 2 1 1 2 VIN VO 3
+2.5VSP

1
@ JUMP_43X79 1 4
EN ADJ

2
PC85 PC86
4.7U_0805_6.3V6K 5 7 PR128 10U_1206_6.3V7K

1
GND GND 22K_0402_1%

1
6 8

2
GND GND
G965-18ADJP1UF_SO8

1
+3VS 1 2
PR130
PR129 20K_0402_1%
10K_0402_1%

2
PC87
0.1U_0402_16V7K

2
C C

+1.8V

1
PJ13

1
@ JUMP_43X79

2
PU9

2
1 VIN VCNTL 6 +3VALW
2 GND NC 5

1
1
PC88 3 7 PC89
4.7U_0805_6.3V6K PR131 VREF NC 1U_0603_6.3V6M

2
1K_0402_1% 4 8
B +3VS VOUT NC B
9

2
TP
1

APL5331KAC-TRL_SO8
PJ14
1

1
@ JUMP_43X79 PR133 +0.9VP

1
0_0402_5% D PR132
36 SYSON#
2

1 2 2 1K_0402_1% PC90

1
PU10 G
2

2
1
1 6 +5VALW S PC91

2
VIN VCNTL PC92 PQ33 10U_1206_6.3V7K

2
2 5 @ 0.1U_0402_16V7K

2
GND NC
2

1
1

PC93 3 7 PC94
4.7U_0805_6.3V6K VREF NC 1U_0603_6.3V6M 0.1U_0402_16V7K
1

PR134 4 8 RHU002N06_SOT323-3
1.15K_0402_1% VOUT NC
9
2

TP
APL5331KAC-TRL_SO8
PQ34
RHU002N06_SOT323-3 +1.5VSP
1

D
SUSP 1 2 2
1

36 SUSP PR135 G
0_0402_5% S PR136 PC95 PC96
3
1

1K_0402_1% 0.1U_0402_16V7K 10U_1206_6.3V7K

2

PC97
@ 0.1U_0402_16V7K
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 42 of 46
5 4 3 2 1
 5 4 3 2 1

+3VS

31
VR_ON

6
PSI#

VID5

VID4

VID3

VID2

VID1

VID0
2
PL8
PR137 HCB4532KF-800T90_1812
10K_0402_5% CPU_B+ 2 1 B+

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%
31 VGATE 1 1

220U_25V_M

10U_1206_25V6M

10U_1206_25V6M

220U_25V_M
2

2
+ +

PC130

PC125
PQ35
SI7840DP-T1-E3_SO8

PC99

PC100
D +3VS D

1
2 2

PR145

PR138

PR139

PR140

PR141

PR142

PR143

PR144
PR178

1
2 1 UG1-2 4

2
10K_0402_5%

10K_0402_5%
VCC_PRM 0_0603_5%

PR147

@ PR148
5.36K_0402_1%
PR146 PC101

3
2
1
PR150 150K_0402_1%

1
1000P_0402_50V7K

51.1K_0402_1%
0.047U_0603_25V7M
2 1 2 1 PL9

2
0.36UH_PCMC104T-R36MN1R17_30A_20% +CPU_CORE

2
1000P_0402_50V7K 2.2_0603_1% 0.22U_0603_10V7K PHASE1

40

39

38

37

36

35

34

33

32

31
1 2
2

PC102

PC103

PR149
2

10K_0402_1%
6.81K_0603_1%

PGOOD

PSI_L

VID5

VID4

VID3

VID2

VID1

VID0

BOOT1
VR_ON
1

1
PC104

SI4856DY-T1-E3_SO8

SI4856DY-T1-E3_SO8
1

1_0402_5%

@ 0_0402_5%
PR152

PR151
1

2
1 30 UG1-1
1

SET UGATE1

2
4.7_1206_5%

3.65K_0805_1%

PR155

PR156

PR176
5
6
7
8

5
6
7
8
2 RBIAS PHASE1 29

PQ36

PQ37

PR153

PR154
PC105

D
D
D
D

D
D
D
D
3 28 0.22U_0603_16V7K

1
OFS PGND1
1 2

1
4 27 PR157 0_0402_5%
SOFT LGATE1

G
S
S
S

S
S
S
2 1 ISEN2
+5VALW
PR158 PC107 5 26

4
3
2
1

4
3
2
1
OCSET PVCC

PC108
470P_0603_50V8J
97.6K_0402_1% 470P_0402_50V7K 2 1 VSUM
1 2 1 2 6 25 PC106 LG1 ISEN1 VCC_PRM
PC109 VW PU11 LGATE2 4.7U_0603_6.3V6K

2
C 220P_0402_50V8J 7 ISL6264CRZ-T_QFN40_6X6 24 C
COMP PGND2
1 2
8 FB PHASE2 23
PR179
9 22 UG2-1 2 1
PR160 VDIFF UGATE2
1K_0402_1% 10 21 2 1 2 1 0_0603_5%
VSEN BOOT2

DROOP
2 1 CPU_B+

VSUM

ISEN2

ISEN1
1000P_0402_50V7K

PR161 PC110 41 PR159 PC112

GND

VDD
RTN

DFB
GND PAD
2

VIN
255_0402_1% 1000P_0402_50V7K 2.2_0603_1% 0.22U_0603_10V7K

VO
2

10U_1206_25V6M

10U_1206_25V6M
1 2 1 2 PC111

2
@ PC113

0.068U_0603_16V7K
1

11

12

13

14

15

16

17

18

19

20

PC114

PC115
1

6 CPU_VCC_SENSE

1
2 1
ISEN1
PR162 PC116
1000P_0402_50V7K

0_0402_5% 180P_0402_50V8J UG2-2 4

2

1 2 ISEN2
PC117

+CPU_CORE 2 1 PR164 PR165

1K_0402_1% 1.82K_0402_1% PQ38
1

PR163 2 1 1 2 +5VALW SI7840DP-T1-E3_SO8

3
2
1
100_0402_1%
PL10
<> 0.36UH_PCMC104T-R36MN1R17_30A_20% +CPU_CORE
2 1 B+ PHASE2 1 2

10_0603_5%
6 CPU_VSS_SENSE
2

10_0603_5%

10K_0402_1%
PR166 VCC_PRM 2

PR167
0_0402_5% PR168

SI4856DY-T1-E3_SO8

SI4856DY-T1-E3_SO8
B B

1_0402_5%

@ 0_0402_5%
10K_0603_5%_TSM1A103J4302RE

100_0402_1%
PR169
2

2
11K_0402_1%

5
6
7
8

2
4.7_1206_5%
PH3

3.65K_0805_1%

PR173

PR174

PR177
1

5
6
7
8
PQ39

PQ40
PR170
0.1U_0402_16V7K
0.22U_0402_6.3V6K

0.22U_0402_6.3V6K

D
D
D
D
1

PR171

PR172
PC122

D
D
D
D
2

0.22U_0603_16V7K
1

1
PC118

PC119

PC120

1U_0402_6.3V6K
1 2

1
G
S
S
S
2.61K_0402_1%

0.01U_0603_50V7K
1

G
S
S
S
PC121

ISEN1

4
3
2
1
2

470P_0603_50V8J
4
3
2
1

1
PR175

PC123

PC124
LG2 VSUM
2

ISEN2 VCC_PRM
1
1

2
VSUM

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 43 of 46
5 4 3 2 1
 POWER PIR LIST
page Reason for change Modify list

EVT 43 design change change PQ36,PQ37,PQ39,PQ40 from SI4856ADY(SB000001Y00)

to SI4856DY(SB000003800).

DVT 43 offset change PR149 to 51.1K

43 ocp change PR151 to 5.36K
43 Vsense feedback PR163 change to mount
43 transient modification PC120 change to 0.1uF
43 EMI solution PR153, PR171 change to 4.7Ohm. PC108, PC124 change to 470pF.

PVT 38 EMI solution add PC126 2200P and PC127 820P

39 EMI solution add PC128 820P and PC129 0.022U
38 OTP setting design change change PR43 to 13.7K, PR44 to 13.7K
41 OCP solution change PR114 to 2.61K, change PQ27, PQ28, PQ31, PQ32 to AO4712
40 HW design change change PR89 to 10.2K
43 noise solution add PC130, 100U 25V
39 component version change change PU4 from ISL6251AHAZ-T to ISL6251AHAZ-TR5283

PreMP 41 OCP solution change PR114 to 3K

41 HW design change change PR117 to 10.2K
43 noise solution change PC130 to 220U 25V

MP 41 1.8V shutdown solution change PR114 to 1.54K, PR127 to 56K, PC77 to 330U(SGA19331D00)

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/4/14 Deciphered Date 2007/12/9 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 44 of 46
 5 4 3 2 1

HW4 Product Improvement Record (P.I.R.)

Phase: A to B Date: 0601 Writer: Timo Teng
Page# Action Plan Location or Before value After value
Detail Discretion and Root Cause Rev. DL/DM Check
D D

(add; del; change) Net_List (Attached file) (Attached file)

After Power Jeff meausre CPU core ripple,
7 Add @ C576, C785 330U_D2_2.5VY_R9M @330U_D2_2.5VY_R9M we can unmount the 2 capacitors.

14 Del @ CRT Pi-Filter circuit R16, R20....and so on Remove pi filter from CRT board from S/B to M/B for EMI solution

Add CRT DDC circuit D47, R1231 ...and so on. Follow AMD PA
15 Add +HDMI_DDC_CLK, +5VS NC AT JP23.193, J23.182 Follow AMD PA
Del @ C780, U40 @0.1u and @7408 0.1u and 7408
17 Add buffer avoid the leakage issue from LAN CHIP
Add @ R1221 0 ohm @0 ohm

R1233, R1234, C788, NC 10ohm and 1p Add RC for reduce EMI noise
22 Add C789
31 Add R1226 NC 10k For CIR function.
34 Change KSO[0..15] KSO[0..15] KSO[0..17] For Keyboard some keys function.
C180, C385, C87, C269
C 36 Change 0.1uF 0402 0.1uF 0603 Change X7R C
C638, C526

Phase: B to C Date: 0628 Writer: Gino Lu

Page# Action Plan Location or Before value After value
Detail Discretion and Root Cause
(add; del; change) Net_List (Attached file) (Attached file) Rev. DL/DM Check
14 Del R1227, R1228 0_0402_5% NC AMD CRT level shift solution already be implement on VGA/B
R1229, R1230 19.2K_0402_5% NC
D47 CH491D_SC59 NC
BOM Structure Q4, Q5 UMA@
R1231, R1232 @ VGA@
25 DEL C727, C728 22U_A_4VM Update RTL8101E/8102E/8111B/8111C co-layout circuit
Add L78 4.7uH_1008HC
B B
Net C727, R293

Phase: C to PreMP Date: 0723 Writer: Gino Lu

Page# Action Plan Location or Before value After value
Detail Discretion and Root Cause
(add; del; change) Net_List (Attached file) (Attached file) Rev. DL/DM Check
27 Add R486, R487 0_0603_5% Reserve for +HVDD power select
Add C790 10U_0805_10V4Z

16 Add C679, C688 12P_0402_50V8J 18P_0402_50V8J For Real time clock adjust

25 Change C118,C120,C121,C135 0.01U_0402_25V4Z 0.1U_0402_16V4Z for Gigalan EMI solution

BOM structure C728 CAM@ D_CAM@ For Camera reserve

change C558 BT@ For Bluetooth select
A A
25

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 45 of 46
5 4 3 2 1
 5 4 3 2 1

PJP1

45@ Part
45@ DC-IN JACK

ZZZ

D PCB D

LA-3831
<BOM Structure>
REV0 M/BDA800009C00

U5 U5 U5 U26

CHIPSET
UMAR3@ RS690MC UMAR1@ RS690MC VGAR1@ RS690MC SB600R1@ 218S6ECLA13FG_FCBGA548_SB600

8101E C: Modify BOM 8111C 8102E

U4 C473 R293 U4 U4 L48 C482

LAN
8101E@ RTL8101E 8101E@ 1000P_0402_25V8J 8101E@ 0_0603_5% 8111C@ RTL8111C SA00001WM00 8102E@ RTL8102E 8102E@ 0_0603_5% 8102E@ 22U_A_4VM

C429 C464 R293 C473 L46

C 8101E@ 0.1U_0402_16V4Z 8101E@ 22U_A_4VM 8111C@ MBC1608121YZF_0603 8102E@ 1000P_0402_50V7K 8102E@ 0_0603_5% C

C438 R480 C482 C464 C444

8101E@ 1000P_0402_50V7K8101E@ 0_0603_5% 8111C@ 22U_A_4VM 8102E@ 22U_A_4VM 8102E@ 22U_A_4VM

U23 C135 C120 C118 C121

PreMP:Change C118,C120,C121,C135
TRANSFORMER for EMI solution

100M@ TST1284 100M@ 0.01U_0402_25V4Z 100M@ 0.01U_0402_25V4Z 100M@ 0.01U_0402_25V4Z 100M@ 0.01U_0402_25V4Z

U11

Card BUS
8402@ PCI8402

B B
L6 L3 L4

M76 CRT
76@ 76@ 76@
FBMA-11-100505-900T FBMA-11-100505-900T FBMA-11-100505-900T
PreMP: Add BOM sturcture for EMI issue

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/3/8 Deciphered Date 2008/3/8 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A3831
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401498 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, November 25, 2010 Sheet 46 of 46
5 4 3 2 1