8th-Order, Lowpass, Bessel, Switched-Capacitor Filters: General Description Features

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19-4788; Rev 1; 6/99

8th-Order, Lowpass, Bessel,


Switched-Capacitor Filters
General Description Features

MAX7401/MAX7405
The MAX7401/MAX7405 8th-order, lowpass, Bessel, ♦ 8th-Order, Lowpass Bessel Filters
switched-capacitor filters (SCFs) operate from a single
+5V (MAX7401) or +3V (MAX7405) supply. These ♦ Low Noise and Distortion: -82dB THD + Noise
devices draw only 2mA of supply current and allow cor- ♦ Clock-Tunable Corner Frequency (1Hz to 5kHz)
ner frequencies from 1Hz to 5kHz, making them ideal
for low-power post-DAC filtering and anti-aliasing appli- ♦ 100:1 Clock-to-Corner Ratio
cations. They feature a shutdown mode that reduces ♦ Single-Supply Operation
supply current to 0.2µA.
+5V (MAX7401)
Two clocking options are available on these devices: +3V (MAX7405)
self-clocking (through the use of an external capacitor)
or external clocking for tighter corner-frequency control. ♦ Low Power
An offset adjust pin allows for adjustment of the DC out- 2mA (Operating Mode)
put level. 0.2µA (Shutdown Mode)
The MAX7401/MAX7405 Bessel filters provide low over- ♦ Available in 8-Pin SO/DIP Packages
shoot and fast settling. Their fixed response simplifies
♦ Low Output Offset: ±5mV
the design task to selecting a clock frequency.

Applications Ordering Information


ADC Anti-Aliasing CT2 Base Stations PART TEMP. RANGE PIN-PACKAGE
Post-DAC Filtering Speech Processing MAX7401CSA 0°C to +70°C 8 SO
MAX7401CPA 0°C to +70°C 8 Plastic DIP
Air-Bag Electronics
MAX7401ESA -40°C to +85°C 8 SO
MAX7401EPA -40°C to +85°C 8 Plastic DIP
MAX7405CSA 0°C to +70°C 8 SO
Pin Configuration MAX7405CPA 0°C to +70°C 8 Plastic DIP
MAX7405ESA -40°C to +85°C 8 SO
TOP VIEW
MAX7405EPA -40°C to +85°C 8 Plastic DIP

COM 1 8 CLK

IN 2 7 SHDN Typical Operating Circuit


MAX7401
GND 3 MAX7405 6 OS

VDD 4 5 OUT VSUPPLY

0.1µF
SO/DIP
VDD
SHDN

INPUT IN OUT OUTPUT

MAX7401
MAX7405

CLOCK CLK COM

OS 0.1µF
GND

________________________________________________________________ Maxim Integrated Products 1

For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
ABSOLUTE MAXIMUM RATINGS
MAX7401/MAX7405

VDD to GND Continuous Power Dissipation (TA = +70°C)


MAX7401 ..............................................................-0.3V to +6V 8-Pin SO (derate 5.88mW/°C above +70°C)................471mW
MAX7405 ..............................................................-0.3V to +4V 8-Pin DIP (derate 9.09mW/°C above +70°C) ...............727mW
IN, OUT, COM, OS, CLK ...........................-0.3V to (VDD + 0.3V) Operating Temperature Ranges
SHDN........................................................................-0.3V to +6V MAX740 _C_A ....................................................0°C to +70°C
OUT Short-Circuit Duration...................................................1sec MAX740 _E_A .................................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS—MAX7401
(V DD = +5V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND,
SHDN = VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
FILTER CHARACTERISTICS
Corner Frequency fC (Note 1) 0.001 to 5 kHz
Clock-to-Corner Ratio fCLK / fC 100:1
Clock-to-Corner Tempco 10 ppm/°C
Output Voltage Range 0.25 VDD - 0.25 V
Output Offset Voltage VOFFSET VIN = VCOM = VDD / 2 ±5 ±25 mV
DC Insertion Gain with
VCOM = VDD / 2 (Note 2) -0.1 0.15 0.3 dB
Output Offset Removed
Total Harmonic Distortion fIN = 200Hz, VIN = 4Vp-p,
THD+N -82 dB
plus Noise measurement bandwidth = 22kHz
OS Voltage Gain to OUT AOS 1 V/ V
Input Voltage Range at OS VOS VCOM ±0.1 V
VDD / 2 VDD / 2
Input, COM externally driven VDD / 2
- 0.5 + 0.5
COM Voltage Range VCOM V
VDD / 2 VDD / 2
Output, COM internally biased VDD / 2
- 0.2 + 0.2
Input Resistance at COM RCOM 75 125 kΩ
Clock Feedthrough 10 mVp-p
Resistive Output Load Drive RL 10 1 kΩ
Maximum Capacitive Load at
CL 50 500 pF
OUT
Input Leakage Current at COM SHDN = GND, VCOM = 0 to VDD ±0.1 ±10 µA
Input Leakage Current at OS VOS = 0 to (VDD - 1V) (Note 3) ±0.1 ±10 µA
CLOCK
Internal Oscillator Frequency fOSC COSC = 1000pF (Note 4) 29 38 48 kHz
Clock Input Current ICLK VCLK = 0 or 5V ±15 ±30 µA
Clock Input High VIH VDD - 0.5 V
Clock Input Low VIL 0.5 V

2 _______________________________________________________________________________________
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
ELECTRICAL CHARACTERISTICS—MAX7401 (continued)

MAX7401/MAX7405
(V DD = +5V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND,
SHDN = VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER REQUIREMENTS
Supply Voltage VDD 4.5 5.5 V
Supply Current IDD Operating mode, no load, IN = OS = COM 2 3.5 mA
Shutdown Current I SHDN SHDN = GND, CLK driven from 0 to VDD 0.2 1 µA
Power-Supply Rejection Ratio PSRR Measured at DC 60 dB
SHUTDOWN
SHDN Input High VSDH VDD - 0.5 V
SHDN Input Low VSDL 0.5 V
SHDN Input Leakage Current V SHDN = 0 to VDD ±0.1 ±10 µA

ELECTRICAL CHARACTERISTICS—MAX7405
(V DD = +3V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND,
SHDN = VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
FILTER CHARACTERISTICS
Corner Frequency fC (Note 1) 0.001 to 5 kHz
Clock-to-Corner Ratio fCLK/fC 100:1
Clock-to-Corner Tempco 10 ppm/°C
Output Voltage Range 0.25 VDD - 0.25 V
Output Offset Voltage VOFFSET VIN = VCOM = VDD / 2 ±5 ±25 mV
DC Insertion Gain with
VCOM = VDD / 2 (Note 2) -0.1 0.03 0.3 dB
Output Offset Removed
Total Harmonic Distortion fIN = 200Hz, VIN = 2.5Vp-p,
THD+N -84 dB
plus Noise measurement bandwidth = 22kHz
OS Voltage Gain to OUT AOS 1 V/ V
Input Voltage Range at OS VOS VCOM ±0.1 V
VDD / 2 VDD / 2
COM Voltage Range VCOM COM internally biased or externally driven VDD / 2 V
- 0.1 + 0.1
Input Resistance at COM RCOM 75 125 kΩ
Clock Feedthrough 10 mVp-p
Resistance Output Load Drive RL 10 1 kΩ
Maximum Capacitive
CL 50 500 pF
Load at OUT
Input Leakage Current at COM SHDN = GND, VCOM = 0 to VDD ±0.1 ±10 µA
Input Leakage Current at OS VOS = 0 to (VDD - 1V) (Note 3) ±0.1 ±10 µA

_______________________________________________________________________________________ 3
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
ELECTRICAL CHARACTERISTICS—MAX7405 (continued)
MAX7401/MAX7405

(V DD = +3V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND,
SHDN = VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CLOCK
Internal Oscillator Frequency fOSC COSC = 1000pF (Note 4) 26 34 43 kHz
Clock Input Current ICLK VCLK = 0 or 3V ±15 ±30 µA
Clock Input High VIH VDD - 0.5 V
Clock Input Low VIL 0.5 V
POWER REQUIREMENTS
Supply Voltage VDD 2.7 3.6 V
Supply Current IDD Operating mode, no load, IN = OS = COM 2 3.5 mA
Shutdown Current I SHDN SHDN = GND, CLK driven from 0 to VDD 0.2 1 µA
Power-Supply Rejection Ratio PSRR Measured at DC 60 dB
SHUTDOWN
SHDN Input High VSDH VDD - 0.5 V
SHDN Input Low VSDL 0.5 V
SHDN Input Leakage Current V SHDN = 0 to VDD ±0.1 ±10 µA

FILTER CHARACTERISTICS—MAX7401/MAX7405
(VDD = +5V for MAX7401, VDD = +3V for MAX7405; filter output measured at OUT; 10kΩ || 50pF load to GND at OUT; SHDN = VDD;
VCOM = VOS = VDD /2; fCLK = 100kHz; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER CONDITIONS MIN TYP MAX UNITS
fIN = 0.5fC -1.0 -0.8 -0.6
Insertion Gain Relative to fIN = fC -3.3 -3.0 -2.7
dB
DC Gain fIN = 3fC -33 -29
fIN = 6fC -79 -74
Note 1: The maximum fC is defined as the clock frequency, fCLK = 100 · fC, at which the peak SINAD drops to 68dB with a sinu-
soidal input at 0.2fC.
Note 2: DC insertion gain is defined as ∆VOUT / ∆VIN.
Note 3: OS voltages above VDD - 1V saturate the input and result in a 75µA typical input leakage current.
Note 4: For MAX7401, fOSC (kHz) ≅38 · 103 / COSC (pF). For MAX7405, fOSC (kHz) ≅34 · 103 / COSC (pF).

4 _______________________________________________________________________________________
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
Typical Operating Characteristics

MAX7401/MAX7405
(VDD = +5V for MAX7401, VDD = +3V for MAX7405; fCLK = 100kHz; SHDN = VDD; VCOM = VOS = VDD / 2; TA = +25°C; unless otherwise
noted.)
FREQUENCY RESPONSE PASSBAND FREQUENCY RESPONSE PHASE RESPONSE
10
MAX7401 toc01
0.5 0

MAX7409 toc02

MAX7401 toc03
fC = 1kHz fC = 1kHz fC = 1kHz
0 0 -50
-10

PHASE SHIFT (DEGREES)


-0.5 -100
-20 -1.0 -150
GAIN (dB)

GAIN (dB)

-30 -1.5 -200


-40 -2.0 -250
-50 -2.5 -300
-60 -3.0 -350
-70 -3.5 -400
0 1 2 3 4 5 0 202 404 606 808 1010 0 400 800 1200 1600 2000
INPUT FREQUENCY (kHz) INPUT FREQUENCY (Hz) INPUT FREQUENCY (Hz)

SUPPLY CURRENT SUPPLY CURRENT OFFSET VOLTAGE


vs. SUPPLY VOLTAGE vs. TEMPERATURE vs. SUPPLY VOLTAGE
2.5 2.03 20

MAX7401 toc06
MAX7401 toc04

MAX7401 toc05

NO LOAD VIN = VCOM = VDD / 2


2.4 NO LOAD 15
2.3 2.02
10
SUPPLY CURRENT (mA)

SUPPLY CURRENT (mA)

OFFSET VOLTAGE (mV)

2.2
2.01
2.1 MAX7401
5
MAX7405 MAX7401 MAX7405 MAX7401
2.0 2.00 0
1.9
-5
1.8 1.99
-10
1.7 MAX7405
1.98
1.6 -15
1.5 1.97 -20
2.5 3.0 3.5 4.0 4.5 5.0 5.5 -40 -20 0 20 40 60 80 100 2.5 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V) TEMPERATURE (°C) SUPPLY VOLTAGE (V)

INTERNAL OSCILLATOR FREQUENCY NORMALIZED OSCILLATOR FREQUENCY


OFFSET VOLTAGE vs. TEMPERATURE vs. COSC CAPACITANCE vs. SUPPLY VOLTAGE
1.0 10,000 1.20
MAX7401 toc07

MAX7401 toc08

MAX7401 toc09

COSC = 390pF
NORMALIZED OSCILLATOR FREQUENCY

VIN = VCOM = VDD / 2 1.15


OSCILLATOR FREQUENCY (kHz)

0.5 1000
1.10
OFFSET VOLTAGE (mV)

0 100 1.05 MAX7405

1.00
-0.5 10
0.95 MAX7401
0.90
-1.0 1
0.85

-1.5 0.1 0.80


-40 -20 0 20 40 60 80 100 0.01 0.1 1 10 100 1000 2.5 3.0 3.5 4.0 4.5 5.0 5.5
TEMPERATURE (°C) COSC CAPACITANCE (nF) SUPPLY VOLTAGE (V)

_______________________________________________________________________________________ 5
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
Typical Operating Characteristics (continued)
MAX7401/MAX7405

(VDD = +5V for MAX7401, VDD = +3V for MAX7405; fCLK = 100kHz; SHDN = VDD; VCOM = VOS = VDD / 2; TA = +25°C; unless otherwise
noted.)
MAX7401 MAX7401
NORMALIZED OSCILLATOR FREQUENCY THD PLUS NOISE vs. THD PLUS NOISE vs. INPUT SIGNAL
vs. TEMPERATURE INPUT SIGNAL AMPLITUDE AMPLITUDE AND RESISTIVE LOAD
1.04 0 0

MAX7401 toc12
MAX7401 toc10

MAX7401 toc11
COSC = 390pF fIN = 200Hz
NO LOAD
NORMALIZED OSCILLATOR FREQUENCY

1.03 -10 -10 fC = 1kHz


(SEE TABLE A)
MEASUREMENT BW = 22kHz
-20 -20
1.02 MAX7401

THD + NOISE (dB)


THD + NOISE (dB)

-30 -30
1.01
-40 -40
1.00 RL = 500Ω
MAX7405 -50
-50
0.99 RL = 1kΩ
-60 -60
A
0.98 -70 RL = 10kΩ
-70
B
0.97 -80 -80

0.96 -90 -90


-40 -20 0 20 40 60 80 100 0 1 2 3 4 5 0 1 2 3 4 5
TEMPERATURE (°C) AMPLITUDE (Vp-p) AMPLITUDE (Vp-p)

MAX7405 MAX7405
THD PLUS NOISE vs. THD PLUS NOISE vs. INPUT SIGNAL
INPUT SIGNAL AMPLITUDE AMPLITUDE AND RESISTIVE LOAD
0 0

MAX7401 toc14
MAX7401 toc13

NO LOAD fIN = 200Hz


-10 (SEE TABLE A) -10 fC = 1kHz
-20 MEASUREMENT BW = 22kHz
-20
THD + NOISE (dB)

-30
THD + NOISE (dB)

-30
-40 -40

-50 -50
RL = 500Ω
-60 -60
A RL = 1kΩ
-70 B -70
RL = 10kΩ
-80 -80

-90 -90
0 0.5 1.0 1.5 2.0 2.5 3.0 0 0.5 1.0 1.5 2.0 2.5 3.0
AMPLITUDE (Vp-p) AMPLITUDE (Vp-p)

Table A. THD Plus Noise vs. Input


Signal Amplitude Test Conditions
fIN fC fCLK MEASUREMENT
TRACE
(Hz) (kHz) (kHz) BANDWIDTH (kHz)
A 1000 5 500 80
B 200 1 100 22

6 _______________________________________________________________________________________
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters

MAX7401/MAX7405
Pin Description
PIN NAME FUNCTION
Common Input. Biased internally at mid-supply. Bypass externally to GND with a 0.1µF capacitor. To over-
1 COM
ride internal biasing, drive with an external supply.
2 IN Filter Input
3 GND Ground
4 VDD Positive Supply Input: +5V for MAX7401, +3V for MAX7405
5 OUT Filter Output
Offset Adjust Input. To adjust output offset, bias OS externally. Connect OS to COM if no offset adjustment is
6 OS
needed. Refer to Offset and Common-Mode Input Adjustment section.
7 SHDN Shutdown Input. Drive low to enable shutdown mode; drive high or connect to VDD for normal operation.
Clock Input. To override the internal oscillator, connect to an external clock; otherwise, connect an external
8 CLK
capacitor (COSC) from CLK to GND to set the internal oscillator frequency.

_______________Detailed Description
The MAX7401/MAX7405 Bessel filters provide low over-
shoot and fast settling responses. Both parts operate
with a 100:1 clock-to-corner frequency ratio and a 5kHz A 2V/div
maximum corner frequency.
Lowpass Bessel filters such as the MAX7401/MAX7405
delay all frequency components equally, preserving the
B 2V/div
shape of step inputs (subject to the attenuation of the
higher frequencies). Bessel filters settle quickly—an
important characteristic in applications that use a multi- C 2V/div
plexer (mux) to select an input signal for an analog-to-
digital converter (ADC). An anti-aliasing filter placed
between the mux and the ADC must settle quickly after
a new channel is selected. 200µs/div
Figure 1 shows the difference between Bessel and
A: 1kHz INPUT SIGNAL
Butterworth filters when a 1kHz square wave is applied B: BESSEL FILTER RESPONSE; fC = 5kHz
to the filter input. With the filter cutoff frequencies set at C: BUTTERWORTH FILTER RESPONSE; fC = 5kHz
5kHz, trace B shows the Bessel filter response and
trace C shows the Butterworth filter response. Figure 1. Bessel vs. Butterworth Filter Response

Background Information
Most switched-capacitor filters (SCFs) are designed with
biquadratic sections. Each section implements two filter-
ing poles, and the sections are cascaded to produce
R1 L1 L3 L5 L7
higher order filters. The advantage to this approach is
ease of design. However, this type of design is highly +
sensitive to component variations if any section’s Q is -
VIN C2 C4 C6 C8 R2 V0
high. An alternative approach is to emulate a passive net-
work using switched-capacitor integrators with summing
and scaling. Figure 2 shows a basic 8th-order ladder filter
structure.
Figure 2. 8th-Order Ladder Filter Network

_______________________________________________________________________________________ 7
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
MAX7401/MAX7405

A switched-capacitor filter such as the MAX7401/ Low-Power Shutdown Mode


MAX7405 emulates a passive ladder filter. The filter’s These devices feature a shutdown mode that is activat-
component sensitivity is low when compared to a cas- ed by driving SHDN low. In shutdown mode, the filter’s
caded biquad design because each component affects supply current reduces to 0.2µA (typ) and its output
the entire filter shape, not just one pole-zero pair. In other becomes high impedance. For normal operation, drive
words, a mismatched component in a biquad design will SHDN high or connect to VDD.
have a concentrated error on its respective poles, while
the same mismatch in a ladder filter design results in an ___________Applications Information
error distributed over all poles. Offset and Common-Mode
Clock Signal Input Adjustment
External Clock The voltage at COM sets the common-mode input volt-
The MAX7401/MAX7405 family of SCFs is designed for age and is biased at mid-supply with an internal resistor-
use with external clocks that have a 40% to 60% duty divider. Bypass COM with a 0.1µF capacitor and
cycle. When using an external clock with these devices, connect OS to COM. For applications requiring offset
drive CLK with a CMOS gate powered from 0 to VDD. adjustment or DC level shifting, apply an external bias
Varying the rate of the external clock adjusts the corner voltage through a resistor-divider network to OS, as
frequency of the filter as follows: shown in Figure 3. (Note: Do not leave OS unconnect-
ed.) The output voltage is represented by this equation:
fC = fCLK / 100
Internal Clock VOUT = (VIN - VCOM) + VOS
When using the internal oscillator, connect a capacitor
with VCOM = VDD / 2 (typical), and where (VIN - VCOM) is
(C OSC) between CLK and ground. The value of the
lowpass filtered by the SCF, and VOS is added at the
capacitor determines the oscillator frequency as follows:
output stage. See the Electrical Characteristics for the
voltage range of COM and OS. Changing the voltage on
K ⋅10 3 COM or OS significantly from mid-supply reduces the fil-
fOSC (kHz) = ; COSC in pF
COSC ter’s dynamic range.
where K = 38 for MAX7401 and K = 34 for MAX7405. Power Supplies
The MAX7401 operates from a single +5V supply, and
Minimize the stray capacitance at CLK so that it does the MAX7405 operates from a single +3V supply.
not affect the internal oscillator frequency. Vary the rate Bypass VDD to GND with a 0.1µF capacitor. If dual sup-
of the internal oscillator to adjust the filter’s corner fre- plies are required (±2.5V for MAX7401, ±1.5V for
quency by a 100:1 clock-to-corner frequency ratio. For MAX7405), connect COM to system ground and connect
example, an internal oscillator frequency of 100kHz
produces a nominal corner frequency of 1kHz. VSUPPLY

Input Impedance vs. Clock Frequencies


The MAX7401/MAX7405’s input impedance is effectively 0.1µF
that of a switched-capacitor resistor and is inversely pro- VDD
portional to frequency. The input impedance values SHDN
OUT OUTPUT
determined below represent the average input imped-
INPUT IN COM
ance since the input current is not continuous. As a rule, 0.1µF 50k
use a driver with an output impedance less than 10% of
MAX7401
the filter’s input impedance. Estimate the input imped- MAX7405
ance of the filter using the following formula: CLOCK CLK OS 50k
1 0.1µF
ZIN =
(fCLK ⋅ CIN ) GND
50k

where fCLK = clock frequency and CIN = 3.37pF.

Figure 3. Offset Adjustment Circuit

8 _______________________________________________________________________________________
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters

MAX7401/MAX7405
Table 1. Typical Harmonic Distortion
fCLK fC fIN VIN TYPICAL HARMONIC DISTORTION (dB)
FILTER
(kHz) (kHz) (Hz) (Vp-p) 2nd 3rd 4th 5th
100 1 200 -91 -83 -90 -93
MAX7401 4
500 5 1000 -89 -79 -92 -92
100 1 200 -87 -83 -87 -88
MAX7405 2
500 5 1000 -83 -82 -88 -88

Anti-Aliasing and Post-DAC Filtering


V+ When using the MAX7401/MAX7405 for anti-aliasing or
post-DAC filtering, synchronize the DAC and the filter
clocks. If the clocks are not synchronized, beat frequen-
VDD * cies may alias into the passband.
SHDN
OUT OUTPUT The high clock-to-corner frequency ratio (100:1) also
INPUT IN
COM
eases the requirements of pre- and post-SCF filtering. At
the input, a lowpass filter prevents the aliasing of fre-
quencies around the clock frequency into the passband.
MAX7401 At the output, a lowpass filter attenuates the clock
V+ MAX7405
CLOCK CLK OS feedthrough.
V-
0.1µF 0.1µF
A high clock-to-corner frequency ratio allows a simple
GND RC lowpass filter, with the cutoff frequency set above
the SCF corner frequency, to provide input anti-aliasing
and reasonable output clock attenuation.
V-
Harmonic Distortion
*DRIVE SHDN TO V- FOR LOW-POWER SHUTDOWN MODE. Harmonic distortion arises from nonlinearities within the
filter. These nonlinearities generate harmonics when a
Figure 4. Dual-Supply Operation pure sine wave is applied to the filter input. Table 1 lists
the MAX7401/MAX7405’s typical harmonic-distortion
GND to the negative supply. Figure 4 shows an example values with a 10kΩ load at TA = +25°C.
of dual-supply operation. Single- and dual-supply perfor-
mance are equivalent. For either single- or dual-supply
operation, drive CLK and SHDN from GND (V- in dual-
supply operation) to VDD. For ±5V dual-supply applica-
tions, use the MAX291–MAX297. Chip Information
Input Signal Amplitude Range TRANSISTOR COUNT: 1116
The optimal input signal range is determined by observ-
ing the voltage level at which the total harmonic distor-
tion plus noise (THD+N) is minimized for a given corner
frequency. The Typical Operating Characteristics show
graphs of the devices’ THD+N response as the input
signal’s peak-to-peak amplitude is varied. These mea-
surements are made with OS and COM biased at mid-
supply.

_______________________________________________________________________________________ 9
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
________________________________________________________Package Information
MAX7401/MAX7405

SOICN.EPS

10 ______________________________________________________________________________________
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters

MAX7401/MAX7405
Package Information (continued)

PDIPN.EPS

______________________________________________________________________________________ 11
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
MAX7401/MAX7405

NOTES

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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