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Q1 Differentiate between RISC and CISC.
Main difference between CISC and RISC are as under :
CISC RISC
Emphasis on hardware Emphasis on software
Includes multi-clock complex

Single-clock, reduced instruction only
instructions
Memory-to-memory: Register to register:

"LOAD" and "STORE" "LOAD" and "STORE" are
incorporated in instructions independent instructions
Small code sizes, Low cycles per second, large code

high cycles per second sizes.
Transistors used for storing Spends more transistors on memory

complex instructions registers
Q2 What is the difference between Machine Language and Assembly

Language?
Machine language is the actual bits used to control the processor in the
computer, usually viewed as a sequence of hexadecimal numbers
(typically bytes). The processor reads these bits in from program memory,
and the bits represent "instructions" as to what to do next.
Thus machine language provides a way of entering instructions into a

computer (whether through switches, punched tape, or a binary file).
Assembly language is a more human readable view of machine language.
Instead of representing the machine language as numbers, the instructions
and registers are given names (typically abbreviated words, or mnemonics,
eg ld means "load"). Unlike a high level language, assembler is very close
to the machine language. The main abstractions (apart from the
mnemonics) are the use of labels instead of fixed memory addresses, and
Computer Architecture Question Bank 1
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comments.
An assembly language program (i.e. a text file) is translated to machine

language by an assembler. A dis-assembler performs the reverse function
(although the comments and the names of labels will have been discarded
in the assembler process).
Q3 Why 2's complement method is used for representation of negative

numbers?
The two's complement of a binary number is defined as the value

obtained by subtracting the number from a large power of two
(specifically, from 2N for an N-bit two's complement).
A two's-complement system or two's-complement arithmetic is a

system in which negative numbers are represented by the two's
complement of the absolute value; this system is the most common
method of representing signed integers on computers. In such a system, a
number is negated (converted from positive to negative or vice versa) by
computing its two's complement. An N-bit two's-complement numeral
system can represent every integer in the range −2N-1 to +2N-1-1.
The two's-complement system has the advantage of not requiring that the
addition and subtraction circuitry examine the signs of the operands to
determine whether to add or subtract. This property makes the system both
simpler to implement and capable of easily handling higher precision
arithmetic. Also, zero has only a single representation, obviating the
subtleties associated with negative zero, which exists in ones'-complement
systems.
Q4 Differentiate between Programmed I/O and I/O mapped I/O
Memory mapped I/O is mapped into the same address space as program
memory and/or user memory, and is accessed in the same way. I/O
mapped I/O (also known as port mapped I/O) uses a separate, dedicated
address space and is accessed via a dedicated set of microprocessor
instructions. If you're using a microprocessor or microcontroller that
doesn't support port mapped I/O, then you have to use memory mapped
I/O.
Microprocessors that support port mapped I/O include Intel x86 and
compatible processors, and also the Zilog Z80 and Intel 8080.
Microprocessors that DON'T support port mapped I/O (and hence require
the use of memory mapped I/O) include the Motorola 6800 and the MOS
Technology 6502.
The advantage of port mapped I/O is that it makes for neater code and
requires fewer external components to implement I/O. However, it adds to
the complexity and pin count of the microprocessor itself.
Q5 Differentiate between Assembler and Compiler.
Assembler - A computer program that takes computer instructions and

converts them into a pattern of bits that the computer can understand and
perform by it certain operations.
Compiler - This is a special program that processes statements written in

a programming language and turns them into machine language that a
computer's processor uses.
Q6 What do you understand by Interleaved DMA?
A Stack is a type of data container/ data structure that implements the

LAST-IN-FIRST-OUT (LIFO) strategy for inserting and recovering data.
This is a very useful strategy, related to many types of natural
programming tasks. For instance: Keeping track of nested invocation calls
in a procedural programming language, Evaluating arithmetic expressions
and To eliminate the need for direct implementation of recursion.
Q7 How pipeline helps in a faster execution of an Instruction?
An instruction pipeline is a technique used in the design of computers

and other digital electronic devices to increase their instruction throughput
(the number of instructions that can be executed in a unit of time).
The fundamental idea is to split the processing of a computer instruction

into a series of independent steps, with storage at the end of each step.
This allows the computer's control circuitry to issue instructions at the
processing rate of the slowest step, which is much faster than the time
needed to perform all steps at once. The term pipeline refers to the fact
that each step is carrying data at once (like water), and each step is
connected to the next (like the links of a pipe.)
Q8 List various methods of data transfer.
IDE and SCSI controllers can use any of three data transfer methods to
move data to and from system memory. The first method, Programmed
I/O (PIO), relies entirely on the host PC's CPU to conduct data back and
forth between the controller and memory.
Although PIO is cheap and easily implemented because it requires no

special hardware, PIO-based disk I/O heavily taxes the host CPU and
makes it unsuitable for multitasking environments such as Windows NT,
UNIX, and NetWare. All implementations of the IDE/ATA specification
can use PIO, whereas very few SCSI controllers (Adaptec is an exception)
ever employ this method.
The other two methods of data transfer, which are more sophisticated than
PIO, are known as third-party DMA and first-party DMA. Direct memory
access (DMA) uses special hardware, either on the host system's
motherboard or on a controller card, to facilitate the transfer of data to and
from system memory without involving the CPU.
Q9 Differentiate between Push operation and POP operation in a stack.
A stack is a type of data structure -- a means of storing information in a

computer. When a new object is entered in a stack, it is placed on top of all
the previously entered objects.
The push instruction pushes a value onto the stack. The value is put ON
TOP of the stack. The stack's size will increase by one.
The pop instruction takes the TOP VALUE from the stack and assigns it to
the specified variable. The stack's size will decrease by one. If there are no
values on the stack (e.g. the stack's size is equal to zero), then the error
flag will be set.
Q10 What is Multiprogramming?
Multiprogramming is a technique used to utilize maximum CPU time by

running multiple programs simultaneously. The execution begins with the
first program and continues till an instruction waiting for a peripheral is
reached, the context of this program is stored, and the second program in
memory is given a chance to run. The process continued until all programs
finished running. Multiprogramming has no guarantee that a program will
run in a timely manner.
Usually on a mainframe - the computer has a number of programs loaded

into memory and the operating system switches quickly between them,
processing a little bit of each one in turn. The high speed of the processor
makes it seem like more than one program is being run at the same time.
On a PC it is usually called multitasking.
Q11 Draw the block diagram of a computer
Block diagram of computer
Q12 What are the basic functional units of a computer?
Digital computer systems consist of three distinct units. These units are as
follows:
Input unit
Central Processing unit
Output unit
These units are interconnected by electrical cables to permit

communication between them. This allows the computer to function as a
system.
Q13 What is Bus and draw the block diagram?
A set of parallel conductors, which allow devices attached to it to

communicate with the CPU.
The bus consists of three main parts:
Control lines
These allow the CPU to control which operations the devices attached
should perform, I.E. read or write.
Address lines
Allows the CPU to reference certain (Memory) locations within the

device.
Data lines
The meaningful data which is to be sent or retrieved from a device is

placed on to these lines.
Q14 Difference between Primary storage and secondary storage.
1. Primary storage devices are temporary whereas Temporary storage

devices are permanent.
2. Primary storage devices are expensive whereas Temporary storage

devices are cheaper.
3. Primary storage devices are faster, therefore expensive. Whereas

Temporary storage devices Computers via cables, and slow, therefore
cheaper.
4. Primary storage devices have less storage capacity whereas Temporary

storage devices have high storage capacity.
5. Primary storage devices refer to RAM storage capacity Temporary

storage devices refer to FDD.
Q15 What is register?
A register is a very small temporary holding area (usually 64 bits) for data.
These registers act as buffers between the CPU and the memory.
The use of registered memory increases system reliability, but also slows
the system down a very slight bit as data must be moved through the
registers.
Some systems do not support registered memory, others require registered

memory, and many more give you the option to use registered or
unregistered memory.
The use of registered memory is recommended for server-class systems. It

is not useful on gaming systems.
Registered memory is also known as buffered memory. Unregistered

memory is also known as unbuffered memory.
Q16 Define RAM.
The primary storage is referred to as random access memory (RAM)

because it is possible to randomly select and use any location of the

memory directly store and retrieve data.
It takes same time to any address of the memory as the first address. It is
also called read/write memory. The storage of data and instructions inside
the primary storage is temporary.
It disappears from RAM as soon as the power to the computer is switched

off.
The memories, which loose their content on failure of power supply, are
known as volatile memories. So now we can say that RAM is volatile
memory.
Q17 Give short notes on system software.
System software refers to the files and programs that make up your
computer's operating system. System files include libraries of functions,
system services, drivers for printers and other hardware, system
preferences, and other configuration files. The programs that are part of
the system software include assemblers, compilers, file management tools,
system utilities, and debuggers.
The system software is installed on your computer when you install your
operating system. You can update the software by running programs such
as "Windows Update" for Windows or "Software Update" for Mac OS X.
Unlike application programs, however, system software is not meant to be
run by the end user. For example, while you might use your Web browser
every day, you probably don't have much use for an assembler program
(unless, of course, you are a computer programmer).
Since system software runs at the most basic level of your computer, it is
called "low-level" software. It generates the user interface and allows the
operating system to interact with the hardware. Fortunately, you don't have
to worry about what the system software is doing since it just runs in the
background. It's nice to think you are working at a "high-level" anyway.
Specific kinds of system software include:
Loading , Linkers, Utility software,
Desktop environment / Graphical user interface
Shell, BIOS, Hypervisors
Bootloaders
Q18 Write down the operation of control unit.
An instruction cycle includes the following sub cycles :
Fetch: Read the next instruction from memory into the CPU.
Execute: Interpret the opcode and perform the indicated operation.
Interrupt: If interrupts are enabled and an interrupt has occurred, save the
current process state and service the interrupt.
We are now in a position to elaborate somewhat on the instruction cycle.

First, we must introduce one additional subcycle, known as the indirect
cycle.
Q19 Define Memory address register.
The memory address register (MAR) holds the address of the memory
location where the next instruction is to be executed. While the first
instruction is being executed, the address of the next memory location is
held by it. The Memory Address Register is half of a minimal interface
between a micro program and computer storage. The other half is a
memory data register.
Far more complex memory interfaces exist, but this is the least that can
work.
Q20 Define Addressing modes and type of Addressing modes
Addressing modes are an aspect of the instruction set architecture in most

central processing unit (CPU) designs. The various addressing modes that
are defined in a given instruction set architecture define how machine
language instructions in that architecture identify the operand (or
operands) of each instruction. An addressing mode specifies how to
calculate the effective memory address of an operand by using information
held in registers and/or constants contained within a machine instruction
or elsewhere.
In computer programming, addressing modes are primarily of interest to

compiler writers and to those who write code directly in assembly
language.
The most common addressing modes are:
Immediate addressing mode
Direct addressing mode
Indirect addressing mode
Register addressing mode
Register indirect addressing mode
Displacement addressing mode
Stack addressing mode.
Q21 What is stack & queues?
A stack is a list in which all insertions and deletions are made at one end,
called the top. The last element to be inserted into the stack will be the first
to be removed. Thus stacks are sometimes referred to as Last In First Out
(LIFO) lists.
A Queue is an ordered collection of items from which items may be

deleted at one end (called the front of the queue) and into which items may
be inserted at the other end (the rear of the queue).
Q22 Write the basic performance equation.
The Performance Equation is a term used in computer science. It refers

to the calculation of the performance or speed of a central processing unit
(CPU).
Basically the Basic Performance Equation [BPE] is an equation with 3

parameters which are required for the calculation of "Basic Performance"
of a given system.
It is given by T = (N*S)/R
'T' is the processor time [Program Execution Time]required to execute a

given program written in some high level language .The compiler
generates a machine language object program corresponding to the source
program.
'N' is the total number of steps required to complete program execution. 'N'
is the actual number of instruction executions, not necessarily equal to the
total number of machine language instructions in the object program.

Some instructions are executed more than others (loops) and some are not
executed at all (conditions).
'S' is the average number of basic steps each instruction execution

requires, where each basic step is completed in one clock cycle. We say
average as each instruction contains a variable number of steps depending
on the instruction. 'R' is the clock rate [in cycles per second].
Q23 Define clock rate.
Frequency of a computer's internal electronic clock. Every computer

contains an electronic clock, which produces a sequence of regular
electrical pulses used by the control unit to synchronize the components of
the computer and regulate the fetch–execute cycle by which program
instructions are processed.
A fixed number of time pulses is required in order to execute each

particular instruction. The speed at which a computer can process
instructions therefore depends on the clock rate: increasing the clock rate
will decrease the time required to complete each particular instruction.
Clock rates are measured in megahertz (MHz), or millions of pulses a

second. Microcomputers commonly have a clock rate of 8–100 MHz. The
overall performance of a microcomputer depends on many factors in
addition to the clock rate.
Q24 List out the types in displacement addressing.
Displacement Addressing:
In displacement addressing mode there are 3 types of addressing mode.

They are :
1) Relative addressing
2) Base register addressing
3) Indexing addressing.
This is a combination of direct addressing and register indirect addressing.

The value contained in one address field. A is used directly and the other
address refers to a register whose contents are added to A to produce the
effective address.
Q25 What are different addressing modes?
Various formats of specifying the operands are called addressing modes.
1) Direct, (ex: IN/OUT Port#) (# - port number)
2) Immediate, (ex: MVI R,Data) (R-register)
3) Register, (ex: MOV Rd,Rs) (Rd- destination Register, Rs-
source Register)
4) Register indirect
5) relative addressing mode
7) indexed addressing mode
8) base addressing mode
9) auto increment addressing mode
10) Auto decrement addressing mode.
Q26 What is Opcode and mention the types of Opcode.
An Opcode (operation code) is the portion of a machine language

instruction that specifies the operation to be performed. Their specification
and format are laid out in the instruction set architecture of the processor
in question (which may be a general CPU or a more specialized processing

unit). Apart from the Opcode itself, an instruction normally also has one or
more specifiers for operands (i.e. data) on which the operation should act,
although some operations may have implicit operands, or none at all.
There are instruction sets with nearly uniform fields for Opcode and
operand specifiers, as well as others (the x86 architecture for instance)
with a more complicated, varied length structure.
Depending on architecture, the operands may be register values, values in

the stack, other memory values, I/O ports, etc, specified and accessed
using more or less complex addressing modes. The types of operations
include arithmetic, data copying, logical operations, and program control,
as well as special instructions (such as CPUID and others).
Q27 What is meant by stack addressing?
Stack Addressing:
Stack is a linear array of locations referred to as last-in first out queue. The
stack is a reserved block of location, appended or deleted only at the top of
the stack. Stack pointer is a register which stores the address of top of
stack location. This mode of addressing is also known as implicit
addressing.
Q28 What is meant by response time?
The Response time is the interval between
(a) the instant at which an operator at a terminal enters a request for a

response from a computer and
(b) the instant at which the first character of the response is received at a
terminal.
Q29 What is meant by DMA?
Direct memory access (DMA) is a feature of modern computers and

microprocessors that allows certain hardware subsystems within the
computer to access system memory for reading and/or writing
independently of the central processing unit. Many hardware systems use
DMA including disk drive controllers, graphics cards, network cards and
sound cards. DMA is used for transferring data between the local memory
and the main memory. Computers that have DMA channels can transfer
data to and from devices with much less CPU overhead than computers
without a DMA channel.
Q30 What is cache memory?
Pronounced cash, a special high-speed storage mechanism. It can be either

a reserved section of main memory or an independent high-speed storage
device. Two types of caching are commonly used impersonal computers:
memory caching and disk caching.
A memory cache, sometimes called a cache store or RAM cache, is a

portion of memory made of high-speed static RAM (SRAM) instead of the
slower and cheaper dynamic RAM (DRAM) used for main memory.
Memory caching is effective because most programs access the same data
or instructions over and over. By keeping as much of this information as
possible in SRAM, the computer avoids accessing the slower DRAM.
Some memory caches are built into the architecture of microprocessors.

The Intel 80486 microprocessor, for example, contains an 8K memory
cache, and the Pentium has a 16K cache. Such internal caches are often
called Level 1 (L1) caches.
Most modern PCs also come with external cache memory, called Level 2
(L2) caches. These caches sit between the CPU and the DRAM. Like L1
caches, L2 caches are composed of SRAM but they are much larger.
Q31 What is direct addressing?
Jump instructions include a 16-bit address as part of the instruction. For

example, the instruction JMP 1000H causes a jump to the hexadecimal
address 1000 by replacing the current contents of the program counter
with the new value 1000H.
Instructions that include a direct address require three bytes of storage: one
for the instruction code, and two for the 16-bit address.
Q32 What is the concept of layers in architectural design?
Layers is an architectural design pattern that structures applications so they

can be decomposed into groups of subtasks such that each group of
subtasks is at a particular level of abstraction.
Example : The traditional 3-tier client server model, which separates

application functionality into three distinct abstractions, is an example of
layered design. Much has been written about the 3-tier client-server model
and I won’t discuss it further, other to say that this is the result of layered
design thinking.
Q33 What is Fetch And Execution Cycle?
An instruction cycle' (also called fetch-and-execute cycle, fetch-decode-

execute cycle, and FDX) is the time period during which a computer
processes a machine language instruction from its memory or the sequence
of actions that the central processing unit (CPU) performs to execute each
machine code instruction in a program.
The name fetch-and-execute cycle is commonly used. The instruction must

be fetched from main memory, and then executed by the CPU. This is
fundamentally how a computer operates, with its CPU reading and
executing a series of instructions written in its machine language.
Q34 What is data group?
The data transfer instructions move data between registers or between

memory and registers.
MOV Move
MVI Move Immediate
LDA Load Accumulator Directly from Memory
STA Store Accumulator Directly in Memory
LHLD Load H & L Registers Directly from Memory
SHLD Store H & L Registers Directly in Memory
An 'X' in the name of a data transfer instruction implies that it deals with a
register pair (16-bits);
LXI Load Register Pair with Immediate data
LDAX Load Accumulator from Address in Register Pair
STAX Store Accumulator in Address in Register Pair
XCHG Exchange H & L with D & E
XTHL Exchange Top of Stack with H & L
Q35 What is Arithmetic Group
The arithmetic instructions add, subtract, increment, or decrement data in

registers or memory.
ADD Add to Accumulator
ADI Add Immediate Data to Accumulator
ADC Add to Accumulator Using Carry Flag
ACI Add Immediate data to Accumulator Using Carry
SUB Subtract from Accumulator
SUI Subtract Immediate Data from Accumulator
SBB Subtract from Accumulator Using Borrow (Carry) Flag
SBI Subtract Immediate from Accumulator Using Borrow (Carry)

Flag
INR Increment Specified Byte by One
DCR Decrement Specified Byte by One
INX Increment Register Pair by One
DCX Decrement Register Pair by One
DAD Double Register Add; Add Content of Register
Pair to H & L Register Pair
Q36 Define the terms:-Seek time, Rotational Delay, Access time
Rotational delay is one of the delays associated with reading or writing

data on a computer's disk drive, and somewhat similar for CD or DVD
drives. The term applies to rotating storage devices (such as a hard disk or
floppy disk drive, and to the older drum memory systems). The rotational
delay is the time required for the addressed area of the disk (or drum) to
rotate into a position where it is accessible by the read/write head.
Access time is the time required for a computer to process data from the
processor and then retrieve the required data from a storage device, such
as a hard drive. For hard drives, disk access time is determined by a sum
of the spin-up time, seek time, rotational delay and transfer time.
Seek time is one of the three delays associated with reading or writing
data on a computer's disk drive, and somewhat similar for CD or DVD
drives. The others are rotational delay and transfer time, and their sum is
access time. In order to read or write data in a particular place on the disk,
the read/write head of the disk needs to be physically moved to the correct
place. This process is known as seeking, and the time it takes for the head
to move to the right place is the seek time.
Q36 What is polling?
Polling, or polled operation, refers to actively sampling the status of an

external device by a client program as a synchronous activity. Polling is
most often used in terms of input/output (I/O), and is also referred to as
polled I/O or software driven I/O.
Polling is sometimes used synonymously with busy-wait polling (Busy

waiting). In this situation, when an I/O operation is required the computer
does nothing other than check the status of the I/O device until it is ready,
at which point the device is accessed. In other words the computer waits
until the device is ready. Polling also refers to the situation where a device
is repeatedly checked for readiness, and if it is not the computer returns to
a different task.
Q37 What is timing effects of Addressing Modes?
Addressing modes affect both the amount of time required for executing
an instruction and the amount of memory required for its storage. For
example, instructions that use implied or register addressing, execute very
quickly since they deal directly with the processor’s hardware or with data
already present in hardware registers. Most important, however is that the
entire instruction can be fetched with a single memory access. The number
of memory accesses required is the single greatest factor in determining
execution timing. More memory accesses therefore require more execution
time. A CALL instruction for example, requires five memory accesses:
three to access the entire instruction and two more to push the contents of
the program counter onto the stack.
The processor can access memory once during each processor cycle. Each
cycle comprises a variable number of states. (See below and the appendix
of “USING THE SDK-85 MICROPROCESSOR TRAINER”). The length
of a state depends on the clock frequency specified for your system, and
may range from 480 nanoseconds to 2 microseconds. Thus, the timing for
a four state instruction may range from 1.920 microseconds through 8
microseconds. (The 8085 have a maximum clock frequency of 5 MHz and
therefore a minimum state length of 200 nanoseconds.)
Q38 List of software and hardware interrupts?
An interrupt is an asynchronous signal indicating the need for attention or

a synchronous event in software indicating the need for a change in
execution.
A hardware interrupt causes the processor to save its state of execution via
a context switch, and begin execution of an interrupt handler.
Software interrupts are usually implemented as instructions in the

instruction set, which cause a context switch to an interrupt handler similar
to a hardware interrupt.
Interrupts are a commonly used technique for computer multitasking,

especially in real-time computing. Such a system is said to be interrupt-
driven.
An act of interrupting is referred to as an interrupt request (IRQ).
Q39 What Is The Difference Between Single Bus And Multiple Bus
Structure?
Single Bus structure and multiple bus structures are types of bus or
computing. A bus is basically a subsystem which transfers data between
the components of Computer components either within a computer or
between two computers. It connects peripheral devices at the same time.
- A multiple Bus Structure has multiple inter connected service integration

buses and for each bus the other buses are its foreign buses. A Single bus
structure is very simple and consists of a single server.
- A bus can not span multiple cells. And each cell can have more than one
bus.
- Published messages are printed on it. There is no messaging engine on
Single bus structure.
Q40 Give a brief description of MIMD.
MIMD (Multiple Instruction stream, Multiple Data stream) is a technique

employed to achieve parallelism. Machines using MIMD have a number
of processors that function asynchronously and independently. At any
time, different processors may be executing different instructions on
different pieces of data. MIMD architectures may be used in a number of
application areas such as computer-aided design/computer-aided

manufacturing, simulation, modeling, and as communication switches.
MIMD machines can be of either shared memory or distributed memory
categories. These classifications are based on how MIMD processors
access memory.
Q41 Explain types of pipelining hazards?
There are three classes of hazards:
Structural Hazards. They arise from resource conflicts when the

hardware cannot support all possible combinations of instructions in
simultaneous overlapped execution.
Data Hazards. They arise when an instruction depends on the result of a
previous instruction in a way that is exposed by the overlapping of
instructions in the pipeline.
Hazards. They arise from the pipelining of branches and other
instructions that change the PC.
Q42 Draw block diagram of 8085?
Block diagram of 8085
Q43 What is Bus?
A set of parallel conductors, which allow devices attached to it to

communicate with the CPU.
The bus consists of three main parts:
Control lines: These allow the CPU to control which operations the
devices attached should perform, I.E. read or write.
Address lines: Allows the CPU to reference certain (Memory) locations

within the device.
Data lines: The meaningful data which is to be sent or retrieved from a

device is placed on to these lines.
Block diagram of Computer Bus
Q44 Define Program Counter?
The program counter , or PC (also called the instruction pointer, or

instruction address registeror just part of the instruction sequencer in
some computers) is a processor register that indicates where the computer
is in its instruction sequence. Depending on the details of the particular
computer, the PC holds either the address of the instruction being
executed, or the address of the next instruction to be executed.
Q45 Give a brief description of SPMD.
SPMD (Single Process, Multiple Data) or (Single Program, Multiple

Data) is a technique employed to achieve parallelism; it is a subcategory of
MIMD. Tasks are split up and run simultaneously on multiple processors
with different input in order to obtain results faster. SPMD is the most
common style of parallel programming.
Q46 What is the concept of layers in architectural design?
Layers is an architectural design pattern that structures applications so they

can be decomposed into groups of subtasks such that each group of
subtasks is at a particular level of abstraction.
Example :
The traditional 3-tier client server model, which separates application

functionality into three distinct abstractions, is an example of layered
design. Much has been written about the 3-tier client-server model and I
wont discuss it further, other to say that this is the result of layered design
thinking.
Q47 What is immediate addressing?
Instructions that use immediate addressing have data assembled as a part

of the instruction itself. For example, the instruction CPI 'C' may be
interpreted as ‘compare the contents of the accumulator with the letter C.
When assembled, this instruction has the hexadecimal value FE43.
Hexadecimal 43 is the internal representation for the letter C. When this
instruction is executed, the processor fetches the first instruction byte and
determines that it must fetch one more byte. The processor fetches the next
byte into one of its internal registers and then performs the compare
operation.
Notice that the names of the immediate instructions indicate that they use
immediate data. Thus, the name of an add instruction is ADD; the name of
an add immediate instruction is ADI.
All but two of the immediate instructions uses the accumulator as an

implied operand, as in the CPI instruction shown previously. The MVI
(move immediate) instruction can move its immediate data to any of the
working registers including the accumulator or to memory. Thus, the

instruction MVI D, OFFH moves the hexadecimal
value FF to the D register.
The LXI instruction (load register pair immediate) is even more unusual in
that its immediate data is a 16-bit value. This instruction is commonly
used to load addresses into a register pair. As mentioned previously, your
program must initialize the stack pointer; LXI is the instruction most
commonly used for this purpose. For example, the instruction LXI SP,
3OFFH loads the stack pointer with the hexadecimal value 30FF.
Q48 What do you mean interleaved memory?
Interleaved memory is a technique for compensating the relatively slow

speed of DRAM. The CPU can access alternative sections immediately
without waiting for memory to be cached. Multiple memory banks take
turns supplying data.
One way of allocating virtual addresses to memory modules is to divide

the memory space into contiguous blocks. The CPU can access alternate
sections immediately, without waiting for memory to catch up (through
wait states). Interleaved memory is one technique for compensating for the
relatively slow speed of dynamic RAM (DRAM). Other techniques
include page-mode memory and memory caches.
Q49 Define Computer Architecture.
Computer Architecture is the conceptual design and fundamental

operational structure of a computer system. It is a blueprint and functional
description of requirements and design implementations for the various
parts of a computer, focusing largely on the way by which the central
processing unit (CPU) performs internally and accesses addresses in
memory.
Q49 Give a brief description of Tightly Coupled Systems.
Tightly-coupled multiprocessor systems contain multiple CPUs that are

connected at the bus level. These CPUs may have access to a central
shared memory (or may participate in a memory hierarchy with both local
and shared memory. Chip multiprocessors, also known as multi-core
computing, involves more than one processor placed on a single chip and
can be thought of the most extreme form of tightly-coupled
multiprocessing. Mainframe systems with multiple processors are often
tightly-coupled.
Tightly-coupled systems perform better and are physically smaller than

loosely-coupled systems, but have historically required greater initial
investments and may depreciate rapidly. Tightly-coupled systems tend to
be much more energy efficient than clusters. This is because considerable
economies can be realized by designing components to work together from
the beginning in tightly-coupled systems.
Q50 Give a brief description of Loosely Coupled Systems.
Loosely-coupled multiprocessor systems (often referred to as clusters) are

based on multiple standalone single or dual processor commodity
computers interconnected via a high speed communication system
(Gigabit Ethernet is common). A Linux Beowulf cluster is an example of a
loosely-coupled system. Nodes in a loosely-coupled system are usually
inexpensive commodity computers and can be recycled as independent
machines upon retirement from the cluster.
Q51 Define Page Fault.
A page fault is an interrupt (or exception) to the software raised by the

hardware, when a program accesses a page that is mapped in address
space, but not loaded in physical memory.The hardware that detects this
situation is the memory management unit in a processor. The exception
handling software that handles the page fault is generally part of an
operating system. The operating system tries to handle the page fault by
making the required page accessible at a location in physical memory or

kills the program in case it is an illegal access.
Q52 Define logic gate.
A logic gate performs a logical operation on one or more logic inputs and
produces a single logic output. The logic normally performed is Boolean
logic and is most commonly found in digital circuits. Logic gates are
primarily implemented electronically using diodes or transistors, but can
also be constructed using electromagnetic relays, fluidics, optics,
molecules, or even mechanical elements.
Q53 Define AND Gate?
The output Q is true if input A AND input B are both true: Q = A AND B
An AND gate can have two or more inputs, its output is true if all inputs
are true.
Input A Input B Output Q
0 0 0
0 1 0
1 0 0
1 1 1
Traditional symbol IEC symbol Truth Table
Q54 What is NAND Gate?
NAND gate (NAND = Not AND)
This is an AND gate with the output inverted, as shown by the 'o' on the
output.
The output is true if input A AND input B are NOT both true:
Q = NOT (A AND B)
A NAND gate can have two or more inputs, its output is true if NOT all
inputs are true.
0 0 1
0 1 1
1 0 1
1 1 0
Q55 What is OR Gate
The output Q is true if input A OR input B is true (or both of them are
true): Q = A OR B
An OR gate can have two or more inputs; its output is true if at least one
input is true.
0 0 0
0 1 1
1 0 1
1 1 1
Q56 What is logic NOR gate
NOR gate (NOR = Not OR)
This is an OR gate with the output inverted, as shown by the 'o' on the
output.
The output Q is true if NOT inputs A OR B are true: Q = NOT (A OR B)
A NOR gate can have two or more inputs, its output is true if no inputs are
true.
0 0 1
0 1 0
1 0 0
1 1 0
Q57 What is Logic XOR gate
EX-OR (EXclusive-OR) gate
The output Q is true if either input A is true OR input B is true, but not
when both of them are true:
Q = (A AND NOT B) OR (B AND NOT A)
This is like an OR gate but excluding both inputs being true.
The output is true if inputs A and B are DIFFERENT.
EX-OR gates can only have 2 inputs.
0 0 0
0 1 1
1 0 1
1 1 0
Q58 What is NOT gate
A logical inverter, sometimes called a NOT gate to differentiate it from

other types of electronic inverter devices, has only one input. It reverses
the logic state.
Inverter or NOT gate
Input Output
1 0
0 1
Q59 What is K – Map
A Karnaugh map provides a pictorial method of grouping together

expressions with common factors and therefore eliminating unwanted
variables. The Karnaugh map can also be described as a special
arrangement of a truth table.
The diagram below illustrates the correspondence between the Karnaugh

map and the truth table for the general case of a two variable problem.
The values inside the squares are copied from the output column of the
truth table, therefore there is one square in the map for every row in the
truth table. Around the edge of the Karnaugh map are the values of the two
input variable. A is along the top and B is down the left hand side. The
diagram below explains this:
The values around the edge of the map can be thought of as coordinates.
So as an example, the square on the top right hand corner of the map in the
above diagram has coordinates A=1 and B=0. This square corresponds to
the row in the truth table where A=1 and B=0 and F=1. Note that the value
in the F column represents a particular function to which the Karnaugh
map corresponds.
Q60 What is Interrupt?
An interrupt is a signal from a device attached to a computer or from a

program within the computer that causes the main program that operates
the computer (the operating system) to stop and figure out what to do next.
Almost all personal (or larger) computers today are interrupt-driven - that
is, they start down the list of computer instructions in one program
(perhaps an application such as a word processor) and keep running the

instructions until either (A) they can't go any further or (B) an interrupt
signal is sensed. After the interrupt signal is sensed, the computer either
resumes running the program it was running or begins running another
program.
Basically, a single computer can perform only one computer instruction at
a time. But, because it can be interrupted, it can take turns in which
programs or sets of instructions that it performs. This is known as
multitasking. It allows the user to do a number of different things at the
same time. The computer simply takes turns managing the programs that
the user effectively starts. Of course, the computer operates at speeds that
make it seem as though all of the user's tasks are being performed at the
same time. (The computer's operating system is good at using little pauses
in operations and user think time to work on other programs.)
An operating system usually has some code that is called an interrupt

handler. The interrupt handler prioritizes the interrupts and saves them in a
queue if more than one is waiting to be handled. The operating system has
another little program, sometimes called a scheduler, that figures out
which program to give control to next.
Q61 What is Interrupt request?
The IRQ (interrupt request) value is an assigned location where the

computer can expect a particular device to interrupt it when the device
sends the computer signals about its operation. For example, when a
printer has finished printing, it sends an interrupt signal to the computer.
The signal momentarily interrupts the computer so that it can decide what
processing to do next. Since multiple signals to the computer on the same
interrupt line might not be understood by the computer, a unique value
must be specified for each device and its path to the computer. Prior to
Plug-and Play (PnP) devices, users often had to set IRQ (interrupt request)
values manually (or be aware of them) when adding a new device to a
computer.
If you add a device that does not support Pnp, the manufacturer will
hopefully provide explicit directions on how to assign IRQ values for it. If
you don't know what IRQ value to specify, you'll probably save time by
calling the technical support phone number for the device manufacturer
and asking.
A table of interrupt vectors (Pointers** to routines** that handle

interrupts.)
On PCs, the interrupt vector table consists of 256 4-byte pointers, and
resides in the first 1 K of addressable memory. Each interrupt number is
reserved for a specific purpose. For example, 16 of the vectors are
reserved for the 16 IRQ lines.
An interrupt vector table is also called a dispatch table.
Q62 What is Direct Memory Access
Direct Memory Access (DMA) is a capability provided by some computer

bus architectures that allows data to be sent directly from an attached
device (such as a disk drive) to the memory on the computer's
motherboard. The microprocessor is freed from involvement with the data
transfer, thus speeding up overall computer operation.
Usually a specified portion of memory is designated as an area to be used

for direct memory access. In the ISA bus standard, up to 16 megabytes of
memory can be addressed for DMA. The EISA and Micro Channel
Architecture standards allow access to the full range of memory addresses
(assuming they're addressable with 32 bits). Peripheral Component
Interconnect accomplishes DMA by using a bus master (with the
microprocessor "delegating" I/O control to the PCI controller).
An alternative to DMA is the Programmed Input/Output (PIO) interface in

which all data transmitted between devices goes through the processor. A
newer protocol for the ATA/IDE interface is Ultra DMA, which provides a
burst data transfer rate up to 33 MB (megabytes) per second. Hard drives
that come with Ultra DMA/33 also support PIO modes 1, 3, and 4, and
multiword DMA mode 2 (at 16.6 megabytes per second).
Q63 What is J-K Flipslop?
The J-K flip-flop is the most versatile of the basic flip-flops. It has the
input- following character of the clocked D flip-flop but has two inputs,
traditionally labeled J and K. If J and K are different then the output Q
takes the value of J at the next clock edge.
If J and K are both low then no change occurs. If J and K are both high at
the clock edge then the output will toggle from one state to the other. It
can perform the functions of the set/reset flip-flop and has the advantage
that there are no ambiguous states. It can also act as a T flip-flop to
accomplish toggling action if J and K are tied together. This toggle
application finds extensive use in binary counters.
Q64 What is D – Type Flip flop?
The D flip-flop tracks the input, making transitions with match those of
the input D. The D stands for "data"; this flip-flop stores the value that is
on the data line. It can be thought of as a basic memory cell. A D flip-flop
can be made from a set/reset flip-flop by tying the set to the reset through
an inverter. The result may be clocked.
Q65 What is Set/Reset flip flop?
The set/reset type flip-flop is triggered to a high state at Q by the "set"

signal and holds that value until reset to low by a signal at the Reset input.
This can be implemented as a NAND gate latch or a NOR gate latch and
as a clocked version.
One disadvantage of the S/R flip-flop is that the input S=R=0 gives
ambiguous results and must be avoided. The J-K flip-flop gets around that
problem.
Q66 What is Toggle type flip slops ?
The T or "toggle" flip-flop changes its output on each clock edge, giving
an output which is half the frequency of the signal to the T input.
It is useful for constructing binary counters, frequency dividers, and

general binary addition devices. It can be made from a J-K flip-flop by
tying both of its inputs high.
Construction of T flip-flop from a J-K flip-flop.
Q67 What is SR Flip flops ?
S-R flip-flops have S (Set) and R (Reset) inputs. SC flip-flops have S (Set)
and C (Clear) inputs.
There are two types of S-R flip-flops: Active High and Active Low. Like
all flip-flops, both types of S-R devices are pulsed with a clock.
Depending on the input values, the two complementary outputs (Q and Q')
change according to the flip-flop's logical function at the moment of the
clock input's active transition.
If the S-R flip-flop is an Active High device:
If S = 1 and R = 0, then Q = 1 and the state is Set.
If S = 0 and R = 1, then Q = 0 and the state is either Reset or Clear.
If S = 0 and R = 0, then there is no change in the output condition.
The condition S = 1 and R = 1 is an indeterminate state to avoid since a

flip-flop cannot be set and reset simultaneously.
If the S-R flip-flop is an Active Low device:
If S = 0 and R = 1, then Q = 1 and the state is Set.
If S = 1 and R = 0, then Q = 0 and the state is either Reset or Clear.
If S = 1 and R = 1, there there is no change in the output condition.
The condition S = 0 and R = 0 is an indeterminate state to avoid since a

flip-flop cannot be set and reset simultaneously.
Q68 What is ROM?
Read-Only Memory or ROM is an integrated-circuit memory chip that

contains configuration data. ROM is commonly called firmware because
its programming is fully embedded into the ROM chip. As such, ROM is a
hardware and software in one.
Because data is fully incorporated at the ROM chip's manufacture, data

stored can neither be erased nor replaced. This means permanent and
secure data storage. However, if a mistake is made in manufacture, a ROM
chip becomes unusable. The most expensive stage of ROM manufacture,
therefore, is creating the template. If a template is readily available,
duplicating the ROM chip is very easy and affordable.
A ROM chip is also non volatile so data stored in it is not lost when power
is turned off.
Q69 What is RAM?
• Memory (RAM) can be thought as a sequential circuits containing

some number of registers
• These registers hold the words of memory
• Each of the r registers is indicated by an address
• These addresses range from 0 to r-1
• Each register (word) can hold n bits of data
• Assume the RAM contains r = 2k words. It needs the following
– n data input lines
– n data output lines
– k address lines
– A Read control line
– A Write control line
Q70 What are micro operations and write different types of micro
operations ?
• The operations on the data in registers are called

microoperations.
• The functions built into registers are examples of

microoperations
– Shift
– Load
– Clear
– Increment
– …
Computer system micro operations are of four types:

- Register transfer micro operations
- Arithmetic micro operations
- Logic micro operations
- Shift micro operations
Q71 What are Arithemetic microoperations ?
ARITHMETIC MICRO OPERATIONS

The basic arithmetic microoperations are
1. Addition
2. Subtraction
3. Increment
4. Decrement
The additional arithmetic microoperations are

5. Add with carry
6. Subtract with borrow
7. Transfer/Load etc. …
Summary of Typical Arithmetic Micro-Operations:-
R3 <-- R1 + R2 Contents of R1 plus R2 transferred to R3

R3 <-- R1 - R2 Contents of R1 minus R2 transferred to R3
R2 <-- R2’ Complement the contents of R2
R2 <-- R2’+ 1 2's Complement the contents of R2 (negate)
R3 <-- R1 + R2’+ 1 Subtraction
R1 <-- R1 + 1 Increment
R1 <-- R1 - 1 Decrement
Q72 What are Logic micro operations?
LOGIC MICROOPERATIONS
-- Specify binary operations on the strings of bits in registers
-- Logic microoperations are bit-wise operations, i.e., they work on the
individual bits of data
-- useful for bit manipulations on binary data
-- useful for making logical decisions based on the bit value

-- There are, in principle, 16 different logic functions that can be defined
over two binary input variables.
List of Logic Micro operations

- 16 different logic operations with 2 binary vars.
- n binary vars → functions
Truth tables for 16 functions of 2 variables and the
corresponding 16 logic micro-operations
Q73 What is a micro processor? Which is the frist micro processor?
A microprocessor incorporates most or all of the functions of a central

processing unit (CPU) on a single integrated circuit (IC). The first
microprocessors emerged in the early 1970s and were used for electronic
calculators, using binary-coded decimal (BCD) arithmetic on 4-bit words.

Other embedded uses of 4- and 8-bit microprocessors, such as terminals,
printers, various kinds of automation etc, followed rather quickly.
Affordable 8-bit microprocessors with 16-bit addressing also led to the
first general purpose microcomputers in the mid-1970s.
Computer processors were for a long period constructed out of small and
medium-scale ICs containing the equivalent of a few to a few hundred
transistors. The integration of the whole CPU onto a single VLSI chip
therefore greatly reduced the cost of processing capacity. From their
humble beginnings, continued increases in microprocessor capacity have
rendered other forms of computers almost completely obsolete (see history
of computing hardware), with one or more microprocessor as processing
element in everything from the smallest embedded systems and handheld
devices to the largest mainframes and supercomputers.
Since the early 1970s, the increase in capacity of microprocessors has been
known to generally follow Moore's Law, which suggests that the
complexity of an integrated circuit, with respect to minimum component
cost, doubles every two years. In the late 1990s, and in the high-
performance microprocessor segment, heat generation (TDP), due to
switching losses, static current leakage, and other factors, emerged as a
leading developmental constraint[
Q74 Characteristic of micro processor?
A silicon chip that contains a CPU. In the world of personal computers,

the terms microprocessor and CPU are used interchangeably. At the heart
of all personal computers and most workstations sits a microprocessor.
Microprocessors also control the logic of almost all digital devices, from
clock radios to fuel-injection systems for automobiles.
Three basic characteristics differentiate microprocessors:
 Instruction set: The set of instructions that the microprocessor

can execute.
 bandwidth : The number of bits processed in a single
instruction.
 clock speed : Given in megahertz (MHz), the clock speed

determines how many instructions per second the processor can
execute.
In both cases, the higher the value, the more powerful the CPU. For
example, a 32-bit microprocessor that runs at 50MHz is more powerful
than a 16-bit microprocessor that runs at 25MHz.
In addition to bandwidth and clock speed, microprocessors are classified

as being either RISC (reduced instruction set computer) or CISC (complex
instruction set computer).
Q75 Difference between microprocessor and micro controller?
A microcontroller is a specialized form of microprocessor that is designed

to be self-sufficient and cost-effective, where a microprocessor is typically
designed to be general purpose (the kind used in a PC). Microcontrollers
are frequently found in automobiles, office machines, toys, and appliances.
The microcontroller is the integration of a number of useful functions into

a single IC package. These functions are:
The ability to execute a stored set of instructions to carry out user defined
tasks.
The ability to be able to access external memory chips to both read and
write data from and to the memory.
Basically, a microcontroller is a device which integrates a number of the

components of a microprocessor system onto a single microchip.
So a microcontroller combines onto the same microchip :
The CPU core

Memory (both ROM and RAM)
Some parallel digital I/O
Microcontroller incorporates features of microprocessor(CPU,ALU,Registers)along

with the presence of added features like presence of RAM,ROM,I\O ports,counter
etc.Here microcontroller control the operation of machine using fixed programme
stored in Rom that doesn't change with lifetime.

Q76 How memory is transfer?
• Collectively, the memory is viewed at the register level as a device,

M.
• Since it contains multiple locations, we must specify which address

in memory we will be using
• This is done by indexing memory references
• Memory is usually accessed in computer systems by putting the

desired address in a special register, the Memory Address Register
(MAR, or AR)
• When memory is accessed, the contents of the MAR get sent to the
memory unit’s address lines
Q77 How to read value from memory location?
• To read a value from a location in memory and load it into a

register, the register transfer language notation looks like this:
• This causes the following to occur
– The contents of the MAR get sent to the memory address

lines
– A Read (= 1) gets sent to the memory unit
– The contents of the specified address are put on the memory’s

output data lines
– These get sent over the bus to be loaded into register R1
Q78 How to write memory into memory locations?
• To write a value from a register to a location in memory looks like

this in register transfer language:
• This causes the following to occur
– The contents of the MAR get sent to the memory address

lines
– A Write (= 1) gets sent to the memory unit
– The values in register R1 get sent over the bus to the data
input lines of the memory
– The values get loaded into the specified address in the

memory
Q79 Write register transfer micro operations ?
A←B Transfer content of reg. B into reg. A
AR ← DR(AD) Transfer content of AD portion of reg. DR into reg.

AR
A ← constant Transfer a binary constant into reg. A
ABUS ← R1, Transfer content of R1 into bus A and, at the

same time,
R2 ← ABUS transfer content of bus A into R2
AR Address register
DR Data register
M[R] Memory word specified by reg. R
M Equivalent to M[AR]
DR ← M Memory read operation: transfers content of
memory word specified by AR into DR
M ← DR Memory write operation: transfers content of
DR into memory word specified by AR
Q80 What are Arithmetic micro operations ?
• The basic arithmetic microoperations are
– Addition
– Subtraction
– Increment
– Decrement
• The additional arithmetic microoperations are
– Add with carry
– Subtract with borrow
– Transfer/Load
– etc. …
R3 ← R1 + R2 Contents of R1 plus R2 transferred to R3
R3 ← R1 - R2 Contents of R1 minus R2 transferred to R3
R2 ← R2’ Complement the contents of R2
R2 ← R2’+ 1 2's complement the contents of R2 (negate)
R3 ← R1 + R2’+ 1 subtraction
R1 ← R1 + 1 Increment
R1 ← R1 - 1 Decrement
Q81 What are binary adder / subtractor / incrementor?
Binary Adder
B3 A3 B2 A2 B1 A1 B0 A0
FA C3 FA C2 FA C1 FA C0
C4 S3 S2 S1 S0
Binary Adder-Subtractor
B3 A3 B2 A2 B1 A1 B0 A0
FA C3 FA C2 FA C1 FA C0
C4 S3 S2 S1 S0
Binary Incrementer
A3 A2 A1 A0 1
x y x y x y x y
HA HA HA HA
C S C S C S C S
C4 S3 S2 S1 S0
Q82 Define Logic implementation micro operation?
Q83 Application of Logic micro operations?
• Logic microoperations can be used to manipulate individual bits or

a portions of a word in a register
• Consider the data in a register A. In another register, B, is bit data

that will be used to modify the contents of A
– Selective-set A←A+B
– Selective-complement A←A⊕B
– Selective-clear A ← A • B’
– Mask (Delete) A←A•B
– Clear A←A⊕B
– Insert A ← (A • B) + C
– Compare A←A⊕B
Q84 What is shift micro operation?
• There are three types of shifts
– Logical shift
– Circular shift
– Arithmetic shift
• What differentiates them is the information that goes into the serial
input
Q85 What is Logic shift?
• In a logical shift the serial input to the shift is a 0.
• A right logical shift operation:
• A left logical shift operation:
• In a Register Transfer Language, the following notation is used
– shl for a logical shift left
– shr for a logical shift right
– Examples:
» R2 ← shr R2
» R3 ← shl R3
Q86 What is circular shift?
• In a circular shift the serial input is the bit that is shifted out of the
other end of the register.
• A right circular shift operation:

• A left circular shift operation:
• In a RTL, the following notation is used
– cil for a circular shift left
– cir for a circular shift right
– Examples:
» R2 ← cir R2
» R3 ← cil R3
Q87 What is arithemetic shift?
• An arithmetic shift is meant for signed binary numbers (integer)
• An arithmetic left shift multiplies a signed number by two
• An arithmetic right shift divides a signed number by two
• The main distinction of an arithmetic shift is that it must keep the

sign of the number the same as it performs the multiplication or
division
• A right arithmetic shift operation:
• A left arithmetic shift operation:
• An arithmetic shift is meant for signed binary numbers (integer)
• An arithmetic left shift multiplies a signed number by two
• An arithmetic right shift divides a signed number by two
• The main distinction of an arithmetic shift is that it must keep the

sign of the number the same as it performs the multiplication or
division
• A right arithmetic shift operation:
• A left arithmetic shift operation:
Q88 Hardware implementation of shift micro operations .

Q89 List phases of instruction cycle
Q90 Block diagram of micro programmed control unit?
parts of the computer

Commands to all
+1
Instruction Register
MPC
Mapping
Micro-
ROM
store Next
Microinstruction
selection
Rd
Condition codes
and interrupts
Control
ROM
Q91 What is attached array processor?
An attached array processor is designed as a peripheral for a
conventional host computer, and its purpose is to enhance the
performance of the computer by providing vector processing for
complex scientific applications. It achieves high performance by
means of parallel processing with multiple functional units.
Fig.2-18 shows the interconnection of an attached array processor
to a host computer.
Q92 What is SIMD array processor?
A SIMD array processor is a computer with multiple processing
units operating in parallel. The processing units are synchronized
to perform the same operation under the control of a common
control unit, thus providing a single instruction stream, multiple
data stream (SIMD) organization. A general block diagram of a
SIMD array processor is shown in Fig. 2-19.
Q93 What is single bus architecture?
Bus architecture uses common data signaling paths for multiple devices,
rather than have separate connections between each set of devices that
need to communicate.
For example, a data bus can be used for data to and from dynamic RAM,
to and from mass storage, and to and from peripheral devices, rather than
having one set of wires from the CPU for memory, another set for I/O, and
so forth.
There is often a mechanism for devices to signal when they need to use the
bus, while it is in use, and what is the nature of the use
(data/instructions/controls/etc).
Bus control can become quite complicated when numerous asynchronous

processes are attempting to share the bus efficiently.
Q94 Compare SPMD and MIMD machine.
In SPMD, multiple autonomous processors simultaneously execute the

same program at independent points, rather than in the lockstep that SIMD
imposes on different data.
With SPMD, tasks can be executed on general purpose CPUs; SIMD

requires vector processors to manipulate data streams. Note that the two
are not mutually exclusive.
Q95 What do u mean by term bus,single bus architecture, future bus and
PCI?
Bus is a subsystem that transfers data between computer components

inside a computer or between computers. Unlike a point-to-point
connection, a bus can logically connect several peripherals over the same
set of wires. Each bus defines its set of connectors to physically plug
devices, cards or cables together.
The bus analyzer monitors the bus traffic and decodes and displays the
data. It is essentially a logic analyzer with some additional knowledge of
the underlying bus traffic characteristics.
Futurebus (IEEE 896) is a computer bus standard, intended to replace all

local bus connections in a computer, including the CPU, memory, plug-in
cards and even, to some extent, LAN links between machines.
Peripheral Component Interconnect, or PCI Standard (commonly PCI),

specifies a computer bus for attaching peripheral devices to a computer
motherboard
Q96 What is Stack pointer?
The stack pointer is also a 16-bit register used as a memory pointer. It

points to a memory location in R/W memory, called the stack. The
beginning of the stack is defined by loading 16-bit address in the stack
pointer. The stack concept is explained in the chapter "Stack and
Subroutines."
Q97 Write an assembly program to add two numbers
MVI D, 8BH
MVI C, 6FH
MOV A, C
1100 0011
1000 0101
0010 0000
ADD D
OUT PORT1
HLT
Q98 Write an Assembly Language Program to add 2- 16 bit numbers:
LHLD 9501H
XCHG
LHLD 9503H
MVI C, 00
DAD D
JNC LOOP1
INR C
LOOP1 SHLD 9505H
MOV A, C
STA 9507H
HLT
Q99 Write an ALP to SUBTRACT 2-16 BIT NUMBERS:
LHLD 8100
XCHG
LHLD 8102
MOV A, E
SUB L
STA 8104
JNC LOOP
DCR D
LOOP MOV A, D
SUB H
STA 8105
RST5
Q100 Write an ALP to multiply 2-8bit numbers:
LXI H, 8A00
MOV B, M
XRA A
MOV C, A
INX H
AHEAD ADD M
JNC LOOP-1
INR C
LOOP-1 DCR C
JNZ AHEAD
INX H
MOV M, A
INX H
MOV M, C
RST5
Q101 Write an ALP to perform division of 1-8 bit number by another 8-bit
number:
LXI H, 8900H
MOV A, M
INX H
MOV B, M
MVI C, FF
LOOP INR C
SUB B
JNC LOOP
ADD B
STA 8902H
MOV A, C
STA 8903H
HLT
Q102 What is program counter and how it is useful in program execution?
PC [program counter] is a register holding the address of
the instruction which needs to be executed next. Its used
to keep track of current execution point - this tracking is
necessary for various reasons and some of these reasons are:
1. While branching or looping destination address is
specified with respect to the current PC value.
2. While branching to a function call current Pc value is
pushed into the stack and retrieved back when retrunign
from the function-call.
3. PC value is strored when servicing an interrupt and
restored back after execution of ISR.
Q103 Write an ALP to add n- 8 bit numbers:
MVI D, 00
MVI C, 05
LXI H, 8030
MOV A, M
DCR C
AHEAD INX H
ADD M
JNC LOOP-1
INR D
LOOP-1 DCR C
JNZ AHEAD
STA 8056
MOV A, D
STA 8051
HLT
Q104 What is super pipelining?
Super pipelining simply refers to pipelining that uses a longer pipeline

(with more stages) than "regular" pipelining. In theory, a design with more
stages, each doing less work, can be scaled to higher clock frequency.
However, this depends a lot on other design characteristics, and it isn't true
by default that a processor claiming superpipelining is "better" than one
that does not.
Q105 Write an assembly program to multiply a number by 8
MVI A, 30H
RRC
RRC
RRC
OUT PORT1
HLT
Q106 Write an ALP to perform 32-bit addition:
LXI H, 8500
MOV C, M
INX H
LXI D, 8600
XRA A
LOOP-1 LDAX D
ADC M
MOV M, A
INX H
INX D
DCR C
JNZ LOOP-1
MVI A, 00
RAL
MOV M, A
RST 5
Q107 Writing and Executing a program in a Single Board Microcomputer
Writing a simple program of adding two hexadecimal numbers 23H and

84H and saving the result in a register in assembly language is illustrated
below:
1. Load the 1st number 23H in one register.
2. Load the 2nd number 84H in another register.
3. Add the contents of the two registers.
4. Save the result in any register.
5. End the program.
Flow Chart
Q108 Write an ALP to ADD 2-BCD numbers:
LXI H, 8A00
MVI D, 00
MOV A, M
INX H
ADD M
DAA
JNC LOOP-1
INR D
LOOP-1 STA 8A03
MOV A, D
STA 8A04
RST5
Q109 Write an assembly program to find greatest between two numbers
MVI B, 30H
MVI C, 40H
MOV A, B
CMP C
JZ EQU
JC GRT
OUT PORT1
HLT
EQU: MVI A, 01H
OUT PORT1
HLT
GRT: MOV A, C
OUT PORT1
HLT
Q110 Draw structural diagram 8255 chip.
Q111 What are control and status signal of 8085?
There are 4 main control and status signals. These are:
ALE: Address Latch Enable. This signal is a pulse that become 1 when the
AD0 – AD7 lines have an address on them. It becomes 0 after that. This
signal can be used to enable a latch to save the address bits from the AD
lines.
• RD: Read. Active low.
• WR: Write. Active low.
• IO/M: This signal specifies whether the operation is a memory

operation (IO/M=0) or an I/O operation (IO/M=1).
• S1 and S0: Status signals to specify the kind of operation being

performed .Usually un-used in small systems.
Q112 What are the steps of fetching instruction ?
• Lets assume that we are trying to fetch the instruction at memory

location 2005. That means that the program counter is now set to
that value.
– The following is the sequence of operations:
• The program counter places the address value on the

address bus and the controller issues a RD signal.
• The memory’s address decoder gets the value and

determines which memory location is being accessed.
• The value in the memory location is placed on the data

bus.
• The value on the data bus is read into the instruction

decoder inside the microprocessor.
• After decoding the instruction, the control unit issues

the proper control signals to perform the operation.
Q113 Explain briefly about stacks
A stack is a last in, first out (LIFO) abstract data type and data structure.
A stack can have any abstract data type as an element, but is characterized
by only two fundamental operations, the push and the pop. The push
operation adds to the top of the list, hiding any items already on the stack,
or initializing the stack if it is empty. The pop operation removes an item
from the top of the list, and returns this value to the caller. A pop either
reveals previously concealed items, or results in an empty list. A stack is a
restricted data structure, because only a small number of operations are
performed on it. The nature of the pop and push operations also means that
stack elements have a natural order. Elements are removed from the stack
in the reverse order to the order of their addition: therefore, the lower
elements are typically those that have been in the list the longest.
Q114 Explain briefly about queues.
A queue is a First-In-First-Out (FIFO) data structure. In a FIFO data

structure, the first element added to the queue will be the first one to be
removed.. A queue is an example of a linear data structure. Queue
overflow results from trying to add an element onto a full queue and
queue underflow happens when trying to remove an element from an
empty queue. A bounded queue is a queue limited to a fixed number of
items.
Q115 Draw the diagram for processor cache.
Q116 Draw the flow of Instruction Cycle.
Q117 Explain briefly about WHEATSTONE BRIDGE.
A Wheatstone bridge is a measuring instrument invented by Samuel Hunter

Christie in 1833 and improved and popularized by Sir Charles Wheatstone in
1843. It is used to measure an unknown electrical resistance by balancing two legs
of a bridge circuit, one leg of which includes the unknown component. Its operation
is similar to the original potentiometer. The Wheatstone bridge illustrates the
concept of a difference measurement, which can be extremely accurate. Variations on
the Wheatstone bridge can be used to measure capacitance, inductance,
impedance and other quantities, such as the amount of combustible gases in a sample,
with an explosimeter. The Kelvin double bridge was specially adapted from
the Wheatstone bridge for measuring very low resistances.
Q118 Explain briefly about DHRYSTONE BRIDGE
Dhrystone is a synthetic computing benchmark program developed in

1984 by Reinhold P. Weicker intended to be representative of system
(integer) programming. The Dhrystone grew to become representative of
general processor (CPU) performance until it was superseded by the
CPU89 benchmark suite from the Standard Performance Evaluation
Corporation, today known as the "SPECint" suite. Dhrystone remains
remarkably resilient as a simple benchmark, but its continuing value in
establishing true performance is questionable. It is easy to use, well
documented, is fully self-contained, is well understood, and can be made
to work on almost any system
Q119 What is the difference between Machine Language and Assembly

Language?
Machine language is the actual bits used to control the processor in the
computer, usually viewed as a sequence of hexadecimal numbers

(typically bytes). The processor reads these bits in from program memory,
and the bits represent "instructions" as to what to do next.
Thus machine language provides a way of entering instructions into a

computer (whether through switches, punched tape, or a binary file).
Assembly language is a more human readable view of machine language.
Instead of representing the machine language as numbers, the instructions
and registers are given names (typically abbreviated words, or mnemonics,
eg ld means "load"). Unlike a high level language, assembler is very close
to the machine language. The main abstractions (apart from the
mnemonics) are the use of labels instead of fixed memory addresses, and
comments.
An assembly language program (i.e. a text file) is translated to machine

language by an assembler. A dis-assembler performs the reverse function
(although the comments and the names of labels will have been discarded
in the assembler process).
Q120 Explain Bi-Directional Shift Registers?
A bidirectional, or reversible, shift register is one in which the data can

be shift either left or right. A four-bit bidirectional shift register using
D flip-flops is shown below.
A bidirectional shift register includes a former stage multiplexer, a latter

stage multiplexer, a former stage full-swing shift register, and a latter stage
full-swing shift register, all of which have a plurality of registers all of the
same type. The former and the latter stage multiplexers output signals
according to a forward clock, a backward clock, a forward control signal,
and a backward control signal. The former and the latter stage full-swing
shift register store the signals output from the former and the latter stage
full-swing shift registers respectively.
Q121 Draw structural diagram 8251 chip.
Q122 Describe briefly about Asynchronous Data Transfer.
Asynchronous Transfer Mode (ATM) is an electronic digital data

transmission technology. ATM is implemented as a network protocol and
was first developed in the mid 1980s. The goal was to design a single
networking strategy that could transport real-time video conference and
audio as well as image files, text and email. ATM is a packet switching
protocol that encodes data into small fixed-sized cells (cell relay) and
provides data link layer services that run over OSI Layer 1 physical links.
This differs from other technologies based on packet-switched networks
(such as the Internet Protocol or Ethernet), in which variable sized packets
(known as frames when referencing Layer 2) are used. ATM exposes

properties from both circuit switched and small packet switched
networking, making it suitable for wide area data networking as well as
real-time media transport. ATM uses a connection-oriented model and
establishes a virtual circuit between two endpoints before the actual data
exchange begins.
Q123 Explain briefly about shift registers.
A shift register is a cascade of flip flops, sharing the same clock, which
has the output of any one but the last flip-flop connected to the "data"
input of the next one in the chain, resulting in a circuit that shifts by one
position the one-dimensional "bit array" stored in it, shifting in the data
present at its input and shifting out the last bit in the array, when enabled
to do so by a transition of the clock input. More generally, a shift register
may be mutidimensional, such that its "data in" input and stage outputs are
themselves bit arrays: this is implemented simply by running several shift
registers of the same bit-length in parallel.
Q124 Draw block diagram of 8259?
Q125 Give a brief description of Tightly Coupled Systems .
Tightly-coupled multiprocessor systems contain multiple CPUs that are

connected at the bus level. These CPUs may have access to a central
shared memory (or may participate in a memory hierarchy with both local
and shared memory. Chip multiprocessors, also known as multi-core
computing, involves more than one processor placed on a single chip and
can be thought of the most extreme form of tightly-coupled
multiprocessing. Mainframe systems with multiple processors are often
tightly-coupled.
Tightly-coupled systems perform better and are physically smaller than

loosely-coupled systems, but have historically required greater initial
investments and may depreciate rapidly. Tightly-coupled systems tend to
be much more energy efficient than clusters. This is because considerable
economies can be realized by designing components to work together from
the beginning in tightly-coupled systems
Q126 Give a brief description of Loosely Coupled Systems.
Loosely-coupled multiprocessor systems (often referred to as clusters) are

based on multiple standalone single or dual processor commodity
computers interconnected via a high speed communication system
(Gigabit Ethernet is common). A Linux Beowulf cluster is an example of a
loosely-coupled system. Nodes in a loosely-coupled system are usually
inexpensive commodity computers and can be recycled as independent
machines upon retirement from the cluster.
Q127 Define Stack Pointer.
The stack frame at the top of the stack is for the currently executing
routine. In the most common approach the stack frame includes space for
the local variables of the routine, the return address back to the routine's
caller, and the parameter values passed into the routine. The stack is often
accessed via a register called the stack pointer, which also serves to
indicate the current top of the stack.
Q128 Define Page Fault.
A page fault is an interrupt (or exception) to the software raised by the

hardware, when a program accesses a page that is mapped in address
space, but not loaded in physical memory.The hardware that detects this
situation is the memory management unit in a processor. The exception
handling software that handles the page fault is generally part of an
operating system. The operating system tries to handle the page fault by
making the required page accessible at a location in physical memory or
kills the program in case it is an illegal access.
Q129 Give a brief description of MIMD
MIMD (Multiple Instruction stream, Multiple Data stream) is a technique

employed to achieve parallelism. Machines using MIMD have a number
of processors that function asynchronously and independently. At any
time, different processors may be executing different instructions on
different pieces of data. MIMD architectures may be used in a number of
application areas such as computer-aided design/computer-aided
manufacturing, simulation, modeling, and as communication switches.
MIMD machines can be of either shared memory or distributed memory
categories. These classifications are based on how MIMD processors
access memory.
Q130 Give a brief description of SPMD
SPMD (Single Process, Multiple Data) or (Single Program, Multiple

Data) is a technique employed to achieve parallelism; it is a subcategory of
MIMD. Tasks are split up and run simultaneously on multiple processors
with different input in order to obtain results faster. SPMD is the most
common style of parallel programming.
Q131 Explain types of pipelining hazards?
There are three classes of hazards:
• Structural Hazards. They arise from resource conflicts when

the hardware cannot support all possible combinations of
instructions in simultaneous overlapped execution.

• Data Hazards. They arise when an instruction depends on the
result of a previous instruction in a way that is exposed by the
overlapping of instructions in the pipeline.
• Control Hazards. They arise from the pipelining of branches
and other instructions that change the PC.

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Q1 Differentiate between RISC and CISC.

Main difference between CISC and RISC are as under :

Emphasis on hardware Emphasis on software

Includes multi-clock complex

Memory-to-memory: Register to register:

Small code sizes, Low cycles per second, large code

Transistors used for storing Spends more transistors on memory

Q2 What is the difference between Machine Language and Assembly

Thus machine language provides a way of entering instructions into a

Computer Architecture Question Bank 1

An assembly language program (i.e. a text file) is translated to machine

Q3 Why 2's complement method is used for representation of negative

The two's complement of a binary number is defined as the value

A two's-complement system or two's-complement arithmetic is a

Q4 Differentiate between Programmed I/O and I/O mapped I/O

Q5 Differentiate between Assembler and Compiler.

Assembler - A computer program that takes computer instructions and

Compiler - This is a special program that processes statements written in

Q6 What do you understand by Interleaved DMA?

A Stack is a type of data container/ data structure that implements the

Computer Architecture Question Bank 3

and To eliminate the need for direct implementation of recursion.

Q7 How pipeline helps in a faster execution of an Instruction?

An instruction pipeline is a technique used in the design of computers

The fundamental idea is to split the processing of a computer instruction

Q8 List various methods of data transfer.

Although PIO is cheap and easily implemented because it requires no

from system memory without involving the CPU.

Q9 Differentiate between Push operation and POP operation in a stack.

A stack is a type of data structure -- a means of storing information in a

Q10 What is Multiprogramming?

Multiprogramming is a technique used to utilize maximum CPU time by

Usually on a mainframe - the computer has a number of programs loaded

On a PC it is usually called multitasking.

Computer Architecture Question Bank 5

Q11 Draw the block diagram of a computer

Block diagram of computer

Q12 What are the basic functional units of a computer?

Central Processing unit

These units are interconnected by electrical cables to permit

Q13 What is Bus and draw the block diagram?

Computer Architecture Question Bank 6

A set of parallel conductors, which allow devices attached to it to

The bus consists of three main parts:

Allows the CPU to reference certain (Memory) locations within the

The meaningful data which is to be sent or retrieved from a device is

Q14 Difference between Primary storage and secondary storage.

1. Primary storage devices are temporary whereas Temporary storage

Computer Architecture Question Bank 7

2. Primary storage devices are expensive whereas Temporary storage

3. Primary storage devices are faster, therefore expensive. Whereas

4. Primary storage devices have less storage capacity whereas Temporary

5. Primary storage devices refer to RAM storage capacity Temporary

Q15 What is register?

Some systems do not support registered memory, others require registered

The use of registered memory is recommended for server-class systems. It

Registered memory is also known as buffered memory. Unregistered