DATASHEET

ICL232 FN3020
+5V Powered, Dual RS-232 Transmitter/Receiver Rev 8.00
October 15, 2014

The ICL232 is a dual RS-232 transmitter/receiver interface

circuit that meets all ElA RS-232C and V.28 specifications. It
Features
requires a single +5V power supply, and features two onboard • Meets all RS-232C and V.28 specifications
charge pump voltage converters which generate +10V and • Requires only single +5V power supply
-10V supplies from the 5V supply.
• Onboard voltage doubler/inverter
The drivers feature true TTL/CMOS input compatibility, • Low power consumption
slew-rate-limited output, and 300Ω power-off source
impedance. The receivers can handle up to +30V, and have a • 2 drivers
3kΩ to 7kΩ input impedance. The receivers also have - 9V output swing for +5V lnput
hysteresis to improve noise rejection. - 300Ω power-off source impedance
- Output current limiting
Applications - TTL/CMOS compatible
• Any system requiring RS-232 communications port - 30V/µs maximum slew rate
- Computer - portable and mainframe
• 2 Receivers
- Peripheral - printers and terminals
- 30V input voltage range
- Portable instrumentation
- 3kΩ to 7kΩ input impedance
- Modems
- 0.5V hysteresis to improve noise rejection
• Dataloggers
• All critical parameters are guaranteed over the entire
commercial, industrial and military temperature ranges
• Pb-free (RoHS compliant)

+5V
+
1.0µF 16

1 VCC 1µF
C1+ +
+ +5V TO 10V 2
1µF
3 VOLTAGE INVERTER V+
C1-
4
C2+
+ +10V TO -10V
1µF
5 VOLTAGE INVERTER V- 6
C2- 1µF
+
+5V T1
11 400kΩ 14
T1IN T1OUT

+5V T2
10 400kΩ 7 T2OUT
T2IN
12 13
R1OUT R1IN
R1 5kΩ

9 8
R2OUT R2IN
R2 5kΩ

15

FIGURE 1. FUNCTIONAL DIAGRAM

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ICL232

Pin Configuration
ICL232
(16 LD SOIC)
TOP VIEW

C1+ 1 16 VCC

V+ 2 15 GND

C1- 3 14 T1OUT

C2+ 4 13 R1IN

C2- 5 12 R1OUT

V- 6 11 T1IN

T2OUT 7 10 T2IN

R2IN 8 9 R2OUT

Pin Descriptions
PIN # PIN NAME DESCRIPTION
1 C1+ External capacitor “+” for internal voltage doubler.
2 V+ Internally generated +10V (typical) supply.
3 C1- External capacitor “-” for internal voltage doubler.
4 C2+ External capacitor “+” internal voltage inverter.
5 C2- External capacitor “-” internal voltage inverter.
6 V- Internally generated -10V (typical) supply.
7 T2OUT RS-232 Transmitter 2 output 10V (typical).
8 R2IN RS-232 Receiver 2 input, with internal 5k pulldown resistor to GND.
9 R2out Receiver 2 TTL/CMOS output.
10 T2IN Transmitter 2 TTL/CMOS input, with internal 400k pullup resistor to VCC .
11 T1IN Transmitter 1 TTL/CMOS input, with internal 400k pullup resistor to VCC .
12 R1OUT Receiver 1 TTL/CMOS output.
13 R1IN RS-232 Receiver 1 input, with internal 5k pulldown resistor to GND.
14 T1OUT RS-232 Transmitter 1 output 10V (typical).
15 GND Supply Ground
16 VCC Positive Power Supply +5V 10%.

Ordering Information
PART NUMBER TEMP RANGE PACKAGE PKG
(Notes 1, 2) (°C) (Pb-Free) DWG. #

ICL232CBEZ 0 to +70 16 Ld SOIC M16.3

ICL232CBEZT (Note 3) 0 to +70 16 Ld SOIC M16.3

NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. For Moisture Sensitivity Level (MSL), please see product information page for ICL232. For more information on MSL, please see tech brief TB363.
3. Please refer to TB347 for details on reel specifications.

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ICL232

Absolute Maximum Ratings Thermal Information

VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .(GND -0.3V) < VCC < 6V Thermal Resistance (Typical) JA (°C/W) JC (°C/W)
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VCC -0.3V) < V+ < 12V SOIC Package (Note 4) . . . . . . . . . . . . . . . . 100 N/A
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -12V < V- < (GND +0.3V) Maximum Junction Temperature
Input Voltages Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
T1IN , T2IN . . . . . . . . . . . . . . . . . . . . . . . . . . . .(V- -0.3V) < VIN < (V+ +0.3V) Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
R1IN , R2IN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . .+300°C
Output Voltages Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
T1OUT , T2OUT. . . . . . . . . . . . . . . . . . . . . . (V- -0.3V) < VTXOUT < (V+ +0.3V)
R1OUT , R2OUT . . . . . . . . . . . . . . . . . .(GND -0.3V) < VRXOUT < (VCC +0.3V)
Short Circuit Duration
T1OUT , T2OUT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
R1OUT , R2OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous

Operating Conditions
Temperature Ranges
ICL232C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.

NOTE:
4. JA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications Test Conditions: VCC = +5V 10%, TA = Operating Temperature Range. Test Circuit as in Figure 2. Unless
otherwise specified.

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

Transmitter Output Voltage Swing, TOUT T1OUT and T2OUT Loaded with 3kΩ to 5 9 10 V
Ground

Power Supply Current, ICC Outputs Unloaded, TA = +25°C - 5 10 mA

TIN , Input Logic Low, VlL - - 0.8 V

TIN , Input Logic High, VlH 2.0 - - V

Logic Pullup Current, IP T1IN , T2IN = 0V - 15 200 µA

RS-232 Input Voltage Range, VIN -30 - +30 V

Receiver Input Impedance, RIN VIN = 3V 3.0 5.0 7.0 kΩ

Receiver Input Low Threshold, VlN (H-L) VCC = 5V, TA = +25°C 0.8 1.2 - V

Receiver Input High Threshold, VIN (L-H) VCC = 5V, TA = +25°C - 1.7 2.4 V
Receiver Input Hysteresis, VHYST 0.2 0.5 1.0 V

TTL/CMOS Receiver Output Voltage Low, VOL IOUT = 3.2mA - 0.1 0.4 V

TTL/CMOS Receiver Output Voltage High, VOH IOUT = -1.0mA 3.5 4.6 - V

Propagation Delay, tPD RS-232 to TTL - 0.5 - µs

Instantaneous Slew Rate, SR CL = 10pF, RL = 3kΩ, TA = +25°C - - 30 V/µs

(Notes 5, 6)

Transition Region Slew Rate, SRT RL = 3kΩ, CL = 2500pF Measured from - 3 - V/µs
+3V to -3V or -3V to +3V

Output Resistance, ROUT VCC = V+ = V- = 0V, VOUT = 2V 300 - - Ω

RS-232 Output Short Circuit Current, ISC T1OUT or T2OUT Shorted to GND - 10 - mA

NOTES:
5. Limit is not production tested. The maximum was established via characterization and/or design simulations.
6. See Figure 7 for definition.

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ICL232

Test Circuits

+4.5V TO 1 C1+ VCC 16

- +5.5V INPUT
1µF V+
2 GND 15
C3 +
1 C1+ VCC 16
3 C1- T1OUT 14
1µF +
2 V+ GND 15
C1 - 4 C2+ R1IN 13
3kΩ
3 C1- T1OUT 14
5 C2- R1OUT 12
T1 OUTPUT
4 C2+ R1IN 13 RS-232 6 V- T1IN 11
1µF + ±30V INPUT
C2 - TTL/CMOS
5 C2- R1OUT 12 7 T2OUT T2IN 10
OUTPUT
1µF C4 -
TTL/CMOS
+
6 V- T1IN 11 8 R2IN R2OUT 9
INPUT
3kΩ
T2OUT TTL/CMOS
7 T2IN 10 ROUT = VIN/I T2OUT
T2 OUTPUT INPUT
RS-232 8 R2OUT 9 TTL/CMOS VIN = 2V A
R2IN
±30V INPUT OUTPUT
T1OUT

FIGURE 2. GENERAL TEST CIRCUIT FIGURE 3. POWER-OFF SOURCE RESISTANCE CONFIGURATION

Typical Performance Curves

550 10

500 9
V+, V- SUPPLY IMPEDANCES (Ω)

V+ (VCC = 5V)
450 TA = +25°C V- SUPPLY
OUTPUT VOLTAGE (|V|)

8 V+ (VCC = 4.5V)
EXTERNAL SUPPLY LOAD
400 1kW BETWEEN V+ + GND
OR V- + GND 7
350 TRANSMITTER OUTPUT
OPEN CIRCUIT 6 V- (VCC = 4.5V) V- (VCC = 5V)
300 GUARANTEED
OPERATING 5
250 V+ SUPPLY RANGE
TA = 25°C
200 4
TRANSMITTER OUTPUTS
OPEN CIRCUIT
150 3
3 4 5 6 0 1 2 3 4 5 6 7 8 9 10
INPUT SUPPLY VOLTAGE VCC (V) |ILOAD| (mA)

FIGURE 4. V+, V- OUTPUT IMPEDANCES vs VCC FIGURE 5. V+, V- OUTPUT VOLTAGES vs LOAD CURRENT

VOLTAGE DOUBLER VOLTAGE INVERTER

S1 C1+ S2 V+ = 2VCC S5 C2+ S6

VCC GND
+ + + +
C1 C3 C2 C4
- - - -
GND VCC GND V- = -(V+)
S3 C1- S4 S7 C2- S8

RC
OSCILLATOR
FIGURE 6. DUAL CHARGE PUMP

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October 15, 2014
ICL232

Detailed Description V+
VCC
The ICL232 is a dual RS-232 transmitter/receiver powered by a
400kΩ
single +5V power supply which meets all ElA RS232C 300Ω
specifications and features low power consumption. Figure 1 TXIN TOUT
illustrates the major elements of the ICL232. The circuit is divided GND < TXIN < VCC V- < VTOUT < V+
into three sections: a voltage doubler/inverter, dual transmitters, V-
and dual receivers. FIGURE 8. TRANSMITTER

Voltage Converter Receivers

An equivalent circuit of the dual charge pump is illustrated in The receiver inputs accept up to 30V while presenting the
Figure 6. required 3kΩ to 7kΩ input impedance even it the power is off
(VCC = 0V). The receivers have a typical input threshold of 1.3V
The voltage quadrupler contains two charge pumps which use two which is within the 3V limits, known as the transition region, of
phases of an internally generated clock to generate +10V and the RS-232 specification. The receiver output is 0V to VCC . The
-10V. The nominal clock frequency is 16kHz. During phase one of output will be low whenever the input is greater than 2.4V and
the clock, capacitor C1 is charged to VCC . During phase two, the high whenever the input is floating or driven between +0.8V and
voltage on C1 is added to VCC , producing a signal across C2 equal -30V. The receivers feature 0.5V hysteresis to improve noise
to twice VCC . At the same time, C3 is also charged to 2VCC , and
rejection.
then during phase one, it is inverted with respect to ground to
produce a signal across C4 equal to -2VCC . The voltage converter VCC
accepts input voltages up to 5.5V. The output impedance of the
doubler (V+) is approximately 200Ω, and the output impedance of RXIN ROUT
the inverter (V-) is approximately 450Ω . Typical graphs are -30V < RXIN < +30V 5kΩ GND < VROUT < VCC
presented which show the voltage converters output vs input
GND
voltage and output voltages vs load characteristics. The test circuit
(Figure 2) uses 1µF capacitors for C1 to C4, however, the value is FIGURE 9. RECEIVER
not critical. Increasing the values of C1 and C2 will lower the
output impedance of the voltage doubler and inverter, and
T1IN, T2IN
increasing the values of the reservoir capacitors, C3 and C4,
OR
lowers the ripple on the V+ and V- supplies. R1IN, R2IN

T1OUT, T2OUT VOH

T1IN, T2IN
OR
R1OUT, R2OUT VOL
90% VOH tPHL tPLH
T1OUT, T2OUT 10%
VOL
tf tr tPHL + tPLH
Average Propagation Delay =
(0.8) (VOH - VOL) (0.8) (VOL - VOH) 2
Instantaneous
= or FIGURE 10. PROPAGATION DELAY DEFINITION
Slew Rate (SR) tr tf
FIGURE 7. SLEW RATE DEFINITION
Applications
Transmitters
The ICL232 may be used for all RS-232 data terminal and
The transmitters are TTL/CMOS compatible inverters which communication links. It is particularly useful in applications
translate the inputs to RS-232 outputs. The input logic threshold is where 12V power supplies are not available for conventional
about 26% of VCC , or 1.3V for VCC = 5V. A logic 1 at the input RS-232 interface circuits. The applications presented represent
results in a voltage of between -5V and V- at the output, and a logic typical interface configurations.
0 results in a voltage between +5V and (V+ - 0.6V). Each
transmitter input has an internal 400kΩ pullup resistor so any A simple duplex RS-232 port with CTS/RTS handshaking is
unused input can be left unconnected and its output remains in its illustrated in Figure 11. Fixed output signals such as DTR (data
low state. The output voltage swing meets the RS-232C terminal ready) and DSRS (data signaling rate select) is
specification of 5V minimum with the worst case conditions of: generated by driving them through a 5kΩ resistor connected to V+.
both transmitters driving 3kΩ minimum load impedance,
VCC = 4.5V, and maximum allowable operating temperature. The
transmitters have an internally limited output slew rate which is
less than 30V/µs. The outputs are short circuit protected and can
be shorted to ground indefinitely. The powered down output
impedance is a minimum of 300Ω with 2V applied to the outputs
and VCC = 0V.

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ICL232

+5V In applications requiring four RS-232 inputs and outputs

- C3 (Figure 12), note that each circuit requires two charge pump
+ 1µF
5kΩ capacitors (C1 and C2) but can share common reservoir
16 2 CTR (20) DATA
1 capacitors (C3 and C4). The benefit of sharing common reservoir
C1 + TERMINAL READY
1µF - 3
5kΩ
DSRS (24) DATA
capacitors is the elimination of two capacitors and the reduction
ICL232 SIGNALING RATE of the charge pump source impedance which effectively
4 6 SELECT increases the output swing of the transmitters.
C2 + - C4
1µF - 5 + 1µF RS-232
INPUTS AND OUTPUTS
11 T1 14
TD TD (2) TRANSMIT DATA
T2
INPUTS 10 7
RTS RTS (4) REQUEST TO SEND
OUTPUTS 12 13
TTL/CMOS RD RD (3) RECEIVE DATA
R2 R1
9 8
CTS CTS (5) CLEAR TO SEND

15 SIGNAL GROUND (7)

FIGURE 11. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS

HANDSHAKING

1 4
C1 + + C2
ICL232
1µF - 3 5 - 1µF
11 T1 14
TD TD (2) TRANSMIT DATA
T2
10 7
INPUTS RTS RTS (4) REQUEST TO SEND
OUTPUTS 12 13
TTL/CMOS RD RD (3) RECEIVE DATA
R2 R1
9 8
CTS CTS (5) CLEAR TO SEND
15

6 2
C4 C3 +5V
- -
+

V- V+
2µF 2 µF RS-232
6 2 INPUTS AND
16
OUTPUTS

ICL232
1 4
C1 + + C2
1µF - 3 5 - 1µF
11 T1 14 DTR (20) DATA TERMINAL
DTR READY
T2
10 7 DSRS (24) DATA SIGNALING
INPUTS DSRS
OUTPUTS RATE SELECT
12 13 DCD (8) DATA CARRIER
TTL/CMOS DCD
R2 DETECT
9 R1
8
R1 R1 (22) RING INDICATOR

15 SIGNAL GROUND (7)

FIGURE 12. COMBINING TWO ICL232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS

FN3020 Rev 8.00 Page 6 of 8

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ICL232

Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.

DATE REVISION CHANGE

October 15, 2014 FN3020.8 Updated the Ordering Information table on page 2 by removing several obsolete products and added Notes 2
and 3.
Removed “CERDIP” and “PDIP” from Pin Configuration on page 2.
Removed “ICL232I” and “ICL232M” lines under “Operating Conditions” on page 3.
Removed “CERDIP” and “PDIP” lines under “Thermal Information” on page 3.
Removed “Ceramic Package” line under “Maxium Junction Temperature” on page 3.
Updated datasheet with Intersil new standards throughout entire datasheet.
Added Revision history and About Intersil verbiage.
Added Package Outline Drawing on page 8.

About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
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Reliability reports are also available from our website at www.intersil.com/support

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For additional products, see www.intersil.com/en/products.html

Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
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For information regarding Intersil Corporation and its products, see www.intersil.com

FN3020 Rev 8.00 Page 7 of 8

October 15, 2014
ICL232

Small Outline Plastic Packages (SOIC)

N M16.3 (JEDEC MS-013-AA ISSUE C)

16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA H 0.25(0.010) M B M
INCHES MILLIMETERS
E
SYMBOL MIN MAX MIN MAX NOTES
-B-
A 0.0926 0.1043 2.35 2.65 -
1 2 3 A1 0.0040 0.0118 0.10 0.30 -
L
B 0.013 0.0200 0.33 0.51 9
SEATING PLANE C 0.0091 0.0125 0.23 0.32 -
-A- D 0.3977 0.4133 10.10 10.50 3
D A h x 45°
E 0.2914 0.2992 7.40 7.60 4
-C- e 0.050 BSC 1.27 BSC -

e H 0.394 0.419 10.00 10.65 -
A1
C h 0.010 0.029 0.25 0.75 5
B 0.10(0.004)
L 0.016 0.050 0.40 1.27 6
0.25(0.010) M C A M B S
N 16 16 7

NOTES:  0° 8° 0° 8° -
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Rev. 1 6/05
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm (0.024
inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.

FN3020 Rev 8.00 Page 8 of 8

October 15, 2014