DM74LS90/DM74LS93 Decade and Binary Counters

March 1998

DM74LS90/DM74LS93
Decade and Binary Counters
General Description count pulses are applied to input A and the outputs are as
described in the appropriate truth table. A symmetrical
Each of these monolithic counters contains four divide-by-ten count can be obtained from the ’LS90 counters
master-slave flip-flops and additional gating to provide a by connecting the QD output to the A input and applying the
divide-by-two counter and a three-stage binary counter for input count to the B input which gives a divide-by-ten square
which the count cycle length is divide-by-five for the ’LS90 wave at output QA.
and divide-by-eight for the ’LS93.
All of these counters have a gated zero reset and the LS90 Features
also has gated set-to-nine inputs for use in BCD nine’s
complement applications. n Typical power dissipation 45 mW
n Count frequency 42 MHz
To use their maximum count length (decade or four bit bi-
nary), the B input is connected to the QA output. The input

Connection Diagrams (Dual-In-Line Packages)

DS006381-1
DS006381-2
Order Number DM74LS90M or DM74LS90N
See Package Number M14A or N14A Order Number DM74LS93M or DM74LS93N
See Package Number M14A or N14A

© 1998 Fairchild Semiconductor Corporation DS006381 www.fairchildsemi.com

 Absolute Maximum Ratings (Note 1) Operating Free Air Temperature Range
DM74LS 0˚C to +70˚C
Supply Voltage 7V
Storage Temperature Range −65˚C to +150˚C
Input Voltage (Reset) 7V
Input Voltage (A or B) 5.5V

Recommended Operating Conditions

Symbol Parameter DM74LS90 Units
Min Nom Max
VCC Supply Voltage 4.75 5 5.25 V
VIH High Level Input Voltage 2 V
VIL Low Level Input Voltage 0.8 V
IOH High Level Output Current −0.4 mA
IOL Low Level Output Current 8 mA
fCLK Clock Frequency (Note 2) A to QA 0 32 MHz
B to QB 0 16
fCLK Clock Frequency (Note 3) A to QA 0 20 MHz
B to QB 0 10
tW Pulse Width (Note 2) A 15
B 30 ns
Reset 15
tW Pulse Width (Note 3) A 25
B 50 ns
Reset 25
tREL Reset Release Time (Note 2) 25 ns
tREL Reset Release Time (Note 3) 35 ns
TA Free Air Operating Temperature 0 70 ˚C
Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these
limits. The parametric values defined in the “Electrical Characteristics” table are not guaranteed at the absolute maximum ratings. The “Recommended Operating
Conditions” table will define the conditions for actual device operation.
Note 2: CL = 15 pF, RL = 2 kΩ, TA = 25˚C and VCC = 5V.
Note 3: CL = 50 pF, RL = 2 kΩ, TA = 25˚C and VCC = 5V.

’LS90 Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
(Note 4)
VI Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
VOH High Level Output VCC = Min, IOH = Max 2.7 3.4 V
Voltage VIL = Max, VIH = Min
VOL Low Level Output VCC = Min, IOL = Max
Voltage VIL = Max, VIH = Min 0.35 0.5 V
(Note 7)
IOL = 4 mA, VCC = Min 0.25 0.4
II Input Current @ Max VCC = Max, VI = 7V Reset 0.1
Input Voltage VCC = Max A 0.2 mA
VI = 5.5V B 0.4
IIH High Level Input VCC = Max, VI = 2.7V Reset 20
Current A 40 µA
B 80

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 ’LS90 Electrical Characteristics (Continued)

over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
(Note 4)
IIL Low Level Input VCC = Max, VI = 0.4V Reset −0.4
Current A −2.4 mA
B −3.2
IOS Short Circuit VCC = Max (Note 5) −20 −100 mA
Output Current
ICC Supply Current VCC = Max (Note 4) 9 15 mA
Note 4: All typicals are at VCC = 5V, TA = 25˚C.
Note 5: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 6: ICC is measured with all outputs open, both RO inputs grounded following momentary connection to 4.5V and all other inputs grounded.
Note 7: QA outputs are tested at IOL = Max plus the limit value of IIL for the B input. This permits driving the B input while maintaining full fan-out capability.

’LS90 Switching Characteristics

at VCC = 5V and TA = 25˚C
From (Input) RL = 2 kΩ
Symbol Parameter To (Output) CL = 15 pF CL = 50 pF Units
Min Max Min Max
fMAX Maximum Clock A to QA 32 20 MHz
Frequency B to QB 16 10
tPLH Propagation Delay Time A to QA 16 20 ns
Low to High Level Output
tPHL Propagation Delay Time A to QA 18 24 ns
High to Low Level Output
tPLH Propagation Delay Time A to QD 48 52 ns
Low to High Level Output
tPHL Propagation Delay Time A to QD 50 60 ns
High to Low Level Output
tPLH Propagation Delay Time B to QB 16 23 ns
Low to High Level Output
tPHL Propagation Delay Time B to QB 21 30 ns
High to Low Level Output
tPLH Propagation Delay Time B to QC 32 37 ns
Low to High Level Output
tPHL Propagation Delay Time B to QC 35 44 ns
High to Low Level Output
tPLH Propagation Delay Time B to QD 32 36 ns
Low to High Level Output
tPHL Propagation Delay Time B to QD 35 44 ns
High to Low Level Output
tPLH Propagation Delay Time SET-9 to 30 35 ns
Low to High Level Output QA, QD
tPHL Propagation Delay Time SET-9 to 40 48 ns
High to Low Level Output QB, QC
tPHL Propagation Delay Time SET-0 to 40 52 ns
High to Low Level Output Any Q

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 Recommended Operating Conditions
Symbol Parameter DM74LS93 Units
Min Nom Max
VCC Supply Voltage 4.75 5 5.25 V
VIH High Level Input Voltage 2 V
VIL Low Level Input Voltage 0.8 V
IOH High Level Output Current −0.4 mA
IOL Low Level Output Current 8 mA
fCLK Clock Frequency (Note 8) A to QA 0 32
B to QB 0 16 MHz
fCLK Clock Frequency (Note 9) A to QA 0 20
B to QB 0 10
tW Pulse Width (Note 8) A 15
B 30 ns
Reset 15
tW Pulse Width (Note 9) A 25
B 50 ns
Reset 25
tREL Reset Release Time (Note 8) 25 ns
tREL Reset Release Time (Note 9) 35 ns
TA Free Air Operating Temperature 0 70 ˚C
Note 8: CL = 15 pF, RL = 2 kΩ, TA = 25˚C and VCC = 5V.
Note 9: CL = 50 pF, RL = 2 kΩ, TA = 25˚C and VCC = 5V.

’LS93 Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
(Note 10)
VI Input Clamp Voltage VCC = Min, II = −18 mA −1.5 V
VOH High Level Output VCC = Min, IOH = Max 2.7 3.4 V
Voltage VIL = Max, VIH = Min
VOL Low Level Output VCC = Min, IOL = Max
Voltage VIL = Max, VIH = Min 0.35 0.5 V
(Note 13)
IOL = 4 mA, VCC = Min 0.25 0.4
II Input Current @Max VCC = Max, VI = 7V Reset 0.1
Input Voltage VCC = Max A 0.2 mA
VI = 5.5V B 0.4
IIH High Level Input VCC = Max Reset 20
Current VI = 2.7V A 40 µA
B 80
IIL Low Level Input VCC = Max, VI = 0.4V Reset −0.4
Current A −2.4 mA
B −1.6
IOS Short Circuit VCC = Max (Note 11) −20 −100 mA
Output Current
ICC Supply Current VCC = Max (Note 12) 9 15 mA
Note 10: All typicals are at VCC = 5V, TA = 25˚C.
Note 11: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 12: ICC is measured with all outputs open, both RO inputs grounded following momentary connection to 4.5V and all other inputs grounded.
Note 13: QA outputs are tested at IOL = max plus the limit value of IIL for the B input. This permits driving the B input while maintaining full fan-out capability.

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 ’LS93 Switching Characteristics
at VCC = 5V and TA = 25˚C
From (Input) RL = 2 kΩ
Symbol Parameter To (Output) CL = 15 pF CL = 50 pF Units
Min Max Min Max
fMAX Maximum Clock A to QA 32 20 MHz
Frequency B to QB 16 10
tPLH Propagation Delay Time A to QA 16 20 ns
Low to High Level Output
tPHL Propagation Delay Time A to QA 18 24 ns
High to Low Level Output
tPLH Propagation Delay Time A to QD 70 85 ns
Low to High Level Output
tPHL Propagation Delay Time A to QD 70 90 ns
High to Low Level Output
tPLH Propagation Delay Time B to QB 16 23 ns
Low to High Level Output
tPHL Propagation Delay Time B to QB 21 30 ns
High to Low Level Output
tPLH Propagation Delay Time B to QC 32 37 ns
Low to High Level Output
tPHL Propagation Delay Time B to QC 35 44 ns
High to Low Level Output
tPLH Propagation Delay Time B to QD 51 60 ns
Low to High Level Output
tPHL Propagation Delay Time B to QD 51 70 ns
High to Low Level Output
tPHL Propagation Delay Time SET-0 to 40 52 ns
High to Low Level Output Any Q

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 Function Tables
LS90 LS90
BCD Count Sequence Bi-Quinary (5-2)
(Note 14) (Note 15)
Count Output Count Output
QD QC QB QA QA QD QC QB
0 L L L L 0 L L L L
1 L L L H 1 L L L H
2 L L H L 2 L L H L
3 L L H H 3 L L H H
4 L H L L 4 L H L L
5 L H L H 5 H L L L
6 L H H L 6 H L L H
7 L H H H 7 H L H L
8 H L L L 8 H L H H
9 H L L H 9 H H L L
Note 14: Output QA is connected to input B for BCD count.
Note 15: Output QD is connected to input A for bi-quinary count.
LS93 Note 16: Output QA is connected to input B.
Count Sequence Note 17: H = High Level, L = Low Level, X = Don’t Care.
(Note 16)
Count Output
LS90
QD QC QB QA
Reset/Count Truth Table
0 L L L L
1 L L L H Reset Inputs Output
2 L L H L R0(1) R0(2) R9(1) R9(2) QD QC QB QA
3 L L H H H H L X L L L L
4 L H L L H H X L L L L L
5 L H L H X X H H H L L H
6 L H H L X L X L COUNT
7 L H H H L X L X COUNT
8 H L L L L X X L COUNT
9 H L L H X L L X COUNT
10 H L H L
11 H L H H LS93
12 H H L L Reset/Count Truth Table
13 H H L H
Reset Inputs Output
14 H H H L
R0(1) R0(2) QD QC QB QA
15 H H H H
H H L L L L
L X COUNT
X L COUNT

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Logic Diagrams
LS90 LS93

DS006381-4

DS006381-3

The J and K inputs shown without connection are for reference only and are functionally at a high level.

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8
Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Molded Package (M)

Order Number DM74LS90M or DM74LS93M
Package Number M14A

14-Lead Molded Dual-In-Line Package (N)

Order Number DM74LS90N or DM74LS93N
Package Number N14A

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DM74LS90/DM74LS93 Decade and Binary Counters

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failure to perform when properly used in accordance device or system, or to affect its safety or effectiveness.
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.

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