Artificial Intelligence and Machine Learning: Visvesvaraya Technological University, Belagavi
Artificial Intelligence and Machine Learning: Visvesvaraya Technological University, Belagavi
Artificial Intelligence and Machine Learning: Visvesvaraya Technological University, Belagavi
Department
Teaching
Practical/
Credits
Drawing
Total Marks
Tutorial
CIE Marks
Lecture
SEE Marks
Duration in
Theory
Sl.
Course and Course Title
hours
No
Course Code
L T P
---
BSC 18MAT31 Transform Calculus, Fourier Series Mathematics 2 2 03 40 60 100 3
1
And Numerical Techniques
2 PCC 18CS32 Data Structures and Applications CS / IS 3 2 -- 03 40 60 100 4
3 PCC Analog and Digital Electronics CS / IS -- 40 60 100 3
18CS33 3 0 03
4 PCC 18CS34 Computer Organization CS / IS 3 0 -- 03 40 60 100 3
5 PCC Software Engineering CS / IS -- 40 60 100 3
18CS35 3 0 03
6 PCC 18CS36 Discrete Mathematical Structures CS / IS 3 0 -- 03 40 60 100 3
7 PCC Analog and Digital Electronics CS / IS -- 2 2 03 40 60 100 2
18CSL37
Laboratory
8 PCC 18CSL38 Data Structures Laboratory CS / IS -- 2 2 03 40 60 100 2
1 -- -- 02 40 60
18CPH39 Constitution of India, Professional
Ethics and Cyber Law Examination is by objective type questions
17 10 24 420 480
TOTAL OR OR 04 OR OR OR 900 24
18 08 27 360 540
Note: BSC: Basic Science, PCC: Professional Core, HSMC: Humanity and Social Science, NCMC: Non-credit mandatory course
18KVK39 Vyavaharika Kannada (Kannada for communication) is for non-Kannada speaking, reading and writing students and 18KAK39 Aadalitha
Kannada (Kannada for Administration) is for students who speak, read and write Kannada.
Course prescribed to lateral entry Diploma holders admitted to III semester of Engineering programs
10 NCMC 18MATDIP31 Additional Mathematics - I Mathematics 02 01 -- 03 40 60 100 0
(a)The mandatory non – credit courses Additional Mathematics I and II prescribed for III and IV semesters respectively, to the lateral entry Diploma
holders admitted to III semester of BE/B.Tech programs, shall attend the classes during the respective semesters to complete all the formalities of the
course and appear for the University examination. In case, any student fails to register for the said course/ fails to secure the minimum 40 % of the
prescribed CIE marks, he/she shall be deemed to have secured F grade. In such a case, the student have to fulfil the requirements during subsequent
semester/s to appear for SEE.
(b) These Courses shall not be considered for vertical progression, but completion of the courses shall be mandatory for the award of degree
Courses prescribed to lateral entry B. Sc degree holders admitted to III semester of Engineering programs
Lateral entrant students from B.Sc. Stream, shall clear the non-credit courses Engineering Graphics and Elements of Civil Engineering and Mechanics
of the First Year Engineering Programme. These Courses shall not be considered for vertical progression, but completion of the courses shall be
AICTE Activity Points to be earned by students admitted to BE/B.Tech/B. Plan day college programme (For more details refer to Chapter
6,AICTE Activity Point Programme, Model Internship Guidelines): Over and above the academic grades, every Day College regular student
admitted to the 4 years Degree programme and every student entering 4 years Degree programme through lateral entry, shall earn 100 and 75 Activity
Points respectively for the award of degree through AICTE Activity Point Programme. Students transferred from other Universities to fifth semester are
required to earn 50 Activity Points from the year of entry to VTU. The Activity Points earned shall be reflected on the student’s eighth semester Grade
Card. The activities can be can be spread over the years, anytime during the semester weekends and holidays, as per the liking and convenience of the
student from the year of entry to the programme. However, minimum hours’ requirement should be fulfilled. Activity Points (non-credit) have no effect
on SGPA/CGPA and shall not be considered for vertical progression. In case students fail to earn the prescribed activity Points, Eighth semester Grade
Card shall be issued only after earning the required activity Points. Students shall be admitted for the award of degree only after the release of the
Eighth semester Grade Card.
Department
Course and
Practical/
Teaching
Drawing
Tutorial
Sl.
Lecture
Credits
Theory
Total Marks
CIE Marks
SEE Marks
Duration in
Course Title
No
hours
Course Code
L T P
17 10 24 420 480
TOTAL OR OR OR OR OR
04 900 24
18 08 27 360 540
Note: BSC: Basic Science, PCC: Professional Core, HSMC: Humanity and Social Science, NCMC: Non-credit mandatory course
18KVK49 Vyavaharika Kannada (Kannada for communication) is for non-Kannada speaking, reading and writing students and 18KAK49 Aadalitha
Kannada (Kannada for Administration) is for students who speak, read and write Kannada.
Course prescribed to lateral entry Diploma holders admitted to III semester of Engineering programs
(a)The mandatory non – credit courses Additional Mathematics I and II prescribed for III and IV semesters respectively, to the lateral entry Diploma
holders admitted to III semester of BE/B.Tech programs, shall attend the classes during the respective semesters to complete all the formalities of the
course and appear for the University examination. In case, any student fails to register for the said course/ fails to secure the minimum 40 % of the
prescribed CIE marks, he/she shall be deemed to have secured F grade. In such a case, the student have to fulfil the requirements during subsequent
semester/s to appear for SEE.
(b) These Courses shall not be considered for vertical progression, but completion of the courses shall be mandatory for the award of degree
Courses prescribed to lateral entry B. Sc degree holders admitted to III semester of Engineering programs
Lateral entrant students from B.Sc. Stream, shall clear the non-credit courses Engineering Graphics and Elements of Civil Engineering and Mechanics
of the First Year Engineering Programme. These Courses shall not be considered for vertical progression, but completion of the courses shall be
mandatory for the award of degree.
AICTE activity Points: In case students fail to earn the prescribed activity Points, Eighth semester Grade Card shall be issued only after earning the
required activity Points. Students shall be admitted for the award of degree only after the release of the Eighth semester Grade Card.
Textbook 1: Chapter 3: 3.1 -3.7 Textbook 2: Chapter 6: 6.1 -6.3, 6.5, 6.7-6.10,
6.12, 6.13
RBT: L1, L2, L3
Module 3
Linked Lists: Definition, Representation of linked lists in Memory, 10
Memory allocation; Garbage Collection. Linked list operations:
Module 1 Contact
Hours
Photodiodes, Light Emitting Diodes and Optocouplers ,BJT Biasing :Fixed bias 08
,Collector to base Bias , voltage divider bias, Operational Amplifier Application
Circuits: Multivibrators using IC-555, Peak Detector, Schmitt trigger, Active
Filters, Non-Linear Amplifier, Relaxation Oscillator, Current-to-Voltage and
Voltage-to-Current Converter , Regulated Power Supply Parameters, adjustable
voltage regulator ,D to A and A to D converter.
RBT: L1, L2
Module 2
Karnaugh maps: minimum forms of switching functions, two and three variable 08
Karnaugh maps, four variable karnaugh maps, determination of minimum
expressions using essential prime implicants, Quine-McClusky Method:
determination of prime implicants, The prime implicant chart, petricks method,
simplification of incompletely specified functions, simplification using map-
entered variables
Text book 1:Part B: Chapter 5 ( Sections 5.1 to 5.4) Chapter 6(Sections 6.1 to
6.5)
RBT: L1, L2
Module 3
Combinational circuit design and simulation using gates: Review of 08
Combinational circuit design, design of circuits with limited Gate Fan-in ,Gate
delays and Timing diagrams, Hazards in combinational Logic, simulation and
testing of logic circuits
Latches and Flip-Flops: Set Reset Latch, Gated Latches, Edge-Triggered D Flip
Flop 3,SR Flip Flop, J K Flip Flop, T Flip Flop, Flip Flop with additional inputs,
Asynchronous Sequential Circuits
Text book 1:Part B: Chapter 10(Sections 10.1 to 10.3),Chapter 11 (Sections
11.1 to 11.9)
RBT: L1, L2
Module 5
Registers and Counters: Registers and Register Transfers, Parallel Adder with 08
accumulator, shift registers, design of Binary counters, counters for other
sequences, counter design using SR and J K Flip Flops, sequential parity checker,
state tables and graphs
Text book 1:Part B: Chapter 12(Sections 12.1 to 12.5),Chapter 13(Sections
13.1,13.3
RBT: L1, L2
Course Outcomes: The student will be able to :
• Design and analyze application of analog circuits using photo devices, timer IC,
power supply and regulator IC and op-amp.
• Explain the basic principles of A/D and D/A conversion circuits and develop the
same.
• Simplify digital circuits using Karnaugh Map , and Quine-McClusky Methods
• Explain Gates and flip flops and make us in designing different data processing
circuits, registers and counters and compare the types.
• Develop simple HDL programs
Question Paper Pattern:
• The question paper will have ten questions.
• Each full Question consisting of 20 marks
• There will be 2 full questions (with a maximum of four sub questions) from each
module.
• Each full question will have sub questions covering all the topics under a module.
• The students will have to answer 5 full questions, selecting one full question from
each module.
Textbooks:
1. Charles H Roth and Larry L Kinney, Analog and Digital Electronics, Cengage
Learning,2019
Reference Books:
1. Anil K Maini, Varsha Agarwal, Electronic Devices and Circuits, Wiley, 2012.
2. Donald P Leach, Albert Paul Malvino & Goutam Saha, Digital Principles and
Applications, 8th Edition, Tata McGraw Hill, 2015.
3. M. Morris Mani, Digital Design, 4th Edition, Pearson Prentice Hall, 2008.
4. David A. Bell, Electronic Devices and Circuits, 5th Edition, Oxford University Press,
2008
COMPUTER ORGANIZATION
(Effective from the academic year 2018 -2019)
SEMESTER – III
Course Code 18CS34 CIE Marks 40
Number of Contact Hours/Week 3:0:0 SEE Marks 60
Total Number of Contact Hours 40 Exam Hours 03
CREDITS –3
Course Learning Objectives: This course (18CS34) will enable students to:
• Explain the basic sub systems of a computer, their organization, structure and
operation.
• Illustrate the concept of programs as sequences of machine instructions.
• Demonstrate different ways of communicating with I/O devices and standard I/O
interfaces.
• Describe memory hierarchy and concept of virtual memory.
• Describe arithmetic and logical operations with integer and floating-point operands.
• Illustrate organization of a simple processor, pipelined processor and other computing
systems.
Module 1 Contact
Hours
Basic Structure of Computers: Basic Operational Concepts, Bus Structures, 08
Performance – Processor Clock, Basic Performance Equation, Clock Rate,
Performance Measurement. Machine Instructions and Programs: Memory
Location and Addresses, Memory Operations, Instructions and Instruction
Sequencing, Addressing Modes, Assembly Language, Basic Input and Output
Operations, Stacks and Queues, Subroutines, Additional Instructions, Encoding of
Machine Instructions
Text book 1: Chapter1 – 1.3, 1.4, 1.6 (1.6.1-1.6.4, 1.6.7), Chapter2 – 2.2 to
2.10
RBT: L1, L2, L3
Module 2
Input/Output Organization: Accessing I/O Devices, Interrupts – Interrupt 08
Hardware, Direct Memory Access, Buses, Interface Circuits, Standard I/O
Interfaces – PCI Bus, SCSI Bus, USB.
Text book 1: Chapter4 – 4.1, 4.2, 4.4, 4.5, 4.6, 4.7
RBT: L1, L2, L3
Module 3
Memory System: Basic Concepts, Semiconductor RAM Memories, Read Only 08
Memories, Speed, Size, and Cost, Cache Memories – Mapping Functions,
Replacement Algorithms, Performance Considerations.
Text book 1: Chapter5 – 5.1 to 5.4, 5.5 (5.5.1, 5.5.2), 5.6
RBT: L1, L2, L3
Module 4
Arithmetic: Numbers, Arithmetic Operations and Characters, Addition and 08
Subtraction of Signed Numbers, Design of Fast Adders, Multiplication of Positive
Numbers, Signed Operand Multiplication, Fast Multiplication, Integer Division.
Text book 1: Chapter2-2.1, Chapter6 – 6.1 to 6.6
RBT: L1, L2, L3
Module 5
Basic Processing Unit: Some Fundamental Concepts, Execution of a Complete 08
Instruction, Multiple Bus Organization, Hard-wired Control, Micro programmed
Control.
Artificial Intelligence and Machine Learning
16
SOFTWARE ENGINEERING
(Effective from the academic year 2018 -2019)
SEMESTER – III
Course Code 18CS35 CIE Marks 40
Number of Contact Hours/Week 3:0:0 SEE Marks 60
Total Number of Contact Hours 40 Exam Hours 03
CREDITS –3
Course Learning Objectives: This course (18CS35) will enable students to:
• Outline software engineering principles and activities involved in building large
software programs.Identify ethical and professional issues and explain why they are
of concern to software engineers.
• Explain the fundamentals of object oriented concepts
• Describe the process of requirements gathering, requirements classification,
requirements specification and requirements validation. Differentiate system models,
use UML diagrams and apply design patterns.
• Discuss the distinctions between validation testing and defect testing.
• Recognize the importance of software maintenance and describe the intricacies
involved in software evolution.Apply estimation techniques, schedule project
activities and compute pricing.
• Identify software quality parameters and quantify software using measurements and
metrics. List software quality standards and outline the practices involved.
Module 1 Contact
Hours
Introduction: Software Crisis, Need for Software Engineering. Professional 08
Software Development, Software Engineering Ethics. Case Studies.
Software Processes: Models: Waterfall Model (Sec 2.1.1), Incremental Model
(Sec 2.1.2) and Spiral Model (Sec 2.1.3). Process activities.
Requirements Engineering: Requirements Engineering Processes (Chap 4).
Requirements Elicitation and Analysis (Sec 4.5). Functional and non-functional
requirements (Sec 4.1). The software Requirements Document (Sec 4.2).
Requirements Specification (Sec 4.3). Requirements validation (Sec 4.6).
Requirements Management (Sec 4.7).
RBT: L1, L2, L3
Module 2
What is Object orientation? What is OO development? OO Themes; Evidence for 08
usefulness of OO development; OO modelling history. Modelling as Design
technique: Modelling; abstraction; The Three models. Introduction, Modelling
Concepts and Class Modelling: What is Object orientation? What is OO
development? OO Themes; Evidence for usefulness of OO development; OO
modelling history. Modelling as Design technique: Modelling; abstraction; The
Three models. Class Modelling: Object and Class Concept; Link and associations
concepts; Generalization and Inheritance; A sample class model; Navigation of
class models;
Textbook 2: Ch 1,2,3.
RBT: L1, L2 L3
Module 3
System Models: Context models (Sec 5.1). Interaction models (Sec 5.2). 08
Structural models (Sec 5.3). Behavioral models (Sec 5.4). Model-driven
Module 4
Software Testing: Development testing (Sec 8.1), Test-driven development (Sec 08
8.2), Release testing (Sec 8.3), User testing (Sec 8.4). Test Automation (Page no
212).
Software Evolution: Evolution processes (Sec 9.1). Program evolution dynamics
(Sec 9.2). Software maintenance (Sec 9.3). Legacy system management (Sec 9.4).
RBT: L1, L2, L3
Module 5
Project Planning: Software pricing (Sec 23.1). Plan-driven development (Sec 08
23.2). Project scheduling (Sec 23.3): Estimation techniques (Sec 23.5). Quality
management: Software quality (Sec 24.1). Reviews and inspections (Sec 24.3).
Software measurement and metrics (Sec 24.4). Software standards (Sec 24.2)
RBT: L1, L2, L3
Course Outcomes: The student will be able to :
• Design a software system, component, or process to meet desired needs within
realistic constraints.
• Assess professional and ethical responsibility
• Function on multi-disciplinary teams
• Use the techniques, skills, and modern engineering tools necessary for engineering
practice
• Analyze, design, implement, verify, validate, implement, apply, and maintain
software systems or parts of software systems
Question Paper Pattern:
• The question paper will have ten questions.
• Each full Question consisting of 20 marks
• There will be 2 full questions (with a maximum of four sub questions) from each
module.
• Each full question will have sub questions covering all the topics under a module.
• The students will have to answer 5 full questions, selecting one full question from
each module.
Textbooks:
1. Ian Sommerville: Software Engineering, 9th Edition, Pearson Education, 2012.
(Listed topics only from Chapters 1,2,3,4, 5, 7, 8, 9, 23, and 24)
2. Michael Blaha, James Rumbaugh: Object Oriented Modelling and Design with
UML,2nd Edition, Pearson Education,2005.
Reference Books:
1. Roger S. Pressman: Software Engineering-A Practitioners approach, 7th Edition, Tata
McGraw Hill.
2. Pankaj Jalote: An Integrated Approach to Software Engineering, Wiley India
Applications
a. Evaluation of Suffix expression with single digit operands and operators:
+, -, *, /, %, ^
b. Solving Tower of Hanoi problem with n disks
6. Design, Develop and Implement a menu driven Program in C for the following
operations on Circular QUEUE of Characters (Array Implementation of Queue
with maximum size MAX)
a. Insert an Element on to Circular QUEUE
b. Delete an Element from Circular QUEUE
c. Demonstrate Overflow and Underflow situations on Circular QUEUE
d. Display the status of Circular QUEUE
e. Exit
Support the program with appropriate functions for each of the above operations
7. Design, Develop and Implement a menu driven Program in C for the following
operations on Singly Linked List (SLL) of Student Data with the fields: USN,
Name, Programme, Sem, PhNo
a. Create a SLL of N Students Data by using front insertion.
b. Display the status of SLL and count the number of nodes in it
c. Perform Insertion / Deletion at End of SLL
d. Perform Insertion / Deletion at Front of SLL(Demonstration of stack)
e. Exit
8. Design, Develop and Implement a menu driven Program in C for the following
operations on Doubly Linked List (DLL) of Employee Data with the fields: SSN,
Name, Dept, Designation, Sal, PhNo
a. Create a DLL of N Employees Data by using end insertion.
b. Display the status of DLL and count the number of nodes in it
c. Perform Insertion and Deletion at End of DLL
d. Perform Insertion and Deletion at Front of DLL
e. Demonstrate how this DLL can be used as Double Ended Queue.
f. Exit
9. Design, Develop and Implement a Program in C for the following operationson
Singly Circular Linked List (SCLL) with header nodes
a. Represent and Evaluate a Polynomial P(x,y,z) = 6x2y2z-
4yz5+3x3yz+2xy5z-2xyz3
b. Find the sum of two polynomials POLY1(x,y,z) and POLY2(x,y,z) and
store the result in POLYSUM(x,y,z)
Support the program with appropriate functions for each of the above operations
10. Design, Develop and Implement a menu driven Program in C for the following
operations on Binary Search Tree (BST) of Integers .
a. Create a BST of N Integers: 6, 9, 5, 2, 8, 15, 24, 14, 7, 8, 5, 2
b. Traverse the BST in Inorder, Preorder and Post Order
c. Search the BST for a given element (KEY) and report the appropriate
message
d. Exit
11. Design, Develop and Implement a Program in C for the following operations on
Graph(G) of Cities
a. Create a Graph of N cities using Adjacency Matrix.
b. Print all the nodes reachable from a given starting node in a digraph using
DFS/BFS method
12. Given a File of N employee records with a set K of Keys (4-digit) which uniquely
determine the records in file F. Assume that file F is maintained in memory by a
Hash Table (HT) of m memory locations with L as the set of memory addresses
(2-digit) of locations in HT. Let the keys in K and addresses in L are Integers.
Design and develop a Program in C that uses Hash function H: K →L as H(K)=K
mod m (remainder method), and implement hashing technique to map a given key
K to the address space L. Resolve the collision (if any) using linear probing.
Laboratory Outcomes: The student should be able to:
• Analyze and Compare various linear and non-linear data structures
• Code, debug and demonstrate the working nature of different types of data structures
and their applications
• Implement, analyze and evaluate the searching and sorting algorithms
• Choose the appropriate data structure for solving real world problems
Conduct of Practical Examination:
• Experiment distribution
o For laboratories having only one part: Students are allowed to pick one
experiment from the lot with equal opportunity.
o For laboratories having PART A and PART B: Students are allowed to pick
one experiment from PART A and one experiment from PART B, with equal
opportunity.
• Change of experiment is allowed only once and marks allotted for procedure to be
made zero of the changed part only.
• Marks Distribution (Courseed to change in accoradance with university regulations)
c) For laboratories having only one part – Procedure + Execution + Viva-Voce:
15+70+15 = 100 Marks
d) For laboratories having PART A and PART B
i. Part A – Procedure + Execution + Viva = 6 + 28 + 6 = 40 Marks
ii. Part B – Procedure + Execution + Viva = 9 + 42 + 9 = 60 Marks
information Technology Act 2000, Internet Censorship. Cybercrimes and enforcement agencies.
Course Outcomes: On completion of this course, students will be able to,
CO 1: Have constitutional knowledge and legal literacy.
CO 2: Understand Engineering and Professional ethics and responsibilities of Engineers.
CO 3: Understand the the cybercrimes and cyber laws for cyber safety measures.
Question paper pattern for SEE and CIE:
• The SEE question paper will be set for 100 marks and the marks scored by the students will
proportionately be reduced to 60. The pattern of the question paper will be objective type
(MCQ).
• For the award of 40 CIE marks, refer the University regulations 2018.
Sl. Title of the Book Name of the Name of the Edition and
No. Author/s Publisher Year
Textbook/s
1 Constitution of India, Shubham Singles, 2018
Professional Ethics and Charles E. Haries, Cengage
Human Rights and et al Learning India
2 Cyber Security and Cyber Alfred Basta and et Cengage 2018
Laws al Learning India
Reference Books
3 Introduction to the Durga Das Basu Prentice –Hall, 2008.
Constitution of India
4 Engineering Ethics M. Govindarajan, Prentice –Hall, 2004
S. Natarajan, V. S.
Senthilkumar
• The students will have to answer five full questions, selecting one full question from each
module.
Sl
Name of the
No Title of the Book Name of the Edition and Year
Author/s
Publisher
Textbook
1 Higher Engineering Mathematics B. S. Grewal Khanna Publishers 43rd Edition, 2015
Reference Books
1 Advanced Engineering E. Kreyszig John Wiley & Sons 10th Edition, 2015
Mathematics
2 Engineering Mathematics N. P .Bali and Laxmi Publishers 7th Edition, 2007
Manish Goyal
3 Engineering Mathematics Vol. I Rohit Cengage Learning 1st Edition, 2015
Khurana
Author/s Publisher
Textbooks
1 Advanced Engineering E. Kreyszig John Wiley & Sons 10th Edition,2016
Mathematics
2 Higher Engineering B. S. Grewal Khanna Publishers 44th Edition, 2017
Mathematics
3 Engineering Mathematics Srimanta Pal et al Oxford University 3rd Edition,2016
Press
Reference Books
1 Advanced Engineering C. Ray Wylie, McGraw-Hill 6th Edition 1995
Mathematics Louis C.Barrett
2 Introductory Methods of S.S.Sastry Prentice Hall of 4th Edition 2010
Numerical Analysis India
3 Higher Engineering B. V. Ramana McGraw-Hill 11th Edition,2010
Mathematics
4 A Text Book of Engineering N. P. Bali and Laxmi Publications 2014
Mathematics Manish Goyal
5 Advanced Engineering Chandrika Prasad Khanna 2018
Mathematics and Reena Garg Publishing,
Web links and Video Lectures:
1. http://nptel.ac.in/courses.php?disciplineID=111
2. http://www.class-central.com/subject/math(MOOCs)
3. http://academicearth.org/
4. VTU EDUSAT PROGRAMME - 20
Module 3
Greedy Method: General method, Coin Change Problem, Knapsack Problem, 10
Job sequencing with deadlines (T2:4.1, 4.3, 4.5). Minimum cost spanning trees:
Prim’s Algorithm, Kruskal’s Algorithm (T1:9.1, 9.2). Single source shortest
paths: Dijkstra's Algorithm (T1:9.3). Optimal Tree problem: Huffman Trees
and Codes (T1:9.4). Transform and Conquer Approach: Heaps and Heap Sort
(T1:6.4).
OPERATING SYSTEMS
(Effective from the academic year 2018 -2019)
SEMESTER – IV
Course Code 18CS43 CIE Marks 40
Number of Contact Hours/Week 3:0:0 SEE Marks 60
Total Number of Contact Hours 40 Exam Hours 03
CREDITS –3
Course Learning Objectives: This course (18CS43) will enable students to:
• Introduce concepts and terminology used in OS
• Explain threading and multithreaded systems
• Illustrate process synchronization and concept of Deadlock
• Introduce Memory and Virtual memory management, File system and storage
techniques
Module 1 Contact
Hours
Introduction to operating systems, System structures: What operating systems 08
do; Computer System organization; Computer System architecture; Operating
System structure; Operating System operations; Process management; Memory
management; Storage management; Protection and Security; Distributed system;
Special-purpose systems; Computing environments. Operating System Services;
User - Operating System interface; System calls; Types of system calls; System
programs; Operating system design and implementation; Operating System
structure; Virtual machines; Operating System generation; System boot. Process
Management Process concept; Process scheduling; Operations on processes;
Inter process communication
Text book 1: Chapter 1, 2.1, 2.3, 2.4, 2.5, 2.6, 2.8, 2.9, 2.10, 3.1, 3.2, 3.3, 3.4
RBT: L1, L2, L3
Module 2
Multi-threaded Programming: Overview; Multithreading models; Thread 08
Libraries; Threading issues. Process Scheduling: Basic concepts; Scheduling
Criteria; Scheduling Algorithms; Multiple-processor scheduling; Thread
scheduling. Process Synchronization: Synchronization: The critical section
problem; Peterson’s solution; Synchronization hardware; Semaphores; Classical
problems of synchronization; Monitors.
Text book 1: Chapter 4.1, 4.2, 4.3, 4.4, 5.1, 5.2, 5.3, 5.4, 5.5, 6.2, 6.3, 6.4, 6.5,
6.6, 6.7
RBT: L1, L2, L3
Module 3
Deadlocks : Deadlocks; System model; Deadlock characterization; Methods for 08
handling deadlocks; Deadlock prevention; Deadlock avoidance; Deadlock
detection and recovery from deadlock. Memory Management: Memory
management strategies: Background; Swapping; Contiguous memory allocation;
Paging; Structure of page table; Segmentation.
Text book 1: Chapter 7, 8.1 to 8.6
RBT: L1, L2, L3
Module 4
Virtual Memory Management: Background; Demand paging; Copy-on-write; 08
Page replacement; Allocation of frames; Thrashing. File System,
Implementation of File System: File system: File concept; Access methods;
Directory structure; File system mounting; File sharing; Protection:
Implementing File system: File system structure; File system implementation;
Artificial Intelligence and Machine Learning
37
RBT: L1, L2
Module 5
RTOS and IDE for Embedded System Design: Operating System basics, Types 08
of operating systems, Task, process and threads (Only POSIX Threads with an
example program), Thread preemption, Multiprocessing and Multitasking, Task
Communication (without any program), Task synchronization issues – Racing and
Deadlock, Concept of Binary and counting semaphores (Mutex example without
any program), How to choose an RTOS, Integration and testing of Embedded
hardware and firmware, Embedded system Development Environment – Block
diagram (excluding Keil), Disassembler/decompiler, simulator, emulator and
debugging techniques, target hardware debugging, boundary scan.
Text book 2: Chapter-10 (Sections 10.1, 10.2, 10.3, 10.4 , 10.7, 10.8.1.1,
10.8.1.2, 10.8.2.2, 10.10 only), Chapter 12, Chapter-13 ( block diagram before
13.1, 13.3, 13.4, 13.5, 13.6 only)
RBT: L1, L2
Course Outcomes: The student will be able to :
● Describe the architectural features and instructions of ARM microcontroller
● Apply the knowledge gained for Programming ARM for different applications.
● Interface external devices and I/O with ARM microcontroller.
● Interpret the basic hardware components and their selection method based on the
characteristics and attributes of an embedded system.
● Develop the hardware /software co-design and firmware design approaches.
• Demonstrate the need of real time operating system for embedded system applications
Question Paper Pattern:
• The question paper will have ten questions.
• Each full Question consisting of 20 marks
• There will be 2 full questions (with a maximum of four sub questions) from each
module.
• Each full question will have sub questions covering all the topics under a module.
• The students will have to answer 5 full questions, selecting one full question from
each module.
Textbooks:
1. Andrew N Sloss, Dominic Symes and Chris Wright, ARM system developers guide,
Elsevier, Morgan Kaufman publishers, 2008.
2. Shibu K V, “Introduction to Embedded Systems”, Tata McGraw Hill Education,
Private Limited, 2nd Edition.
Reference Books:
1. Raghunandan..G.H, Microcontroller (ARM) and Embedded System, Cengage
learning Publication,2019
2. The Insider’s Guide to the ARM7 Based Microcontrollers, Hitex Ltd.,1st edition,
2005.
Module 5
Event Handling: Two event handling mechanisms; The delegation event model; 08
Event classes; Sources of events; Event listener interfaces; Using the delegation
event model; Adapter classes; Inner classes.
Swings: Swings: The origins of Swing; Two key Swing features; Components
and Containers; The Swing Packages; A simple Swing Application; Create a
Swing Applet; Jlabel and ImageIcon; JTextField;The Swing Buttons;
JTabbedpane; JScrollPane; JList; JComboBox; JTable.
Text book 2: Ch 22: Ch: 29 Ch: 30
RBT: L1, L2, L3
Course Outcomes: The student will be able to :
• Explain the object-oriented concepts and JAVA.
• Develop computer programs to solve real world problems in Java.
• Develop simple GUI interfaces for a computer program to interact with users, and to
understand the event-based GUI handling principles using swings.
Question Paper Pattern:
• The question paper will have ten questions.
• Each full Question consisting of 20 marks
• There will be 2 full questions (with a maximum of four sub questions) from each
module.
• Each full question will have sub questions covering all the topics under a module.
• The students will have to answer 5 full questions, selecting one full question from
each module.
Textbooks:
1. Sourav Sahay, Object Oriented Programming with C++ , 2nd Ed, Oxford University
Press,2006
2. Herbert Schildt, Java The Complete Reference, 7th Edition, Tata McGraw Hill, 2007.
Reference Books:
1. Mahesh Bhave and Sunil Patekar, "Programming with Java", First Edition, Pearson
Education,2008, ISBN:9788131720806
2. Herbert Schildt, The Complete Reference C++, 4th Edition, Tata McGraw Hill,
2003.
3. Stanley B.Lippmann, Josee Lajore, C++ Primer, 4th Edition, Pearson Education,
2005.
4. Rajkumar Buyya,S Thamarasi selvi, xingchen chu, Object oriented Programming with
java, Tata McGraw Hill education private limited.
5. Richard A Johnson, Introduction to Java Programming and OOAD, CENGAGE
Learning.
6. E Balagurusamy, Programming with Java A primer, Tata McGraw Hill companies.
Mandatory Note: Every institute shall organize bridge course on C++, either in the
vacation or in the beginning of even semester for a minimum period of ten days
(2hrs/day). Maintain a copy of the report for verification during LIC visit.
Faculty can utilize open source tools to make teaching and learning more interactive.
DATA COMMUNICATION
(Effective from the academic year 2018 -2019)
SEMESTER – IV
Course Code 18CS46 CIE Marks 40
Number of Contact Hours/Week 3:0:0 SEE Marks 60
Total Number of Contact Hours 40 Exam Hours 03
CREDITS –3
Course Learning Objectives: This course (18CS46) will enable students to:
• Comprehend the transmission technique of digital data between two or more
computers and a computer network that allows computers to exchange data.
• Explain with the basics of data communication and various types of computer
networks;
• Demonstrate Medium Access Control protocols for reliable and noisy channels.
• Expose wireless and wired LANs.
Module 1 Contact
Hours
Introduction: Data Communications, Networks, Network Types, Internet 08
History, Standards and Administration, Networks Models: Protocol Layering,
TCP/IP Protocol suite, The OSI model, Introduction to Physical Layer-1: Data
and Signals, Digital Signals, Transmission Impairment, Data Rate limits,
Performance.
Textbook1: Ch 1.1 to 1.5, 2.1 to 2.3, 3.1, 3.3 to 3.6
RBT: L1, L2
Module 2
Digital Transmission: Digital to digital conversion (Only Line coding: Polar, 08
Bipolar and Manchester coding).
Physical Layer-2: Analog to digital conversion (only PCM), Transmission
Modes,
Analog Transmission: Digital to analog conversion.
Textbook1: Ch 4.1 to 4.3, 5.1
RBT: L1, L2
Module 3
Bandwidth Utilization: Multiplexing and Spread Spectrum, 08
Switching: Introduction, Circuit Switched Networks and Packet switching.
Error Detection and Correction: Introduction, Block coding, Cyclic codes,
Checksum,
Textbook1: Ch 6.1, 6.2, 8.1 to 8.3, 10.1 to 10.4
RBT: L1, L2
Module 4
Data link control: DLC services, Data link layer protocols, Point to Point 08
protocol (Framing, Transition phases only).
Media Access control: Random Access, Controlled Access and Channelization,
Introduction to Data-Link Layer: Introduction, Link-Layer Addressing, ARP
IPv4 Addressing and subnetting: Classful and CIDR addressing, DHCP, NAT
Textbook1: Ch 9.1, 9.2, 11.1, 11.2 11.4, 12.1 to 12.3, 18.4
RBT: L1, L2
Module 5
Artificial Intelligence and Machine Learning
44
from a file or can be generated using the random number generator. Demonstrate using
Java how the divide-and-conquer method works along with its time complexity analysis:
worst case, average case and best case.
6. Implement in Java, the 0/1 Knapsack problem using (a) Dynamic Programming method
(b) Greedy method.
7. From a given vertex in a weighted connected graph, find shortest paths to other vertices
using Dijkstra's algorithm. Write the program in Java.
8. Find Minimum Cost Spanning Tree of a given connected undirected graph using
Kruskal'salgorithm. Use Union-Find algorithms in your program
9. Find Minimum Cost Spanning Tree of a given connected undirected graph using
Prim's algorithm.
10. Write Java programs to
(a) Implement All-Pairs Shortest Paths problem using Floyd's algorithm.
(b) Implement Travelling Sales Person problem using Dynamic programming.
11. Design and implement in Java to find a subset of a given set S = {Sl, S2,.....,Sn} of n
positive integers whose SUM is equal to a given positive integer d. For example, if S
={1, 2, 5, 6, 8} and d= 9, there are two solutions {1,2,6}and {1,8}. Display a suitable
message, if the given problem instance doesn't have a solution.
12. Design and implement in Java to find all Hamiltonian Cycles in a connected
undirected Graph G of n vertices using backtracking principle.
Laboratory Outcomes: The student should be able to:
• Design algorithms using appropriate design techniques (brute-force, greedy, dynamic
programming, etc.)
• Implement a variety of algorithms such assorting, graph related, combinatorial, etc., in
a high level language.
• Analyze and compare the performance of algorithms using language features.
• Apply and implement learned algorithm design techniques and data structuresto solve
real-world problems.
Conduct of Practical Examination:
• Experiment distribution
o For laboratories having only one part: Students are allowed to pick one
experiment from the lot with equal opportunity.
o For laboratories having PART A and PART B: Students are allowed to pick
one experiment from PART A and one experiment from PART B, with equal
opportunity.
• Change of experiment is allowed only once and marks allotted for procedure to be
made zero of the changed part only.
• Marks Distribution (Courseed to change in accoradance with university regulations)
e) For laboratories having only one part – Procedure + Execution + Viva-Voce:
15+70+15 = 100 Marks
f) For laboratories having PART A and PART B
i. Part A – Procedure + Execution + Viva = 6 + 28 + 6 = 40 Marks
ii. Part B – Procedure + Execution + Viva = 9 + 42 + 9 = 60 Marks
Programs List:
PART A Conduct the following experiments by writing program using ARM7TDMI/LPC2148
using an evaluation board/simulator and the required software tool.
1. Write a program to multiply two 16 bit binary numbers.
2. Write a program to find the sum of first 10 integer numbers.
3. Write a program to find factorial of a number.
4. Write a program to add an array of 16 bit numbers and store the 32 bit result in internal
RAM
5. Write a program to find the square of a number (1 to 10) using look-up table.
6. Write a program to find the largest/smallest number in an array of 32 numbers .
7. Write a program to arrange a series of 32 bit numbers in ascending/descending order.
8. Write a program to count the number of ones and zeros in two consecutive memory
locations.
PART –B Conduct the following experiments on an ARM7TDMI/LPC2148 evaluation board
using evaluation version of Embedded 'C' & Keil Uvision-4 tool/compiler.
9. Display “Hello World” message using Internal UART.
10. Interface and Control a DC Motor.
11. Interface a Stepper motor and rotate it in clockwise and anti-clockwise direction.
12. Determine Digital output for a given Analog input using Internal ADC of ARM
controller.
13. Interface a DAC and generate Triangular and Square waveforms.
14. Interface a 4x4 keyboard and display the key code on an LCD.
15. Demonstrate the use of an external interrupt to toggle an LED On/Off.
16. Display the Hex digits 0 to F on a 7-segment LED interface, with an appropriate delay in
between
• Change of experiment is allowed only once and marks allotted for procedure to be made
zero of the changed part only.
• Marks Distribution (Courseed to change in accoradance with university regulations)
g) For laboratories having only one part – Procedure + Execution + Viva-Voce:
15+70+15 = 100 Marks
h) For laboratories having PART A and PART B
i. Part A – Procedure + Execution + Viva = 6 + 28 + 6 = 40 Marks
ii. Part B – Procedure + Execution + Viva = 9 + 42 + 9 = 60 Marks
Course Outcomes: At the end of the course the student will be able to:
CO1: Solve systems of linear equations using matrix algebra.
CO2: Apply the knowledge of numerical methods in modelling and solving engineering problems.
CO3: Make use of analytical methods to solve higher order differential equations.
CO4: Classify partial differential equations and solve them by exact methods.
CO5: Apply elementary probability theory and solve related problems.
Question paper pattern:
• The question paper will have ten full questions carrying equal marks.
• Each full question will be for 20 marks.
• There will be two full questions (with a maximum of four sub- questions) from each module.
• Each full question will have sub- question covering all the topics under a module.
• The students will have to answer five full questions, selecting one full question from each
d l
Sl Name of the Edition and
Title of the Book Name of the Publisher
No Author/s Year
Artificial Intelligence and Machine Learning
50
Textbook
1 Higher Engineering B.S. Grewal Khanna Publishers 43rd Edition,
Mathematics 2015
Reference Books
1 Advanced Engineering E. Kreyszig John Wiley & Sons 10th Edition,
Mathematics 2015
2 Engineering Mathematics N. P. Bali and Laxmi Publishers 7th Edition, 2007
Manish Goyal
3 Engineering Mathematics Vol. Rohit Khurana Cengage Learning 1st Edition, 2015
I