Morris Mano - Computer Architecture PPT Chapter 4
Morris Mano - Computer Architecture PPT Chapter 4
Morris Mano - Computer Architecture PPT Chapter 4
Chapter 4
The different modules are connected through common data and control paths.
Microoperations
Digital systems are best defined by the registers they contain and the operations that are
performed on the data stored in them.
MAR: Memory address register: It holds the address of the location to be accessed from memory. MAR and MDR
(Memory Data Register) together facilitate the communication of the CPU and the main memory.
Memory Data Registers (MDR):It contains data to be written into or to be read out from the addressed location.
PC: Program counter: keep the track of execution of the program. It contains the memory address of the next instruction to
be fetched.
IR: Instruction register: It is the register which holds the instruction which is currently been executed.
Accumulator/ processor register: General purpose register
PC(L) = PC(0-7)
PC(H) = PC(8-15)
Register Transfer
Copy R1 to R2
R2 R1
If P = 1, then copy R1 to R2
P: R2 R1
P is a control function
Simultaneous transfers
T: R2 R1, R1 R2
Bus
There are many registers in a computer. paths must be provided to transfer information from one
register to another. The number of wires connecting all of the registers will be excessive if
separate lines are used between each register and all other registers in the system.
A bus consists of a set of common lines, one for each bit of register, through which binary
information is transferred one at a time. Control signals determine which register is selected by
the bus during a particular register transfer.
Implementing a Bus Using Multiplexers
Bus: n-line
Number of multiplexers: n
Size of multiplexers: k x 1
Number of select lines: s, such that 2s > k
BUS C, R1 BUS
Or, R1 C
https://forms.gle/s1wWXDFRKmycfen9A
Implementing a Bus Using Three-state Buffers
States:
Logic high (1)
Logic low (0)
High-impedance (Z) //tri-stated
Assume: k registers of n bits each
Bus: n-line
Number of three-state buffers: k x n
Number of decoders: n
Size of decoders: s x k
Number of select lines: s, such that 2s > k
Memory Transfer Microoperations
Read
DR M[AR]
Write
M[AR] DR
Arithmetic Microoperations
Binary Adder
-used for bit manipulation of binary data and for making logical decisions.
Logic Circuit
Logic Microoperations
• Selective set
• Selective complement
• Selective clear
• Mask
• Insert
• Clear
Shift Microoperations
-for serial transfer of data
-serial input is used
ashl: R0 0 //multiply by 2
ashr: Rn-2 Rn-1 //divide by 2
Arithmetic Logic Shift Unit