FSC-BT826

FSC-BT826
4.2 Dual Mode Bluetooth Module Data Sheet
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Document Type: FSC-BT826

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Document Version: V1.8

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Release Date: April 30. 2020

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Contact Us
Shenzhen Feasycom Technology Co.,LTD

Email: sales@feasycom.com

Address: Room 2004-2005,20th Floor,Huichao Technology Building,Jinhai Road,

Xixiang ,Baoan District,Shenzhen,518100,China.
Tel: 86-755-27924639

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 FSC-BT826

Release Record
Version Number Release Date Comments
Revision 1.0 2014-11-5 First Release
Revision 1.1 2015-09-09
Revision 1.2 2016-03-24 1, Modified BT Status for 33 pin,
2, Modify the application circuit diagram.
Revision 1.3 2016-04-16 1, Modify the Pin 9 ,10 , 14, 16 ,
17,28,31 function definition.
2, Modify the application circuit diagram.
3, This version of the specification is
applicable to V1.2 version of the PCB.
Revision 1.4 2016-08-06 1, PIN27 Alternative Function :BT Power
Mode
2, Modify the application circuit diagram.
Revision 1.5 2018-05-10 Modify Bluetooth Version: Upgrade from
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BT4.0 to BT4.2
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Revision 1.6 2019-08-29 Add certificate picture

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Revision 1.7 2019-10-18 Feature update

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Revision 1.8 2020-04-30 Increase power consumption parameters

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 FSC-BT826

1. INTRODUCTION
FSC-BT826 is a fully integrated Bluetooth module that complies with Bluetooth 4.2 dual mode
protocols(BR/EDR/BLE). It supports SPP, BLE, ANCS, iBeacon, profiles. It integrates
Baseband controller in a small package（Integrated chip antenna）, so the designers can have
better flexibilities for the product shapes.

FSC-BT826 can be communicated by UART port. With Feasycom’s Bluetooth stack,

Customers can easily transplant to their software. Please refer to Feasycom stack design
guide.

1.1 Block Diagram

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ANT 40MHZ UART

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Crystal
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I2C
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4.2 dual mode

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BT controller
PIO/AIO
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UAR
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ARM PCM/I2S
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Serial Flash Cortex-M3

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CS
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RESET
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3.3V GND

Figure 1

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 FSC-BT826

1.2 Feature

◆ Fully qualified Bluetooth 4.2/4.0/3.0/2.1/2.0/1.2/1.1

◆ Postage stamp sized form factor.

◆ Low power.
◆ Class 1.5 support(high output power)

◆ The default UART Baud rate is 115.2Kbps and can support from 1200bps up to 921Kbps,.
◆ UART, I2C,PCM / I2S data connection interfaces.
◆ Support the OTA upgrade.

◆ Bluetooth stack profiles support: SPP, HID, MAP, and all BLE protocols.
◆ BQB, SRRC, ROHS and Airsync Certified.
◆ Power Consumption In Working Mode (VDD_3V3 at 3.3 V)

 Discoverable：18.5mA
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 BR/EDR Connection：22.4mA
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 LE Connection：17.9mA
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 BR/EDR Connection @ 115200bps：23.4mA

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1.3 Application
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◆ Smart Watch and Bluetooth Bracelet

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◆ Health & Medical devices

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◆ Wireless POS
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◆ Measurement and monitoring systems

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◆ Industrial sensors and controls

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◆ Asset Tracking
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 FSC-BT826

2. GENERAL SPECIFICATION

General Specification

Chipset Realtek RTL8761

Product FSC-BT826

Dimension 13mm x 26.9mm x 2mm

Bluetooth Specification Bluetooth V4.2 (Dual Mode)

Power Supply 3.3 Volt DC

Output Power 5.5 dBm

Sensitivity -82dBm@0.1%BER

Frequency Band 2.402GHz -2.480GHz ISM band

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Modulation FHSS,GFSK,DPSK,DQPSK
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Baseband Crystal OSC 40MHz

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1600hops/sec, 1MHz channel space,79

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Hopping & channels

Channels(BT 4.2 to 2MHz channel space)
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RF Input Impedance 50 ohms

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Antenna Integrated chip antenna

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Interface Data: UART, I2C, PCM / I2S

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SPP, GATT(BLE Standard)

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Profile MFI,Airsync,ANCS, iBeacon,

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MAP(optional),OTA(optional)
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Temperature -20ºC to +70 ºC

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Humidity 10%~95% Non-Condensing

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Environmental RoHS Compliant

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Table 1

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 FSC-BT826

3. PHYSICAL CHARACTERISTIC

FSC-BT826 dimension is 26.9mm(L)x13mm(W)x2mm(H).

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Figure 2：Package Dimensions（TOP VIEW）

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 FSC-BT826

4. PIN DEFINITION DESCRIPTIONS

* Special tips: PIO0,PIO1,PIO2,PIO3 I/O port for reuse.
When using the OTA function upgrade (air), please send the I/O mouth dangling;

If the I/O port to connect the MCU,

then set the MCU I/O ports for the input port or high impedance state.

1 UART_TX PIO11 34
2 UART_RX PIO10 33
3 UART_CTS PIO9 32
4 UART_RTS PIO8 31
5 PCM_CLK PIO7 30
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6 PCM_OUT PIO6 29
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7 PCM_IN PIO5 28
PIO4 27
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8 PCM_SYNC
9 Tran/AIO0 PIO3 26
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10 Disc/AIO1 PIO2 25
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11 RESET PIO1 24
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12 VDD_3V3 PIO0
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SWDAT
SWCLK

13 GND
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GND
BOOT0

GND
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14 15 16 17 18 19 20 21
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Figure 3：PIN description

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Pin Pin Name Pad Type Description

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1 UART_TX CMOS output UART data output

2 UART_RX CMOS input UART data input

UART clear to send active low

UART_CTS CMOS input
3 Alternative Function: Programmable input/output line

UART request to send active low

4 UART_RTS CMOS output
Alternative Function: Programmable input/output line

5 PCM_CLK Bi-directional Synchronous data clock

6 PCM_OUT CMOS Output Synchronous data output

7 PCM_IN CMOS Input Synchronous data input

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 FSC-BT826

8 PCM_SYNC Bi-directional Synchronous data Sync

Host MCU change UART transmission mode. (Default)
9 Tran/AIO0 I/O
Alternative Function: Analogue programmable I/O line.
Host MCU disconnect bluetooth. (Default).
10 Disc/AIO1 I/O
Alternative Function: Analogue programmable I/O line.

Reset if low. Input debounced so must be low for >5ms to

11 RESET CMOS input
cause a reset.

12 VDD_3V3 VDD Power supply voltage 3.3V

13 GND VSS Power Ground

The default is low. (internal 10K resistance drop)

14 BOOT0 Bi-directional UART DFU Mode, Enabled at startup when set to high
level, Disabled by default

15 NC NC NC
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SWCLK Bi-directional Debugging through the clk line(Default)

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17 SWDIO Bi-directional Debugging through the data line(Default)

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18 NC NC NC
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19 NC NC NC
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20 NC NC NC
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21 GND VSS Power Ground

22 GND VSS Power Ground

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Programmable input/output line

PIO0 I/O
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23 * The I/O port for reuse.

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Programmable input/output line

PIO1 I/O
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24 * The I/O port for reuse.

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Programmable input/output line

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PIO2 I/O
25 * The I/O port for reuse.
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Programmable input/output line

26 PIO3 I/O
* The I/O port for reuse.
Programmable input/output line
27 PIO4 I/O Alternative Function: BT Power Mode, low level in run

mode, it will be set to high level when fall asleep.

28 PIO5 I/O With the use of the Pin 9.

I/O Programmable input/output line
29 PIO6
Alternative Function: I2C CLK line (Default)

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 FSC-BT826

I/O Programmable input/output line

30 PIO7
Alternative Function: I2C DATA line (Default)

31 PIO8 I/O With the use of the Pin 10.

Programmable input/output line

PIO9 I/O
32 Alternative Function: LED(Default)

Programmable input/output line

PIO10 I/O
33 Alternative Function: BT Status(Default)

34 PIO11 I/O Programmable input/output line

Table 2

5. Interface Characteristics
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5.1 UART Interface

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Four signals are used to implement the UART function. When FSC-BT826 is connected to
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another digital device, UART_RX and UART_TX transfer data between the two devices. The
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remaining two signals, UART_CTS and UART_RTS, can be used to implement RS232
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hardware flow control where both are active low indicators.

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The interface consists of four-line connection as described in below:

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Signal name Driving source Description

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UART-TX FSC-BT826 module Data from FSC-BT826 module

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UART-RX Host Data from Host

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UART-RTS FSC-BT826 module Request to send output of FSC-BT826 module

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UART-CTS Host Clear to send input of FSC-BT826 module

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Table 3
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Default Data Format

Property Possible Values

BCSP-Specific Hardware Enable

Baud Rate 115. 2 Kbps

Flow Control None

Data bit length 8bit

Parity None

Number of Stop Bits 1

Table 4

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 FSC-BT826

5.2 I2C Interface

◆ Up to two I2C bus interfaces can support both master and slave mode with a frequency up

to 400KHZ.
◆ Provide arbitration function, optional PEC(packet error checking) generation and checking.
◆ Supports 7 –bit and 10 –bit addressing mode and general call addressing mode.

The I2C interface is an internal circuit allowing communication with an external I2C interface
which is an industry standard two line serial interface used for connection to external hardware.
These two serial lines are known as a serial data line (SDA) and a serial clock line (SCL). The
I2C module provides two data transfer rates: 100 kHz of standard mode or 400kHz of the fast
mode. The I2C module also has an arbitration detect function to prevent the situation where
more than one master attempts to transmit data to the I2C bus at the same time. A CRC-8
calculator is also provided in I2C interface to perform packet error checking for I2C data.

5.3 Analog to digital converter (ADC)

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◆ 12-bit SAR ADC engine with up to 1 MSPS conversion rate

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◆ Conversion range: VSSA to VDDA (2.6 to 3.6 V)

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◆ Temperature sensor
One 12-bit 1 μs multi-channel ADC is integrated in the device.
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The conversion range is between 2.6 V < VDDA < 3.6 V. An analog watchdog block can be
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used to detect the channels, which are required to remain within a specific threshold window.
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A configurable channel management block of analog inputs also can be used to perform
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conversions in single, continuous, scan or discontinuous mode to support more advanced

usages. The ADC can be triggered from the events generated by the general-purpose timers
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(TMx) and the advanced-control timers (TM1) with internal connection.

The temperature sensor can be used to generate a voltage that varies linearly with
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temperature. Each device is factory-calibrated to improve the accuracy and the calibration
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data are stored in the system memory area.

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5.4 PCM Interface Characteristics

The FSC-BT826 supports a PCM digital audio interface that is used for transmitting digital
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audio/voice data to/from the Audio Codec. Features are supported as below
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◆ Supports Master and Slave mode

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◆ Programmable long/short Frame Sync

◆ Supports 8-bit A-law/µ-law, and 13/16-bit linear PCM formats
◆ Supports sign-extension and zero-padding for 8-bit and 13-bit samples
◆ Supports padding of Audio Gain to 13-bit samples
◆ PCM Master Clock Output: 64, 128, 256, or 512kHz
◆ Supports SCO/ESCO link

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 FSC-BT826

5.4.1 PCM Format

FrameSync is the synchronizing function used to control the transfer of DAC_Data and
ADC_Data. A Long FrameSync indicates the start of ADC_Data at the rising edge of
FrameSync (Figure 3), and a Short FrameSync indicates the start of ADC_Data at the falling
edge of FrameSync (Figure 4).

Figure 4：Long FrameSync

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Figure 5：Short FrameSync

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5.4.2 Sign Extension and Zero Padding for 8-Bit and 13-Bit Samples
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For 16-bit linear PCM output, 3 or 8 unused bits may be sign extended/zero padded.
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Figure 6：16-Bit Output Data with 8-Bit PCM Sample Data and Sign Extension

Figure 7：16-Bit Output Data with 8-Bit PCM Sample Data and Zero Padding

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 FSC-BT826

Figure 8：16-Bit Output Data with 13-Bit PCM Sample Data and Sign Extension

For 16-bit linear PCM output, 3-bit programmable audio gain value can be padded to
13-bit sample data.

Figure 9：16-Bit Output Data with 13-Bit PCM Sample Data and Audio Gain
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5.4.3 PCM Interface Timing

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Figure 10：PCM Interface (Long FrameSync)

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 FSC-BT826

Figure 11：PCM Interface (Short FrameSync)

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Table 5: PCM Interface Clock Specifications

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Table 6: PCM Interface Timing

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5.4.4 PCM Interface Signal Levels

The PCM signal level ranges from 1.8V to 3.3V.

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 FSC-BT826

6. RECOMMENDED TEMPERATURE REFLOW PROFILE

The re-flow profiles are illustrated in Figure 11 and Figure 12 below.

 Follow: IPC/JEDEC J-STD-020 C

 Condition:
 Average ramp-up rate(217℃ to peak):1~2℃/sec max.
 Preheat:150~200C,60~180 seconds
 Temperature maintained above 217℃:60~150 seconds
 Time within 5℃ of actual peak temperature:20~40 sec.
 Peak temperature:250+0/-5℃ or 260+0/-5℃
 Ramp-down rate:3℃/sec.max.
 Time 25℃ to peak temperature:8 minutes max
 Cycloe interval：5 minus
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Figure 12: Typical Lead-free Re-flow Solder Profile

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 FSC-BT826

2420C

2170C
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Figure 13 : Typical Lead-free Re-flow

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The soldering profile depends on various parameters according to the use of different solder and
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material. The data here is given only for guidance on solder re-flow.
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FSC-BT826 will withstand up to two re-flows to a maximum temperature of 245°C.

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7. Reliability and Environmental Specification

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7.1 Temperature test

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Put the module in demo board which uses exit power supply, power on the module and connect to
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mobile. Then put the demo in the ‐20℃ space for 1 hour and then move to +70℃ space within
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1minute, after 1 hour move back to ‐20℃ space within1 minute. This is 1 cycle. The cycles are
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32 times and the units have to pass the testing.

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7.2 Vibration Test

The module is being tested without package. The displacement requests 1.5mm and sample is
vibrated in three directions(X,Y,Z).Vibration frequency set as 0.5G , a sweep rate of 0.1 octave/min
from 5Hz to 100Hz last for 90 minutes each direction. Vibration frequency set as 1.5G, a sweep rate of
0.25 octave/min from 100Hz to 500Hz last for 20 minutes each direction.

7.3 Desquamation test

Use clamp to fix the module, measure the pull of the component in the module, make sure the
module`s soldering is good.

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 FSC-BT826

7.4 Drop test

Free fall the module (condition built in a wrapper which can defend ESD) from 150cm height to
cement ground, each side twice, total twelve times. The appearance will not be damaged and all
functions OK.

7.5 Packaging information

After unpacking, the module should be stored in environment as follows:

 Temperature: 25℃ ± 2℃

 Humidity: <60%
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 No acidity, sulfur or chlorine environment

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The module must be used in four days after unpacking.

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8. Layout and Soldering Considerations

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8.1 Soldering Recommendations

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FSC-BT826 is compatible with industrial standard reflow profile for Pb-free solders. The reflow
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profile used is dependent on the thermal mass of the entire populated PCB, heat transfer efficiency of
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the oven and particular type of solder paste used. Consult the datasheet of particular solder paste for
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profile configurations.
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Feasycom will give following recommendations for soldering the module to ensure reliable solder
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joint and operation of the module after soldering. Since the profile used is process and layout
dependent, the optimum profile should be studied case by case. Thus following recommendation
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should be taken as a starting point guide.

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8.2 Layout Guidelines

It is strongly recommended to use good layout practices to ensure proper operation of the module.
Placing copper or any metal near antenna deteriorates its operation by having effect on the matching
properties. Metal shield around the antenna will prevent the radiation and thus metal case should not be
used with the module. Use grounding vias separated max 3 mm apart at the edge of grounding areas to
prevent RF penetrating inside the PCB and causing an unintentional resonator. Use GND vias all
around the PCB edges.

The mother board should have no bare conductors or vias in this restricted area, because it is not
covered by stop mask print. Also no copper (planes, traces or vias) are allowed in this area, because of
mismatching the on-board antenna.
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 FSC-BT826

Figure 14: FSC-BT826 Restricted Area

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Following recommendations helps to avoid EMC problems arising in the design. Note that each
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design is unique and the following list do not consider all basic design rules such as avoiding capacitive
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coupling between signal lines. Following list is aimed to avoid EMC problems caused by RF part of the
module. Use good consideration to avoid problems arising from digital signals in the design.
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Ensure that signal lines have return paths as short as possible. For example if a signal goes to an
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inner layer through a via, always use ground vias around it. Locate them tightly and symmetrically
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around the signal vias. Routing of any sensitive signals should be done in the inner layers of the PCB.
Sensitive traces should have a ground area above and under the line. If this is not possible, make sure
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that the return path is short by other means (for example using a ground line next to the signal line).
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9. Certificate
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Has passed BQB, SRRC, ROHS and Airsync certification.

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 FSC-BT826

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 FSC-BT826

10. Application Schematic

U2 Bluetooth connection status:

FSC-BT826 H = Connected
When bluetooth connection established, PIO10 L = No connection

H = instruction mode MCU_RX

1
UART_TX
34
2 PIO11 33
L = throughput mode MCU_TX UART_RX PIO10
3 32
4 UART_CTS PIO9 31 R13 560R BT work Status Indicator Light
TRANSFSER_MODE UART_RTS PIO8
5 30 LED
6 PCM_CLK PIO7 29
7 PCM_OUT PIO6 28
8 PCM_IN PIO5 27
DISCONNECT PCM_SYNC PIO4
9 26 PIO7 I2C_DATA
10 TRAN/AIO0 PIO3 25
When bluetooth connection established, DISC/AIO1 PIO2 PIO6 I2C_CLK
11 24
a riging edge of PIN 10 will cause disconnection with remote device. RESET 12 RESET PIO1 23
3V3_BT VDD_3V3 PIO0 I2C Interface
13 22
GND GND
C54 C4

BOOT0

SWCLK
SWDIO
100nF 10uF

GND
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NC
NC
14
15
16
17
18
19
20
21
PIO4

Features: a dormant state,

low level module is in operation mode,
The default is low. (internal 10K resistance drop)
High level said module is in sleep mode.
When writing to MCU when using the serial port,

BOOT0
SWDIO
this pin is connected with the high level. SWCLK

（Remarks）

The module reserved the power pin, ground ,reset ,SWCLK,SWDIO for test.
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R3 22R
TP7 SWDIO
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R10 22R
TP8 SWCLK

TP9 3V3_BT
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TP10 RESET

TP11
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(Optional) DEBUG Interface

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RESET (Optional)
RC Reset Circuit
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POWER 3V3_BT

(Optional)
Reset Circuit Based On Voltage Dual Comparators
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3V3_BT R4 100K R2
1 5 3V3_BT 10K
5V VIN VOUT
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3 4
C3 C2 EN BP C1 C6
GND

RESET
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10uF 10nF 10nF 10uF

2

1 10nF
VCC
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C14
J2

2 1 2
GND RESET RESET 100nF

U1
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CN809R-2.63V
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