00 01 10 11 Ab CD 00 01 11 10
00 01 10 11 Ab CD 00 01 11 10
00 01 10 11 Ab CD 00 01 11 10
com
x − sin x
1. lim equals
x →∞ x + cos x
(A) 1 (B) -1 (C) ∞ (D) −∞
5. In the Karnaugh map shown below, X denotes a don’t care term. What is the
minimal form of the function represented by the Karnaugh map?
ab
cd 00 01 11 10
00 1 1 1
01 X
11 X
10 1 1 X
(A) b.d + a.d (B) a.b + b.d + a.b.d (C) b.d + a.b.d (D) a.b + b.d + a.d
6. Let r denote number system radix. The only value(s) of r that satisfy the
equation 121r = 11r is / are
7. The most efficient algorithm for finding the number of connected components in
an undirected graph on n vertices and m edges has time complexity
(A) Θ (n) (B) Θ (m) (C) Θ (m + n) (D) Θ (mn)
8. Given f1, f3 and f in canonical sum of products form (in decimal) for the circuit
f1
f2 f
f1 = Σm ( 4,5, 6, 7, 8 )
f3
f3 = Σm (1, 6,15)
f = Σm (1, 6, 8,15)
then f2 is
9. {
Which of the following is true for the language ap p is a prime ?}
(A) It is not accepted by a Turing Machine
(B) It is regular but not context-free
(C) It is context-free but not regular
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(D) It is neither regular nor context-free, but accepted by a Turing machine
12. Some code optimizations are carried out on the intermediate code because
(A) They enhance the portability of the compiler to other target processors
(B) Program analysis is more accurate on intermediate code than on machine
code
(C) The information from dataflow analysis cannot otherwise be used for
optimization
(D) The information from the front end cannot otherwise be used for optimization
14. What is the maximum size of data that the application layer can pass on to the
TCP layer below?
(A) Any size (B) 216 bytes-size of TCP header
(C) 216 bytes (D) 1500 bytes
15. Which of the following tuple relational calculus expression(s) is/are equivalent to
∀t ∈ r (P ( t ) ) ?
I. ¬∃t ∈ r (P ( t ) )
II. ∃t ∉ r (P ( t ) )
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III. ¬∃t ∈ r ( ¬P ( t ) )
IV. ∃t ∉ r ( ¬P ( t ) )
17. Which of the following system calls results in the sending of SYN packets?
(A) socket (B) bind (C) listen (D) connect
18. Which combination of the integer variables x, y and z makes the variable a get
the value 4 in the following expression?
a = (x > y) ? ((x > z) ? x : z) : ((y > z) ? y : z)
(A) x = 3, y = 4, z = 2 (B) x = 6, y = 5, z = 3
(C) x = 6, y = 3, z = 5 (D) x = 5, y = 4, z = 5
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19. The Breadth First Search algorithm has been implemented using the queue data
structure. One possible order of visiting the nodes of the following graph is
M N O
R Q P
20. The data blocks of a very large file in the Unix file system are allocated using
(A) contiguous allocation
(B) linked allocation
(C) indexed allocation
(D) an extension of indexed allocation
21. www.way2freshers.com
The minimum number of equal length subintervals needed to approximate
2
1
∫1 xe dx to an accuracy of at least 3 × 10 u sin g the trapezoidal rule is
x −6
1 R
22. The Newton-Raphson iteration xn+1 = xn + can be used to compute the
2 xn
23. Which of the following statements is true for every planar graph on n vertices?
(A) The graph is connected
(B) The graph is Eulerian
(C) The graph has a vertex-cover of size at most 3n/4
(D) The graph has an independent set of size at least n/3
24. Let P = ∑
1≤i≤2k
i and Q = ∑
1≤i≤2k
i, where k is a positive integer. Then
i odd i even
29. Let X be a random variable following normal distribution with mean +1 and
variance 4. Let Y be another normal variable with mean -1 and variance
unknown. If P ( X ≤ −1) = P ( Y ≥ 2 ) , the standard deviation of Y is
30. Let fsa and pda be two predicates such that fsa(x) means x is a finite state
automaton, and pda(y) means that y is a pushdown automaton. Let equivalent
be another predicate such that equivalent (a, b) means a and b are equivalent.
Which of the following first order logic statements represents the following:
Each finite state automaton has an equivalent pushdown automaton
(A) ( ∀x fsa ( x )) ⇒ ( ∃y pda ( y ) ∧ equivalent ( x, y ) )
(B) ~ ∀y ( ∃x fsa ( x ) ⇒ pda ( y ) ∧ equivalent ( x, y ) )
31. P and Q are two propositions. Which of the following logical expressions are
equivalent?
I. P∨ ~ Q
II. ~ (~ P ∧ Q )
III. (P ∧ Q ) ∨ (P ∧ ~ Q ) ∨ (~ P ∧ ~ Q )
IV. (P ∧ Q ) ∨ (P ∧ ~ Q ) ∨ (~ P ∧ Q )
(A) Only I and II (B) Only I, II and III
(C) Only I, II and IV (D) All of I, II III and IV
32. For a magnetic disk with concentric circular tracks, the seek latency is not linearly
proportional to the seek distance due to
(A) non-uniform distribution of requests
(B) arm starting and stopping inertia
(C) higher capacity of tracks on the periphery of the platter
(D) use of unfair arm scheduling policies
33. Which of the following is/are true of the auto-increment addressing mode?
I. It is useful in creating self-relocating code
II. If it is included in an Instruction Set Architecture, then an additional ALU is
required for effective address calculation
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III. The amount of increment depends on the size of the data item accessed
(A) I only (B) II only (C) III only (D) II and III only
34. Which of the following must be true for the RFE (Return From Exception)
instruction on a general purpose processor?
I. It must be a trap instruction
II. It must be a privileged instruction
III. An exception cannot be allowed to occur during execution of an RFE
instruction
(A) I only (B) II only
(C) I and II only (D) I, II and III only
35. For inclusion to hold between two cache levels L1 and L2 in a multi-level cache
hierarchy, which of the following are necessary?
I. L1 must be a write-through cache
II. L2 must be a write-through cache
III. The associativity of L2 must be greater than that of L1
IV. The L2 cache must be at least as large as the L1 cache
(A) IV only (B) I and IV only
(C) I, II and IV only (D) I, II, III and IV
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37. The use of multiple register windows with overlap causes a reduction in the
number of memory accesses for
I. Function locals and parameters
II. Register saves and restores
III. Instruction fetches
(A) I only (B) II only (C) III only (D) I, II and III
38. In an instruction execution pipeline, the earliest that the data TLB (Translation
Lookaside Buffer) can be accessed is
(A) Before effective address calculation has started
(B) During effective address calculation
(C) After effective address calculation has completed
(D) After data cache lookup has completed
Which of the following statements about the asymptotic behaviour of f(n), g(n),
and h(n) is true?
(A) f (n) = O ( g (n) ) ; g (n) = O (h (n) ) (B) f (n) = Ω ( g (n) ) ; g (n) = O (h (n) )
(C) g (n) = O ( f (n) ) ; h (n) = O ( f (n) ) (D) h (n) = O ( f (n) ) ; g (n) = Ω ( f (n) )
41. A B-tree of order 4 is built from scratch by 10 successive insertions. What is the
maximum number of node splitting operations that may take place?
(A) 3 (B) 4 (C) 5 (D) 6
42. G is a graph on n vertices and 2n-2 edges. The edges of G can be partitioned into
two edge-disjoint spanning trees. Which of the following is NOT true for G?
(A) For every subset of k vertices, the induced subgraph has at most 2k-2 edges
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43. Consider the Quicksort algorithm. Suppose there is a procedure for finding a
pivot element which splits the list into two sub-lists each of which contains at
least one-fifth of the elements. Let T(n) be the number of comparisons required
to sort n elements. Then
(A) T (n) ≤ 2T (n / 5) + n (B) T (n) ≤ T (n / 5) + T ( 4n / 5) + n
−3
45. b e
1 2 1 1 2
−5
a c h f
2 3 2 3
2 g
d
Dijkstra’s single source shortest path algorithm when run from vertex a in the
above graph, computes the correct shortest path distance to
(A) only vertex a (B) only vertices a, e, f, g, h
(C) only vertices a, b, c, d (D) all the vertices
46. You are given the postorder traversal, P, of a binary search tree on the n
elements 1, 2,….,n. You have to determine the unique binary search tree that has
P as its postorder traversal. What is the time complexity of the most efficient
algorithm for doing this?
(A) Θ (logn) (B) Θ (n) (C) Θ (nlogn)
47. We have a binary heap on n elements and wish to insert n more elements (not
necessarily one after another) into this heap. The total time required for this is
(A) Θ (logn) (B) Θ (n) (C) Θ (nlogn) ( )
(D) Θ n2
49. Given below are two finite state automata (→ indicates the start state and F
indicates a final state)
a b a b
Y: →1 1 2 Z: →1 2 2
2 (F ) 2 1 2 (F ) 1 1
a b a b a b a b
→P S
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R →P S Q →P Q S →P S Q
(A) Q R S (B) Q R S (C) Q R S (D) Q S R
R (F ) Q P R (F ) Q P R (F ) Q P R (F ) Q P
S Q P S P Q S Q P S Q P
(A) E − P, F − R, G − Q, H − S (B) E − R, F − P, G − S, H − Q
(C) E − R, F − P, G − Q, H − S (D) E − P, F − R, G − S, H − Q
52. Match the following NFAs with the regular expressions they correspond to
P. Q. 1
1
1 0
1
0
0
0
0
0
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R. 1 S. 1
0 0
1 1
0
1 0 1
1. ε + 0 ( 01 * 1 + 00 ) * 01 *
2. ε + 0 (10 * 1 + 00 ) * 0
3. ε + 0 (10 * 1 + 10 ) * 1
4. ε + 0 (10 * 1 + 10 ) * 10 *
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(A) P − 2, Q − 1, R − 3, S − 4 (B) P − 1, Q − 3, R − 2, S − 4
(C) P − 1, Q − 2, R − 3, S − 4 (D) P − 3, Q − 2, R − 1, S − 4
55. An LALR(1) parser for a grammar G can have shift-reduce (S-R) conflicts if and
only if
(A) The SLR(1) parser for G has S-R conflicts
(B) The LR(1) parser for G has S-R conflicts
(C) The LR(0) parser for G has S-R conflicts
(D) The LALR(1) parser for G has reduce-reduce conflicts
56. In the slow start phase of the TCP congestion control algorithm, the size of the
congestion window
(A) does not increase (B) increases linearly
(C) increases quadratically (D) increases exponentially
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57. If a class B network on the Internet has a subnet mask of 255.255.248.0, what is
the maximum number of hosts per subnet?
(A) 1022 (B) 1023 (C) 2046 (D) 2047
60. www.way2freshers.com
What is printed by the following C program?
int f (int x, int * py, int * *ppz ) void main ( )
{ {
int y, z; int c, * b, * *a;
* *ppz + = 1; z = *ppz; c = 4; b = &c; a = &b;
* py + = 2; y = *py; pr int f (" %d", f ( c,b, a) ) ;
x + = 3; }
return x + y + z;
}
(A) 18 (B) 19 (C) 21 (D) 22
61. Choose the correct option to fill ? 1 and ? 2 so that the program below prints an
input string in reverse order. Assume that the input string is terminated by a
newline character.
void recerse ( void) {
int c;
if (?1) reverse ( ) ;
?2
}
main ( ) {
pr int f ("Enter Text ") ; pr int f ("\ n") ;
reverse ( ) ;pr int f ("\ n") ;
}
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? 2 is putchar ( c ) ;
62. The following C function takes a single-linked list of integers as a parameter and
rearranges the elements of the list. The function is called with the list containing
the integers 1,2,3,4,5,6,7 in the given order. What will be the contents of the list
after the function completes execution?
struct node {
int value;
struct node * next;
};
Void rearrange ( struct node * list ) {
struct node * p, * q;
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int temp;
if (!list !list − > next ) return;
p = list; q = list − > next;
while ( q) {
temp = p− > value;p− > value = q− > value;
q− > value = temp;p = q− > next;
q = p ? p− > next : 0;
}
}
(A) 1,2,3, 4,5, 6, 7 (B) 2,1, 4,3, 6,5, 7 (C) 1,3, 2,5, 4, 7, 6 (D) 2, 3, 4,5, 6, 7,1
P ( s ) : Pb ( xb ) ;
s = s − 1;
if ( s < 0) {
Vb ( xb ) ;
Pb ( yb ) ;
}
else Vb ( xb ) ;
V ( s ) : Pb ( xb ) ;
s = s + 1;
if ( s <= 0) Vb ( yb ) ;
Vb ( xb ) ;
64. Which of the following statements about synchronous and asynchronous I/O is
NOT true?
(A) An ISR is invoked on completion of I/O in synchronous I/O but not in
asynchronous I/O
(B) In both synchronous and asynchronous I/O, an ISR (Interrupt Service
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Routine) is invoked after completion of the I/O
(C) A process making a synchronous I/O call waits until I/O is complete, but a
process making an asynchronous I/O call does not wait for completion of the
I/O
(D) In the case of synchronous I/O, the process waiting for the completion of I/O
is woken up by the ISR that is invoked after the completion of I/O
65. Which of the following is NOT true of deadlock prevention and deadlock
avoidance schemes?
(A) In deadlock prevention, the request for resources is always granted if the
resulting state is safe
(B) In deadlock avoidance, the request for resources is always granted if the
result state is safe
(C) Deadlock avoidance is less restrictive than deadlock prevention
(D) Deadlock avoidance requires knowledge of resource requirements a priori
67. A processor uses 36 bit physical addresses and 32 bit virtual addresses, with a
page frame size of 4 Kbytes. Each page table entry is of size 4 bytes. A three
level page table is used for virtual to physical address translation, where the
virtual address is used as follows
• Bits 30-31 are used to index into the first level page table
• Bits 21-29 are used to index into the second level page table
• Bits 12-20 are used to index into the third level page table, and
• Bits 0-11 are used as offset within the page
The number of bits required for addressing the next level page table (or page
frame) in the page table entry of the first, second and third level page tables are
respectively
(A) 20, 20 and 20 (B) 24, 24 and 24 (C) 24, 24 and 20 (D) 25, 25 and 24
Where {P, Q} is the key for both schemas. Which of the following queries are
equivalent?
I. Π P (R S)
II. Π P (R ) ΠP ( S )
III. ΠP ( ΠP,Q (R ) ∩ ΠP,Q ( S ) )
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IV. ΠP ( Π (R ) − ( Π (R ) − Π ( S ) ) )
P,Q P,Q P,Q
70. Consider a file of 16384 records. Each record is 32 bytes long and its key field is
of size 6 bytes. The file is ordered on a non-key field, and the file organization is
unspanned. The file is stored in a file system with block size 1024 bytes, and the
size of a block pointer is 10 bytes. If the secondary index is built on the key field
of the file, and a multi-level index scheme is used to store the secondary index,
the number of first-level and second-level blocks in the multi-level index are
respectively
(A) 8 and 0 (B) 128 and 6 (C) 256 and 4 (D) 512 and 5
Consider a machine with a 2-way set associative data cache of size 64Kbytes and
block size 16bytes. The cache is managed using 32 bit virtual addresses and the
page size is 4Kbyts. A program to be run on this machine begins as follows:
double ARR 1024 1024;
int i, j ;
72. Which of the following array elements has the same cache index as ARR [0] [0]?
(A) ARR [0] [4] (B) ARR [4] [0] (C) ARR [0] [5] (D) ARR [5] [0]
77. The following code is to run on a pipelined processor with one branch delay slot:
I1 : ADD R2 ← R7 + R8
I2 : SUB R4 ← R5 − R6
I3 : ADD R1 ← R2 + R3
I4 : STORE Memory R4 ← R1
BRANCH to Label if R1 = = 0
Which of the instructions I1, I2, I3 or I4 can legitimately occupy the delay slot
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without any other program modification?
(A) I1 (B) I2 (C) I3 (D) I4
(A) X i, j = X i − 1, j ∨ X i, j − ai (B) X i, j = X i − 1, j ∨ X i − 1, j − ai
(C) X i, j = X i − 1, j ∧ X i, j − ai (D) X i, j = X i − 1, j ∧ X i − 1, j − ai
81. Which entry of the array X, if TRUE, implies that there is a subset whose
elements sum to W?
(A) X 1, W (B) X n, 0 (C) X n, W (D) X n − 1,n
M1 M2 M3 P1 P2 N1 N2
M R1 P R2 N
82.
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The minimum number of tables needed to represent M, N, P, R1, R2 is
(A) 2 (B) 3 (C) 4 (D) 5
83. Which of the following is a correct attribute set for one of the tables for the
correct answer to the above question?
(A) {M1,M2,M3,P1} (B) {M1,P1,N1,N2} (C) {M1,P1,N1} (D) {M1,P1}
84. On which of the following contents of Y and x does the program fail?
(A) Y is 1 2 3 4 5 6 7 8 9 10 and x < 10
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