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    Experiment #7 (Khurram Shahzad-FA18-BSE-019

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    Rana Ibrar
    The document describes an experiment to realize half and full subtractor circuits using basic and universal gates. It provides the theory of operation for half and full subtractors, including their truth tables. The procedure involves checking components, inserting ICs into bases, making connections as shown in circuit diagrams, and verifying the truth tables by observing outputs. Examples of implementing half and full subtractors using NAND gates in Proteus are also given.

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    Experiment #7 (Khurram Shahzad-FA18-BSE-019

    Uploaded by

    Rana Ibrar
    31 views6 pages
    The document describes an experiment to realize half and full subtractor circuits using basic and universal gates. It provides the theory of operation for half and full subtractors, including their truth tables. The procedure involves checking components, inserting ICs into bases, making connections as shown in circuit diagrams, and verifying the truth tables by observing outputs. Examples of implementing half and full subtractors using NAND gates in Proteus are also given.

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    Experiment #7(Khurram Shahzad-FA18-BSE-019

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    The document describes an experiment to realize half and full subtractor circuits using basic and universal gates. It provides the theory of operation for half and full subtractors, including their truth tables. The procedure involves checking components, inserting ICs into bases, making connections as shown in circuit diagrams, and verifying the truth tables by observing outputs. Examples of implementing half and full subtractors using NAND gates in Proteus are also given.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    31 views6 pages

    Experiment #7 (Khurram Shahzad-FA18-BSE-019

    Uploaded by

    Rana Ibrar
    The document describes an experiment to realize half and full subtractor circuits using basic and universal gates. It provides the theory of operation for half and full subtractors, including their truth tables. The procedure involves checking components, inserting ICs into bases, making connections as shown in circuit diagrams, and verifying the truth tables by observing outputs. Examples of implementing half and full subtractors using NAND gates in Proteus are also given.

    Copyright:

    © All Rights Reserved
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    of 6

    Experiment 7: Subtractors

    7.1 Aim:
    To realize the working of Half Subtractor and Full Subtractor by using Basic gates and NAND gates.

    7.2 Learning Objective:


    1. To realize the Subtractor circuits using basic gates and universal gates

    2. To realize a full Subtractor using two half Subtractor

    7.3 Components Required:


    3. Logic trainer

    4. 74LS08, 74LS86, 74LS32, 74LS00, 74LS04

    5. Connecting wires

    7.4 Theory:
    Half Subtractor: Subtracting a single-bit binary value B from another A (i.e. A B) produces a difference bit
    D and borrow bit B-out. This is called a half Subtractor. The Boolean functions describing the half-Subtractor
    are:

    D = A XOR B Br = A’B

    Figure 6.1: Half subtractor

    Full Subtractor: Subtracting two single-bit binary values, B, Cin from a single-bit value A produces a
    difference bit ‘D’ and borrows out ‘Br’ bit. This is called full subtraction. The Boolean functions describing
    the full-Subtractor are:

    D = (A xor B) xor Cin Br = A’. B +Bin . (A xor B)’.


    Figure 6.2: Full subtract

    Procedure:
    1. Check the components for their working.
    2. Insert the appropriate IC into the IC base.
    3. Make connections as shown in the circuit diagram.
    4. Verify the Truth Table and observe the outputs.

    Half Subtractor:

    Inputs Outputs

    A B D Br

    0 0 0 0

    0 1 1 1

    1 0 1 0

    1 1 0 0

    Table 6.1: Half subtractor

    Full Subtractor:

    Inputs Output
    B
    A B C D r

    0 0 0 0 0
    0 0 1 1 1
    0 1 0 1 1
    0 1 1 0 1
    1 0 0 1 0
    1 0 1 0 0
    1 1 0 0 0
    1 1 1 1 1

    Table 6.2: Full subtractor


    VIVA Questions:

    1. What is a full Subtractor?


    Answer: full subtractor is a combinational circuit that performs subtraction of two bits, one is minuend
    and other is subtrahend, taking into account borrow of the previous adjacent lower minuend bit. This
    circuit has three inputs and two outputs. The three inputs A, B and Bin, denote the minuend, subtrahend,
    and previous borrow, respectively.

    2. What are the applications of Subtractor?


    Answer: Adder and subtractor are basically used for performing arithmetical functions like addition, subtraction, mu
    division in electronic calculators and digital instruments. They are also used in microcontrollers for arithmetic addition
    counter) and timers.

    3. Draw and Implement half Subtractor and full Subtractor using NAND Gate?

    Implement half Subtractor using NAND Gate:


    Implement the half Subtractor in proteus:
    When all switches is off:

    When upper switch is ON:

    When lower switch is ON:

    When all Switches is ON:

    Implement the Full Subtractor in proteus:


    When all switches is OFF:
    When upper switch is ON:

    When middle switch is ON:

    When lower two switches is ON:

    When Lower switch is ON:

    When upper and lower switch is ON:


    When two upper switches is ON:

    When all switches is ON:

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