A Modified Sepic Converter With High Static Gain For Renewable Applications
A Modified Sepic Converter With High Static Gain For Renewable Applications
A Modified Sepic Converter With High Static Gain For Renewable Applications
fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2013.2296053, IEEE Transactions on Power Electronics
Roger Gules, Member IEEE, Walter Meneghette dos Santos, Flavio Aparecido dos Reis, Eduardo Felix
Ribeiro Romaneli and Alceu André Badin, Member IEEE
Abstract
Two high static gain step-up DC-DC converters based An application where the proposed converters can be
on the modified SEPIC converter are presented in this applied is the photovoltaic energy generation in grid
paper. The proposed topologies present low switch connected systems using the AC module or microinverter
voltage and high efficiency for low input voltage and high structure [2]. The usual structure used for high power grid
output voltage applications. The configurations with connected photovoltaic generation is the centralized inverter
magnetic coupling and without magnetic coupling are where several PV modules are connected in series in order to
presented and analyzed. The magnetic coupling allows obtain the DC voltage level necessary for the inverter
the increase of the static gain maintaining a reduced operation and the energy transference to the grid with low
switch voltage. The theoretical analysis and experimental current harmonic distortion. However, a common problem in
results show that both structures are suitable for high this structure is the power losses due to the centralized
static gain applications as a renewable power sources maximum power point tracking (MPPT), mismatch losses
with low DC output voltage. Two experimental among the PV modules and generation reduction due to a
prototypes were developed with an input voltage equal to partial shading of the series connected PV modules [2]. Some
15 V and an output power equal to 100 W. The efficiency of these problems are minimized with the multi-string
at nominal power obtained with the prototype without structure where reduced strings are connected with DC-DC
magnetic coupling was equal to 91.9% with an output converters with the MPPT algorithm and the output of these
voltage of 150 V. The prototype with magnetic coupling DC-DC converters are connected to the inverter input.
operating with an output voltage equal to 300 V, presents However, in residential applications, most research is
an efficiency at nominal power equal to 92.2%. focused on the module integrated converters where the
energy generated by a single PV module is transferred to the
Index Terms: DC-DC power conversion, Voltage multiplier grid by a dedicated converter integrated with the PV module
and Solar power generation. [3]. Some of the main advantages of this PV generation
structure are the modularity, allowing an easy increase of the
installed power, the individual MPPT and reduction of the
I. INTRODUCTION partial shading and panel mismatching effects, thus
improving the energy harvesting capability. However, there
are some design challenges in AC module structure as the
The development of high static gain DC-DC converters is efficiency improvement, cost reduction and the reliable
an important research area due to the crescent demand of this operation throughout the module lifetime. An alternative for
technology for several applications supplied by low DC the AC module implementation is a two-stage topology as
output voltage power sources. Some examples are renewable presented in Fig. 1. The operation with high efficiency is a
energy sources as low power wind turbine, photovoltaic (PV) problem for the DC-DC converter due to the low input
modules and other applications as fuel-cells, embedded voltage, high input current, high output voltage and static
systems, portable electronic equipments, uninterruptable gain.
power supply and battery powered equipment [1]. Commercial monocrystalline and multicrystalline PV
Some requirements are normally necessary in these module presents normally a maximum output power (PMPP)
applications as reduced losses, high power density, low lower than 350W with maximum power point voltage (VMPP)
weight and volume. The high efficiency operation is range from 15V to 40 V [3]. Common specifications
particularly important, mainly for battery powered systems depending on the number of photovoltaic cells are
and high cost power sources. PMPP=100W with VMPP=15 V, PMPP=200W with VMPP=30 V
and PMPP=300W with VMPP=40 V. In this work the
Manuscript received xxx x5, 2013; revised xxxx , 2013; accepted xxx, specification of PMPP=100W with VMPP=15 V was
2013. Date of current version December xx,xxx. This work was supported in considered, but increasing the PV module power, the voltage
part by Fundação Araucária and Paraná State Government. Recommended also increases at the maximum power point. In this condition,
for publication by Associate Editor xxx.
R. Gules, W. M. Santos, F. A. Reis, E. F. R. Romaneli and A. A. Badin are DC-DC converter input current and the converter conduction
with the Federal University of Technology, Curitiba, PR 80230901,Brazil losses are maintained almost at the same level.
(e-mail: rgules@gmail.com; wmeneghette@gmail.com; When a high step-up ratio is necessary for the
flavioa.reis@hotmail.com; eduardo.romaneli@gmail.com; implementation of the first power stage, the usual solution is
handreh@gmail.com>).
Digital Object Identifier xxxxxxxxxxxxxxxxxxxx the use of isolated DC-DC converters.
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2013.2296053, IEEE Transactions on Power Electronics
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2013.2296053, IEEE Transactions on Power Electronics
Many operational characteristics of the classical SEPIC equal to the VCM voltage. Therefore, the switch voltage will
converter are changed with the proposed modification, as the be lower than the converter output voltage.
elevation of the converter static gain. The capacitor CM is Vo 1 + D (1)
charged with the output voltage of the classical boost =
Vi 1 − D
converter. The polarity of the CS capacitor voltage is inverted
in the proposed converter and the expressions of the VCM 1 (2)
=
capacitors voltages and other operation characteristics are Vi 1− D
presented in the theoretical analysis. The voltage across the CS capacitor is calculated by (3).
The continuous conduction mode (CCM) of the modified VCS D
SEPIC converter presents two operation stages. All = (3)
capacitors are considered as a voltage source and the Vi 1− D
semiconductors are considered ideals for the theoretical
analysis. The static gain of the classical SEPIC, boost and
1) First Stage [t0 - t1] (Fig. 4) - At the instant t0, switch S is modified SEPIC converters are presented in Fig. 7. As it can
turned-off and the energy stored in the input inductor L1 is be observed in this figure, with a duty-cycle equal to
transferred to the output through the CS capacitor and output D=0.818, a static gain equal to 10 is obtained and the switch
diode Do and also is transferred to the CM capacitor through voltage is equal to 5.5 times the input voltage. Therefore, the
the diode DM. Therefore, the switch voltage is equal to the switch voltage is close to half of the output voltage.
CM capacitor voltage. The energy stored in the inductor L2 is The theoretical analysis, operation stages and waveforms
transferred to the output through the diode Do. of the modified SEPIC converter operating in discontinuous
2) Second Stage [t1 - t2] (Fig. 5) - At the instant t1, switch S is conduction mode (DCM) is not presented in this paper.
turned-on and the diodes DM and Do are blocked and the However, the static gain and the CM and CS capacitor
inductors L1 and L2 store energy. The input voltage is applied voltages operating in DCM are presented in equations (4), (5)
to the input inductor L1 and the voltage VCS-VCM is applied to and (6) respectively.
the inductor L2. The VCM voltage is higher than the VCS
voltage.
The main theoretical waveforms operating with hard-
switching commutation are presented in Fig. 6.
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2013.2296053, IEEE Transactions on Power Electronics
3) L1 and L2 inductance
The current ripple ( iL) of the inductors L1 and L2 are
calculated by the same equation. Considering L1 equal to L2
and an input current ripple equal to 5 A, the inductance value
is calculated by (10). The average current value of the L1
inductance is equal to the input current and the average
current value of the L2 inductance is equal to the output
current.
V ⋅ D 15 ⋅ 0.8182 (10)
L1 = L 2 = i = = 102 µH
∆i L ⋅ f 5 ⋅ 24 ⋅ 103
4) Capacitors CS and CM
The capacitors CS and CM present the same voltage
ripple. The capacitance can be calculated by the capacitor
Fig. 7. Converters static gain. charge variation, considering null the capacitor series
equivalent resistance. Normally, a small capacitance value is
obtained and a capacitor with low series equivalent resistance
Vo Vi ⋅ D 2 (4)
= 1+ can be used. Considering a capacitor voltage ripple ∆VC
Vi 2 ⋅ i o ⋅ L eq ⋅ f equal to 10% of the nominal voltage of the CM capacitor, the
capacitances are calculated by (11).
VCM Vi ⋅ D 2 (5)
= 1+
Vi 4 ⋅ i o ⋅ L eq ⋅ f Io 0.667 (11)
CS = CM = = = 3.37 µF
2 ∆Vc ⋅ f 8.25 ⋅ 24 ⋅ 10 3
VCS Vi ⋅ D (6)
= Where:
Vi 4 ⋅ i o ⋅ L eq ⋅ f
Vi 10 15 (12)
Where: ∆VC = ⋅ = ⋅ 0.1 = 8.25
L ⋅L 1 − D 100 1 − 0. 8182
L eq = 1 2 (7)
5) Semiconductor current effort
L1 + L 2
The average current of the diodes IDM and IDo are equal to
the output current Io.
B. Design Considerations of the Proposed Converter without
P 100 (13)
Magnetic Coupling I Do = I DM = I o = o = = 0.667A
The main equations to design the modified SEPIC Vo 150
converter without magnetic coupling shown in Fig. 3 The switch current is equal the sum of the currents of the
operating in CCM, are presented with an example inductance L1 and L2. The switch current is a trapezoidal
considering the following specifications: waveform as presented in Fig. 6. I1 is the switch current at
the beginning of the turn-on period (t1) calculated by (14)
Output Power: Po = 100 W
and I2 is the switch current at the end of the turn-on period
Input Voltage: Vi = 15 V
(t2) calculated by (15), considering a theoretical efficiency
Output Voltage: Vo=150V
Switching Frequency: f=24 kHz equal to η=92%.
The RMS switch current is calculated by (16).
1) Switch duty-cycle
Considering the static gain presented in (1), the nominal P ∆ P ∆ (14)
converter duty-cycle is calculated by (8). I1 = o − iL + o − iL
V
i ⋅ η 2 Vo 2
V − V 150 − 15 (8)
D= o i = = 0.8182 100 5.1 100 5.1
Vo − Vi 150 + 15 I1 = − + − = 2 .8 A
15 ⋅ 0.92 2 15 2
2) Switch and diodes voltages P ∆ P ∆ (15)
The switch voltage (Vs) and the voltage across the diode I 2 = o + iL + o + iL
V
i ⋅ η 2 Vo 2
DM are equal to the voltage of the capacitor CM. The
theoretical output diode voltage (VDo) is equal to the output 100 5.1 100 5.1
voltage minus the voltage across the capacitor CS and the I2 = + + + = 13.02 A
15 ⋅ 0.92 2 15 2
result is the same calculated by (9).
Vs = VDo = VDM =
Vi
=
15
1 − D 1 − 0.8182
= 82.5V (9) IS RMS =
1
3
(
⋅ I12 + I1 ⋅ I 2 + I 2 2 ⋅ D) (16)
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2013.2296053, IEEE Transactions on Power Electronics
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2013.2296053, IEEE Transactions on Power Electronics
Fig. 11. Second operation stage. Fig. 15. Main theoretical waveforms of the modified SEPIC converter with
magnetic coupling and voltage multiplier at the secondary side.
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2013.2296053, IEEE Transactions on Power Electronics
n ⋅ Vi 2.6 ⋅ 15
VDo = VDM 2 = Vo − VCM = = = 215.5V (21)
1 − D 1 − 0.819
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2013.2296053, IEEE Transactions on Power Electronics
will be very high and the diode reverse recovery current will IV. EXPERIMENTAL RESULT
occurs increasing the commutation losses. With the inclusion
of a leakage inductance, the voltage applied across the The experimental results were obtained with the
leakage inductance referred to the primary side at the switch implementation of the prototype presented in Fig. 17. The
turn-on is approximately equal to (20) and the limitation of circuits presented in Fig. 3 and in Fig. 9 were implemented
the di/dt in the output diode by the leakage inductance is following the parameters presented in Table I. The
calculated by (23). components used in the prototypes are shown in Table II.
di Vi (23)
=
dt (1 − D ) ⋅ Lr ⋅ n
Therefore, considering a maximum di/dt equal to 25 A/µs
[5], the minimum value of the leakage inductance is
calculated by (24).
Vi 15 (24)
Lr = = = 1.27 µH
(1 − D ) ⋅ di ⋅ n (1 − 0.819) ⋅ 25 ⋅ 10 6 ⋅ 2.6
dt
4) Capacitors CS and CM
The voltage ripple of the capacitor CS2 is calculated by
the same equation (8) of the converter without magnetic
coupling. The capacitors CS1 and CM present the same
voltage ripple and are calculated by the equation (12)
multiplied by the inductor windings turns ratio (n), as
presented in equation (26), considering a capacitor voltage
ripple ∆VC equal to 15% of the nominal voltage of the CM
capacitor .
Io ⋅ n 0.333 ⋅ 2.6 (26)
C S1 = C M = = = 2.9 µF
∆Vc ⋅ f 12.4 ⋅ 24 ⋅ 10 3
Where:
V (27)
V 15 15 15 (27)
∆VC = i ⋅ = ⋅ = 12.4V
1 − D 100 1 − 0. 819 100
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2013.2296053, IEEE Transactions on Power Electronics
from Fig. 18 to Fig. 22 operating with a resistive load equal The current and voltage of the output diode is presented in
to 100 W. Figure 18 shows the input current, the switch Fig. 21. A diode reverse recovery current can be observed in
voltage and current and the output voltage. The output this figure and the output diode voltage is clamped at the
voltage is equal to 150 V and the switch voltage is close to output voltage value.
the theoretical value 83 V. The detail of the hard-switching
commutation is presented in Fig. 19.
Figure 20 shows the L1 and L2 inductor current. The
average value of the L1 current is equal to the input current
and the average value of L2 inductor is equal to the output
current.
Fig.21. Output diode Do voltage (CH1) and current (CH4) of the modified
SEPIC converter without magnetic coupling (5 A/div, 50 V/div, 5 µs/div).
Fig.18. Input current (CH4), output voltage (CH3), switch current (CH2) and
voltage (CH1) of the modified SEPIC converter without magnetic coupling
(10 A/div, 50 V/div,10 µs/div).
Fig.22. Reverse recovery current of the output diode Do (CH4) and output
diode Voltage (CH1) of the modified SEPIC converter without magnetic
coupling (2 A/div, 50 V/div, 100 ns/div).
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2013.2296053, IEEE Transactions on Power Electronics
Fig.26. Output diode Do voltage (CH1) and current (CH2) of the Modified
Fig.23. Input current (CH4), output voltage (CH3), switch current (CH2) and
SEPIC converter with magnetic coupling (2 A/div, 50 V/div, 2.5 µs/div).
switch voltage (CH1) of the Modified SEPIC converter with magnetic
coupling and voltage multiplier (10 A/div, 50 V/div,10 µs/div).
The operation of the converter with magnetic coupling
with output power lower than the nominal value are
presented in Fig. 27 and Fig. 28.
Figure 27 presents the operation with input voltage equal
to 15 V and output power equal to 50 W. The ZCS turn-on
commutation is not dependent of the load and is maintained
in continuous conduction mode at light load.
The operation with an input voltage equal to 24 V and
output power equal to 50 W is presented in Fig.28. The
converter operates in discontinuous conduction mode with
these specifications.
The efficiency curves of the proposed converters
measured with the digital power meter (Yokogawa WT230)
are presented in Fig. 29. The modified SEPIC converter
Fig. 24. Switch current (CH2) and switch voltage (CH1) of the Modified without magnetic coupling (black line) presents efficiency
SEPIC converter with magnetic coupling and voltage multiplier equal to 91.9% at the nominal power and the modified
(2 A/div, 50 V/div, 1 µs/div). SEPIC converter with magnetic coupling and voltage
multiplier (gray line) presents efficiency equal to 92.2% at
the nominal output power.
Fig. 25. L1 (CH3) and L2 (CH4) inductor current of the Modified SEPIC
converter with magnetic coupling (5 A/div, 10 µs/div).
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2013.2296053, IEEE Transactions on Power Electronics
ACKNOWLEDGEMENT
Fig.28. Input current (CH3), output voltage (CH2), switch current (CH4) and The authors would like to thank the Fundação Araucária and
switch voltage (CH1) of the Modified SEPIC converter with magnetic Paraná State Government for financial support.
coupling and voltage multiplier operating with Vi=24 V and Po=50 W
(5 A/div, 50 V/div, 5 µs/div).
REFERENCES
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2013.2296053, IEEE Transactions on Power Electronics
IEEE Transaction on Power Electronics, vol. 25, no. 11, Electronics, vol. 20, no. 5, pp. 1025- 1035, September
pp. 2753–2761, Nov. 2010. 2005.
[11] R. J. Wai, R. Y. Duan, “High-efficiency Power [18] F. L. Tofoli, D. S. Oliveira Jr., R. P. Torrico-Bascope
Conversion for Low Power Fuel Cell Generation and Y. J. A. Alcazar, “Novel Non isolated High-Voltage
System”, IEEE Transactions on Power Electronics, vol. Gain DC–DC Converters Based on 3SSC and VMC”,
20, no.5, pp. 847-856, September 2005. IEEE Transactions on Power Electronics, vol. 27, no. 9,
[12] W. Li and X. He, “An Interleaved Winding-Coupled pp. 3897- 3907, September 2012.
Boost Converter With Passive Lossless Clamp Circuits”, [19] W. Li, Y. Zhao, Y. Deng and X. He, “Interleaved
IEEE Transactions on Power Electronics, vol. 22, no. 4, Converter With Voltage Multiplier Cell for High Step-
pp. 1499- 1507, July 2007. Up and High-Efficiency Conversion”, IEEE Transactions
[13] W. Li and X. He, “A Family of Interleaved DC–DC on Power Electronics, vol. 25, no. 9, pp. 2397- 2408,
Converters Deduced From a Basic Cell With Winding- September 2010.
Cross-Coupled Inductors (WCCIs) for High Step-Up or [20] A. A. Fardoun, E. H. Ismail, “Ultra Step-Up DC–DC
Step-Down Conversions”, IEEE Transactions on Power Converter With Reduced Switch Stress”, IEEE
Electronics, vol. 23, no. 4, pp. 1791-1801, July 2008. Transactions on Industry Applications, vol. 46, no. 5, pp.
[14] H.-W. Seong, H.-S. Kim, K.-B. Park, G.-W. Moon and 2025-2034, September 2010.
M.-J. Youn, “High Step-Up DC-DC Converters Using [21] S. Kim, D.-K. Choi, S.-J. Jang, T.-W. Lee, and C.-Y.
Zero-Voltage Switching Boost Integration Technique Won, "The Active Clamp SEPIC- Flyback Converter",
and Light-Load Frequency Modulation Control”, IEEE IEEE 36th Power Electronics Specialists Conference,
Transactions on Power Electronics, vol. 27, no. 3, pp. 2005 (PESC '05), pp. 1209-1212, June 2005.
1383- 1400, March 2012. [22] K. Park, G. Moon, and M.-J. Youn, "Nonisolated High
[15] T.J. Liang and K.C. Tseng, “Analysis of Integrated Step-Up Boost Converter Integrated With SEPIC
Boost-Fyback Step-Up Converter”, IEE Proc.-Electr. Converter", IEEE Transactions on Power Electronics,
Power Appl., vol. 152, no. 2, March 2005. vol. 25, no. 9, pp. 2266-2275, Sept. 2010.
[16] R.-J. Wai, C.-Y. Lin, R.-Y. Duan and Y.-R. Chang, [23] K. Park, H.-W. Seong, H.-S. Kim, G.-W. Moon, and M.-
“High-Efficiency DC-DC Converter With High Voltage J. Youn, "Integrated Boost-SEPIC Converter for High
Gain and Reduced Switch Stress”, IEEE Transaction on Step-Up Applications", IEEE Power Electronics
Industrial Electronics, vol. 54, no. 1, pp. 354- 364, Specialists Conference 2008 (PESC 2008), pp. 944-950,
February 2007. June 2008.
[17] R.-J. Wai and R.-Y Duan, “High Step-Up Converter
With Coupled-Inductor”, IEEE Transactions on Power
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.