Advanced UVM: Understanding The Factory and Configuration
Advanced UVM: Understanding The Factory and Configuration
…
endfunction
Unrestricted | © Siemens | Verification Academy: Advanced UVM | March 2021
Overriding a Type
class test extends uvm_test;
New Desired
function void build_phase(uvm_phase phase);
type
e = my_env::type_id::create(“e”, this); All Instances
shape::type_id::set_type_override( circle::get_type() ); Overridden
…
endfunction
Unrestricted | © Siemens | Verification Academy: Advanced UVM | March 2021
Overriding an Instance
class test extends uvm_test; New Desired type
function void build_phase(uvm_phase phase);
Instance Name
e = my_env::type_id::create(“e”, this);
shape::type_id::set_type_override( circle::get_type() ); Instance
shape::type_id::set_inst_override( triangle::get_type(), “e.u2”, this ); Changed
…
endfunction
Unrestricted | © Siemens | Verification Academy: Advanced UVM | March 2021
Using Parameterized Types
class test extends uvm_test; class red #(int SIDES=3)
function void build_phase(uvm_phase phase); extends uvm_component;
e = my_env::type_id::create(“e”, this); `uvm_component_param_utils(red#(SIDES))
shape::type_id::set_type_override( circle::get_type() );
shape::type_id::set_inst_override( triangle::get_type(), “e.u2”, this );
endmodule: top
Command line: vsim +UVM_TESTNAME=test
Unrestricted | © Siemens | Verification Academy: Advanced UVM | March 2021
Tests are Components, too!
Always call run_test() with null argument
endmodule: top
Command line: vsim +UVM_TESTNAME=test2
Unrestricted | © Siemens | Verification Academy: Advanced UVM | March 2021
Use the Factory for Objects, too
class test extends uvm_test;
`uvm_component_utils(test)
…
virtual function void build_phase(phase);
e = my_env::type_id::create(“env”, this);
my_seq::type_id::set_type_override(my_seq2::get_type());
endfunction
endclass class my_env extends uvm_env;
virtual function void run_phase(uvm_phase phase);
rseq = my_seq::type_id::create(“rseq”);
endfunction
class my_seq2 extends my_seq;
`uvm_object_utils(my_seq2)
…
endclass
test
test set e.y = 4
set e.a.d.x = 4 Path Value
env
env {test .e.a.d.x} 4
get y;
set a.d.x = 3 {test.e .a.d.x} 3 set a.y = y
agent {test.e.a .d.x} 2 agent
set d.x = 2; get y;
{test.e.a.d .x} 1
set d.y = y;
driver Highest Write
get x = 2
1
4
3 Wins driver
get y = 4
Unrestricted | © Siemens | Verification Academy: Advanced UVM | March 2021
uvm_config_db
Uses a set/get() API
• No casting on get()
• Linked to component hierarchy