Unit-1& at QB With Answers

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QUESTION BANK 2020

SIDDHARTH GROUP OF INSTITUTIONS:


PUTTUR
Siddharth Nagar, Narayanavanam Road – 517583
QUESTION BANK (DESCRIPTIVE)

Subject with Code:FAA( 20EC4209) Branch & Specialization: ECE – VLSI


Year & Sem: I-M.Tech & II-Sem Regulation: R20

UNIT –I

PROGRAMMABLE LOGIC

1.(a)Draw the structure of PAL and explain it. [5M]


(b)Draw the logic diagram of MAX 7000 CPLD macrocell and explain its Functioning. [5M]
2.(a) Draw the structure of PLA and explain it. [5M]
(b) Explain the LAB of Altera max 7000 CPLD with a neat structural diagram. [5M]
3. (a) Implement the following Boolean function using PLA having 3 inputs ,3product terms and
2 outputs.
F1 (A,B,C) = AB’ C’+A B’C+ABC
F2 (A,B,C) = A’B C +A B’ C+ABC [5M]
(b) Explain Cypress FLAH 370 family of CPLDs. [5M]

Cypress has family of CPLD products similar to Advanced Micro Devices and lattice devices.
The Cypress CPLDs, FLASH370 is based on FLASH EEPROM technology. The FLASH370 parts are
not in-system programmable. Figure below shows that FLASH370 has a typical CPLD architecture
with multiple PAL blocks and a programmable interconnect matrix to connect them. Within each PAL
block, there is an AND-array that feeds a product term allocator. This illustrates another type of
flexibility available in PAL-like blocks in CPLDs, but not present in normal PALs.

Fig_Cypress FLASH370 CPLDs


4 (a) Compare PLA, PAL and PLDs with respect to different features, programming and
Applications. [5M]

PLA:
(b) Explain and draw the architecture of lattice ISPLSI CPLD. [5M]
5.(a) Explain and draw the architecture of AMD Mach 4 CPLD. [5M]
(b) Explain the architecture of Altera flex 10Kseries CPLD. [5M]
6. (a) Explain the ROM organization with neat diagrams. [5M]
.
(b) Discuss about speed performance and in-system programmability of lattice PLST’s architecture in
3000 series. [5M]
UNIT –II

FPGA & CASE STUDIES

1.(a) Write about FPGA Programming Technologies in detail. [5M]


(b) What is an FPGA ? Mention the advantages & disadvantages of FPGA. [5M]
Benefits or advantages of FPGA:

Following are the benefits or advantages of FPGA:


➨FPGAs can be programmed at logic level. Hence it can implement faster and parallel processing of
signals. This is difficult to be executed by processor.
➨Unlike ASIC which are fixed once programmed, FPGAs are programmable at software level at any
time. Hence FPGA IC can be re-programmed or reused any number of times. FPGA can also be
programmed from remote locations.
➨FPGA ICs are readily available which can be programmed using HDL code in no time. Hence the
solution is available faster to the market.
➨Unlike ASIC which requires huge NRE (Non Recurring Expenses) and costly tools, FPGA
development is cheaper due to less costly tools and no NRE.
➨In FPGA design, software takes care of routing, placement and timing. This makes lesser manual
intervention. The design flow eliminates complex and time consuming place and router, floor planning
and timing analysis.

\
Drawbacks or disadvantages of FPGA:

Following are the disadvantages of FPGA:


➨The programming of FPGA requires knowledge of VHDL/Verilog programming languages as well
as digital system fundamentals. The programming is not as simple as C programming used in
processor based hardware. Moreover engineers need to learn use of simulation tools.
➨The power consumption is more and programmers do not have any control on power optimization in
FPGA. No such issues in ASIC.
➨Once any particular FPGA is selected and used in the design, programmers need to make use of
resources available on the FPGA IC. This will limit the design size and features. TO avoid such
situation, appropriate FPGA need to be chosen at the beginning itself.
➨FPGAs are better for prototyping and low quantity production. When the quantity of FPGAs to be
manufactured increases, cost per product also increases. This is not the case with ASIC
implementation.
2.(a) Draw the architecture of Altera flex 8000 FPGAs and Explain it. [5M]
(b) Draw the structure of Actel FPGAs and explain it. [5M]
3. (a) Explain the functions of different blocks in Xilinx XC4000 CLB. [5M]
(b) Draw the design flow of field programmable gate arrays. [5M]
4.(a) Draw and explain the routing architecture of field programmable gate arrays. [5M]
(
b) Explain the architecture and speed performance of Actel’s ACT2 FPGA family. [5M]
5. (a)Draw the architecture of Altera flex 10000 FPGAs and Explain it. [5M]
(b) List out the applications of FPGAs. [5M]
6. (a) Describe Technology Mapping for FPGAs. [5M]
(b) Explain the AT&T ORCA FPGAs. [5M]

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