P870DMG Esm

P870DM / P870DM-G
Preface
Notebook Computer
P870DM / P870DM-G
Service Manual
Preface
I
Preface
Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface
Version 1.0
October 2015
Trademarks
Intel and Intel Core are trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and/or registered trademarks of their respective companies.
II
Preface
About this Manual

This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the P870DM /
P870DM-G series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Appendix A, Part Lists
Preface
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS
III
Preface
IMPORTANT SAFETY INSTRUCTIONS

Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output
of 19.5V, 11.8A (230 Watts) minimum AC/DC Adapter.
Preface
IV
Preface
Instructions for Care and Operation

The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.
2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on
Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.
3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.
V
Preface
4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
 5. Take care when using peripheral devices.
Removal Warning Use only approved brands of Unplug the power cord before
When removing any peripherals. attaching peripheral devices.
cover(s) and screw(s)
for the purposes of de-
vice upgrade, remem-
ber to replace the
cover(s) and screw(s)
before restoring power
to the system.
Also note the following

when the cover is re-
moved: Power Safety
Preface
• Hazardous mov- The computer has specific power requirements:

ing parts.
• Keep away from • Only use a power adapter approved for use with this computer.
moving fan blades • Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
• The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
Power Safety not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
Warning • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
Before you undertake • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
any upgrade proce- • Before cleaning the computer, make sure it is disconnected from any external power supplies.
dures, make sure that
you have turned off the
power, and discon- Do not plug in the power Do not use the power cord if Do not place heavy objects
nected all peripherals cord if you are wet. it is broken. on the power cord.
and cables (including
telephone lines and
power cord). You must
also remove your bat-
tery in order to prevent
accidentally turning the
machine on.
VI
Preface
Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.
Battery Guidelines
The following can also apply to any backup batteries you may have.
Preface
• If you do not use the battery for an extended period, then remove the battery from the computer for storage.
• Before removing the battery for storage charge it to 60% - 70%.
• Check stored batteries at least every 3 months and charge them to 60% - 70%.

Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under var-
ious state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturer’s instructions.
Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.
VII
Preface
Related Documents
You may also need to consult the following manual for additional information:
User’s Manual on Disc

This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.
System Startup
1. Remove all packing materials.
2. Place the computer on a stable surface.
3. Insert the battery and make sure it is locked in
position.
Preface
4. Securely attach any peripherals you want to use with

the computer (e.g. keyboard and mouse) to their
ports.
5. Attach the AC/DC adapter to the DC-In jack at the
133°
rear of the computer, then plug the AC power cord
into an outlet, and connect the AC power cord to the
AC/DC adapter (make sure you use the adapter
when first setting up the computer, as to safe-
guard the computer during shipping the battery will
be locked to not power the system until first con-
nected to the AC/DC adapter).
6. Use one hand to raise the lid/LCD to a comfortable
viewing angle (do not to exceed 135 degrees); use Figure 1
the other hand (as illustrated in Figure 1) to support Opening the Lid/LCD/
the base of the computer (Note: Never lift the Computer with AC/DC
Adapter Plugged-In
computer by the lid/LCD).
7. Press the power button to turn the computer “on”.
VIII
Preface
Contents
Introduction ..............................................1-1 Top ................................................................................................. A-3
Bottom .......................................................................................... A-4
Overview .........................................................................................1-1 LCD ............................................................................................... A-5
External Locator - Top View with LCD Panel Open ......................1-4 MB (GX VGA) .............................................................................. A-6
External Locator - Front & Right side Views .................................1-5 MB (GXX VGA) ........................................................................... A-7
External Locator - Left Side & Rear View .....................................1-6 MB (2 VGA) .................................................................................. A-8
External Locator - Bottom View .....................................................1-7 VGA (N16E-GT) ........................................................................... A-9
Mainboard Overview - Top (Key Parts) .........................................1-8 VGA (N16E-GX) ......................................................................... A-10
Mainboard Overview - Bottom (Key Parts) ....................................1-9 VGA (N16E-GXX) ...................................................................... A-11
Mainboard Overview - Top (Connectors) .....................................1-10 HDD ............................................................................................. A-12
Mainboard Overview - Bottom (Connectors) ...............................1-11
Disassembly ...............................................2-1 Schematic Diagrams................................. B-1
Block Diagram ................................................................................B-2
Preface
Overview .........................................................................................2-1
Processor 1/5 ...................................................................................B-3
Maintenance Tools ..........................................................................2-2 Processor 2/5 ...................................................................................B-4
Connections .....................................................................................2-2
Processor 3/5 ...................................................................................B-5
Maintenance Precautions .................................................................2-3
Processor 4/5 ...................................................................................B-6
Disassembly Steps ...........................................................................2-4 Processor 5/5 ...................................................................................B-7
Removing the Battery ......................................................................2-5
DDR4 CHA SO-DIMM_0 ..............................................................B-8
Removing the Hard Disk Drive .......................................................2-7
DDR4 CHA SO-DIMM_1 ..............................................................B-9
Removing the Primary System Memory (RAM) .........................2-10
DDR4 CHB SO-DIMM_0 ............................................................B-10
Removing the System Memory (RAM) from Under the Keyboard ..2-
DDR4 CHB SO-DIMM_1 ............................................................B-11
12
MXM 3.0 Master ..........................................................................B-12
Removing and Installing the Video Card ......................................2-14
MXM 3.0 Slave ............................................................................B-13
Removing and Installing the Processor .........................................2-18
Panel, Inverter ...............................................................................B-14
Removing the Wireless LAN Module ...........................................2-21
HDMI ............................................................................................B-15
Wireless LAN, Combo Module Cables .........................................2-22
SPT-H 1/7 .....................................................................................B-16
Removing the M.2 SSD-1 Module ................................................2-23
SPT-H 2/7 .....................................................................................B-17
Removing the M.2 SSD-2 Module ................................................2-24
SPT-H 3/7 .....................................................................................B-18
Part Lists ..................................................A-1 SPT-H 4/7 .....................................................................................B-19
Part List Illustration Location ........................................................ A-2 SPT-H 5/7 .....................................................................................B-20
IX
Preface
SPT-H 6/7 ..................................................................................... B-21 Finger Sensor Board .....................................................................B-53

SPT-H 7/7 ..................................................................................... B-22 Power Switch LED Board ............................................................B-54
Main EC IT8587 ........................................................................... B-23 Audio Codec .................................................................................B-55
Second EC IT8587 ....................................................................... B-24 Audio Board (Speaker) .................................................................B-56
TPM SLB9665TT ........................................................................ B-25 Audio Board (Subwoofer) ............................................................B-57
CPU, VGA Fan Conn ................................................................... B-26 Audio Jack ....................................................................................B-58
Backlight Keyboard ...................................................................... B-27 Power Sequence ............................................................................B-59
CCD, USB Charging .................................................................... B-28 Updating the FLASH ROM BIOS......... C-1
AR_TBT ....................................................................................... B-29
AR_Power .................................................................................... B-30
TPS65982 ..................................................................................... B-31
Mini Display Port A ..................................................................... B-32
Mini Display Port B ..................................................................... B-33
M.2 WLAN+BT ........................................................................... B-34
Preface
M.2 M Key, B Key ....................................................................... B-35

RTS5250 ....................................................................................... B-36
LAN_1E2400 ............................................................................... B-37
LAN_2 E2400 .............................................................................. B-38
Click, Finger Conn ....................................................................... B-39
HDD & Second HDD ................................................................... B-40
USB Port ...................................................................................... B-41
5VS, 3.3VS, 1.0 V Series ............................................................. B-42
2.5V, 5VS_2 ................................................................................. B-43
AMP10V, VCCSA ....................................................................... B-44
DDR4 VDDQ & VTT, VCCPLL_OC ......................................... B-45
Power Charger, DC IN ................................................................. B-46
VCCIO, 1.0VA ............................................................................. B-47
VCore & VCCGT ......................................................................... B-48
VCore & VCCGT Output Stage ................................................... B-49
VDD3, VDD5 ............................................................................... B-50
Charger LED Board ..................................................................... B-51
Click Board .................................................................................. B-52
X
Introduction
Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the P870DM / P870DM-G series notebook computer.
Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information
about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the computer.
Operating systems (e.g. Windows 8.1, etc.) have their own manuals as do application software (e.g. word processing and
database programs). If you have questions about those programs, you should consult those manuals.
The P870DM / P870DM-G series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed
1.Introduction
description of the upgrade procedures for each specific component. Please note the warning and safety information indi-
cated by the “” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.
Overview 1 - 1
Introduction
Specifications Processor Options Pointing Device

Intel® Core™ i7 Processor Built-in Touchpad (scrolling key functionality integrated)
i7-6700K (4.00GHz)* Keyboard
8MB Smart Cache, 14nm, DDR4-2133MHz, TDP 91W Full Color Illuminated Full-size Winkey Keyboard (with
 Intel® Core™ i5 Processor numeric keypad and anti-ghost keys)
Latest Specification Information i5-6600K (3.50GHz)* Audio
6MB Smart Cache, 14nm, DDR4-2133MHz, TDP 91W High Definition Audio Compliant Interface
The specifications listed here are correct at the
i5-6500 (3.20GHz) S/PDIF Digital Output
time of sending them to the press. Certain items
(particularly processor types/speeds) may be 6MB Smart Cache, 14nm, DDR4-2133MHz, TDP 65W Two Speakers
changed, delayed or updated due to the manu- i5-6400 (2.70GHz) Sound Blaster Audio
facturer's release schedule. Check with your 6MB Smart Cache, 14nm, DDR4-2133MHz, TDP 65W ANSP™ 3D Sound Technology on Headphone Output
service center for more details. *Support Intel® XTU over-clocking technology Built-In Array Microphone
Video Adapter Options Sub-Woofer
1.Introduction
NVIDIA® GeForce GTX 980M PCIe Video Card

External 7.1CH Audio Output Supported by Headphone,
8GB GDDR5 Video RAM on board
Microphone, Line-In and S/PDIF Out Jacks
Supports NVIDIA® SLI Technology
 NVIDIA® GeForce GTX 970M PCIe Video Card
Storage
6GB GDDR5 Video RAM Two changeable 2.5" (6cm) 7.0mm (h)/ 9.5mm (h) SATA
CPU
(Serial) Hard Disk Drives/Solid State Drives (SSD) support-
Supports NVIDIA® SLI Technology
The CPU is not a user serviceable part. Ac- ing RAID level 0/1
cessing the CPU in any way may violate your NVIDIA® GeForce GTX 980 PCIe Video Card
(Factory Option) Two M.2 SATA 2280 SSDs supporting
warranty. 8GB GDDR5 Video RAM RAID level 0/1
LCD Options Or
17.3" (43.94cm), 16:9, QFHD (3840x2160)/FHD (1920x1080) (Factory Option) Two M.2 PCIe
Gen3 x4 2280 SSDs supporting RAID level 0/1
Core Logic Security
Intel® Z170 Chipset Security (Kensington® Type) Lock Slot
BIOS BIOS Password
Fingerprint Reader Module
AMI BIOS (64Mb SPI Flash-ROM)
Trusted Platform Module 2.0
Memory
Four 260 Pin SO-DIMM Sockets Supporting DDR4 2133MHz
Memory
(The real memory operating frequency depends on the FSB
of the processor.)
Memory Expandable from 4GB (minimum) up to 64GB
(maximum)
1 - 2 Overview
Introduction
Interface Environmental Spec

One USB 3.1 Port/Thunderbolt Port Temperature
Five USB 3.0 Ports (Including one AC/DC Powered USB Operating: 10°C - 35°C
port) Non-Operating: -20°C - 60°C
One HDMI-Out Port Relative Humidity
Two Mini DisplayPorts (1.2) Operating: 20% - 80%
One S/PDIF Out Jack Non-Operating: 10% - 90%
One Headphone/Speaker-Out Jack Power
One Microphone-In Jack
Embedded 8-cell Smart Lithium-Ion Battery Pack, 89WH
One Line-In Jack
Two RJ-45 LAN Jacks Full Range AC/DC Adapter
One DC-In Jack AC Input: 100 - 240V, 50 - 60Hz
DC Output: 19.5V, 16.9A (330W)
M.2 Slots
Slot 1 for Combo WLAN and Bluetooth Module
Dimensions & Weight
1.Introduction
Slot 2 for SATA or PCIe Gen3 x4 SSD 428mm (w) * 308mm (d) * 45mm (h)
Slot 3 for SATA or PCIe Gen3 x4 SSD 4.8kg (Barebone System with 1 Video Card and 89WH Bat-
tery)
Communication
Built-In Gigabit Ethernet LAN
2.0M FHD PC Camera Module
WLAN/ Bluetooth M.2 Modules:
(Factory Option) Intel® Wireless-N 7265 Wireless LAN
(802.11b/g/n) + Bluetooth 4.0
(Factory Option) Intel® Wireless-AC 3165 Wireless LAN
(802.11ac) + Bluetooth 4.0
(Factory Option) Intel® Wireless-AC 8260 Wireless LAN
(802.11ac) + Bluetooth 4.1
(Factory Option) Qualcomm® Atheros Killer™ Wireless-AC
1535 Wireless LAN (802.11ac) + Bluetooth 4.1
(Factory Option) Third-Party Wireless LAN 802.11b/g/n +
Bluetooth 4.0
Card Reader
Embedded Multi-In-1 Push-Push Card Reader
MMC (MultiMedia Card) / RS MMC
SD (Secure Digital) / Mini SD / SDHC/ SDXC (up to UHS-
II)
Overview 1 - 3
Introduction
Figure 1
External Locator - Top View with LCD Panel Open
Top View
1. PC Camera
2. PC Camera LED 3 2 1 3
3. Built-In Array
Microphone
4. LCD
5. Speakers
6. Power Button
7. LED Indicators 4
8. Keyboard
1.Introduction
9. TouchPad and
Buttons
10. Fingerprint
Reader (Optional)
5 5
7 6 7
10
1 - 4 External Locator - Top View with LCD Panel Open

Introduction
External Locator - Front & Right side Views Figure 2

Front Views
1. LED Power
Indicators
2. Vents
Front
1
2 2
1.Introduction
Figure 3
Right Side Views
1. Multi-in-1 Card
Reader
Right 2. USB 3.0 Port
3. USB 3.1 Port/
1 2 3 4 5 6 Thunderbolt Port
4. Mini Display Port 2
5. Mini Display Port 1
6. Security Lock Slot
External Locator - Front & Right side Views 1 - 5

Introduction
External Locator - Left Side & Rear View

Figure 4
Left Side View
1. RJ-45 LAN Jacks
2. USB 3.0 Ports
3. Powered USB 3.0
Port
Left
4. Line-In Jack
5. Microphone Jack
2 2 3 4 5 6 7
6. Headphone Jack 1 1
7. S/PDIF-Out Jack
1.Introduction
Figure 5
Rear View
1. Vent/Fan Intake
2. HDMI-Out Port Rear
3. USB 3.0 Port
4. DC-In Jack 1 2 3 1
4
1 - 6 External Locator - Left Side & Rear View

Introduction
External Locator - Bottom View Figure 6

Bottom View
1. Vents
2. Sub Woofer
1.Introduction
1

Overheating
To prevent your com-

puter from overheating
make sure nothing
blocks the vent/fan in-
takes while the com-
puter is in use.
External Locator - Bottom View 1 - 7

Introduction
Figure 7 Mainboard Overview - Top (Key Parts)

Mainboard Top
Key Parts
1. Memory Slots
DDR4 SO-DIMM
2. Platform
Controller Hub
3. KBC ITE IT8587
1.Introduction
3 3
2
1 - 8 Mainboard Overview - Top (Key Parts)

Introduction
Mainboard Overview - Bottom (Key Parts) Figure 8

Mainboard Bottom
Key Parts
1. VGA-Card
Connector
2. CPU Socket (no
CPU installed)
3. Memory Slots
DDR4 SO-DIMM
(Primary)
4. Hard Disk
2 Connector
1.Introduction
3
1 1
4 4
Mainboard Overview - Bottom (Key Parts) 1 - 9

Introduction
Figure 9 Mainboard Overview - Top (Connectors)

Mainboard Top
Connectors
1. RJ-45 LAN Jacks

2. USB 3.0 Ports
3. Powered USB 3.0
Port
4. Multi-in-1 Card
Reader
5. USB 3.1 Port
6. Display Port 2 12
1
1.Introduction
7. Display Port 1
8. KB LED 13
Connector 1 14 7
9. TP Connector
10. WLAN Card 2 6
Connector 10 11
11. Keyboard Cable 2 5
Connector 8 2
11
12. Panel Cable 3 9
Connector 13
13. M.2 Card 4
Connector
14. Button LED
Connector
1 - 10 Mainboard Overview - Top (Connectors)

Introduction
Mainboard Overview - Bottom (Connectors) Figure 10

Mainboard Bottom
Connectors
1. HDMI-Out Port
2. USB 3.0 Port
3. DC-In Jack
1 2 3
4. 126 Pin Audio
Connector
5. 22 Pin Audio
Connector
6. 6 Pin Audio
Connector
1.Introduction
7. Battery
Connector
5 6
7
4
Mainboard Overview - Bottom (Connectors) 1 - 11

Introduction
1.Introduction
1 - 12
Disassembly
Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the P870DM / P870DM-G series notebook’s parts and
subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
repeated here for your convenience.
2.Disassembly
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a  
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.
A box with a  will also provide any possible helpful information. A box with a  contains warnings.
An example of these types of boxes are shown in the sidebar.


Warning
Overview 2 - 1
Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away from its socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.
2 - 2 Overview
Disassembly
Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re- 
moval and/or replacement job, take the following precautions: Power Safety
Warning
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
Before you undertake
components could be damaged. any upgrade proce-
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. dures, make sure that
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag- you have turned off the
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor power, and discon-
the position of magnetized tools (i.e. screwdrivers). nected all peripherals
and cables (including
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly telephone lines and
damaged. power cord). You must
5. Be careful with power. Avoid accidental shocks, discharges or explosions. also remove your bat-
2.Disassembly
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. tery in order to prevent
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. accidentally turning the
6. Peripherals – Turn off and detach any peripherals. machine on.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Overview 2 - 3
Disassembly
Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery: To remove and install the Processor:

1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the video card page 2 - 14
To remove the HDD: 3. Remove the processor page 2 - 18
1. Remove the battery page 2 - 5 4. Install the processor page 2 - 20
2. Remove the HDD page 2 - 7
To remove the WLAN Module:
To remove the Primary System Memory:
2.Disassembly
1. Remove the battery page 2 - 5

1. Remove the battery page 2 - 5 2. Remove the keyboard page 2 - 12
2. Remove the system memory page 2 - 10 3. Remove the wireless LAN page 2 - 21
To remove the System Memory under the To remove the M.2 SSD:
Keyboard: 1. Remove the battery page 2 - 5
1. Remove the battery page 2 - 5 2. Remove the keyboard page 2 - 12
2. Remove the keyboard page 2 - 12 3. Remove the M.2 SSD-1 page 2 - 23
3. Remove the system memory page 2 - 13 4. Remove the M.2 SSD-2 page 2 - 24
To remove and install the Video Card:

1. Remove the battery page 2 - 5
2. Remove the video card-2 page 2 - 14
3. Install the video card page 2 - 17
2 - 4 Disassembly Steps
Disassembly
Removing the Battery Figure 1

1. Turn the computer off, and turn it over. Battery Removal
2. Remove the screws 1 - 9 (Figure 1a).
a. Remove the screws.
3. Carefully lift the bottom case 10 up in the direction of the arrow 11 and remove it (Figure 1b). b. Remove the bottom case.
4. The battery will be visible at point 12 on the computer (Figure 1c). c. Locate the battery.
a. 3 5 b.
4
10
2.Disassembly
11
9
2 6
1 8 7
c.
10

10. Bottom Case
12
• 9 Screws
Removing the Battery 2 - 5

Disassembly
5. Carefully remove screws 13 - 16 (Figure 2b).

Figure 2
6. Lift the battery 17 off the computer (Figure 2e).
Battery Removal
7. Reinsert the bottom case starting from point 18 as shown (Figure 2f) to avoid damaging the rear eSATA/USB 3.0
(cont’d.)
port. Tighten the screws to secure the bottom case in place.
d. Remove the screws.
e. Lift the battery off the
computer. d. e.
14 15
f. Reinsert the bottom case
and tighten the screws.
13 16
2.Disassembly
18 17
f.
18

17. Battery
• 4 Screws
2 - 6 Removing the Battery

Disassembly
Removing the Hard Disk Drive Figure 3

HDD Assembly
The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 7mm/
Removal
9.5mm (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as out-
lined in Chapter 4 of the User’s Manual) when setting up a new hard disk. a. Locate the HDD.
b. Remove the screws.
Hard Disk Removal Process
1. Turn off the computer, and remove the battery (page 2 - 5).
2. The HDD(s) will be visible at point 1 on the mainboard (Figure 3a).
3. Remove screws 2 / 3 from the HDD assembly (Figure 3b).
a. b.
2.Disassembly
1 1 2 3

HDD System Warning 
New HDD’s are blank. Before you begin make sure:
You have backed up any data you want to keep from your old HDD. • 2 Screws
You have all the CD-ROMs and FDDs required to install your operating system and programs.
If you have access to the internet, download the latest application and hardware driver updates for
the operating system you plan to install. Copy these to a removable medium.
Removing the Hard Disk Drive 2 - 7

Disassembly
4. Slightly lift the hard disk assembly 4 at an angle and pull it in the direction of arrow 5 (Figure 4c).
Figure 4 5. Remove the hard disk assembly out of the bay.
HDD Assembly 6. Remove screws 6 - 7 and bracket 8 from the hard disk 9 (Figure 4d).
Removal (cont’d.)
7. Reverse the process to install a new hard disk (do not forget to replace the screws).
c. Slightly lift and pull the
HDD in the direction of c. d. 7
the arrow.
d. Remove the screws and
bracket from the HDD. 8
6
9
5 5
2.Disassembly
e.
4 4 
Installing 9.5mm or 7mm HDD
Note that the hard disks pictured on the following pages are all
7mm(h) hard disk drive.
There are two hard disk drive options:

 Two changeable 2.5" (6cm) 7.0mm (h) SATA (Serial) Hard Disk
Drives/Solid State Drives (SSD) supporting RAID level 0/1
4. HDD Assembly Or
8. HDD Bracket One changeable 2.5" (6cm) 9.5mm (h) SATA (Serial) Hard Disk
9. HDD 4 Drive/Solid State Drive (SSD)
• 2 Screws For more information, contact your distributor/supplier, and bear in

mind your warranty terms.
2 - 8 Removing the Hard Disk Drive

Disassembly
Hard Disk Size Note (Foam Rubber Insert)

Note that the hard disks pictured on these pages are all 9.5mm(H) hard disk drives. In some cases 7mm(H) hard disk
drives will be installed.
Figure 5
Foam Rubber
Insert for 7mm(H)
2.Disassembly
HDDs
• If you are replacing a 9.5mm(H)

HDD with a 7mm(H) HDD then
insert the foam rubber insert.
HDD-1 HDD-2
• If you are replacing a 7mm(H) HDD
with a 9.5mm(H) HDD then remove
the foam rubber insert.
Removing the Hard Disk Drive 2 - 9

Disassembly
Figure 6 Removing the Primary System Memory (RAM)

RAM Module
Removal
The computer has four memory sockets for 260 pin Small Outline Dual In-line (SO-DIMM) DDR 4 type memory modules.
The total memory size is automatically detected by the POST routine once you turn on your computer.
a. Locate the module.
b. Gently pull the two Note that four SO-DIMMs are only supported by Quad-Core CPUs; Dual-Core CPUs support two SO-DIMMs maxi-
release latches on mum.
the sides of the
memory socket(s) in Two primary memory sockets are located under component bay cover (the bottom case cover), and two secondary
the direction indicat- memory sockets are located under the keyboard (not user upgradable). If you are installing only two RAM modules
ed below.
c. The RAM module
then they should be installed in the primary memory sockets under the component bay cover.
will pop-up, and you
can remove it.
Note that the RAM located under the keyboard is not user upgradable.
2.Disassembly
Memory Upgrade Process

1. Turn off the computer, and turn it over, remove the battery (page 2 - 5).
2. The modules will be visible at point 1 (Figure 6a).
3. Gently pull the two release latches ( 2 & 3 ) on the sides of the memory socket(s) in the direction indicated below
(Figure 6b).
4. The RAM module 4 will pop-up, and you can remove it (Figure 6c).
a. b. c.
2 3 4
1

4. RAM Module
2 - 10 Removing the Primary System Memory (RAM)

Disassembly
5. Pull the latches to release the second module if necessary.

6. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
7. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it
will go. DO NOT FORCE the module; it should fit without much pressure.
8. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
9. Replace the bay cover and screws.
10. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.

Contact Warning
Be careful not to touch the metal pins on the module’s connecting
2.Disassembly
edge. Even the cleanest hands have oils which can attract particles,
and degrade the module’s performance.
Removing the Primary System Memory (RAM) 2 - 11

Disassembly
Figure 7 Removing the System Memory (RAM) from Under the Keyboard
Keyboard
Removal The computer has four memory sockets for 260 pin Small Outline Dual In-line (SO-DIMM) DDR 4 type memory modules.
The total memory size is automatically detected by the POST routine once you turn on your computer.
a. Remove the screw.
b. Eject the keyboard
Two primary memory sockets are located under component bay cover (the bottom case cover), and two secondary
using a special eject
stick to push the memory sockets are located under the keyboard. If you are installing only two RAM modules then they should be in-
keyboard out while stalled in the primary memory sockets under the component bay cover.
releasing the key-
board as shown. Memory Upgrade Process
1. Turn off the computer, and turn it over, remove the battery (page 2 - 5).
2. Remove the screw 1 (Figure 7a).
3. Open it up with the LCD on a flat surface before pressing at point 2 to release the keyboard module (use an eject
2.Disassembly
stick 3 with a diameter no bigger than 2.5mm) to do this while releasing the keyboard in the direction of the
arrow 4 as shown (Figure 7b).
a. b.
4
1
2
3

3. Eject Stick
• 1 Screw
2 - 12 Removing the System Memory (RAM) from Under the Keyboard

Disassembly
4. Carefully lift the keyboard 5 up, being careful not to bend the keyboard ribbon cables 6 - 8 . Figure 8
5. Disconnect the keyboard ribbon cables 6 - 8 from the locking collar socket 9 by using a small flat-head screw- KB & RAM Module
driver to pry the locking collar pins 10 away from the base (Figure 8c). Removal
6. Remove the keyboard and the memory sockets 11 & 12 will be visible (Figure 8d).
7. Gently pull the two release latches ( 13 & 14 ) on the sides of the memory socket(s) in the direction indicated below. c. Lift the keyboard up,
8. The RAM module 15 will pop-up, and you can remove it (Figure 8e). and disconnect the
9. Pull the latches to release the second module if necessary. keyboard ribbon cable
10. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot. from the locking collar
11. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it socket.
d. Remove the keyboard
will go. DO NOT FORCE the module; it should fit without much pressure. and the memory sock-
12. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. ets will be visible.
13. Replace the keyboard, bay cover and screws. e. Pull the two release
14. Restart the computer to allow the BIOS to register the new memory configuration as it starts up. latches on the sides of
2.Disassembly
the memory socket(s)
c. d. in the direction indicat-
6 ed.
7 11
9
10 10 12
8 10 10 9
9
e.
 15
Contact Warning 14 13
Be careful not to touch the metal pins on the mod- 15 

ule’s connecting edge. Even the cleanest hands 5. Keyboard
have oils which can attract particles, and degrade 14 13
15 15. RAM Modules
the module’s performance.
Removing the System Memory (RAM) from Under the Keyboard 2 - 13

Disassembly
Figure 9 Removing and Installing the Video Card

Video Card-2
Video Card-2 Removal Procedure
Removal Procedure
1. Turn off the computer, turn it over and remove the battery (page 2 - 5).
a. Remove the screws in
2. Remove screws 1 - 4 from the heat sink unit in the order indicated on the label (i.e screw 4 first through to
the correct order. screw 1 last) (Figure 9a).
b. Carefully remove the 3. Carefully (it may be hot) remove the heat sink unit 5 (Figure 9b).
heat sink units. 4. Remove the connector 6 and screws 7 & 8 from the video card. The video card 9 will pop up.
c. Remove the video card 5. Remove the video card 9 (Figure 9d).
cable connector and
screws. The video card a. b.
will pop up.
d. Remove the video card. 
2.Disassembly
Heat Sink Screw Removal

5 and Insertion
Remove the screws from the heat
sink in the order indicated here: 4-
 3-2-1.
Caution 2 4
When tightening the screws,
The heat sink, and video make sure that they are tightened
card area in general, in the order: 1-2-3-4.
contains parts which are 3 1
subject to high tempera-
tures. Allow the area
time to cool before re-
moving these parts.
c. d.
 9
5. Heat Sink Unit 6
9. Video Card 9
• 6 Screws 8 7
9 9
2 - 14 Removing and Installing the Video Card

Disassembly
Video Card-1 Removal Procedure Figure 10

1. Turn off the computer, turn it over and remove the battery (page 2 - 5) and Video card-2 (page 2 - 14). Video Card-1
2. Remove screws 1 - 4 from the heat sink unit in the order indicated on the label (i.e screw 4 first through to Removal Procedure
screw 1 last) (Figure 10a).
3. Carefully (it may be hot) remove the heat sink unit 5 (Figure 10b). a. Remove the screws in
4. Remove connector 6 (in case of two video cards) and screws 7 & 8 from the video card. The video card 9 the correct order.
will pop up (Figure 10c). b. Carefully remove the
5. Remove the video card 9 (Figure 10d). heat sink units.
c. Remove the video card
a. b. cable connector and
 screws. The video card
will pop up.
5 Heat Sink Screw Removal d. Remove the video card.
and Insertion
2.Disassembly
3-2-1.

2 4 When tightening the screws, Caution
make sure that they are tightened
in the order: 1-2-3-4. The heat sink, and video
card area in general,
3 1 contains parts which are
d. subject to high tempera-
moving these parts.
c.
6
9 
7 8
5. Heat Sink Unit
9. Video Card
9
• 6 Screws
Removing and Installing the Video Card 2 - 15

Disassembly
Figure 11 Video Card-3 Removal Procedure

Video Card-3 1. Turn off the computer, turn it over and remove the battery (page 2 - 5) and Video card-2 (page 2 - 14).
Removal Procedure 2. Remove screws 1 - 4 from the heat sink unit in the order indicated on the label (i.e screw 4 first through to
screw 1 last) (Figure 10a).
a. Remove the screws in
3. Carefully (it may be hot) remove the heat sink unit 5 (Figure 10b).
the correct order. 4. Remove connector 6 and screws 7 & 8 from the video card. The video card 9 will pop up (Figure 10c).
b. Carefully remove the 5. Remove the video card 9 (Figure 10d).
heat sink units.
c. Remove the video card a. b.
cable connector and
screws. The video card

will pop up. 5 Heat Sink Screw Removal
d. Remove the video card. and Insertion
2.Disassembly

4 2 3-2-1.
 When tightening the screws,

make sure that they are tightened
Caution
1 3 in the order: 1-2-3-4.
The heat sink, and video
contains parts which are d.
moving these parts. c.
6
9
 8
7
5. Heat Sink Unit
9. Video Card
9
• 6 Screws
2 - 16 Removing and Installing the Video Card

Disassembly
Installing a New Video Card Figure 12

1. Prepare to fit the video card 9 into the slot by holding it at about a 30° angle (Figure 12e). Installing a New
2. The card needs to be fully into the slot, and the video card and socket have a guide-key and pin which align to Video Card
allow the card to fit securely (Figure 12f).
3. Fit the connectors firmly into the socket, straight and evenly. e. Insert the video card at
a 30 degree angle.
f. Fit the connectors
e. f.
straight and even, and
secure the card with the
10 screws.
2.Disassembly
11 
Caution
The heat sink, and video

contains parts which are
4. DO NOT attempt to push one end of the card in ahead of the other. tures. Allow the area
5. The card’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the socket time to cool before re-
moving these parts.
as it will go. DO NOT FORCE the card; it should fit without much pressure.
6. Secure the card with screws 10 & 11 (Figure 10 on page 2 - 15).
7. Place the heat sink back on the card, and secure the screws in the order indicated in Figure 10 on page 2 - 15.
8. Reinsert the component bay cover, and secure with the screws as indicated in Figure 2 on page 2 - 6.

9. Video Card
• 2 Screws
Removing and Installing the Video Card 2 - 17

Disassembly
Figure 13 Removing and Installing the Processor

Processor
Removal
Processor Removal Procedure
Procedure 1. Turn off the computer, remove the battery (page 2 - 5) and video card-2 heatsink (page 2 - 14).
2. Remove screws 1 - 4 from the heat sink unit in the order indicated on the label (i.e screw 4 first through to
a. Remove the screws screw 1 last Figure 13a).
in the correct order. 3. Carefully (it may be hot) remove the heat sink unit 5 (Figure 13b).
b. Carefully remove
the heat sink unit.
a. b.
5
4 1
2.Disassembly
2 3
Note:
Loosen the screws in the reverse
order 4-3-2-1 as indicated.

5. Heat Sink Unit
• 4 Screws
2 - 18 Removing and Installing the Processor

Disassembly
4. Press down and hold the latch 6 (with the latch held down you will be able to release it).
5. Move the latch 6 and bracket 7 fully in the direction indicated to unlock the CPU(Figure 14c).
6. Carefully (it may be hot) lift the CPU A up out of the socket (Figure 14d). Figure 14
7. See page 2 - 20 for information on inserting a new CPU. Processor Removal
8. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!). (cont’d)
c. c. Move the latch and

bracket fully in the direc-
tion indicated to unlock
7 the CPU.
d. Lift the CPU out of the
socket.
2.Disassembly
6
6
Unlock
d.

A Caution
The heat sink, and CPU area in

general, contains parts which are
subject to high temperatures. Al-
low the area time to cool before re-
moving these parts.

A. CPU
Removing and Installing the Processor 2 - 19

Disassembly
Figure 15 Processor Installation Procedure

Processor 1. Insert the CPU A ; pay careful attention to the pin alignment (Figure 15a), it will fit only one way (DO NOT FORCE
Installation IT!).
2. Move the bracket B and latch C fully in the direction indicated to lock the CPU.
a. Insert the CPU. 3. Apply the thermal grease D to the top of the CPU as shown (Figure 15b).
b. Move the latch and 4. Insert the heat sink unit E as indicated in Figure 15c.
bracket fully in the direc-
5. Tighten the CPU heat sink screws in the order 1 - 4 (the order as indicated on the label and Figure 15d).
tion indicated to lock the
CPU. Apply thermal 6. Replace the CPU fan, component bay cover and tighten the screws (page 2 - 18).
grease.
c. Insert the heat sink. a. b.
d. Tighten the screws.
B
A
2.Disassembly
C
C
Note:
Tighten the screws in
the order 1-2-3-4 as in-
c. d. dicated.
E
 4 1
A. CPU
E. Heat Sink
2 3
• 4 Screws
2 - 20 Removing and Installing the Processor

Disassembly
Removing the Wireless LAN Module Figure 16

1. Turn off the computer, remove the battery (page 2 - 5) and the keyboard (page 2 - 12). Wireless LAN
2. The Wireless LAN module will be visible at point 1 under the keyboard (Figure 16a). Module Removal
3. Carefully disconnect cables 2 - 3 , then remove screw 4 from the module socket (Figure 16b).
4. The Wireless LAN module 5 will pop-up (Figure 16c). a. The Wireless LAN mod-
5. Lift the Wireless LAN module (Figure 16d) up and off the computer. ule will be visible at point
. 1 under the keyboard
b. Disconnect the cables
a. c. and remove the screw.
c. The WLAN module will
pop up.
d. Lift the WLAN module
1 out.
2.Disassembly
5
b. d.
3 5

4
5. WLAN Module
2
• 1 Screw
Removing the Wireless LAN Module 2 - 21

Disassembly
Wireless LAN, Combo Module Cables

Note that the cables for connecting to the antennae on WLAN, WLAN & Bluetooth Combo, 3G and LTE modules are
not labelled. The cables/covers (each cable will have either a black or transparent cable cover) are color coded for iden-
tification as outlined in the table below.
Antenna Cable Cover

Module Type Cable Color
Type Type
WM 1 Black
WLAN/WLAN & Bluetooth
WM 2 Gray Transparent
Combo
WM 3 White
2.Disassembly
Cable 1 is usually connected to antenna 1 (Main) on the module, and cable 2 to antenna 2 (Aux).
2 - 22 Wireless LAN, Combo Module Cables

Disassembly
Removing the M.2 SSD-1 Module Figure 17

M.2 SSD-1 Module
1. Turn off the computer, remove the battery (page 2 - 5), and component bay cover (page 2 - 10).
Removal
2. Locate the module; it is visible at point 1 (Figure 17a).
3. Carefully remove the screw 2 from the module (Figure 17b).
a. Locate the module.
4. The M.2 SSD module 63 will pop-up (Figure 17c). b. Remove the screw.
5. Lift the M.2 SSD module 63 up and off the computer (Figure 17d). c. The module will pop-up.
6. Reverse the process to install a new module (make sure that the hexagonal screw 4 is in the correct location). d. Lift the module up off the
socket.
a. c.
2.Disassembly
1
b. d.
2 4

3. M.2 SSD Module
• 1 Screw
Removing the M.2 SSD-1 Module 2 - 23

Disassembly
Figure 18
Removing the M.2 SSD-2 Module
M.2 SSD-2 Module 1. Turn off the computer, and turn it over, remove the battery (page 2 - 5).
Removal 2. Locate the module; it is visible at point 1 (Figure 18a).
3. Remove the screw 2 from the SSD (Figure 18a).
a. Locate the module. 4. The M.2 SSD module 63 will pop-up (Figure 18b).
b. Remove the screws. 5. Lift the M.2 SSD module 63 up and off the computer (Figure 18c).
c. The module will pop up. 6. Reverse the process to install a new module (make sure that the hexagonal screw 3 is in the correct location
d. Lift the module out.
depending upon the size of the module).
a. c.
1
2.Disassembly
d.
b.
4
 2
3. M.2 SSD Module
• 1 Screw
3
2 - 24 Removing the M.2 SSD-2 Module

Part Lists
Appendix A: Part Lists

This appendix breaks down the P870DM / P870DM-G series notebook’s construction into a series of illustrations. The
component part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
A.Part Lists
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A - 1
Part Lists
Part List Illustration Location

The following table indicates where to find the appropriate part list illustration.
Table A- 1
Part List Illustration
Location
Parts
Top page A - 3
Bottom page A - 4
LCD page A - 5
A.Part Lists
MB (GX VGA) page A - 6
MB (GXX VGA) page A - 7
MB (Two VGA) page A - 8
VGA (N16E-GT) page A - 9
VGA (N16E-GX) page A - 10
VGA (N16E-GXX) page A - 11
HDD page A - 12
A - 2 Part List Illustration Location

Part Lists
Top
Figure A - 1
Top
A.Part Lists
Top A - 3
Part Lists
Bottom
Figure A - 2
A.Part Lists
Bottom
A - 4 Bottom
Part Lists
LCD
Figure A - 3
LCD
A.Part Lists
LCD A - 5
Part Lists
MB (GX VGA)
Figure A - 4
A.Part Lists
MB (GX VGA)
A - 6 MB (GX VGA)
Part Lists
MB (GXX VGA)
Figure A - 5
MB (GXX VGA)
A.Part Lists
MB (GXX VGA) A - 7
Part Lists
MB (2 VGA)
Figure A - 6
A.Part Lists
MB (2 VGA)
A-8
Part Lists
VGA (N16E-GT)
Figure A - 7
VGA (N16E-GT)
A.Part Lists
VGA (N16E-GT) A - 9
Part Lists
VGA (N16E-GX)
Figure A - 8
A.Part Lists
VGA (N16E-GX)
A - 10 VGA (N16E-GX)
Part Lists
VGA (N16E-GXX)
Figure A - 9
VGA (N16E-GXX)
A.Part Lists
VGA (N16E-GXX) A - 11
Part Lists
HDD
Figure A - 10
A.Part Lists
HDD
A - 12 HDD
Schematic Diagrams
Appendix B: Schematic Diagrams

This appendix has circuit diagrams of the P870DM / P870DM-G notebook’s PCB’s. The following table indicates where
to find the appropriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page

Table B - 1
Block Diagram - Page B - 2 SPT-H 7/7 - Page B - 22 5VS, 3.3VS, 1.0 V Series - Page B - 42
Schematic
Processor 1/5 - Page B - 3 Main EC IT8587 - Page B - 23 2.5V, 5VS_2 - Page B - 43
Diagrams
Processor 2/5 - Page B - 4 Second EC IT8587 - Page B - 24 AMP10V, VCCSA - Page B - 44
B.Schematic Diagrams
Processor 3/5 - Page B - 5 TPM SLB9665TT - Page B - 25 DDR4 VDDQ & VTT, VCCPLL_OC - Page B - 45
Processor 4/5 - Page B - 6 CPU, VGA Fan Conn - Page B - 26 Power Charger, DC IN - Page B - 46
Processor 5/5 - Page B - 7 Backlight Keyboard - Page B - 27 VCCIO, 1.0VA - Page B - 47
DDR4 CHA SO-DIMM_0 - Page B - 8 CCD, USB Charging - Page B - 28 VCore & VCCGT - Page B - 48
DDR4 CHA SO-DIMM_1 - Page B - 9 AR_TBT - Page B - 29 VCore & VCCGT Output Stage - Page B - 49
DDR4 CHB SO-DIMM_0 - Page B - 10 AR_Power - Page B - 30 VDD3, VDD5 - Page B - 50
DDR4 CHB SO-DIMM_1 - Page B - 11 TPS65982 - Page B - 31 Charger LED Board - Page B - 51
MXM 3.0 Master - Page B - 12 Mini Display Port A - Page B - 32 Click Board - Page B - 52

Version Note
MXM 3.0 Slave - Page B - 13 Mini Display Port B - Page B - 33 Finger Sensor Board - Page B - 53
Panel, Inverter - Page B - 14 M.2 WLAN+BT - Page B - 34 Power Switch LED Board - Page B - 54
The schematic dia-
grams in this chapter
HDMI - Page B - 15 M.2 M Key, B Key - Page B - 35 Audio Codec - Page B - 55 are based upon version
6-7P-P8706-003. If
SPT-H 1/7 - Page B - 16 RTS5250 - Page B - 36 Audio Board (Speaker) - Page B - 56
your mainboard (or oth-
SPT-H 2/7 - Page B - 17 LAN_1E2400 - Page B - 37 Audio Board (Subwoofer) - Page B - 57 er boards) are a later
version, please check
SPT-H 3/7 - Page B - 18 LAN_2 E2400 - Page B - 38 Audio Jack - Page B - 58
with the Service Center
SPT-H 4/7 - Page B - 19 Click, Finger Conn - Page B - 39 Power Sequence - Page B - 59 for updated diagrams
(if required).
SPT-H 5/7 - Page B - 20 HDD & Second HDD - Page B - 40
SPT-H 6/7 - Page B - 21 USB Port - Page B - 41
B - 1
Schematic Diagrams
Block Diagram
5 4 3 2 1
CHARGER LED B'D 6-71-P8704-D01A SHEET 50 5V,3.3V,5VS,3.3VS,3.3VS_2,

CLICK B'D
FINGER SENSOR B'D
6-71-P8702-D02
6-71-P870F-D02
SHEET 51
SHEET 52
P870DM Skylake System Block Diagram 3.3VA,VCCST_VCCPLL SHEET 41
2.5V,5VS_2 SHEET 42
POWER SWITCHLED B'D 6-71-P870S-D02 SHEET 53
AUDIO B'D 6-71-P8708-D01A SHEET 54~57 AMP10V,VCCSA SHEET 43
DDR4 VDDQ&VTT_MEM,VCCPLL_OC
D SHEET 44 D
HDMI PS8409 DC_IN,PWR CHARGER SHEET 45
SHEET 14 1866/2133 MHz VCCIO,1.0VA
SHEET 14 MXM-III VGA PCIEx16 S-processor DDR4 / 1.2V
SHEET 46
Master P. 11 VCORE,VCCGT SHEET 47,48
mDP_A PS8330B
37.5x37.5mm VDD3,VDD5 SHEET 49
SHEET 31 PCIEx8 <7" 35W~95W
SLI
SHEET 31
MXM-III VGA LGA1151 Socket DDR IV
Slave P. 12 SO-DIMM*4
mDP_B PS8338B DDI1 SHEET 7,8,9,10
MUX SHEET 2,3,4,5,6
SHEET 32 PCIEx8
SHEET 32
DMI*4
<=7" SHEET 57
TPS65982
Alpine Ridge
eDP AUDIO BOARD
USB Type C SHEET 13
SHEET 30 LINE SPDIF MIC HP
IN OUT IN OUT
SHEET 30 SHEET 28,29
C 25 C
Sheet 1 of 58 MHz PCIe5~PCIe8 <=9"

SKL_PCH_H 24 MHz SV3H612V
SHEET 54 /Ed^W<Z
Skylake PCH &ƌŽŶƚ>
Block Diagram
TI
TAS5766MDCA
PCH-H(Z170) SHEET 55
LED control Azalia Codec TI /Ed^W<Z
D MIC &ƌŽŶƚZ
REALTEK PCM1861
SHEET 26 SHEET 27 ALC892
TOUCH PAD TPM2.0 SHEET 55 TI
CLICK BOARD SHEET 54 TAS5766MDCA ^htKK&Z
SHEET 38 SHEET 24
23x23mm FCBGA SHEET 56
EC AZALIA LINK 24 MHz
ITE 8587E <=7" LPC SHEET 15~21 <=14.5"
(512KB ROM)
24 MHz
32.768 KHz SHEET 22
EC SMBUS BIOS
B SPI B
SHEET 15
THERMAL SMART SMART 100 MHz <=9"
SENSOR FANx3 BATTERY PCIE
RT5 AC-IN
SHEET 25 SHEET 45 32.768KHz
SHEET 2 NGFF PCIE NGFF PCIE Realtek Qualcomm Qualcomm
Second EC SOCKET SOCKET NGFF PCIE
SPI ROM SOCKET RTS5250 E2400 E2400
INT. Backlight K/B SATA 0 SATA 3
ITE 8587E WLAN+BT CARD READER LAN_1 LAN_2
SHEET 26 USB 3.0 USB 2.0 PCIe9~12 PCIe13~16
SHEET 23 SHEET 23 5 Gbps 480 Mbps PCIe3 PCIe4 PCIe19 PCIe20
SHEET 34 SHEET 34
3"~9" 3"~12" M KEY B KEY SHEET 33 SHEET 35 SHEET 36 SHEET 37
A+E KEY
25 25
SATA III 6.0Gb/s <=8" MHz MHz
USB8 RJ-45 RJ-45

HDD&2nd HDD SHEET 36 SHEET 37
SATA 4,5 USB3.0 USB3.0 USB3.0 USB3.0 USB3.0 FINGER PRINTER
PORT1 PORT2 PORT3 PORT4 PORT5 CCD (USB7)
SHEET 39
A
(USB1) (USB2) (USB3) (USB4) (USB5) (USB6) A
SHEET 27 SHEET 40 SHEET 40 SHEET 40 SHEET 40 SHEET 27 FingerPrint

(Charging)
SHEET38 12 MHz
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[01] BLOCK DIAGRAM
Size Document Number Rev
Custom SCHEMATIC1 6-7P-P8706-003 1.0
Date: Friday, August 14, 2015 Sheet 1 of 58

5 4 3 2 1
B - 2 Block Diagram
Schematic Diagrams
Processor 1/5
5 4 3 2 1
SKYLAKE-S Processor 1/5 ( DMI,FDI,PEG ,RSVD) 3.3V
月MXM SIDE U1C SKL_S_CPU ?

月MXM SIDE PLACE NEAR CPU
2
LGA1151
RT1
11 PEG_RX0 C634 0.22u_10V_X5R_04 PEG_RX_0 B8
PEG_RXP[0] PEG_TXP[0]
A5 PEG_TX_0 C640 0.22u_10V_X5R_04
PEG_TX0 11 TH05-3H103FR P/N 6-17-10320-731
11 PEG_RX#0 C633 0.22u_10V_X5R_04 PEG_RX#_0 B7 A6 PEG_TX#_0 C639 0.22u_10V_X5R_04
PEG_TX#0 11
1
PEG_RXN[0] PEG_TXN[0]
THERM_VOLT 22
11 PEG_RX1 C632 0.22u_10V_X5R_04 PEG_RX_1 C7 B4 PEG_TX_1 C638 0.22u_10V_X5R_04
D PEG_RXP[1] PEG_TXP[1] PEG_TX1 11 D
11 PEG_RX#1 C631 0.22u_10V_X5R_04 PEG_RX#_1 C6 B5 PEG_TX#_1 C637 0.22u_10V_X5R_04
PEG_RXN[1] PEG_TXN[1] PEG_TX#1 11
R72
11 PEG_RX2 C727 0.22u_10V_X5R_04 PEG_RX_2 D6 C3 PEG_TX_2 C636 0.22u_10V_X5R_04 10K_1%_04
PEG_RXP[2] PEG_TXP[2] PEG_TX2 11
11 PEG_RX#2 C726 0.22u_10V_X5R_04 PEG_RX#_2 D5 C4 PEG_TX#_2 C635 0.22u_10V_X5R_04
11 PEG_RX3 C725 0.22u_10V_X5R_04 PEG_RX_3 E5 D2 PEG_TX_3 C630 0.22u_10V_X5R_04

11 PEG_RX#3 C724 0.22u_10V_X5R_04 PEG_RX#_3 E4 D3 PEG_TX#_3 C629 0.22u_10V_X5R_04
11 PEG_RX4 C723 0.22u_10V_X5R_04 PEG_RX_4 F6 E1 PEG_TX_4 C628 0.22u_10V_X5R_04 CAD Note: Capacitor need to be placed
PEG_RXP[4] PEG_TXP[4] PEG_TX4 11 close to buffer output pin
11 PEG_RX#4 C722 0.22u_10V_X5R_04 PEG_RX#_4 F5 E2 PEG_TX#_4 C627 0.22u_10V_X5R_04
11 PEG_RX5 C721 0.22u_10V_X5R_04 PEG_RX_5 G5 F2 PEG_TX_5 C626 0.22u_10V_X5R_04

11 PEG_RX#5 C720 0.22u_10V_X5R_04 PEG_RX#_5 G4 F3 PEG_TX#_5 C625 0.22u_10V_X5R_04
11 PEG_RX6 C719 0.22u_10V_X5R_04 PEG_RX_6 H6 G1 PEG_TX_6 C624 0.22u_10V_X5R_04

11 PEG_RX#6 C718 0.22u_10V_X5R_04 PEG_RX#_6 H5 G2 PEG_TX#_6 C623 0.22u_10V_X5R_04
11 PEG_RX7 C717 0.22u_10V_X5R_04 PEG_RX_7 J5 H2 PEG_TX_7 C622 0.22u_10V_X5R_04
11 PEG_RX#7 C716 0.22u_10V_X5R_04 PEG_RX#_7 J4 H3 PEG_TX#_7 C621 0.22u_10V_X5R_04
12 PEG_RX8 C750 0.22u_10V_X5R_04 PEG_RX_8 K6 J1 PEG_TX_8 C659 0.22u_10V_X5R_04

12 PEG_RX#8 C749 0.22u_10V_X5R_04 PEG_RX#_8 K5 J2 PEG_TX#_8 C658 0.22u_10V_X5R_04
12 PEG_RX9 C748 0.22u_10V_X5R_04 PEG_RX_9 L5 K2 PEG_TX_9 C657 0.22u_10V_X5R_04

12 PEG_RX#9 C747 0.22u_10V_X5R_04 PEG_RX#_9 L4 K3 PEG_TX#_9 C656 0.22u_10V_X5R_04
12 PEG_RX10
12 PEG_RX#10
C746
C745
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_RX_10
PEG_RX#_10
M6
M5 PEG_RXP[10]
PEG_RXN[10]
PEG_TXP[10]
PEG_TXN[10]
L1
L2
PEG_TX_10
PEG_TX#_10
C655
C654
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_TX10 12
PEG_TX#10 12
Sheet 2 of 58
C C
12 PEG_RX11
12 PEG_RX#11
C744
C743
C742
0.22u_10V_X5R_04
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_RX_11
PEG_RX#_11
PEG_RX_12
N5
N4
P6
PEG_RXP[11]
PEG_RXN[11]
PEG_TXP[11]
PEG_TXN[11]
M2
M3
N1
PEG_TX_11
PEG_TX#_11
PEG_TX_12
C653
C652
C651
0.22u_10V_X5R_04
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_TX11 12
PEG_TX#11 12 Processor 1/5
12 PEG_RX12 PEG_RXP[12] PEG_TXP[12] PEG_TX12 12
12 PEG_RX#12 C741 0.22u_10V_X5R_04 PEG_RX#_12 P5 N2 PEG_TX#_12 C650 0.22u_10V_X5R_04
12 PEG_RX13 C740 0.22u_10V_X5R_04 PEG_RX_13 R5 P2 PEG_TX_13 C649 0.22u_10V_X5R_04

12 PEG_RX#13 C739 0.22u_10V_X5R_04 PEG_RX#_13 R4 P3 PEG_TX#_13 C648 0.22u_10V_X5R_04
12 PEG_RX14 C738 0.22u_10V_X5R_04 PEG_RX_14 T6 R2 PEG_TX_14 C647 0.22u_10V_X5R_04

12 PEG_RX#14 C737 0.22u_10V_X5R_04 PEG_RX#_14 T5 R1 PEG_TX#_14 C646 0.22u_10V_X5R_04
12 PEG_RX15 C736 0.22u_10V_X5R_04 PEG_RX_15 U5 T2 PEG_TX_15 C645 0.22u_10V_X5R_04

12 PEG_RX#15 C735 0.22u_10V_X5R_04 PEG_RX#_15 U4 T3 PEG_TX#_15 C644 0.22u_10V_X5R_04
12 mil
VCCIO R48 24.9_1%_04 PEG_RCOMP L7
PEG_RCOMP
Y3 AC2
19 DMI_RXP0 DMI_RXP[0] DMI_TXP[0] DMI_TXP0 19
Y4 AC1
19 DMI_RXN0 DMI_RXN[0] DMI_TXN[0] DMI_TXN0 19
AA4 AD3
AA5 AD2
AB4 AE2
B AB3 AE1 B
AC4 AF2
AC5 AF3
SKL_S_CPU_LGA
REV = 1.2 3 OF 12
SKL_S_CPU ?
U1J ?
LGA1151
J8 H11
J7 RSVD_TP RSVD_TP H12
L8 RSVD_TP RSVD_TP
K8 RSVD_TP AW38 Remove test point,6/6 Tim
Remove test point,6/6 Tim RSVD_TP RSVD_TP AV39
AV1 RSVD_TP
AW2 RSVD_TP AU39
RSVD_TP RSVD AU40
R523 *0_04 H8 RSVD
VSS AT15
K10 VSS
L10 RSVD AR23 R68 *0_04
RSVD VSS AR22 R69 *0_04
J17 VSS
B39 RSVD
J19 RSVD J15
C40 RSVD RSVD J14
RSVD RSVD
A G8 AU9 A
AY3 VSS RSVD AU10
VSS RSVD
21 PCH_2_CPU_TRIGGER PCH_2_CPU_TRIGGER D1
R495 20_1%_04CPU_2_PCH_TRIGGER_R B3 PROC_TRIGIN J13
21 CPU_2_PCH_TRIGGER PROC_TRIGOUT RSVD K13 TP_CPU_K13 R525 *560_04
L12 RSVD J11
K12 RSVD RSVD
RSVD Title
RSVD
D15
K11
[02] Processor 1/5-DMI,PEG,RSVD
RSVD
SKL_S_CPU_LGA
10 OF 12
REV = 1.2 ?
3,5,46 VCCIO
13,14,16,24,29,33,38,41,42,44,46 3.3V
A3 SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
Processor 1/5 B - 3
Schematic Diagrams
Processor 2/5
5 4 3 2 1
SKYLAKE-S Processor 2/7 (JTAG,CLK,CFG ,DISPLAY)

CFG TABLE
CFG[0] Stall reset sequence after PCU PLL lock until de-asserted:
1 = (Default) Normal Operation;
? No stall.
Remove 0Ohm,6/6 Tim SKL_S_CPU
U1E 0 = Stall.
D LGA1151 D
W5 H15 CFG0 R40 *1K_04 CFG[1] Reserved configuration lane.
18 PCH_CPU_BCLK_DP BCLKP CFG[0]
18 PCH_CPU_BCLK_DN W4 F15 CFG1 R36 *1K_04 PCI Express* Static x16 Lane Numbering Reversal.
BCLKN CFG[1] F16 CFG2 R35 *1K_04 CFG[2]
CFG[2] 1 = Normal operation
18 PCH_CPU_PCIBCLK_DP W1 H16 CFG3 R34 *1K_04 0 = Lane numbers reversed.
W2 PCI_BCLKP CFG[3] F19 CFG4 R45 *1K_04
18 PCH_CPU_PCIBCLK_DN PCI_BCLKN CFG[4] CFG[3] Reserved configuration lane.
H18 CFG5 R39 1K_04
VCCST_VCCPLL K9 CFG[5] G21 CFG6 R43 *1K_04
18 PCH_CPU_NSSC_CLK_DP CLK24P CFG[6] CFG[4] eDP enable:
18 PCH_CPU_NSSC_CLK_DN J9 H20 CFG7 R44 *1K_04 1 = Disabled.
CLK24N CFG[7] G16 CFG8
Modify 1%,6/14 Tim CFG[8] 0 = Enabled.
E16 CFG9 R483 *1K_04
R508 100_1%_04 H_VIDSOUT CPU_24MHZ CFG[9] F17 CFG10 CFG[6:5] PCI Express* Bifurcation
R509 75_1%_04 H_PROCHOT# CFG[10] H17 CFG11 00 = 1 x8, 2 x4 PCI Express*
R46 1K_1%_04 H_THRMTRIP# CFG[11] G20 CFG12 01 = reserved
R507 56.2_1%_04 H_VIDALERT_N CFG[12] F20 CFG13 10 = 2 x8 PCI Express*
CFG[13] F21 CFG14 11 = 1 x16 PCI Express*
R512 *10mil_short R506 220_04 CPU_VIDALERT_N E39 CFG[14] H19 CFG15
47 H_CPU_SVIDALERT# CFG[7] PEG Training:
R511 *10mil_short H_VIDSCK E38 VIDALERT# CFG[15]
47 H_CPU_SVIDCLK VIDSCK 1 = (default) PEG Train immediately following RESET# deassertion.

R513 *10mil_short H_VIDSOUT E40 F14 CFG17 0 = PEG Wait for BIOS for training.
47 H_CPU_SVIDDAT VIDSOUT CFG[17]
45,47 H_PROCHOT# H_PROCHOT# R510 100_04 H_PROCHOT_R_N C39 E14 CFG16
PROCHOT# CFG[16] F18 CFG19
Modify,6/7 Tim CFG[19] CFG[19:8] Reserved configuration lanes.
44 DDR_VTT_CNTL DDR_VTT_CNTL AC36 G18 CFG18
R67 *0_04 AC38 DDR_VTT_CNTL CFG[18]
AC37 ZVM# D16 XDP_BPM0
Modify,6/14 Tim RSVD_AC37 BPM#[0] D17 XDP_BPM1
Remove test point,6/7 Tim BPM#[1] G14 XDP_BPM2
R504 6.04K_1%_04 VCCST_PWRGD_CPU U2 BPM#[2] H14 XDP_BPM3
Sheet 3 of 58 C
20 VCCST_PWRGD
17 H_PWRGD
16 PLTRST_CPU_N
Modify(CRB䁢2.8K_1%),
3/30 Tim
R505 2.74K_1%_04
H_PWRGD F8
VCCST_PWRGD
E7 PROCPWRGD
BPM#[3]
H13
H_TCK TERMINATION PLACE NEAR CPU WITHIN 1.1 INCH
H_TDO R494 *0_04 PCH_JTAG_TDO
CCD
PCH_JTAG_TDO 17 CFG9 R480
VCCIO
*1K_04 C
Modify,4/1 Tim H_PM_SYNC E8 RESET# PROC_TDO G12 H_TDI R491 *0_04 PCH_JTAG_TDI
Processor 2/5 16 H_PM_SYNC
16 H_PM_DOWN
16,22 H_PECI
H_THRMTRIP#
R493
R47
R41
20_1%_04
*10mil_short
*10mil_short
H_PM_DOWN_R
PECI
H_THERMTRIP_N
D8 PM_SYNC
G7 PM_DOWN
D11 PECI
PROC_TDI
PROC_TMS
PROC_TCK
F13
F11
H_TMS
H_TCK
R489
R482
*0_04
*0_04
PCH_JTAG_TMS
PCH_JTAGX
PCH_JTAG_TDI 17
PCH_JTAG_TMS 17
PCH_JTAGX 17
VCCST_VCCPLL
16 H_THRMTRIP# THERMTRIP# PCH_JTAGX R486 *1K_04

F12 H_TRST_N R490 *0_04 H_TRST_N_R H_TRST_N_R 21
Modify,6/7 Tim H_SKTOCC_N AB35 PROC_TRST# B9 H_PREQ_N R485 *0_04 PCH_XDP_PREQ_R_N H_PREQ_N R487 *51_04
18 H_SKTOCC_N PCH_XDP_PREQ_R_N 21
SKL_CNL_N AB36 SKTOCC# PROC_PREQ# B10 H_PRDY_N R484 *0_04 PCH_XDP_PRDY_R_N PCH_XDP_PRDY_R_N 21
H_TDO R488 51_04
PROC_SELECT# PROC_PRDY#
Modify,6/7 Tim
3.3VA R532 10K_04 H_CATERR# D13
CATERR# M11 CFG_RCOMP R524 49.9_1%_04
CFG_RCOMP
2/6 SKL_S_CPU_LGA PLACE INSIDE CPU CAVITY H_TCK R481 51_04
REV = 1.2 5 OF 12 ? H_TRST_N R492 *51_04
SKL_S_CPU
U1D ?
LGA1151
C21 E10
D21 DDI1_TXP[0] EDP_TXP[0] D10
D22 DDI1_TXN[0] EDP_TXN[0] D9
H_PROCHOT# E22 DDI1_TXP[1] EDP_TXP[1] C9
B23 DDI1_TXN[1] EDP_TXN[1] H10
Q28 A23 DDI1_TXP[2] EDP_TXN[2] G10
D
MTN7002ZHS3 C23 DDI1_TXN[2] EDP_TXP[2] G9

C517 D23 DDI1_TXP[3] EDP_TXN[3] F9
G DDI1_TXN[3] EDP_TXP[3]
22 H_PROCHOT_EC
B 47P_50V_NPO_04 B13 D12 B
S
C13 DDI1_AUXP EDP_AUXP E12

R514 DDI1_AUXN EDP_AUXN
B18
100K_04 A18 DDI2_TXP[0] VCCIO
D18 DDI2_TXN[0] D14
E18 DDI2_TXP[1] EDP_DISP_UTIL
C19 DDI2_TXN[1]
CAD Note: Capacitor need to be placed D19 DDI2_TXP[2] M9 DP_RCOMP 24.9_1%_04 R49
close to buffer output pin D20 DDI2_TXN[2] EDP_RCOMP
E20 DDI2_TXP[3]
DDI2_TXN[3]
A12
B12 DDI2_AUXP
DDI2_AUXN
B14
A14 DDI3_TXP[0]
C15 DDI3_TXN[0]
B15 DDI3_TXP[1]
B16 DDI3_TXN[1]
A16 DDI3_TXP[2]
C17 DDI3_TXN[2]
B17 DDI3_TXP[3]
DDI3_TXN[3] V3
PROC_AUDIO_CLK AUD_AZACPU_SCLK_R 17
B11 V2
DDI3_AUXP PROC_AUDIO_SDI AUD_AZACPU_SDO_R 17
C11 U1 AUD_AZACPU_SDI_R R500 20_1%_04
DDI3_AUXN SKL_S_CPU_LGAPROC_AUDIO_SDO AUD_AZACPU_SDI 17
4 OF 12 Modify,4/1 Tim
REV = 1.2 ?
A A
Title
[03] Processor 2/5-CLK,MISC,DIS
2,5,46 VCCIO
5,17,41,45,47 VCCST_VCCPLL
15,16,17,19,20,41 3.3VA A3 SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
B - 4 Processor 2/5
Schematic Diagrams
Processor 3/5
5 4 3 2 1
SKYLAKE-S Processor 3/5 ( DDR4 )

M_A_DQ[63:0] 7,8 M_B_DQ[63:0] 9,10
D D
?
SKL_S_CPU SKL_S_CPU ?
U1A U1B
LGA1151 LGA1151
M_A_DQ0 AE38 AW18 M_A_CK0 7 M_B_DQ0 AD34 AM20 M_B_CK0 9
M_A_DQ1 AE37 DDR0_DQ[0] DDR0_CKP[0] AV18 M_B_DQ1 AD35 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0] AM21
DDR0_DQ[1] DDR0_CKN[0] M_A_CK#0 7 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] M_B_CK#0 9
M_A_DQ2 AG38 AW17 M_A_CK1 7 M_B_DQ2 AG35 AP22 M_B_CK1 9
M_A_DQ3 AG37 DDR0_DQ[2] DDR0_CKP[1] AY17 M_B_DQ3 AH35 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[1] AP21
M_A_DQ4 AE39 AW16 M_A_CK2 8 M_B_DQ4 AE35 AN20 M_B_CK2 10
M_A_DQ5 AE40 DDR0_DQ[4] DDR0_CKP[2] AV16 M_B_DQ5 AE34 DDR1_DQ[4]/DDR0_DQ[20] DDR1_CKP[2] AN21
M_A_DQ6 AG39 AT16 M_A_CK3 8 M_B_DQ6 AG34 AP19 M_B_CK3 10
M_A_DQ7 AG40 DDR0_DQ[6] DDR0_CKP[3] AU16 M_B_DQ7 AH34 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKP[3] AP20
M_A_DQ8 AJ38 M_B_DQ8 AK35
M_A_DQ9 AJ37 DDR0_DQ[8] AY24 M_B_DQ9 AL35 DDR1_DQ[8]/DDR0_DQ[24] AY29
DDR0_DQ[9] DDR0_CKE[0] M_A_CKE0 7 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] M_B_CKE0 9
M_A_DQ10 AL38 AW24 M_A_CKE1 7 M_B_DQ10 AK32 AV29 M_B_CKE1 9
M_A_DQ11 AL37 DDR0_DQ[10] DDR0_CKE[1] AV24 M_B_DQ11 AL32 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] AW29
M_A_DQ12 AJ40 AV25 M_B_DQ12 AK34 AU29
M_A_DQ13 AJ39 M_B_DQ13 AL34
M_A_DQ14 AL39 DDR0_DQ[13] AW12 M_B_DQ14 AK31 DDR1_DQ[13]/DDR0_DQ[29] AP17
DDR0_DQ[14] DDR0_CS#[0] M_A_CS0# 7 DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] M_B_CS0# 9
M_A_DQ15 AL40 AU11 M_A_CS1# 7 M_B_DQ15 AL31 AN15 M_B_CS1# 9
M_A_DQ16 AN38 DDR0_DQ[15] DDR0_CS#[1] AV13 M_B_DQ16 AP35 DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1] AN17
DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2] M_A_CS2# 8 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2] M_B_CS2# 10
M_A_DQ17 AN40 AV10 M_A_CS3# 8 M_B_DQ17 AN35 AM15 M_B_CS3# 10
M_A_DQ18 AR38 DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3] M_B_DQ18 AN32 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3]
M_A_DQ19 AR37 DDR0_DQ[18]/DDR0_DQ[34] AW11 M_B_DQ19 AP32 DDR1_DQ[18]/DDR0_DQ[50] AM16
DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] M_A_ODT0 7 DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] M_B_ODT0 9
M_A_DQ20 AN39 AU14 M_B_DQ20 AN34 AL16
M_A_DQ21
M_A_DQ22
M_A_DQ23
AN37
AR39
AR40
DDR0_DQ[20]/DDR0_DQ[36]
DDR0_ODT[1]
DDR0_ODT[2]
DDR0_ODT[3]
AU12
AY10
M_A_ODT1
M_A_ODT2
M_A_ODT3
7
8
8
M_B_DQ21
M_B_DQ22
M_B_DQ23
AP34
AN31
AP31
DDR1_ODT[1]
DDR1_ODT[2]
DDR1_ODT[3]
AP15
AL15
M_B_ODT1
M_B_ODT2
M_B_ODT3
9
10
10
Sheet 4 of 58
DDR0_DQ[23]/DDR0_DQ[39] DDR1_DQ[23]/DDR0_DQ[55]
C
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
AW37
AU38
AV35
AW35
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
AY13
AV15
AW23
M_A_BA0 7,8
M_A_BA1 7,8
M_A_BG0 7,8
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
AL29
AM29
AP29
AR29
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
AN18
AL17
AP16
M_B_A16 9,10
M_B_A14 9,10
M_B_A15 9,10
C
Processor 3/5
M_A_DQ28 AU37 DDR0_DQ[27]/DDR0_DQ[43] AW13 M_B_DQ28 AM28 DDR1_DQ[27]/DDR0_DQ[59] AL18
DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] M_A_A16 7,8 DDR1_DQ[28]/DDR0_DQ[60] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] M_B_BA0 9,10
M_A_DQ29 AV37 AV14 M_B_DQ29 AL28 AM18
DDR0_DQ[29]/DDR0_DQ[45] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] M_A_A14 7,8 DDR1_DQ[29]/DDR0_DQ[61] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_BA1 9,10
M_A_DQ30 AT35 AY11 M_B_DQ30 AR28 AW28
DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] M_A_A15 7,8 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_BG0 9,10
M_A_DQ31 AU35 M_B_DQ31 AP28
M_A_DQ32 AY8 DDR0_DQ[31]/DDR0_DQ[47] AW15 M_B_DQ32 AR12 DDR1_DQ[31]/DDR0_DQ[63] AL19
DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] M_A_A0 7,8 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] M_B_A0 9,10
M_A_DQ33 AW8 AU18 M_B_DQ33 AP12 AL22
M_A_DQ34 AV6 AU17 M_B_DQ34 AM13 AM22
M_A_DQ35 AU6 AV19 M_B_DQ35 AL13 AM23
DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] M_A_A3 7,8 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3] M_B_A3 9,10
M_A_DQ36 AU8 AT19 M_B_DQ36 AR13 AP23
DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] M_A_A4 7,8 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] M_B_A4 9,10
M_A_DQ37 AV8 AU20 M_B_DQ37 AP13 AL23
DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] M_A_A5 7,8 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] M_B_A5 9,10
M_A_DQ38 AW6 AV20 M_B_DQ38 AM12 AW26
M_A_DQ39 AY6 AU21 M_B_DQ39 AL12 AY26
M_A_DQ40 AY4 AT20 M_B_DQ40 AP10 AU26
M_A_DQ41 AV4 AT22 M_B_DQ41 AR10 AW27
M_A_DQ42 AT1 AY14 M_B_DQ42 AR7 AP18
M_A_DQ43 AT2 AU22 M_B_DQ43 AP7 AU27
M_A_DQ44 AV3 AV22 M_B_DQ44 AR9 AV27
M_A_DQ45 AW4 AV12 M_B_DQ45 AP9 AR15
M_A_DQ46 AT4 AV23 M_B_DQ46 AR6 AY28
DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_BG1 7,8 DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_BG1 9,10
M_A_DQ47 AT3 AU24 M_B_DQ47 AP6 AU28
DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# M_A_ACT# 7,8 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# M_B_ACT# 9,10
M_A_DQ48 AP2 M_B_DQ48 AM10
M_A_DQ49 AM4 DDR0_DQ[48]/DDR1_DQ[32] AY15 M_B_DQ49 AL10 DDR1_DQ[48] AL20
DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR DDR0_A_PARITY 7,8 DDR1_DQ[49] DDR1_PAR DDR1_B_PARITY 9,10
M_A_DQ50 AP3 AT23 M_B_DQ50 AM7 AY25
DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# DDR0_A_ALERT# 7,8 DDR1_DQ[50] DDR1_ALERT# DDR1_B_ALERT# 9,10
M_A_DQ51 AM3 M_B_DQ51 AL7
M_A_DQ52 AP4 DDR0_DQ[51]/DDR1_DQ[35] M_B_DQ52 AM9 DDR1_DQ[51]
M_A_DQ53 AM2 DDR0_DQ[52]/DDR1_DQ[36] AF39 M_B_DQ53 AL9 DDR1_DQ[52] AF34
B DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0] M_A_DQS#0 7,8 DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2] M_B_DQS#0 9,10 B
M_A_DQ54 AP1 AK39 M_B_DQ54 AM6 AK33
DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1] M_A_DQS#1 7,8 DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3] M_B_DQS#1 9,10
M_A_DQ55 AM1 AP39 M_B_DQ55 AL6 AN33
DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] M_A_DQS#2 7,8 DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6] M_B_DQS#2 9,10
M_A_DQ56 AK3 AU36 M_B_DQ56 AJ6 AN29
M_A_DQ57 AH1 AW7 M_B_DQ57 AJ7 AN13
M_A_DQ58 AK4 AU3 M_B_DQ58 AE6 AR8
M_A_DQ59 AH2 AN3 M_B_DQ59 AF7 AM8
DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSN[6]/DDR1_DQSN[4] M_A_DQS#6 7,8 DDR1_DQ[59] DDR1_DQSN[6] M_B_DQS#6 9,10
M_A_DQ60 AH4 AJ3 Modify,3/12 Tim M_B_DQ60 AH7 AG6
DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSN[7]/DDR1_DQSN[5] M_A_DQS#7 7,8 DDR1_DQ[60] DDR1_DQSN[7] M_B_DQS#7 9,10
M_A_DQ61 AK2 M_B_DQ61 AH6
M_A_DQ62 AH3 DDR0_DQ[61]/DDR1_DQ[45] AF38 M_B_DQ62 AE7 DDR1_DQ[61] AF35
DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0] M_A_DQS0 7,8 DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2] M_B_DQS0 9,10
M_A_DQ63 AK1 AK38 M_B_DQ63 AF6 AL33
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1] M_A_DQS1 7,8 DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3] M_B_DQS1 9,10
AP38 AP33
DDR0_DQSP[2]/DDR0_DQSP[4] M_A_DQS2 7,8 DDR1_DQSP[2]/DDR0_DQSP[6] M_B_DQS2 9,10
AU33 AV36 AR25 AN28
DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] M_A_DQS3 7,8 DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7] M_B_DQS3 9,10
AT33 AV7 AR26 AN12
AW33 AU2 AM26 AP8
AV31 AN2 AM25 AL8
Modify,4/3 Tim DDR0_ECC[3] DDR0_DQSP[6]/DDR1_DQSP[4] M_A_DQS6 7,8 Modify,4/3 Tim DDR1_ECC[3] DDR1_DQSP[6] M_B_DQS6 9,10
AU31 AJ2 AP26 AG7
DDR0_ECC[4] DDR0_DQSP[7]/DDR1_DQSP[5] M_A_DQS7 7,8 DDR1_ECC[4] DDR1_DQSP[7] M_B_DQS7 9,10
AV33 AP25
AW31 DDR0_ECC[5] AV32 Modify,3/12 Tim AL25 DDR1_ECC[5] AN25
AY31 DDR0_ECC[6] DDR0_DQSP[8] AU32 AL26 DDR1_ECC[6] DDR1_DQSP[8] AN26 Modify,4/3 Tim
DDR0_ECC[7] DDR0_DQSN[8] Modify,4/3 Tim DDR1_ECC[7] DDR1_DQSN[8]
DDR CHANNEL B
DDR CHANNEL A AB40

DDR_VREF_CA DDR_VREF_CA 7
AC40 DDR0_VREF_DQ 1/29
1 OF 12 DDR0_VREF_DQ AC39
DDR1_VREF_DQ DDR1_VREF_DQ 9
2 OF 12
A SKL_S_CPU_LGA
REV = 1.2 SKL_S_CPU_LGA
REV = 1.2 ?
A
?
Title
[04] Processor 3/5-DDR4
A3 SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
Processor 3/5 B - 5
Schematic Diagrams
Processor 4/5
5 4 3 2 1
SKYLAKE-S Processor 4/5 ( POWER )

VCORE VCORE 4.2A 4.2A
SKL_S_CPU VCCSA SKL_S_CPU VDDQ
U1G ? U1I ?
LGA1151 LGA1151
AA7 AT18
A25 H32 AB6 VCCSA VDDQ AT21
A26 VCC VCC J21
DESIGN NOTE: AB7 VCCSA VDDQ AU13
D VCC VCC VCCSA VCCSA VDDQ D
VCORE DESIGN NOTE: A27 F32 PLACE CAPS IN SOCKET EDGE BOTTOM/TOP AB8 AU15
A28 VCC VCC F33 AC7 VCCSA VDDQ AU19
PLACE CAPS IN SOCKET EDGE BOTTOM/TOP A29 VCC VCC F34 AC8 VCCSA VDDQ AU23
A30 VCC VCC G23 2/13 C118 C80 N7 VCCSA VDDQ AV11
C73 C529 C47 C493 C78 B25 VCC VCC G24 P7 VCCSA VDDQ AV17
B27 VCC VCC G25 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 R7 VCCSA VDDQ AV21
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 B29 VCC VCC G26 T7 VCCSA VDDQ AW10
B31 VCC VCC G27 U7 VCCSA VDDQ AW14
B32 VCC VCC G28 Y6 VCCSA VDDQ AW25
FOR OCK only
B33 VCC VCC G29 Y7 VCCSA VDDQ AY12
C530 C70 C496 C75 C495 B34 VCC VCC J22 VCCSA Y8 VCCSA VDDQ AY16
VCC VCC VCCSA VDDQ VDDQ
B35 J23 W7 AY18

22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 B36 VCC VCC J24 V7 VCCSA VDDQ AY23
B37 VCC VCC J25 AA6 VCCSA VDDQ
C25 VCC VCC J26 C103 C102 VCCSA AJ9 VCCPLL_OC_R R70 0_04
VCC VCC VCCIO VCCPLL_OC
C26 J27
C77 C97 C99 C45 C100 C27 VCC VCC J28 22u_6.3V_X5R_08 22u_6.3V_X5R_08 AK11 VCCPLL_OC
C28 VCC VCC J29 AK14 VCCIO
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 C29 VCC VCC J30 AK24 VCCIO
C30 VCC VCC J31 AJ23 VCCIO R71 *0_04
VCC VCC VCCIO
Sheet 5 of 58 C115 C44 C74 C514 C536

C32
C34
C36
D25
VCC
VCC
VCC
VCC
VCC
VCC
K16
K18
K20
K21
M8
P8
T8
U8
VCCIO
VCCIO
VCCIO VCCOPC_NC
VCC VCC VCCFUSEPRG IS TIED VCCIO
Processor 4/5 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 D27
D29
D31
D32
VCC
VCC
VCC
VCC
VCC
VCC
K23
K25
K27
K29
TO VCCST_VCCPLL
R56
VCCFUSEPRG
*0_06
W8
VCCIO
VCCOPC
VCCOPC
AJ30
AJ27
AJ28
VCC VCC VCORE VCCOPC
C513 C76 C531 C532 C537 D33 K31 V5 AJ29
C VCC VCC VCCST VCCOPC Remove Jump,6/7 Tim C
D34 L14 R57 0_06 V6 AK27
VCC VCC VCCST_VCCPLL VCCST VCCOPC VCCEOPIO_NC
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 D35 L15
D36 VCC VCC L16 V4
E24 VCC VCC L17 VCCPLL AJ25
E25 VCC VCC L18
DESIGN NOTE: VCCEOPIO AJ26
C98 C114 C46 C512 E26 VCC VCC L19 PLACE CAPS IN SOCKET VCCEOPIO VCC_OPC_1P8_NC VCC_OPC_1P8_NC1
E27 VCC VCC L20 EDGE BOTTOM/TOP
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 E28 VCC VCC L21 AB37 2 1
E29 VCC VCC L22 VCC_OPC_1P8 AB38 J5 *40mil
E30 VCC VCC L23 VCC_OPC_1P8 Stuff R78,remove VCCIO_SENSE
VCC VCC
E32
VCC VCC
L24 R38 100_1%_04 6/7VCCSA
Tim
E34 L25 AD5 VCCSA_SENSE 43
C494 C48 C511 C492 E36 VCC VCC L26 C526 C527 VCCSA_SENSE AF4 R78 100_1%_04 VCCIO
F23 VCC VCC L27 VCCIO_SENSE AE4
VCC VCC VSS_SAIO_SENSE VSS_SA_IO_SENSE 43
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 F24 L28 22u_6.3V_X5R_08 1u_6.3V_X5R_04 R37 100_1%_04
F25 VCC VCC L29 Modify,4/1 Tim
F27 VCC VCC L30 AK21 VCCOPC_SENSE
VCC VCC VCCOPC_SENSE T9
F29 M13 AJ24 VCCEOPIO_SENSE
VCC VCC VCCEOPIO_SENSE T7
F31 M14 AK22 VSS_OPC_EOPIO_SENSE
VCC VCC VSSOPC_EOPIO_SENSE T8
G30 M16
G32 VCC VCC M18 SKL_S_CPU_LGA
H22 VCC VCC M20 9 OF 12
FOR 44e only
H23 VCC VCC M22 REV = 1.2 ?
H25 VCC VCC M24
H27 VCC VCC M26
H29 VCC VCC M28
H31 VCC VCC M30
VCC VCC
B AJ11 AJ12 VCORE B
AJ13 VCC VCC AJ14
AJ15 VCC VCC AJ16
AJ17 VCC VCC AJ18 R33
AJ19 VCC VCC AJ20
AJ21 VCC VCC AJ22 100_1%_04
VCC VCC
C38 VCCCORE_SENSE 47
VCC_SENSE D38
VSS_SENSE VSSCORE_SENSE 47
SKL_S_CPU_LGA R32
7 OF 12
REV = 1.2 ? 100_1%_04
DESIGN NOTE:
VDDQ PLACE CAPS IN SOCKET EDGE BOTTOM/TOP
C569 C570
C567 C565 C568 C566 + +
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 *560u_2.5V_6.6*6.6*5.9 *560u_2.5V_6.6*6.6*5.9
A A
VCCIO DESIGN NOTE:

PLACE CAPS IN SOCKET EDGE BOTTOM/TOP
C62 C113 C116 C528 C81 C101
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/

44 VCCPLL_OC Title
C535 C79 C117 7,8,9,10,17,44 VDDQ [05] Processor 4/5-POWER
0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 3,17,41,45,47 VCCST_VCCPLL
2,3,46 VCCIO Size Document Number Rev
48
43
VCORE
VCCSA
A3 SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
B - 6 Processor 4/5
Schematic Diagrams
Processor 5/5
5 4 3 2 1
SKYLAKE-S Processor 5/5 ( GND )

VCCGTX
?
SKL_S_CPU U1L SKL_S_CPU VCCGT SKL_S_CPU
U1K SKL_S_CPU ? U1F ? G13 D39 U1H ?
AB5 C37 VSS VSS
VSS VSS G17 D7 LGA1151
AC3 J16 VSS VSS Remove Jump,6/7 Tim
VSS VSS AK29 G15 E11 AA34 F35 VCCGTX
AC33 D40 VSS VSS VSS VCCGT VCCGTX
VSS VSS_NCTF AK30 G3 E13 AA35 G34
LGA1151
AB39 K35 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK36 G6 E17 AA36 G35
AA8 K37 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK37 H1 E15 AA37 H33
A17 K33 VSS VSS VSS VCCGT VCCGTX
D VSS VSS AK40 H21 E19 AA38 H34 D
A11 H37 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK5 H24 E21 AB33 J33
AA33 C10 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK6 H26 E23 AB34 J35
AA3 D24 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK7 H39 E3 G36 K32
A24 D37 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK8 H4 E31 G37 K34
A13 B30 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK9 H9 E33 G38 L31
A15 B26 VSS VSS VSS VCCGT VCCGTX
VSS VSS AL1 J18 E37 G39 L33
AG1 B24 VSS VSS VSS VCCGT VCCGTX
VSS VSS AL11 J20 E35 G40 M32
AH8 AY7 VSS VSS VSS VCCGT VCCGTX
VSS VSS A7 AL14 J3 E6 H36
AJ1 AY5 VSS VSS VSS VSS VCCGT
VSS VSS AC34 AL2 J6 E9 H38
AH40 AY30 VSS VSS VSS VSS VCCGT
VSS VSS AC35 AL21 K1 F1 H40
AH5 AY27 VSS VSS VSS VSS VCCGT
VSS VSS AC6 AL24 K14 F22 J36
AH39 AW36 VSS VSS VSS VSS VCCGT
VSS VSS AD1 AL27 K17 F10 J37
AH38 AW34 VSS VSS VSS VSS VCCGT
VSS VSS AD33 AL3 K22 F26 J38
AH37 AW32 VSS VSS VSS LGA1151 VSS VCCGT
VSS VSS AD36 AL30 U3 F28 J39
AH36 C12 VSS VSS VSS VSS VCCGT
VSS VSS AD37 AL36 T37 F30 J40
AG8 C14 VSS VSS VSS VSS VCCGT
VSS VSS AD38 AL4 T35 F40 K36
AH33 C16 VSS VSS VSS VSS VCCGT
VSS VSS AD39 AL5 R33 F4 K38
VSS VSS AD4 AM11 P4 F7 K40
VSS VSS AD40 AM14 P39 G11 L34
AG33 D26 VSS VSS VSS VSS VCCGT
AG3
AG2
AR30
AR3
VSS
VSS
VSS
VSS
VSS
VSS
D28
D30
D4
AD8
AE3
AE33
VSS
VSS
VSS
VSS
VSS
VSS
AM24
AM27
AM30
N33
M39
M37
VSS
VSS
VSS
VSS
VSS
VSS
G31
G33
H35
L37
L38
L39
VCCGT
VCCGT
VCCGT
Sheet 6 of 58
AE36 VSS VSS AM31 M29 VSS VSS J10 L40 VCCGT
Processor 5/5
AR27 VSS
AE5 VSS VSS AM32 M25 VSS VSS J12 M33 VCCGT
AT10 VSS
AE8 VSS VSS AM33 M27 VSS VSS J32 M34 VCCGT
H30 VSS
AF1 VSS VSS AM34 M23 VSS VSS J34 M36 VCCGT
AV38 VSS
C LGA1151 AF33 VSS VSS AM35 M21 VSS VSS K15 M38 VCCGT C
AV9 VSS
AF36 VSS VSS AM36 M19 VSS VSS K19 M40 VCCGT
L11 VSS
AF37 VSS VSS AM37 M15 VSS VSS B38 N34 VCCGT
K30 VSS
AF40 VSS VSS AM38 M17 VSS VSS_NCTF U33 N35 VCCGT
K28 VSS
AF5 VSS VSS AM39 M10 VSS VSS T4 N36 VCCGT
K26 VSS
AF8 VSS VSS AM40 M12 VSS VSS T1 N37 VCCGT
K24 VSS
VSS VSS VSS VSS VCCGT
C2 VSS
VSS
AM5 M1
VSS VSS
R6 N38
VCCGT DESIGN NOTE:
VSS_NCTF AN1 L32 R8 N39
A4 VSS VSS VSS VCCGT VCCGT PLACE CAPS IN SOCKET EDGE BOTTOM/TOP
VSS_NCTF AN10 L3 R3 N40
H7 VSS VSS VSS VCCGT
VSS AN11 L13 P35 P33
H28 VSS VSS VSS VCCGT
VSS AN14 K7 N8 P34
AT30 VSS VSS VSS VCCGT C538 C94
VSS AN16 K4 N6 P36
AT25 VSS VSS VSS VCCGT
VSS AN19 K39 N3 P38
AT14 VSS VSS VSS VCCGT *47u_6.3V_X5R_08 *47u_6.3V_X5R_08
VSS AN22 AU25 M4 P40
L6 VSS VSS VSS VCCGT
VSS AN23 AU34 M7 R34
L9 VSS VSS VSS VCCGT
VSS AN24 AU4 M35 R35
AR33 VSS VSS VSS VCCGT
VSS AN27 AT38 B28 R36 C96 C112
AU1 VSS VSS VSS VCCGT
VSS AN30 AT37 T39 R37
VSS AN36 AT34 V8 R38 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08
VSS AN4 AT31 W33 R39
AT32 VSS VSS VSS VCCGT Remove 47u*2,22u*5,
VSS AN5 AT29 Y5 R40
AY9 VSS VSS VSS VCCGT All cap modify for no stuff,
VSS AN6 AT27 T33 C533 C534 6/7 Tim
AW9 VSS VSS VCCGT
VSS AN7 AT26 T34
AW5 VSS VSS VCCGT
VSS AJ31 AN8 AR24 T36 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08
AW30 VSS VSS VSS VCCGT
VSS AJ32 AN9 V35 T38
AW3 VSS VSS VSS VCCGT
VSS AJ33 AP11 U6 T40
AV5 VSS VSS VSS VCCGT
VSS AJ34 AP14 V1 U34 C93 C69
VSS AJ35 AP24 V37 U35
VSS AJ36 AP27 V39 U36 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08
B AV28 VSS VSS VSS VCCGT B
VSS AJ4 AP30 AT8 U37
VSS AJ5 AP36 W3 U38
VSS AJ8 AP37 Y35 U39 C72
AU7 VSS VSS VSS SKL_S_CPU_LGA VCCGT
VSS AK10 AP40 W6 U40
VSS AK12 AP5 Y37 12 of 12 V33 *22u_6.3V_X5R_08
VSS AK13 AR1 V34
AT7 VSS VSS VCCGT
VSS AK15 AR11 REV = 1.2 ? V36
AT6 VSS VSS VCCGT
VSS AK16 AR14 V38
AT5 VSS VSS VCCGT
VSS AK17 AR16 V40
AT40 VSS VSS VCCGT
VSS AK18 AR17 W34
AT39 VSS VSS VCCGT
VSS AK19 AR18 W35
AT36 VSS VSS VCCGT
VSS AK20 AR19 W36
AT24 VSS VSS VCCGT
VSS AK23 AR2 W37
AT17 VSS VSS VCCGT
VSS AK25 AR20 W38 F39 VCCGT_SENSE 47
AT13 VSS VSS VCCGT VCCGT_SENSE
VSS AK26 AR21 Y33 F38 VSSGT_SENSE 47
AT12 VSS VSS VCCGT VSSGT_SENSE
VSS AK28 Y34
AT11 VSS VCCGT
VSS Y36 F37 VCCGTX_SENSE
AR5 VCCGT VCCGTX_SENSE
VSS Y38 F36 VSSGTX_SENSE
AR4 VCCGT VSSGTX_SENSE
AR36 VSS
VSS SKL_S_CPU_LGA
AR35 Modify,4/3 Tim
VSS SKL_S_CPU_LGA 8 OF 12
AR34
VSS 6 OF 12 REV = 1.2 ?
AR32
VSS REV = 1.2 ?
AR31
B6 VSS
C20 VSS
C22 VSS
C35 VSS
C33 VSS
A C31 VSS A
C24 VSS SKL_S_CPU_LGA
VSS 11 of 12
REV = 1.2 ?
Title
[06] Processor 5/5-VCCGT,GND
47,48 VCCGT
A3 SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
Processor 5/5 B - 7
Schematic Diagrams
DDR4 CHA SO-DIMM_0

5 4 3 2 1
JDIMM1A
4
4
M_A_CK0
M_A_CK#0
137
139
138
CK0_T
CK0_C
DQ0
DQ1
8
7
20
Modify,3/12 Tim
M_A_DQ5
M_A_DQ0
4,8
4,8
CHA DIMM0
4 M_A_CK1
140 CK1_T DQ2 21
M_A_DQ2 4,8 0.6V
4 M_A_CK#1 CK1_C DQ3
DQ4
4
M_A_DQ3
M_A_DQ1
4,8
4,8
1.2V
109 3 VDDQ VTT_MEM
4 M_A_CKE0 CKE0 DQ5 M_A_DQ4 4,8 JDIMM1B
4 M_A_CKE1 110 16
CKE1 DQ6 M_A_DQ6 4,8
17
DQ7 M_A_DQ7 4,8
4 M_A_CS0# 149 28 163 258
S0* DQ8 M_A_DQ8 4,8 VDD19 VTT 2.5V
4 M_A_CS1# 157 29 160
S1* DQ9 M_A_DQ12 4,8 VDD18
41 159
D DQ10 M_A_DQ14 4,8 VDD17 D
4 M_A_ODT0 155 42 154 259
ODT0 DQ11 M_A_DQ11 4,8 VDD16 VPP2
4 M_A_ODT1 161 24 153 257
ODT1 DQ12 M_A_DQ9 4,8 VDD15 VPP1
25 148
DQ13 M_A_DQ13 4,8 VDD14
4,8 M_A_BG0 115 38 147 3.3VS
BG0 DQ14 M_A_DQ10 4,8 VDD13
4,8 M_A_BG1 113 37 142
4,8 M_A_BA0 150 50 141
BA0 DQ16 M_A_DQ17 4,8 VDD11
4,8 M_A_BA1 145 49 136 255
BA1 DQ17 M_A_DQ20 4,8 VDD10 VDDSPD
62 135
DQ18 M_A_DQ23 4,8 VDD9
4,8 M_A_A0 144 63 130 C596 C594
A0 DQ19 M_A_DQ18 4,8 VDD8
4,8 M_A_A1 133 46 129
4,8 M_A_A2 132 45 124 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
4,8 M_A_A3 131 58 123
4,8 M_A_A4 128 59 118
A4 DQ23 M_A_DQ22 4,8 Modify,3/4 Tim VDD4
4,8 M_A_A5 126 70 117
4,8 M_A_A6 127 71 112
W>>K^dKW/E
122 83 111
4,8 M_A_A7 A7 DQ26 M_A_DQ30 4,8 VDD1

125 84
4,8
4,8
M_A_A8
M_A_A9 121
146
A8
A9
DQ27
DQ28
66
67
M_A_DQ31
M_A_DQ24
4,8
4,8 TOP MT1
GND1
GND2
4,8 M_A_A10
120 A10_AP DQ29 79
M_A_DQ28 4,8 JDIMM2 = CHA DIMM1 001 MT2
4,8 M_A_A11 A11 DQ30 M_A_DQ27 4,8
4,8 M_A_A12 119 80
A12 DQ31 M_A_DQ26 4,8
4,8 M_A_A13 158 174 251 252
A13 DQ32 M_A_DQ32 4,8 VSS VSS
4,8 M_A_A14 151 173 JDIMM4 = CHB DIMM1 011 247 248
A14_WE* DQ33 M_A_DQ37 4,8 VSS VSS
4,8 M_A_A15 156 187 243 244 VDDQ
A15_CAS* DQ34 M_A_DQ39 4,8 VSS VSS
152 186 239 238
4,8 M_A_A16 A16_RAS* DQ35 170
M_A_DQ34 4,8
235 VSS VSS 234 W>>K^dK^K/DD
Sheet 7 of 58 4,8 M_A_ACT# 114
143
ACT*
DQ36
DQ37
DQ38
DQ39
169
183
182
195
M_A_DQ36
M_A_DQ33
M_A_DQ38
M_A_DQ35
4,8
4,8
4,8
4,8
231
227
223
217
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
230
226
222
218
4,8 DDR0_A_PARITY PARITY DQ40 M_A_DQ41 4,8 JDIMM1 = CHA DIMM0 000 VSS VSS C758 C600 C775 C784
DDR4 CHA SO- C

4,8 DDR0_A_ALERT#
3/4 Tim
8,9,10,17 DDR4_DRAMRST#
DIMM0_CHA_EVENT#
116
134
108
ALERT*
EVENT*
RESET*
DQ41
DQ42
DQ43
194
207
208
191
M_A_DQ45
M_A_DQ46
M_A_DQ42
4,8
4,8
4,8
JDIMM3 = CHB DIMM0 010
213
209
205
201
VSS
VSS
VSS
VSS
VSS
VSS
214
210
206
202
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
C
VREFCA_CHA_DIMM 164 DQ44 190

M_A_DQ44 4,8
BOT 197 VSS VSS 196
DIMM _0 8,9,10,15 SMB_DATA_MAIN

8,9,10,15 SMB_CLK_MAIN
254
253
VREFCA
SDA
SCL
DQ45
DQ46
DQ47
DQ48
203
204
216
M_A_DQ40
M_A_DQ43
M_A_DQ47
M_A_DQ49
4,8
4,8
4,8
4,8
193
189
185
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
192
188
184 C757 C771 C576 C764
215 VDDQ 181 180
3/12 Tim 166
SA2
DQ49
DQ50
228
M_A_DQ52
M_A_DQ55
4,8
4,8
W>>K^dK^K/DD 175 VSS
VSS
VSS
VSS
176 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
260 229 171 172
SA1 DQ51 M_A_DQ51 4,8 VSS VSS
Modify,6/7 Tim 256 211 DIMM0_CHA_EVENT# 240_1%_04 R156 167 168
212 107 106
DQ53 M_A_DQ48 4,8 VSS VSS
224 103 102
225 99 98
92 237 93 94
CB0_NC DQ56 M_A_DQ61 4,8 VSS VSS
91 236 Remove DIMM setting res,6/7 Tim 89 90 VDDQ
101 249 85 86
105 250 81 82
DEL 1/12 CB3_NC DQ59 M_A_DQ60 4,8 VSS VSS
88 232 77 78
87 233 73 72
100 245 69 68
104 246 65 64 C268 C271 C776 C269
61 60
12 13 57 VSS VSS 56
VDDQ DM0*/DBI0* DQS0_T M_A_DQS0 4,8 VSS VSS 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
33 34 51 52
DM1*/DBI1* DQS1_T M_A_DQS1 4,8 VSS VSS
54 55 47 48
75 76 43 44
178 179 39 40
199 200 35 36
220 221 31 30 C603 C605 C275 C602
241 242 27 26
96 97 DEL 1/12 23 22 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
DM8*/DBI8* DQS8_T 19 VSS VSS 18
B 11 15 VSS VSS 14 B
DQS0_C M_A_DQS#0 4,8 VSS VSS
32 9 10
53 5 6 2.5V
74 1 2
177
DQS4_C M_A_DQS#4 4,8
198
219
240 D4AS0-26001-1P92 C756 C595 C754 C755
95 DEL 1/12
DIMM0_CHA_S2# 162 DQS8_C
S2*/C0 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
2/27 Tim DIMM0_CHA_S3# 165
S3*/C1
D4AS0-26001-1P92
VTT_MEM
W>d,Wt/d,/EϮϬϬD/>^ VREFCA_CHA_DIMM W>d,W>K^dK^K/DD
&ZKDd,^K/DDͲϬ VDDQ
W>>K^dK, Modify,4/2 Tim
DDR4_DRAMRST# C573 C572 C664 C806 C808
2/27 Tim
C777 0.1u_16V_X7R_04 *2.2u_10V_X5R_04 C761
10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04
R644
*0.1u_10V_X7R_04 0.1u_16V_X7R_04
1K_1%_04
R648 2_1%_04 R646 0_04

4 DDR_VREF_CA
Follow SKL MOW C810
R645 C809
0.022u_16V_X7R_04
A 1K_1%_04 0.1u_16V_X7R_04 7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,39,41,43,44,46,47 3.3VS A
5,7,8,9,10,17,44 VDDQ
R649 7,8,9,10,44 VTT_MEM
24.9_1%_04 7,8,9,10,42 2.5V
VREFCA_CHA_DIMM 8
dK,:/DDϭ͕Ϯ Title
[07] DDR4 CHA SO-DIMM_0
Custom SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
B - 8 DDR4 CHA SO-DIMM_0

Schematic Diagrams
DDR4 CHA SO-DIMM_1

5 4 3 2 1
JDIMM2A VDDQ VTT_MEM

Modify,3/12 Tim JDIMM2B
4
4
4
M_A_CK2
M_A_CK#2
M_A_CK3
137
139
138
140
CK0_T
CK0_C
CK1_T
DQ0
DQ1
DQ2
8
7
20
21
M_A_DQ5
M_A_DQ0
M_A_DQ2
4,7
4,7
4,7
163
160
159
VDD19
VDD18
VTT
258
2.5V CHA DIMM1
4 M_A_CK#3 CK1_C DQ3 M_A_DQ3 4,7 VDD17
4 154 259
DQ4 M_A_DQ1 4,7 VDD16 VPP2
4 M_A_CKE2 109 3 153 257
CKE0 DQ5 M_A_DQ4 4,7 VDD15 VPP1
4 M_A_CKE3 110 16 148
CKE1 DQ6 M_A_DQ6 4,7 VDD14 3.3VS
17 147
4 M_A_CS2# 149 28 142
S0* DQ8 M_A_DQ8 4,7 VDD12
4 M_A_CS3# 157 29 141
S1* DQ9 M_A_DQ12 4,7 VDD11
D 41 136 255 D
DQ10 M_A_DQ14 4,7 VDD10 VDDSPD
4 M_A_ODT2 155 42 135
ODT0 DQ11 M_A_DQ11 4,7 VDD9
4 M_A_ODT3 161 24 Modify,3/4 Tim 130 C277 C281
ODT1 DQ12 M_A_DQ9 4,7 VDD8
25 129
4,7 M_A_BG0 115 38 124 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
4,7 M_A_BG1
4,7 M_A_BA0
113
150 BG1 DQ15
37
50
M_A_DQ15
M_A_DQ17
4,7
4,7
TOP 123
118 VDD5
4,7 M_A_BA1 145 BA0 DQ16 49
M_A_DQ20 4,7
JDIMM2 = CHA DIMM1 001 117 VDD4
BA1 DQ17 62 112 VDD3
4,7
4,7
M_A_A0
M_A_A1
144
133 A0 DQ19
63
46
M_A_DQ18 4,7
111
VDD1 W>>K^dKW/E
A1 DQ20 M_A_DQ16 4,7 JDIMM4 = CHB DIMM1 011
4,7 M_A_A2 132 45 GND1
A2 DQ21 M_A_DQ21 4,7 MT1
4,7 M_A_A3 131 58 GND2
A3 DQ22 M_A_DQ19 4,7 MT2
4,7 M_A_A4 128 59
A4 DQ23 M_A_DQ22 4,7 VDDQ
4,7 M_A_A5 126 70
A5 DQ24 M_A_DQ25 4,7
4,7
4,7
M_A_A6
M_A_A7
127
122 A6 DQ25
71
83
M_A_DQ29
M_A_DQ30
4,7
4,7
251
247 VSS VSS
252
248 W>>K^dK^K/DD
A7 DQ26 VSS VSS
4,7 M_A_A8 125 84 243 244
A8 DQ27 M_A_DQ31 4,7 JDIMM1 = CHA DIMM0 000 VSS VSS
4,7 M_A_A9 121 66 239 238
4,7 M_A_A10 146 67 235 234
A10_AP DQ29 M_A_DQ28 4,7 VSS VSS
4,7 M_A_A11 120 79 231 230 C781 C778 C582 C579
4,7 M_A_A12 119 80 227 226
A12 DQ31 M_A_DQ26 4,7 JDIMM3 = CHB DIMM0 010 VSS VSS
4,7
4,7
M_A_A13
M_A_A14
158
151 A13
A14_WE*
DQ32
DQ33
174
173
M_A_DQ32
M_A_DQ37
4,7
4,7
BOT 223
217 VSS
VSS
VSS
VSS
222
218
4,7 M_A_A15 156 187 213 214

A15_CAS* DQ34 M_A_DQ39 4,7 VSS VSS
4,7 M_A_A16 152 186 209 210
A16_RAS* DQ35 M_A_DQ34 4,7 VSS VSS
Sheet 8 of 58
170 205 206
DQ36 M_A_DQ36 4,7 VDDQ VSS VSS
W>>K^dK^K/DD
169 201 202
4,7 M_A_ACT# 114 183 197 196 C584 C587 C581 C583
ACT* DQ38 M_A_DQ38 4,7 VSS VSS
182 193 192
143 195 DIMM1_CHA_EVENT# 240_1%_04 R624 189 188 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
C
4,7 DDR0_A_PARITY
4,7 DDR0_A_ALERT#
3/4 Tim
116
DIMM1_CHA_EVENT# 134
108
PARITY
ALERT*
EVENT*
RESET*
DQ40
DQ41
DQ42
DQ43
194
207
208
191
M_A_DQ41
M_A_DQ45
M_A_DQ46
M_A_DQ42
4,7
4,7
4,7
4,7
185
181
175
171
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
184
180
176
172
C
DDR4 CHA SO-
7 VREFCA_CHA_DIMM
7,9,10,15 SMB_DATA_MAIN
164
254
253
VREFCA
SDA
DQ45
DQ46
DQ47
190
203
204
216
M_A_DQ40
M_A_DQ43
M_A_DQ47
4,7
4,7
4,7
Remove DIMM setting res,6/7 Tim
167
107
103
99
VSS
VSS
VSS
VSS
VSS
VSS
168
106
102
98
VDDQ DIMM _1
7,9,10,15 SMB_CLK_MAIN SCL DQ48 M_A_DQ49 4,7 VSS VSS
215 93 94
3/12 Tim 166 228 89 90
260 229 85 86
Modify,6/7 Tim 3.3VS 256 211 81 82
212 77 78 C780 C608 C263 C262
224 73 72
225 69 68 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
92 237 65 64
91 236 61 60
101 249 57 56
105 250 51 52
DEL 1/12 CB3_NC DQ59 M_A_DQ60 4,7 VSS VSS
88 232 47 48
87 233 43 44 C772 C606 C276 C782
100 245 39 40
104 246 35 36 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
31 30
12 13 27 VSS VSS 26
VDDQ DM0*/DBI0* DQS0_T M_A_DQS0 4,7 VSS VSS
33 34 23 22
DM1*/DBI1* DQS1_T M_A_DQS1 4,7 VSS VSS 2.5V
54 55 19 18
75 76 15 14
178 179 9 10
199 200 5 6
220 221 1 2
B 241 242 C321 C278 C590 C591 B
DM7*/DBI7* DQS7_T M_A_DQS7 4,7
96 97
DM8*/DBI8* DQS8_T DEL 1/12 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
11 D4AS0-26001-1P40
32
53
74
177
198
DQS5_C M_A_DQS#5 4,7 VTT_MEM
219
240
95
DIMM1_CHA_S2# 162 DQS8_C
2/27 Tim S2*/C0 DEL 1/12
DIMM1_CHA_S3# 165 C617 C320 C236
S3*/C1
10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04
D4AS0-26001-1P40
W>d,Wt/d,/EϮϬϬD/>^
&ZKDd,^K/DDͲϬ
DDR4_DRAMRST# VREFCA_CHA_DIMM W>d,W>K^dK^K/DD
C266
C272 C571
*0.1u_10V_X7R_04
0.1u_16V_X7R_04 *2.2u_10V_X5R_04
A
Follow SKL MOW A
Title
7,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,39,41,43,44,46,47 3.3VS
[08] DDR4 CHA SO-DIMM_1
5,7,9,10,17,44 VDDQ
7,9,10,44 VTT_MEM
7,9,10,42 2.5V Custom SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
DDR4 CHA SO-DIMM_1 B - 9

Schematic Diagrams
DDR4 CHB SO-DIMM_0
5 4 3 2 1
JDIMM3A Modify,3/12 Tim

137 8
4 M_B_CK0
4 M_B_CK#0
4 M_B_CK1
4 M_B_CK#1
139
138
140
CK0_T
CK0_C
CK1_T
CK1_C
DQ0
DQ1
DQ2
DQ3
7
20
21
M_B_DQ0
M_B_DQ4
M_B_DQ7
M_B_DQ3
4,10
4,10
4,10
4,10
VDDQ
JDIMM3B
VTT_MEM CHB DIMM0
4
DQ4 M_B_DQ5 4,10
4 M_B_CKE0 109 3 Modify,3/4 Tim 163 258
CKE0 DQ5 M_B_DQ1 4,10 VDD19 VTT 2.5V
4 M_B_CKE1 110 16 160
CKE1 DQ6 M_B_DQ2 4,10 VDD18
17 159
DQ7 M_B_DQ6 4,10 VDD17
4 M_B_CS0# 149 28 154 259
S0* DQ8 M_B_DQ9 4,10 VDD16 VPP2
4 M_B_CS1# 157
S1* DQ9
29
41
M_B_DQ14
M_B_DQ13
4,10
4,10
TOP 153
148 VDD15 VPP1
257
4 M_B_ODT0 155 DQ10 42

M_B_DQ15 4,10
JDIMM2 = CHA DIMM1 001 147 VDD14
D 161 ODT0 DQ11 24 142 VDD13 3.3VS D
4 M_B_ODT1 ODT1 DQ12 M_B_DQ8 4,10 VDD12
4,10 M_B_BG0 115 DQ13
25
38
M_B_DQ10
M_B_DQ11
4,10
4,10
141
136 VDD11 255 W>>K^dKW/E
4,10 M_B_BG1 113 BG0 DQ14 37
M_B_DQ12 4,10
JDIMM4 = CHB DIMM1 011 135 VDD10 VDDSPD
150 BG1 DQ15 50 130 VDD9 C350 C351
4,10 M_B_BA0 BA0 DQ16 M_B_DQ21 4,10 VDD8
4,10 M_B_BA1 145 49 129
BA1 DQ17 M_B_DQ20 4,10 VDD7
62 124 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
DQ18 M_B_DQ22 4,10 VDD6
4,10 M_B_A0 144 63 123
A0 DQ19 M_B_DQ19 4,10 VDD5
4,10 M_B_A1 133 46 118
A1 DQ20 M_B_DQ16 4,10 VDD4
4,10 M_B_A2 132 45 117
A2 DQ21 M_B_DQ17 4,10 JDIMM1 = CHA DIMM0 000 VDD3
4,10 M_B_A3 131 58 112
A3 DQ22 M_B_DQ23 4,10 VDD2
4,10 M_B_A4 128 59 111
A4 DQ23 M_B_DQ18 4,10 VDD1
4,10 M_B_A5 126 70
A5 DQ24 M_B_DQ28 4,10
4,10 M_B_A6 127 71 GND1
A6 DQ25 M_B_DQ25 4,10 JDIMM3 = CHB DIMM0 010 MT1
4,10
4,10
M_B_A7
M_B_A8
122
125 A7
A8
DQ26
DQ27
83
84
M_B_DQ30
M_B_DQ27
4,10
4,10
BOT MT2
GND2
121 66 VDDQ
4,10 M_B_A9 A9 DQ28 M_B_DQ29 4,10
4,10
4,10
M_B_A10
M_B_A11
146
120 A10_AP DQ29
67
79
M_B_DQ24
M_B_DQ26
4,10
4,10
251
247 VSS VSS
252
248 W>>K^dK^K/DD
119 A11 DQ30 80 243 VSS VSS 244
4,10 M_B_A12 A12 DQ31 M_B_DQ31 4,10 VSS VSS
158 174 VDDQ 239 238
4,10
4,10
M_B_A13
M_B_A14 151 A13
A14_WE*
DQ32
DQ33
173
M_B_DQ36
M_B_DQ32
4,10
4,10
W>>K^dK^K/DD 235 VSS
VSS
VSS
VSS
234
4,10 M_B_A15 156 187 231 230 C773 C785 C586 C783
A15_CAS* DQ34 M_B_DQ38 4,10 VSS VSS
4,10 M_B_A16 152 186 DIMM0_CHB_EVENT# 240_1%_04 R625 227 226
A16_RAS* DQ35 M_B_DQ39 4,10 VSS VSS
Sheet 9 of 58
DQ36 M_B_DQ33 4,10 VSS VSS
169 217 218
4,10 M_B_ACT# 114 183 213 214
ACT* DQ38 M_B_DQ35 4,10 VSS VSS
182 209 210
4,10 DDR1_B_PARITY 143 195 205 206
DDR4 CHB SO-

PARITY DQ40 M_B_DQ41 4,10 VSS VSS
116 194 201 202
4,10 DDR1_B_ALERT# ALERT* DQ41 M_B_DQ45 4,10 VSS VSS
3/4 Tim DIMM0_CHB_EVENT# 134 207 197 196 C585 C774 C209 C210
EVENT* DQ42 M_B_DQ46 4,10 VSS VSS
7,8,10,17 DDR4_DRAMRST# 108 208 193 192
C RESET* DQ43 M_B_DQ43 4,10 Remove DIMM setting res,6/7 Tim VSS VSS C
DIMM _0
VREFCA_CHB_DIMM 164 190 185 184
VREFCA DQ45 M_B_DQ44 4,10 VSS VSS
203 181 180
7,8,10,15 SMB_DATA_MAIN 254 204 175 176
SDA DQ47 M_B_DQ47 4,10 VSS VSS
253 216 171 172
7,8,10,15 SMB_CLK_MAIN SCL DQ48 M_B_DQ49 4,10 VSS VSS
215 167 168
3/12 Tim 166 228 107 106
SA2 DQ50 M_B_DQ51 4,10 VSS VSS VDDQ
3.3VS 260 229 103 102
SA1 DQ51 M_B_DQ50 4,10 VSS VSS
Modify,6/7 Tim 256 211 99 98
212 93 94
224 89 90
225 85 86
92 237 81 82
CB0_NC DQ56 M_B_DQ61 4,10 VSS VSS
91 236 77 78 C768 C270 C769 C599
101 249 73 72
DEL 1/12 CB3_NC DQ59 M_B_DQ62 4,10 VSS VSS
88 232 65 64
87 233 61 60
100 245 57 56
104 246 51 52
47 48
12 13 43 VSS VSS 44 C763 C597 C274 C760
VDDQ DM0*/DBI0* DQS0_T M_B_DQS0 4,10 VSS VSS
33 34 39 40
DM1*/DBI1* DQS1_T M_B_DQS1 4,10 VSS VSS
75 76 31 30
178 179 27 26
199 200 23 22
DM5*/DBI5* DQS5_T M_B_DQS5 4,10 VSS VSS 2.5V
220 221 19 18
241 242 15 14
96 97 9 10
DM8*/DBI8* DQS8_T DEL 1/12 5 VSS VSS 6
11 1 VSS VSS 2
B DQS0_C M_B_DQS#0 4,10 VSS VSS B
32 C592 C593 C323 C324
DQS1_C M_B_DQS#1 4,10
53
177 D4AS0-26001-1P52
198
219
240
95
DIMM0_CHB_S2# 162 DQS8_C DEL 1/12
2/27 Tim DIMM0_CHB_S3# 165 S2*/C0 VTT_MEM
S3*/C1
D4AS0-26001-1P52
VDDQ C807 C663 C619
W>>K^dK, 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04
C770
R621
0.1u_16V_X7R_04
1K_1%_04
W>d,Wt/d,/EϮϬϬD/>^ VREFCA_CHB_DIMM W>d,W>K^dK^K/DD
&ZKDd,^K/DDͲϭ R623 2_1%_04 R622 0_04
4 DDR1_VREF_DQ
DDR4_DRAMRST# C765 C766
C811 C762 R647
C267 0.1u_16V_X7R_04 *2.2u_10V_X5R_04
0.022u_16V_X7R_04 0.1u_16V_X7R_04 1K_1%_04
*0.1u_10V_X7R_04
R650
24.9_1%_04
A A
Follow SKL MOW VREFCA_CHB_DIMM
VREFCA_CHB_DIMM 10
dK,:/DDϯ͕ϰ
Title
[09] DDR4 CHB SO-DIMM_0
7,8,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,39,41,43,44,46,47 3.3VS
5,7,8,10,17,44 VDDQ Size Document Number Rev
7,8,10,44 VTT_MEM
7,8,10,42 2.5V

5 4 3 2 1
B - 10 DDR4 CHB SO-DIMM_0

Schematic Diagrams
DDR4 CHB SO-DIMM_1

5 4 3 2 1
JDIMM4A
Modify,3/12 Tim
CHB DIMM1
4 M_B_CK2 137 8
CK0_T DQ0 M_B_DQ0 4,9
4 M_B_CK#2 139 7
CK0_C DQ1 M_B_DQ4 4,9
4 M_B_CK3 138 20
CK1_T DQ2 M_B_DQ7 4,9
4 M_B_CK#3 140 21
CK1_C DQ3 M_B_DQ3 4,9 VDDQ VTT_MEM
4
DQ4 M_B_DQ5 4,9 JDIMM4B
4 M_B_CKE2 109 3
CKE0 DQ5 M_B_DQ1 4,9
4 M_B_CKE3 110 16
CKE1 DQ6 M_B_DQ2 4,9
17 163 258
DQ7 M_B_DQ6 4,9 VDD19 VTT 2.5V
4 M_B_CS2# 149 28 160
D S0* DQ8 M_B_DQ9 4,9 VDD18 D
4 M_B_CS3# 157 29 159
S1* DQ9 M_B_DQ14 4,9 VDD17
41 154 259
DQ10 M_B_DQ13 4,9 VDD16 VPP2
4 M_B_ODT2 155 42 153 257
ODT0 DQ11 M_B_DQ15 4,9 VDD15 VPP1
4 M_B_ODT3 161 24 148
ODT1 DQ12 M_B_DQ8 4,9 VDD14
25 147
DQ13 M_B_DQ10 4,9 VDD13
4,9 M_B_BG0 115 38 142 3.3VS
BG0 DQ14 M_B_DQ11 4,9 VDD12
4,9 M_B_BG1
4,9 M_B_BA0
113
150 BG1 DQ15
37
50
M_B_DQ12
M_B_DQ21
4,9
4,9
141
136 VDD11 255 W>>K^dKW/E
145 BA0 DQ16 49 135 VDD10 VDDSPD
4,9 M_B_BA1 BA1 DQ17 M_B_DQ20 4,9 VDD9
62 130 C238 C237
DQ18 M_B_DQ22 4,9 VDD8
4,9 M_B_A0 144 63 129
A0 DQ19 M_B_DQ19 4,9 Modify,3/12 Tim VDD7
4,9 M_B_A1 133 46 124 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
A1 DQ20 M_B_DQ16 4,9 VDD6
4,9 M_B_A2 132 45 123
4,9 M_B_A3 131 58 118
4,9 M_B_A4 128 59 117
M_B_DQ18 4,9
4,9 M_B_A5 126
127
A4
A5
DQ23
DQ24
70
71
M_B_DQ28 4,9 TOP 112
111
VDD3
VDD2
4,9 M_B_A6
122 A6 DQ25 83
M_B_DQ25 4,9 JDIMM2 = CHA DIMM1 001 VDD1
4,9 M_B_A7 A7 DQ26 M_B_DQ30 4,9
4,9 M_B_A8 125 84 GND1
A8 DQ27 M_B_DQ27 4,9 MT1
4,9 M_B_A9 121 66 GND2
A9 DQ28 M_B_DQ29 4,9 MT2
146 67
4,9 M_B_A10
120 A10_AP DQ29 79
M_B_DQ24 4,9 JDIMM4 = CHB DIMM1 011 VDDQ
4,9 M_B_A11 A11 DQ30 M_B_DQ26 4,9
4,9
4,9
M_B_A12
M_B_A13
119
158 A12 DQ31
80
174
M_B_DQ31
M_B_DQ36
4,9
4,9
251
247 VSS VSS
252
248 W>>K^dK^K/DD
151 A13 DQ32 173 243 VSS VSS 244
4,9 M_B_A14 A14_WE* DQ33 M_B_DQ32 4,9 VSS VSS
4,9 M_B_A15 156 187 239 238
A15_CAS* DQ34 M_B_DQ38 4,9 VSS VSS
4,9 M_B_A16 152 186 235 234
M_B_DQ39 4,9
Sheet 10 of 58
A16_RAS* DQ35 170 231 VSS VSS 230 C578 C577 C574 C575
DQ36 169
M_B_DQ33 4,9 JDIMM1 = CHA DIMM0 000 227 VSS VSS 226
4,9 M_B_ACT# 114 183 223 222 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
ACT* DQ38 M_B_DQ35 4,9 VSS VSS
182 217 218
143 195 213 214
C
4,9 DDR1_B_PARITY
4,9 DDR1_B_ALERT#
3/4 Tim
DIMM1_CHB_EVENT#
116
134
108
PARITY
ALERT*
EVENT*
RESET*
DQ40
DQ41
DQ42
DQ43
194
207
208
191
M_B_DQ41
M_B_DQ45
M_B_DQ46
M_B_DQ43
4,9
4,9
4,9
4,9
BOT JDIMM3 = CHB DIMM0 010 209
205
201
197
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
210
206
202
196 C208 C598 C759 C580
C
DDR4 CHB SO-
9 VREFCA_CHB_DIMM
7,8,9,15 SMB_DATA_MAIN
164
254
253
VREFCA
SDA
DQ45
DQ46
DQ47
190
203
204
216
M_B_DQ44
M_B_DQ42
M_B_DQ47
4,9
4,9
4,9
VDDQ
193
189
185
181
VSS
VSS
VSS
VSS
VSS
VSS
192
188
184
180
DIMM _1
7,8,9,15 SMB_CLK_MAIN SCL DQ48
DQ49
215
M_B_DQ49
M_B_DQ48
4,9
4,9 W>>K^dK^K/DD 175 VSS
VSS
VSS
VSS
176
166 228 171 172
3/12 Tim SA2 DQ50 M_B_DQ51 4,9 VSS VSS
3.3VS 260 229 DIMM1_CHB_EVENT# 240_1%_04 R626 167 168
256 211 107 106
Modify,6/7 Tim SA0 DQ52 M_B_DQ52 4,9 VSS VSS VDDQ
212 103 102
224 99 98
225 93 94
92 237 89 90
91 236 85 86
101 249 Remove DIMM setting res,6/7 Tim 81 82
DEL 1/12 105 250 77 78 C779 C265 C609 C264
88 232 73 72
100 245 65 64
104 246 61 60
57 56
12 13 51 VSS VSS 52
VDDQ DM0*/DBI0* DQS0_T M_B_DQS0 4,9 VSS VSS
33 34 47 48
54 55 43 44 C601 C261 C604 C786
75 76 39 40
199 200 31 30
220 221 27 26
241 242 23 22
B DM7*/DBI7* DQS7_T M_B_DQS7 4,9 VSS VSS 2.5V B
96 97 19 18
DM8*/DBI8* DQS8_T DEL 1/12 VSS VSS
15 14
11 9 VSS VSS 10
DQS0_C M_B_DQS#0 4,9 VSS VSS
32 5 6
53 1 2
74 C319 C589 C280 C279
177
219 D4AR0-26001-1P40
240
95
DIMM1_CHB_S2# 162 DQS8_C DEL 1/12
2/27 Tim DIMM1_CHB_S3# 165 S2*/C0
S3*/C1
VTT_MEM
D4AR0-26001-1P40
C211 C618 C322
10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04

W>d,Wt/d,/EϮϬϬD/>^ VREFCA_CHB_DIMM W>d,W>K^dK^K/DD
&ZKDd,^K/DDͲϭ
DDR4_DRAMRST# C273 C767
C607 0.1u_16V_X7R_04 *2.2u_10V_X5R_04
*0.1u_10V_X7R_04
A Follow SKL MOW A
Title
[10] DDR4 CHB SO-DIMM_1
7,8,9,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,39,41,43,44,46,47 3.3VS
5,7,8,9,17,44 VDDQ Size Document Number Rev
7,8,9,44 VTT_MEM
7,8,9,42 2.5V

5 4 3 2 1
DDR4 CHB SO-DIMM_1 B - 11

Schematic Diagrams
MXM 3.0 Master

5 4 3 2 1
MXM1_CLKREQ# 18
PWR_SRC PWR_SRC
MXM_RST# 12
J_MXM1B
153 154 3.3VS
18 CLK_PCIE_MXM1#
MXM 3.0 E1-1
E1-2
J_MXM1A
PWR_SRC PWR_SRC
E2-1
E2-2
18 CLK_PCIE_MXM1 155
157
159
PEX_REFCLK#
PEX_REFCLK
GND
CLK_REQ#
PEX_RST#
VGA_DDC_DAT
156
158
160 R568
MXM_RST#
C615 *0.1u_16V_Y5V_04
E1-3 PWR_SRC PWR_SRC E2-3 161 RSVD VGA_DDC_CLK 162 *10mil_short R580
5
PWR_SRC PWR_SRC RSVD VGA_VSYNC U45
E1-4 E2-4 163 164
PWR_SRC(10A)--7-20V E1-5 PWR_SRC PWR_SRC E2-5 165 RSVD VGA_HSYNC 166 100K_04 1 PLT_RST# 15,20
E1-6 PWR_SRC PWR_SRC E2-6 3.3VS 167 RSVD GND 168 4
5VRUN(2.5A)--5V E1-7 PWR_SRC PWR_SRC E2-7 169 RSVD VGA_RED 170 2
E1-8 PWR_SRC PWR_SRC E2-8 171 LVDS_UCLK# VGA_GREEN 172
3VRUN(1A)--3.3V E1-9 PWR_SRC PWR_SRC E2-9 173 LVDS_UCLK VGA_BLUE 174 *TC7SZ08FU
3
Followℙ䓐䶂嶗,3/26 Tim
PWR_SRC PWR_SRC GND GND
5
D E1-10 E2-10 U46 175 176 D
E3-1 PWR_SRC PWR_SRC E4-1 1 177 LVDS_UTX3# LVDS_LCLK# 178 Modify,4/4 Tim
GND GND VBATT_BOOST# 12,22 LVDS_UTX3 LVDS_LCLK
E3-2 E4-2 4 179 180
E3-3 GND GND E4-3 2 181 GND GND 182 R579 0_04
GND GND AC/BATL# 12,45 LVDS_UTX2# LVDS_LTX3# Cancel LVDS circuit,
E3-4 E4-4 183 184
E3-5 GND GND E4-5 74AHC1G32GW 185 LVDS_UTX2 LVDS_LTX3 186 2/2 Tim
3
GND GND GND GND
MXM 3.0 MODULE BOARD CONNECTOR

Modify net name,6/7 Tim E3-6 E4-6 187 188
GND GND LVDS_UTX1# LVDS_LTX2#
E3-7
GND GND
E4-7 189
LVDS_UTX1 LVDS_LTX2
190 EC CONTROL
5V_RUN E3-8 E4-8 Modify net name,6/7 Tim 191 192 R560 *0_04
GND GND GND GND DGPU_RST# 22
E3-9 E4-9 R561 *47K_04 193 194
GND GND 3V3_RUN LVDS_UTX0# LVDS_LTX1#
E3-10 E4-10 195 196

1 GND GND 2 197 LVDS_UTX0 LVDS_LTX1 198 R559 *0_04
MXM1_PRSNT# 18,22 DGPU_RST#_PCH 18
5V PRSNT_R# GND GND
Display Port C(HDMI)

3 4 199 200
5V WAKE# 14 HDMI_DATA2N DP_C_L0# LVDS_LTX0#
5
5V PWR_GOOD
6 VGA_PWRGD1 R562 10K_04
3.3VS 14 HDMI_DATA2P
201
DP_C_L0 LVDS_LTX0
202 PCH CONTROL
7 8 R587 0_04 ALL_SYS_PWRGD 12,13,20,22 203 204
5V PWR_EN GND GND for NV & AMD MXM card ℙ䓐
Display Port D(eDP)

9 10 R542 *0_04 205 206

5V RSVD dGPU_PWR_EN# 12,18 14 HDMI_DATA1N DP_C_L1# DP_D_L0# DP_TXN0 13
11 12 207 208
GND RSVD Follow NV Recommend, 14 HDMI_DATA1P DP_C_L1 DP_D_L0 DP_TXP0 13
*100K_04 HDMI_CEC1 13 14 209 210
3.3VS R616 GND RSVD 4/16 Tim GND GND
nVidia recommend 1/10 15
GND RSVD
16 PWRGD TO RESET 军⮹200us 14 HDMI_DATA0N
211
DP_C_L2# DP_D_L1#
212
DP_TXN1 13
17 18 R588 10K_04 213 214
GND PWR_LEVEL 3.3VS 14 HDMI_DATA0P DP_C_L2 DP_D_L1 DP_TXP1 13
R611 0_04 PEX_STD_SW#1 19 20 TH_OVERT#1 R589 100K_04 215 216
PEX_STD_SW# TH_OVERT# 3.3VS GND GND
R612 *0_04 MXM_VGA_DISABLE# 21 22 TH_ALERT#1 R563 100K_04 217 218
VGA_DISABLE# TH_ALERT# 14 HDMI_CLOCKN DP_C_L3# DP_D_L2# DP_TXN2 13
13 VGA_ENAVDD 23 24 nVidia recommend 1/10 219 220
PNL_PWR_EN TH_PWM 14 HDMI_CLOCKP DP_C_L3 DP_D_L2 DP_TXP2 13
13 VGA_BKLTEN 25 26 TH_OVERT#1 22 221 222
27 PNL_BL_EN GPIO0 28 223 GND GND 224
13 VGA_BKLPWM PNL_BL_PWM GPIO1
Max: 0.5inch 14 HDMI_CTRLDATA DP_C_AUX# DP_D_L3# DP_TXN3 13
HDMI_CEC1 29 30 nVidia recommend,1/22 Tim 225 226
Sheet 11 of 58 31
33
35
37
HDMI_CEC
DVI_HPD
LVDS_DDC_DAT
LVDS_DDC_CLK
GPIO2
SMB_DAT
SMB_CLK
GND
32
34
36
38
SMD_VGA_THERM_R
SMC_VGA_THERM_R
R564
R565
100K_04
100K_04
3.3VS
14 HDMI_CTRLCLK
SWAP HDMI 0,1,2->2,1,0

Tim 1/27
227
229
231
233
DP_C_AUX
RSVD
RSVD
RSVD
DP_D_L3
GND
DP_D_AUX#
DP_D_AUX
228
230
232
234
DP_TXP3 13
DP_AUX# 13
DP_AUX 13
HDMI_HPD 14
MXM 3.0 Master 39 GND OEM 40 235 RSVD DP_C_HPD 236

C OEM OEM RSVD DP_D_HPD EDP_HPD 13 C
41 42 OEM4 R590 0_04 237 238
OEM OEM GPU_EVENT# 16 RSVD RSVD
R617 0_04 OEM5 43 44 239 240
18 GC6_FB_EN OEM OEM RSVD RSVD
OEM7 45 46 241 242
47 OEM GND 48 243 RSVD RSVD 244
GND PEX_TX15# check OEM4,5 to PCH GPIO,1/12 RSVD GND
3.3VS 49 50 245 246
PEX_RX15# PEX_TX15 RSVD DP_B_L0# MUX_0N 32
51 52 247 248
'Ͳ^zE PEX_RX15 GND RSVD DP_B_L0 MUX_0P 32
DDI1(MUX)
53 54 249 250
55 GND PEX_TX14# 56 251 RSVD GND 252
Modify value,6/15 Tim R637 PEX_RX14# PEX_TX14 GND DP_B_L1# MUX_1N 32
57 58 253 254
Display Port(mDP_A)
PEX_RX14 GND 31 mDPA_0N DP_A_L0# DP_B_L1 MUX_1P 32
100K_04 59 60 255 256
GND PEX_TX13# 31 mDPA_0P DP_A_L0 GND
61 62 257 258
PEX_RX13# PEX_TX13 GND DP_B_L2# MUX_2N 32
63 64 259 260
R618 0_04 OEM7 65 66 261 262
13 FRAME_LOCK# GND PEX_TX12# 31 mDPA_1P DP_A_L1 GND
67 68 263 264
PEX_RX12# PEX_TX12 GND DP_B_L3# MUX_3N 32
69 70 265 266
3/5 Tim 71 72 267 268
GND PEX_TX11# 31 mDPA_2P DP_A_L2 GND
73 74 269 270
PEX_RX11# PEX_TX11 GND DP_B_AUX# MUX_AUXN 32
75 76 271 272
PEX_RX11 GND 31 mDPA_3N DP_A_L3# DP_B_AUX MUX_AUXP 32
77 78 273 274 MUX_HPD 32
VGA_ENAVDD R613 100K_04 GND PEX_TX10# 31 mDPA_3P DP_A_L3 DP_B_HPD
79 80 275 276 mDPA_HPD 31
81 PEX_RX10# PEX_TX10 82 277 GND DP_A_HPD 278
PEX_RX10 GND 31 mDPA_AUXN DP_A_AUX# 3V3
VGA_BKLTEN R614 100K_04 83 84 279 280 3V3_RUN
GND PEX_TX9# 31 mDPA_AUXP DP_A_AUX 3V3
85 86 281
PEX_RX9# PEX_TX9 PRSNT_L# Modify net name,6/7 Tim
VGA_BKLPWMR615 100K_04 87 88
89 PEX_RX9 GND 90 91782-3140M-NV-01
91 GND PEX_TX8# 92
93 PEX_RX8# PEX_TX8 94
PEX_RX8 GND PEG_TX#[0..7] 2
2 PEG_RX#[0..7] 95 96 PEG_TX#7 PEG_TX[0..7] 2
GND PEX_TX7#
2 PEG_RX[0..7] PEG_RX#7
PEG_RX7
97
99 PEX_RX7#
PEX_RX7
PEX_TX7
GND
98
100
PEG_TX7
PEG_TX#6
3.3VS
3V3_RUN
101 102
B PEG_RX#6 103 GND PEX_TX6# 104 PEG_TX6 5VS VIN PWR_SRC 3.3VS PJ67 3V3_RUN B
PEG_RX6 105 PEX_RX6# PEX_TX6 106 R566 R567 14A Modify,3/10 Tim 14A *2mm
107 PEX_RX6
GND
GND
PEX_TX5#
108 PEG_TX#5 2A 1 2 2A
PEG_RX#5 109 110 PEG_TX5 2.2K_04 2.2K_04
PEX_RX5# PEX_TX5 PJ311 2*OPEN-14mm
2
PEG_RX5 111 112
G
113 PEX_RX5 GND 114 PEG_TX#4 DEFAULT SHORT
PEG_RX#4 115 GND PEX_TX4# 116 PEG_TX4 SMD_VGA_THERM_R 1 6
PEX_RX4# PEX_TX4 SMD_VGA_THERM 22,26,38 Modify 3V,5V net name,6/7 Tim
PEG_RX4 117 118 Modify,4/13 Tim STUFF,6/12 Tim
PEX_RX4 GND
5
8
D
119 120 PEG_TX#3
G
GND PEX_TX3# Q36A
5V_RUN
R533
C614
PEG_RX#3 121 122 PEG_TX3 3 7
PEX_RX3# PEX_TX3 3MTDK5S6R
R529
C163 *0.1u_50V_Y5V_06
C171 *0.1u_50V_Y5V_06
PEG_RX3 123 124 SMC_VGA_THERM_R 4 2 6
PEX_RX3 GND SMC_VGA_THERM 22,26,38 1 5 +
125 134 5VS PJ69
GND GND 5V_RUN
D
133 136 PEG_TX#2 *3mm
GND PEX_TX2#
3A 3A
330u_25V_RGA331M1EBK-0811
PEG_RX#2 135 138 PEG_TX2 Q36B MTDK5S6R Modify value, C541 Q11
4
PEX_RX2# PEX_TX2 8/14 Tim P2003EVG 1 2
PEG_RX2 137 140
PEX_RX2 GND
20K_04
139 142 PEG_TX#1 8
GND PEX_TX1#
*100K_04
PEG_RX#1 141 144 PEG_TX1 *0.01u_50V_X7R_04 3 7 DEFAULT SHORT
PEG_RX1 143 PEX_RX1# PEX_TX1 146 R540 2 6
145 PEX_RX1 GND 148 PEG_TX#0 1 5
PEG_RX#0 147 GND PEX_TX0# 150 PEG_TX0 PWR_SRC 100K_04
PEG_RX0 149 PEX_RX0# PEX_TX0 152 Q8
6
151 PEX_RX0 GND J_DC1 R539 20K_04 P2003EVG D Modify for no stuff,
GND 6/7 Tim
4 2G
91782-3140M-NV-01
Modify net name,22uF Modify net name,6/7 Tim 3 5V Q30A S
1
PWR_SRC 6/7 Tim 5V_RUN 3V3_RUN PWR_SRC 2 MTDK5S6R
Modify for no stuff, 1
nVidia recommend ,1/20 Tim 6/7 Tim
4PIN_CONN_VIN R534
CLOSE TO MXM PIN E1
CLOSE TO MXM PIN E2
CLOSE TO MXM CONN.
CLOSE TO MXM CONN.
Protect for plugging MXMcard
3
C709 C797 C795 C715 C799 C642 C641 C796 C620 C798 C711 C713 C714 C712 C710 10K_04 D
Modify,3/18 Tim Q30B while battery mode
10u_25V_X5R_08
4.7u_25V_X5R_08
22u_25V_X5R_08
*4.7u_25V_X5R_08
4.7u_25V_X5R_08
*4.7u_25V_X5R_08
4.7u_25V_X5R_08
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_50V_Y5V_06
0.1u_50V_Y5V_06
*0.1u_50V_Y5V_06
*0.01u_50V_X7R_04
0.01u_50V_X7R_04
A 5G A
*4.7u_25V_X5R_08
MTDK5S6R
S
Modify value,
4
D
ON Q31 8/14 Tim
R541 0_04 dGPU_EN# G MTN7002ZHS3

14,31,32,41,44 SUSB
12 dGPU_EN#
S
Title
Modify,6/7 Tim 12,13,14,15,22,25,38,39,41,44 5VS
[11] MXM 3.0 MASTER
7,8,9,10,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,39,41,43,44,46,47 3.3VS Size Document Number Rev
12,13,22,38,41,42,43,44,45,46,47,48,49
12,14,20,26,30,38,40,41,43,44,46,47,48
VIN
5V Custom SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
B - 12 MXM 3.0 Master

Schematic Diagrams
MXM 3.0 Slave
5 4 3 2 1
J_MXM2B
PWR_SRC2 PWR_SRC2 18 CLK_PCIE_MXM2# 153 154
PEX_REFCLK# CLK_REQ# MXM2_CLKREQ# 18
18 CLK_PCIE_MXM2 155 156
MXM_RST# 11
MXM 3.0 E1-1
E1-2
J_MXM2A
PWR_SRC PWR_SRC
E2-1
E2-2
157
159
161
PEX_REFCLK
GND
RSVD
PEX_RST#
VGA_DDC_DAT
VGA_DDC_CLK
158
160
162
E1-3 PWR_SRC PWR_SRC E2-3 163 RSVD VGA_VSYNC 164
E1-4 PWR_SRC PWR_SRC E2-4 165 RSVD VGA_HSYNC 166
PWR_SRC(10A)--7-20V E1-5 PWR_SRC PWR_SRC E2-5 167 RSVD GND 168
E1-6 PWR_SRC PWR_SRC E2-6 3.3VS 169 RSVD VGA_RED 170
5VRUN(2.5A)--5V E1-7 PWR_SRC PWR_SRC E2-7 171 LVDS_UCLK# VGA_GREEN 172
E1-8 PWR_SRC PWR_SRC E2-8 173 LVDS_UCLK VGA_BLUE 174
3VRUN(1A)--3.3V E1-9 PWR_SRC PWR_SRC E2-9 Followℙ䓐䶂嶗,3/26 Tim 175 GND GND 176
PWR_SRC PWR_SRC LVDS_UTX3# LVDS_LCLK#
5
D E1-10 E2-10 U47 177 178 D
E3-1 PWR_SRC PWR_SRC E4-1 1 179 LVDS_UTX3 LVDS_LCLK 180
GND GND VBATT_BOOST# 11,22 GND GND
E3-2 E4-2 4 181 182
E3-3 GND GND E4-3 2 183 LVDS_UTX2# LVDS_LTX3# 184
GND GND AC/BATL# 11,45 LVDS_UTX2 LVDS_LTX3
E3-4 E4-4 185 186
GND GND GND GND

Modify net name, E3-5 E4-5 74AHC1G32GW 187 188
3
6/7 Tim E3-6 GND GND E4-6 189 LVDS_UTX1# LVDS_LTX2# 190
E3-7 GND GND E4-7 191 LVDS_UTX1 LVDS_LTX2 192
5V_RUN2 E3-8 GND GND E4-8 193 GND GND 194
E3-9 GND GND E4-9 R569 *47K_04 Modify net name, 195 LVDS_UTX0# LVDS_LTX1# 196
GND GND 3V3_RUN2 6/7 Tim LVDS_UTX0 LVDS_LTX1

E3-10 E4-10 197 198
1 GND GND 2 199 GND GND 200
5V PRSNT_R# MXM2_PRSNT# 18,22 DP_C_L0# LVDS_LTX0#
3 4 201 202
5V WAKE# DP_C_L0 LVDS_LTX0
5 6 VGA_PWRGD2 R570 10K_04 203 204
5V PWR_GOOD 3.3VS GND GND
7 8 R571 0_04 ALL_SYS_PWRGD 11,13,20,22 205 206
9 5V PWR_EN 10 R806 *0_04 207 DP_C_L1# DP_D_L0# 208
5V RSVD dGPU_PWR_EN# 11,18 Follow NV Recommend, DP_C_L1 DP_D_L0
11 12 4/16 Tim 209 210
13 GND RSVD 14 211 GND GND 212
15 GND RSVD 16 213 DP_C_L2# DP_D_L1# 214
17 GND RSVD 18 R572 10K_04 215 DP_C_L2 DP_D_L1 216
GND PWR_LEVEL 3.3VS GND GND
R619 0_04 PEX_STD_SW#2 19 20 TH_OVERT#2 R573 100K_04 217 218
PEX_STD_SW# TH_OVERT# 3.3VS DP_C_L3# DP_D_L2#
R620 0_04 VGA_DISABLE
nVidia recommend,3/5 Tim
21
23
25
27
VGA_DISABLE#
PNL_PWR_EN
PNL_BL_EN
TH_ALERT#
TH_PWM
GPIO0
22
24
26
28
TH_ALERT#2 R574 100K_04
FOR nv recommend
TH_OVERT#2 22
219
221
223
225
DP_C_L3
GND
DP_C_AUX#
DP_D_L2
GND
DP_D_L3#
220
222
224
226
Sheet 12 of 58
Max: 0.5inch
MXM 3.0 Slave
29 PNL_BL_PWM GPIO1 30 nVidia recommend,1/22 Tim 227 DP_C_AUX DP_D_L3 228
31 HDMI_CEC GPIO2 32 SMD_VGA_THERM_R2 R575 100K_04 229 RSVD GND 230
DVI_HPD SMB_DAT 3.3VS RSVD DP_D_AUX#
33 34 SMC_VGA_THERM_R2 R578 100K_04 231 232
35 LVDS_DDC_DAT SMB_CLK 36 233 RSVD DP_D_AUX 234
LVDS_DDC_CLK GND FOR nv recommend RSVD DP_C_HPD
C 37 38 235 236 C
39 GND OEM 40 237 RSVD DP_D_HPD 238
41 OEM OEM 42 239 RSVD RSVD 240
43 OEM OEM 44 241 RSVD RSVD 242
45 OEM OEM 46 3.3VS 243 RSVD RSVD 244
47 OEM GND 48 245 RSVD GND 246
49 GND PEX_TX15# 50 247 RSVD DP_B_L0# 248
51 PEX_RX15# PEX_TX15 52 5VS 249 RSVD DP_B_L0 250
53 PEX_RX15 GND 54 R576 R577 251 RSVD GND 252
55 GND PEX_TX14# 56 253 GND DP_B_L1# 254
57 PEX_RX14# PEX_TX14 58 *2.2K_04 *2.2K_04 255 DP_A_L0# DP_B_L1 256
59 PEX_RX14 GND 60 257 DP_A_L0 GND 258
GND PEX_TX13# GND DP_B_L2#
2
61 62 259 260
G
63 PEX_RX13# PEX_TX13 64 1/29 Tim 261 DP_A_L1# DP_B_L2 262
65 PEX_RX13 GND 66 SMD_VGA_THERM_R2 1 6 263 DP_A_L1 GND 264
GND PEX_TX12# SMD_BAT 22,23,45 GND DP_B_L3#
67 68 265 266
PEX_RX12# PEX_TX12 DP_A_L2# DP_B_L3
D
69 70 267 268
G
71 PEX_RX12 GND 72 Q37A 269 DP_A_L2 GND 270
73 GND PEX_TX11# 74 SMC_VGA_THERM_R2 4 3 MTDK5S6R 271 GND DP_B_AUX# 272
PEX_RX11# PEX_TX11 SMC_BAT 22,23,45 DP_A_L3# DP_B_AUX
75 76 273 274
PEX_RX11 GND S DP_A_L3 DP_B_HPD
D
77 78 275 276
GND PEX_TX10# Q37B Modify value, GND DP_A_HPD
79 80 277 278
81 PEX_RX10# PEX_TX10 82 MTDK5S6R 8/14 Tim 279 DP_A_AUX# 3V3 280
PEX_RX10 GND DP_A_AUX 3V3 3V3_RUN2
83 84 281
85 GND PEX_TX9# 86 PRSNT_L#
87 PEX_RX9# PEX_TX9 88 91782-3140M-NV-01
89 PEX_RX9 GND 90
91 GND PEX_TX8# 92
93 PEX_RX8# PEX_TX8 94
B PEX_RX8 GND PEG_TX#[8..15] 2 B
2 PEG_RX#[8..15]
2 PEG_RX[8..15] PEG_RX#15
PEG_RX15
95
97 GND
PEX_RX7#
PEX_TX7#
PEX_TX7
96
98
PEG_TX#15
PEG_TX15
PEG_TX[8..15] 2 VIN
14A 14A
PWR_SRC2 3VRUN2
99 100 PJ651 2*OPEN-14mm
101 PEX_RX7 GND 102 PEG_TX#14
GND PEX_TX6# 3.3VS PJ68 3V3_RUN2
PEG_RX#14 103 104 PEG_TX14 8 *2mm
PEG_RX14 105
107
PEX_RX6#
PEX_RX6
PEX_TX6
GND
106
108 PEG_TX#13
Modify,4/13 Tim
3 7 2A 1 2 2A
R548
R547
GND PEX_TX5# 2 6
C643
PEG_RX#13 109 110 PEG_TX13 1 5
PEX_RX5# PEX_TX5
PEG_RX13 111
PEX_RX5 GND
112 DEFAULT SHORT
113 114 PEG_TX#12 PWR_SRC2 +
GND PEX_TX4# Q35
4
PEG_RX#12 115 116 PEG_TX12 C564 *0.01u_50V_X7R_04 P2003EVG Modify 3V,5V net name,6/7 Tim
PEX_RX4# PEX_TX4
330u_25V_RGA331M1EBK-0811
PEG_RX12 117 118 J_DC2
*100K_04
PEX_RX4 GND 8
119 120 PEG_TX#11
5VRUN2
20K_04
GND PEX_TX3# 4 3 7
PEG_RX#11 121 122 PEG_TX11 R550 2 6
PEX_RX3# PEX_TX3 3
PEG_RX11 123 124 1 5
PEX_RX3 GND 2 5VS PJ70 5V_RUN2
125 134 100K_04
GND GND 1 *3mm
133
GND PEX_TX2#
136 PEG_TX#10 Q34 3A 1 2 3A
4
4PIN_CONN_VIN
6
PEG_RX#10 135 138 PEG_TX10 R549 20K_04 P2003EVG D
PEG_RX10 137 PEX_RX2# PEX_TX2 140
139 PEX_RX2 GND 142 PEG_TX#9
GND PEX_TX1# Modify,3/30 Tim 2G DEFAULT SHORT
PEG_RX#9 141 144 PEG_TX9 5V Q32A S
PEX_RX1# PEX_TX1
1
PEG_RX9 143 146
PEX_RX1 GND MTDK5S6R
145 148 PEG_TX#8
PEG_RX#8 147 GND PEX_TX0# 150 PEG_TX8
PEG_RX8 149 PEX_RX0# PEX_TX0 152 R551
PEX_RX0 GND STUFF,6/12 Tim
151
3
GND 10K_04 D
91782-3140M-NV-01
Modify net name, 5G Q32B
A nVidia recommend ,1/20 Tim nVidia recommend ,1/20 Tim 6/7 Tim S MTDK5S6R 7,8,9,10,11,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,39,41,43,44,46,47 3.3VS A
D
ON
4
Q33 11,13,22,38,41,42,43,44,45,46,47,48,49 VIN

Modify value, 11,14,20,26,30,38,40,41,43,44,46,47,48 5V
PWR_SRC2 5V_RUN2Modify net name, 3V3_RUN2 8/14 Tim
G MTN7002ZHS3 11,13,14,15,22,25,38,39,41,44 5VS
6/7 Tim 11 dGPU_EN#
PWR_SRC2
S
Modify for no stuff,

6/7 Tim
C803 C669 C670 C733 C734 C661 C662
Title
10u_25V_X5R_08 4.7u_25V_X5R_08 *4.7u_25V_X5R_08 22u_25V_X5R_08*4.7u_25V_X5R_08 *4.7U_25V_08 C800 C802 C801 C731 C729 C730 C728 C732 [12] MXM 3.0 SLAVE
4.7u_25V_X5R_08
4.7u_25V_X5R_08 4.7u_25V_X5R_08 0.1u_50V_Y5V_06 *0.01u_50V_X7R_04 Size Document Number Rev
Modify,6/7 Tim 4.7u_25V_X5R_08 0.1u_50V_Y5V_06 *0.1u_50V_Y5V_06 0.01u_50V_X7R_04 A3 SCHEMATIC1 6-71-P8700-D03 1.0
CLOSE TO MXM PIN E1 CLOSE TO MXM PIN E2 CLOSE TO MXM CONN. CLOSE TO MXM CONN.
5 4 3 2 1
MXM 3.0 Slave B - 13

Schematic Diagrams
Panel, Inverter
5 4 3 2 1
PANEL CONNECTOR (For coaxial cable) PANEL POWER

J4
*OPEN_2A
2 1
VIN Q6A
MTS3572G6 VLED
PLVDD
4 3
S2 D2
D
3.3VS 2A C119 C106 D
G2
C499 C107
eDP
C
A
0.1u_50V_Y5V_06
J_EDP1 0.1u_50V_Y5V_06 0.22u_50V_Y5V_06
5
D29 1u_6.3V_X5R_04 1
Remove 0Ohm,6/7 Tim 1
*LBAV99LT1G 2 R50
HPD_L R517 1K_04 3 2 4.7K_06
EDP_HPD 11
AC
4 3 R62
1A 5 4 EDP㗪ᶲẞ
C498 C503 3.3VS 5
R516 FOLLOW nv recommend 6 R63 150K_1%_04
7 6 100K_04
0.1u_16V_Y5V_04 *10u_6.3V_X5R_06 7
*100K_1%_04 8 Modify,7/29 Tim
9 8
10 9
Modify,6/15 Tim 10 3.3V
Q27 11 GND5 R64
D S FRAME_LOCK#_R 12 11 GND5 GND4
11 FRAME_LOCK#
13 12 GND4 GND3 100K_04

14 13 GND3 GND2
R1012 *0_04 14 GND2
6
MTN7002ZHS3 15 GND1 R61
G
16 15 GND1 Q6B
D1
R1014 *10K_04 17 16 MTS3572G6 10K_04
3.3VS 17
18 VGA_ENAVDD 1
18 G1
6
C82 0.1u_10V_X7R_04 DRX0# 19 D
S1
Add,6/15 Tim VGA_ENAVDD 11 DP_TXN0 19
C83 0.1u_10V_X7R_04 DRX0 20 5VS J10 Q5A
11 DP_TXP0 20
21 LVDD_EN# 2G MTDK5S6R
2
C84 0.1u_10V_X7R_04 DRX1# 22 21 1 2 S
11 DP_TXN1
1
22
3
Sheet 13 of 58 11 DP_TXP1
11 DP_TXN2
11 DP_TXP2
C85
C86
C87
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
DRX1
DRX2#
DRX2
23
24
25
26
23
24
25 3.3VS
3mm
J2
5G
D
S
Q5B
MTDK5S6R
Modify value,
8/14 Tim
4
27 26
Panel, Inverter 11 DP_TXN3

11 DP_TXP3
C88
C89
0.1u_10V_X7R_04
0.1u_10V_X7R_04
DRX3#
DRX3
28
29
30
27
28
29
30
1
3mm
2
2A PLVDD
C 11 DP_AUX#
C104 0.1u_10V_X7R_04 DAUX# 31
31 DEFAULT 2A
U38
>80 mil C
C105 0.1u_10V_X7R_04 DAUX 32 5 1
11 DP_AUX 32 VIN VOUT
VGA_ENAVDD 33
33 Modify,6/4 Tim
R60 *100K_04 BRIGHTNESS_R 34 C497 4
R59 *100K_04 INV_BLON 35 34 VIN/SS C500 C501 R501
3.3VS 35 1u_6.3V_X5R_04
HPD_L 36 3 2
37 36 EN GND 1u_6.3V_X5R_04 10u_6.3V_X5R_06 100K_04
38 37 AP2821KTR-G1
39 38 11 VGA_ENAVDD
39 Modify,3/30 Tim
VLED 40
40 Follow common design,
6/8 Tim
LVDFH-04008-TP00+
C907 C908 PCB Footprint = lvdfh-04008-tp
R986
0.1u_50V_Y5V_06 0.01u_50V_X7R_04
*4.7K_06
3.3V Discharge for brightness Add,6/7 Tim

C
AC BRIGHTNESS_R
C519 A
C504
*0.1u_16V_Y5V_04 D30
*LBAV99LT1G *0.1u_16V_Y5V_04 R518 *10K_04
PLVDD
BRIGHTNESS_R R519 *10mil_short
VGA_BKLPWM 11 3.3V
Modify for short
Cancel BRIGHTNESS,3/6 Tim 6/7 Tim
3.3V
R521 100K_04
U39C
14
74LCX08FT U39B
14
9 74LCX08FT
22 BKL_EN
8 BLON1 4
B 10 6 3.3V B
11 VGA_BKLTEN Modify value,4/20 Tim
5
7
U39A
14
7
74LCX08FT
BLON2 1
3 INV_BLON
15 SB_BLON
LID_SW#1 2
3.3V
R526 *100K_04
U39D R520
14
7
74LCX08FT C505
12 100K_04 0.1u_10V_X7R_04
22,38 LID_SW#
11
13
11,12,20,22 ALL_SYS_PWRGD
7
A A
Title
11,12,22,38,41,42,43,44,45,46,47,48,49 VIN [13] PANEL,INVERTER
11,12,14,15,22,25,38,39,41,44 5VS
2,14,16,24,29,33,38,41,42,44,46 3.3V Size Document Number Rev
7,8,9,10,11,12,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,39,41,43,44,46,47 3.3VS Custom SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
B - 14 Panel, Inverter
Schematic Diagrams
HDMI
5 4 3 2 1
HDMI_5VS
A
R5 D2
HDMI ESD W/O LEVELSHIFT 暨ᶲ, NET ⎗SWAP
HDMI CONNECTOR *0_04 RB551V-30S2
follow NV D26
C
3/6 Tim For ESD TMDS_CLOCK# 6 5 TMDS_CLOCK#J
D3 *RB551V-30S2 TMDS_CLOCK 7 4 TMDS_CLOCKJ
A C R6 *0.5_1%_04 8 3
R1 *0.5_1%_04 TMDS_DATA0# 9 2 TMDS_DATA0#J
C
A
A
TMDS_DATA0 10 1 TMDS_DATA0J
R475 R474
HDMI_5VS D25 D24 D23 *TVU1240R1A
2K_04 2K_04
AC
AC
AC
U7 Modify,4/14 Tim
5VS 3 1 J_HDMI1
OC# VOUT *BAV99 RECTIFIER*BAV99 RECTIFIER *BAV99 RECTIFIER D27
Modify,4/1 Tim
22u_6.3V_X5R_08
22u_6.3V_X5R_08
5 C15 C16 Follow NV⺢嬘,3/4 Tim TMDS_DATA1# 6 5 TMDS_DATA1#J
D VIN HDMI_SCL-C D
TMDS_DATA1 7 4 TMDS_DATA1J
R13 0_04 4 2 8 3
11,31,32,41,44 SUSB EN# GND HDMI_SDA-C
19 HDMI_HPD-C TMDS_DATA2# 9 2 TMDS_DATA2#J
R14 *0_04 SY6288D20AAC 18 HOT PLUG DETECT HDMI_HPD-C
22 RUN_ON TMDS_DATA2 10 1 TMDS_DATA2J
PCB Footprint = M-SOT23-5A +5V 17
HDMI_SDA-C 16 DDC/CEC GND
SDA 15 HDMI_SCL-C *TVU1240R1A
14 SCL
RESERVED 13 HDMI_CEC
TMDS_CLOCK#J 12 CEC
TMDS CLOCK- 11
TMDS_CLOCKJ 10 CLK SHIELD
TMDS CLOCK+ 9 TMDS_DATA0#J
8 TMDS DATA0-
SHIELD0 7 TMDS_DATA0J
TMDS_DATA1#J 6 TMDS DATA0+
TMDS DATA1- 5 remove common choke,6/6 Tim
remove common choke,6/6 Tim TMDS_DATA1J 4 SHIELD1
TMDS DATA1+ 3 TMDS_DATA2#J
2 TMDS DATA2-
SHIELD2 1 TMDS_DATA2J
TMDS DATA2+
GND
GND
GND
GND
EMI 116E-1C001-20Y EMI
㓡䁢COMMON CHOKE SHORT暞ẞ
GND1
GND2
GND3
GND4
㓡䁢COMMON CHOKE SHORT暞ẞ
枸䔁暣旣嶐-+ℑ䪗
P/N = 6-21-13K20-019 枸䔁暣旣嶐-+ℑ䪗
PIN GND1~4=GND
HDMI Repeater Sheet 14 of 58

C
3.3VS
Follow Parade,3/5 Tim C

HDMI
R17 R26
47K_04 47K_04
1.2VS
C34
Modify,5/22 Tim
C35
I2C_ADDR
CSDA
CSCL
PRE
HDMI_ID
11 HDMI_CTRLDATA
11 HDMI_CTRLCLK
SCL/SDA 暨PULL HIGH (CHECK PCH䪗)
3.3VS
RST#
Data rates=5.94Gb/s
0.1u_10V_X7R_04
0.01u_16V_X7R_04
R28 4.99K_1%_04 1.2VS Normal:230mA
3.3VS Normal:6mA R27
U8 10K_04
36
35
34
33
32
31
30
29
28
27
26
25
REXT
RESETB
SCL_SRC/AUXP
SDA_SRC/AUXN
HDMI_ID
I2C_ADDR
VDD12
CSCL
CSDA
PRE
RSV2
NC
RST#
Output from PS8409. Follow Parade recommend,
Connect to 1.2V power IC for 1.2V power cut down if desired 5/22 Tim
EN_1.2VS 37 24 3.3VS
C49 0.1u_10V_X7R_04 HDMI_DATA0N_C 38 POWERSW VDD33 23 TMDS_DATA0#
11 HDMI_DATA0N IN_D2p OUT_D2p C39
C28
C29
11 HDMI_DATA0P C50 0.1u_10V_X7R_04 HDMI_DATA0P_C 39 22 TMDS_DATA0
R29 1K_04 HDMI_HPD_C 40 IN_D2n OUT_D2n 21 HDMI_HPD-C
11 HDMI_HPD HPD_SRC HPD_SNK 1u_6.3V_X5R_04
Follow Parade recommend, 11 HDMI_DATA1N C51 0.1u_10V_X7R_04 HDMI_DATA1N_C 41 20 TMDS_DATA1#
GND
C52 0.1u_10V_X7R_04 HDMI_DATA1P_C 42 IN_D1p OUT_D1p 19 TMDS_DATA1
5/22 Tim 11 HDMI_DATA1P IN_D1n
1.2VS 43
VDDRX12
PS8409QFN48GTR2-A1 OUT_D1n
VDDTX12
18 1.2VS
0.01u_16V_X7R_04
0.1u_10V_X7R_04
11 HDMI_DATA2N C53 0.1u_10V_X7R_04 HDMI_DATA2N_C 44 17 TMDS_DATA2#
C54 0.1u_10V_X7R_04 HDMI_DATA2P_C 45 IN_D0p OUT_D0p 16 TMDS_DATA2
11 HDMI_DATA2P IN_D0n OUT_D0n
1.2VS 46 15 1.2VS
C55 0.1u_10V_X7R_04 HDMI_CLOCKP_C 47 VDDRX12 VDDTX12 14 TMDS_CLOCK
11 HDMI_CLOCKP IN_CKp OUT_CKp
C56 0.1u_10V_X7R_04 HDMI_CLOCKN_C 48 13 TMDS_CLOCK#
11 HDMI_CLOCKN IN_CKn OUT_CKn
TESTMODEB
HDMI_CEC
C32
C31
C30
49 Modify,3/19 Tim
SDA_SNK
SCL_SNK
DCIN_EN
EPAD DC coupling enable; Internal pull up, 3.3V I/O.

CEC_EN
VDDA12
C40
C42
C41
R19 *4.7K_04 DCIN_EN L: DC coupling input

VDD33
VDD12
RSV1
H: Default,AC coupling input

PDB
EQ
0.01u_16V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
1
2
3
4
5
6
7
8
9
10
11
12
Remove 499Ohm,3/20 Tim

0.01u_16V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
1.2VS R20 *4.7K_04 EQ Receiver equalization setting; Internal pull up , 3.3V I/O.
3.3VS L: Compensaton for channel loss up to 13dB
H: Default , Compensation for channel loss up to 17dB
R18 *4.7K_04
HDMI_SDA-C
1.2VS
HDMI_SCL-C
3.3VS M: Compensation for channel loss up to 11dB

PS8409_PD
B B
DCIN_EN
C43
C37
C33
C36
1.2VS
EQ
Output pre-emphasis setting; Internal pull up, 3.3V I/O.

R476 *4.7K_04 PRE L: Pre-emphasis =2.5dB
H: Default, No Pre-emphasis
0.01u_16V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
PDB PIN:
L:Chip power down
H:Normal operation(default)
R21 *0_04 PS8409_PD I2C Slave Address selection; Internal pull down, 3.3V I/O:
15 PS8409_PCH PS8409_PD 31 3.3VS R15 *4.7K_04 I2C_ADDR L: Default, Slave address 0x10-0x2F.
R30 *0_04 H: Alternative salve address 0x90-0x9F, 0xD0-0xDF.
22 PS8409_EC1
R22 *0_04
23 PS8409_EC2
Modify,4/10 Tim HDMI_ID enable ; Internal pull down , 3.3V I/O.

3.3VS R16 *4.7K_04 HDMI_ID
L: Default, HDMI ID enable
H: HDMI ID disable
3.3V
1A
C5 C6
Add,3/2 Tim
10u_6.3V_X5R_06 0.1u_10V_X5R_04
5V
R4
47K_04
C4 1.2VS CSDA R11 *0_04
U2 1u_10V_Y5V_06 PS8409_I2C_DATA 15
G9661-25ADJF11U CSCL R9 *0_04
V1.2_R
2A 1.2VS
PS8409_I2C_CLK 15
3 4
VIN VCNTL J1
CSDA R12 *2.2K_04 Connect to I2C master for PS8409 programing if desired
1 6 1 2 3.3VS
POK VOUT
CSCL R10 *2.2K_04
5 *OPEN_2mm
EN_1.2VS 2 NC R3 C7 C2 C3 C1
EN DEFAULT SHORT
Ra
10u_6.3V_X5R_06
10u_6.3V_X5R_06
82p_50V_NPO_04
0.1u_16V_Y5V_04
From PS8409,3/3 Tim 8 7 10K_1%_04 Modify,6/4 Tim

A
9 GND VFB A
GND 5VS C17
*0.1u_10V_X7R_04
R2 Modify,3/20 Tim
G
Q2
Rb 20K_1%_04 *AO3402L
CSDA S D PCH_SMB_DATA 15,17,38
G
Q1
ON Vout = 0.8V ( 1 + Ra / Rb ) CSCL S D
*AO3402L
PCH_SMB_CLK 15,17,38
Title
2,13,16,24,29,33,38,41,42,44,46 3.3V
11,12,20,26,30,38,40,41,43,44,46,47,48 5V
[14] HDMI CONN(PS8409),1.2VS
11,12,13,15,22,25,38,39,41,44 5VS Custom SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
HDMI B - 15
Schematic Diagrams
SPT-H 1/7
5 4 3 2 1
VCCPGPPA
SPT-H (SPI,GPP) U31A SKL_PCH_H
?
R433 10K_04 PME# BD17 BB27 PLT_RST# PLT_RST# 11,20

GPP_A11/PME# GPP_B13/PLTRST# Remove U56,change to U54D
TP_PCH_AG15 AG15
TP_PCH_AG14 AG14 RSVD P43 TBT_FRC_PWR
RSVD GPP_G16/GSXCLK TBT_FRC_PWR 28
R401 *1K_04 PCH_SPI_IO3 TP_PCH_AF17 AF17 R39 TBCIO_PLUG_EVENT
RSVD GPP_G12/GSXDOUT TBCIO_PLUG_EVENT 28
TP_PCH_E17 AE17 R36 GSXDOUT
RSVD GPP_G13/GSXSLOAD R42 M.2_WIGIG_WGPIO
D D/KhW>/E'&h>>sK>d' D
TP_PCH_AR19 AR19 GPP_G14/GSXDIN R41 M.2_WIGIG_WAKE_CTRL_N
TP5 GPP_G15/GSXSRESET# DKt,E^DW>>Kt
TP_PCH_AN17 AN17
TP4 M.2_WIGIG_WGPIO R335 *1K_04
SPI_MOSI BB29 AF41 EXTTS_SNI_DRV0_PCH Follow CRB,3/9 Tim
SPI_MISO BE30 SPI0_MOSI GPP_E3/CPU_GP0 AE44 TCH_PNL_INTR_N
SPI0_MISO GPP_E7/CPU_GP1 3.3VS
SSPI_CS0# R443 0_04 SPI_CS0# BD31 BC23 BT_RF_KILL_R_N Modify(on TBT),6/13 Tim
SPI_SCLK BC31 SPI0_CS0# GPP_B3/CPU_GP2 BD24 EXTTS_SNI_DRV1_PCH
TBCIO_PLUG_EVENT R682 *10K_04
DESIGN NOTE:
SSPI_CS1# R423 *0_04 SPI_CS1# AW31 SPI0_CLK GPP_B4/CPU_GP3
SPI0_CS1# R685 *1K_04 ESPI FLASH SHARING MODE
BC36 TP_GPP_H_18 3.3VA 0: MASTER ATTACHED FLASH SHARING
Follow PDG,3/30 Tim GPP_H18/SML4ALERT#
BC29 BE34 M.2_WIGIG_RST_R 1: SLAVE ATTACEHD FLASH SHARING
SSPI_WP#0 R460 15_1%_04 PCH_SPI_IO2 SPI0_IO2 GPP_H17/SML4DATA PCH HAS INTERNAL WEAK PD
BD30 BD39 M.2_WIGIG_WAKE_R_N
SSPI_WP#1 R461 15_1%_04 SPI0_IO3 GPP_H16/SML4CLK
AT31 BB36 VOL_DOWN_PCH
SSPI_HOLD#0 R416 15_1%_04 PCH_SPI_IO3 SPI0_CS2# GPP_H15/SML3ALERT# 3.3VS
SPI1_TCHPNL_CLK AN36 BA35 VOL_UP_PCH R426
SSPI_HOLD#1 R417 15_1%_04 GPP_D1 GPP_H14/SML3DATA
SPI1_TCHPNL_CS_N AL39 BC35 HOME_BTN_PCH
3.3VA R746 *10K_04 SPI_CS_2# GPP_D0 GPP_H13/SML3CLK
SPI1_TCHPNL_MOSI AN41 BD35 GPP_H_12 EXTTS_SNI_DRV0_PCH R717 8.2K_04 *4.7K_04
SPI1_TCHPNL_MISO AN38 GPP_D3 GPP_H12/SML2ALERT# AW35 TP_GPP_H_11 TCH_PNL_INTR_N R369 10K_04

GPP_D2 GPP_H11/SML2DATA GPP_H_12
FOR 8587 AUTO LOAD 30 TBTA_MRESET
AH43
GPP_D22 GPP_H10/SML2CLK
BD34 TP_GPP_H_10 EXTTS_SNI_DRV1_PCH R436 8.2K_04
22 HSPI_SCLK R420 33_04 SPI_SCLK SPI1_TCHPNL_IO2 AG44 BE11SM_INTRUDER# R793 1M_04 RTCVCC
R438 33_04 SPI_MISO GPP_D21 INTRUDER# R402
22 HSPI_MSO
22 HSPI_MSI R440 33_04 SPI_MOSI DESIGN NOTE: 1 OF 12
22 HSPI_CE# R425 0_04 SPI_CS0# *20K_04
TOUCH PANEL Z170 ? REV = 1.3
R424 *0_04 SPI_CS1#
CS0#,CS1# SWAP,3/3 Tim
Sheet 15 of 58 SKL_PCH_H
?
U31K
LPSS_GSPI1_MOSI AT29
Add,6/11 Tim AR29 GPP_B22/GSPI1_MOSI AL44
DESIGN NOTE: AV29 GPP_B21/GSPI1_MISO GPP_D9 AL36
TBTA_ACE_GPIO2 30
SPT-H 1/7 C V3P3A_V1P8A_PCH_SPI

JTAG ODT IS DISABLED IF LOW
38 PCM_INT_1863
18 LPSS_GSPI0_MOSI
BC27
BD28
GPP_B20/GSPI1_CLK
GPP_B19/GSPI1_CS#
GPP_D10
GPP_D11
GPP_D12
AL35
AJ39
TBTA_ACE_GPIO3 30 Add,3/6 Tim
TBTA_ACE_GPIO0 30
TPM_DET# 24
C
PCH HAS INTERNAL WEAK PU GPP_B18/GSPI0_MOSI FOR TPM,2/27 Tim

Add,3/4 Tim BD27 AJ43 3.3VA 5VS
33 LPSS_GSPI0_MISO AW27 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS# AL43 PS8330B_PCH 31
R419 GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS#
AR24 AK44 Add,4/13 Tim PCH_SMB_DATA 14,17,38
GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD DESIGN NOTE: R741 1K_04 3.3VA
D
*20K_04 AK45 C878 *1u_6.3V_X5R_04
AV44 GPP_D13/ISH_UART0_RXD
GPP_C9/UART0_TXD SMB RESUME/MAIN LOGIC R765 R762 Q44
SPI_MISO BA41
⚈core base⯂㛒䡢⭂㓭⃰枸䔁, GPP_C8/UART0_RXD G 2SK3018S3
6/10 Tim AU44 1K_04 1K_04 R782 1K_04
GPP_C11/UART0_CTS# 3.3VS
S
R418 AV43 C891 *1u_6.3V_X5R_04
GPP_C10/UART0_RTS#
3
*4.7K_04 AU41 BC38 D SMB_DATA_MAIN 7,8,9,10
AT44 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL BB38 PCH_SMB_CLK 14,17,38
GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA R740 1K_04 3.3VA
D
AT43 5G C877 *1u_6.3V_X5R_04
AU43 GPP_C13/UART1_TXD/ISH_UART1_TXD BD38 Q45A S
6
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL D Q43
4
Add㷔溆,2/27 Tim BE39 MTDK5S6R Q45B
GPP_H21/ISH_I2C1_SDA G 2SK3018S3
UART2_CTS# AN43 MTDK5S6R R780 1K_04
GPP_C23/UART2_CTS# 2G 3.3VS
S
DESIGN NOTE: UART2_RTS# AN44 17,20,22 PM_PCH_PWROK C889 *1u_6.3V_X5R_04
GPP_C22/UART2_RTS# S
UART2_TXD AR39
1
BOOT HALT ENABLED IF LOW UART2_RXD AR45 GPP_C21/UART2_TXD BC22 GPP_A23 SMB_CLK_MAIN 7,8,9,10
PCH HAS INTERNAL WEAK PU GPP_C20/UART2_RXD GPP_A23/ISH_GP5 BD18 GPP_A22 Add,4/7 Tim Modify value,
DESIGN NOTE: Add,3/2 Tim
AR41 GPP_A22/ISH_GP4 BE21
3/6 Tim
8/14 Tim
V3P3A_V1P8A_PCH_SPI 14 PS8409_I2C_CLK GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 PS8338B_PCH 32
3.3VA AR44 BD22
14 PS8409_I2C_DATA GPP_C18/I2C1_SDA GPP_A20/ISH_GP2 PS8409_PCH 14
Follow Checklist, BOOT SELECT STRAP 38 TP_I2C_CLK
AR38
GPP_C17/I2C0_SCL GPP_A19/ISH_GP1
BD21 AMP_FAULT2 Modify,3/12 Tim DESIGN NOTE: DESIGN NOTE:
3/27 Tim IF SAMPLED HIGH, LPC IS SELECTED AT42 BB22
ELSE SPI PCH HAS INTERNAL WEAK PD. TP_I2C_DATA
38 GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 BC19 AMP_FAULT1
SB_BLON 13 3.3VA MB det 3.3VA
Add,2/27 Tim AM44 GPP_A17/ISH_GP7 EDP/LVDS det
AJ44 GPP_D4/ISH_I2C2_SDA/I2C3_SDA Add,4/2 Tim
R441 H:EDP L:LVDS
R747 GPP_D23/ISH_I2C2_SCL/I2C3_SCL
B B
EDP only,3/27 Tim
*1K_04 R452 R464
*4.7K_04 11 OF 12 Modify,3/12 Tim 3.3VA
SPI_MOSI Z170
LPSS_GSPI1_MOSI *10K_04 10K_04
REV = 1.3 ? AMP_FAULT1 R752 *10K_04
R439 AMP_FAULT2 R409 *10K_04 GPP_A22 GPP_A23
R748
*4.7K_04 *20K_04 R455 R463
*10K_04 *10K_04
SPI_* = 0.5"~2" Modify,6/4 Tim BIOS ROM 4MB SPI_* = 0.5"~2"

ME+ BIOS ROM 8MB
RTC Wake UP
DEFAULT SHORT
3.3V_SPI
PJ47 *OPEN-1mm 5VS
2 1 RTC Wake UP 䔁⣏㷔溆,᷎㧁䣢㔯⫿
3.3V_SPI VDD3
D02 no stuff,6/7 Tim Reserve for BIOS,2/27 Tim
5V
U12 U13 UART2_RXD
RX
8 5 R429 33_04 SPI_MOSI 8 5 R446 *33_04 SPI_MOSI UART2_TXD
VDD SI VDD SI TX
GND
2 R471 33_04 SPI_MISO 2 R469 *33_04 SPI_MISO
SO SO
C476 C475
R472 1K_1%_04 SSPI_WP#0 3 1 SSPI_CS0# R470 *1K_1%_04 SSPI_WP#1 3 1 SSPI_CS1#
WP# CE# WP# CE#
0.1u_10V_X7R_04 *0.1u_10V_X7R_04
6 R428 33_04 SPI_SCLK 6 R445 *33_04 SPI_SCLK
SCK SCK
A
R473 1K_1%_04 Follow PDG Single Flash:15ohm,2/27 Tim R444 *1K_1%_04 SSPI_HOLD#1 7 A
SSPI_HOLD#0 7 4 4 Follow PDG Single Flash:15ohm,2/27 Tim
HOLD# VSS HOLD# VSS
GD25B64CSIGR *GD25B32B
Modify,4/3 Tim Modify,4/3 Tim
change footprint to socket MSO8(ACA-SPI-004-T03)
Modify,4/19 Tim
3/2
20 3.3V_SPI
3,16,17,19,20,41 3.3VA Title
11,12,13,14,22,25,38,39,41,44 5VS
16,17,19,20,22,23,33,36,37,38,41,42,43,45,46,49 VDD3
[15] SPT-H 1/7-SPI/GPP
17,20 RTCVCC
20 VCCPGPPA A3 SCHEMATIC1 6-71-P8700-D03 1.0
20 V3P3A_V1P8A_PCH_SPI Date: Friday, August 14, 2015 Sheet 15 of 58
5 4 3 2 1
B - 16 SPT-H 1/7
Schematic Diagrams
SPT-H 2/7
5 4 3 2 1
3.3VS
Modify net,6/15 Tim
R324
R341
10K_04
*10K_04
SCI#_R
GPU_EVENT# Add,4/3 Tim
SPT-H CLINK/FAN/SATA/HOST
RN1 SKL_PCH_H
4 5 SATA_GP4 U31C ?
3 6 SATA_GP5
2 7 SATA_GP2 33 CL_CLK1 AV2 G31
1 8 SATA_GP6 AV3 CL_CLK PCIE9_RXN/SATA0A_RXN H31 PCIE_RXN9_SSD 34
33 CL_DATA1 CL_DATA CLINK PCIE9_RXP/SATA0A_RXP PCIE_RXP9_SSD 34
Modify,6/10 Tim 33 CL_RST#1 AW2 C31
10K_8P4R_04 CL_RST# PCIE9_TXN/SATA0A_TXN PCIE_TXN9_SSD 34
B31
PCIE9_TXP/SATA0A_TXP PCIE_TXP9_SSD 34
TP_GPP_G_8_PWM0 R44
D R365
R368
10K_04
10K_04
SATA_GP7
PCH_SATA_LED# 2/27 Tim TP_GPP_G_9_PWM1 R43 GPP_G8/FAN_PWM_0
GPP_G9/FAN_PWM_1 PCIE10_RXN/SATA1A_RXN
G29
PCIE_RXN10_SSD 34
^^ϭ΀DͲ<z΁ D
TP_GPP_G_10_PWM2 U39 E29
R711 10K_04 M.2_SSD1_PEDET GPP_G10/FAN_PWM_2 PCIE10_RXP/SATA1A_RXP PCIE_RXP10_SSD 34
TP_GPP_G_11_PWM3 N42 C32
R716 10K_04 M.2_SSD2_PEDET GPP_G11/FAN_PWM_3 PCIE10_TXN/SATA1A_TXN PCIE_TXN10_SSD 34
B32
R718 10K_04 PCH_RSVD FAN PCIE10_TXP/SATA1A_TXP PCIE_TXP10_SSD 34
Remove DDR voltage circuit(GPP_G0,GPP_G1) U43
R714 *0_04 6/7 Tim U42 GPP_G0/FAN_TACH_0 F41
RB751V-40(lision) U41 GPP_G1/FAN_TACH_1 PCIE15_RXN/SATA2_RXN E41 PCIE_RXN15_SSD 34
Add,6/15 Tim GPP_G2/FAN_TACH_2 PCIE15_RXP/SATA2_RXP PCIE_RXP15_SSD 34
D69 C A SCI#_R M44 B39
22 SCI# GPP_G3/FAN_TACH_3 PCIE15_TXN/SATA2_TXN PCIE_TXN15_SSD 34
3.3VA U36 A39
Modify net,6/15 Tim 3/6 Tim 11 GPU_EVENT# GPP_G4/FAN_TACH_4 PCIE15_TXP/SATA2_TXP PCIE_TXP15_SSD 34
P44
R343 10K_04 SWI#_R
32 PS8338B_SW
17,22 SWI#
C A SWI#_R T45 GPP_G5/FAN_TACH_5
GPP_G6/FAN_TACH_6 PCIE16_RXN/SATA3_RXN
D43
PCIE_RXN16_SSD 34
^^Ϯ΀DͲ<z΁
D70 RB751V-40(lision) T44 E42
PCIe/SATA
Remove GPIO2_FB_TGL_REQ,GPIO_FB_CLAMP,2/27 Tim GPP_G7/FAN_TACH_7 PCIE16_RXP/SATA3_RXP A41 PCIE_RXP16_SSD 34
Modify SWI# pin,3/18 Tim Add,6/15 Tim PCIE_TXN16_SSD 34
B33 PCIE16_TXN/SATA3_TXN A40
34 PCIE_TXP11_SSD PCIE11_TXP PCIE16_TXP/SATA3_TXP PCIE_TXP16_SSD 34
C33
^^ϭ΀DͲ<z΁ 34 PCIE_TXN11_SSD
34 PCIE_RXP11_SSD
K31
L31
PCIE11_TXN
PCIE11_RXP PCIE17_RXN/SATA4_RXN
H42
H40 PCIE_RXN17_HDD1 39
34 PCIE_RXN11_SSD PCIE11_RXN PCIE17_RXP/SATA4_RXP PCIE_RXP17_HDD1 39
E45
PCIE17_TXN/SATA4_TXN PCIE_TXN17_HDD1 39
18 PCH_CONFIG_JUMPER AB33 F45 PCIE_TXP17_HDD1 39
GPP_F10/SCLOCK PCIE17_TXP/SATA4_TXP
PCH_RSVD AB35
^d,ϭ͕,Ϯ
GP39_GFX_CRB_DETECT AA44 GPP_F11/SLOAD K37
SV_ADVANCE_GP48 AA45 GPP_F13/SDATAOUT0 PCIE18_RXN/SATA5_RXN G37 PCIE_RXN18_HDD2 39
GPP_F12/SDATAOUT1 PCIE18_RXP/SATA5_RXP PCIE_RXP18_HDD2 39
G45
PCIE18_TXN/SATA5_TXN PCIE_TXN18_HDD2 39
34 PCIE_TXN14_SSD B38 G44 PCIE_TXP18_HDD2 39
C38 PCIE14_TXN/SATA1B_TXN PCIE18_TXP/SATA5_TXP
34 PCIE_TXP14_SSD D39 PCIE14_TXP/SATA1B_TXP AD44 PCH_SATA_LED#
34 PCIE_RXN14_SSD PCIE14_RXN/SATA1B_RXN GPP_E8/SATALED# PCH_SATA_LED# 34
E37 AG36 M.2_SSD1_PEDET 34
34 PCIE_RXP14_SSD PCIE14_RXP/SATA1B_RXP GPP_E0/SATAXPCIE0/SATAGP0
C
^^Ϯ΀DͲ<z΁ 34 PCIE_TXN13_SSD C36 GPP_E1/SATAXPCIE1/SATAGP1
AG35
AG39
SATA_GP1
SATA_GP2
R733 10K_04 3.3VS
C
PCIE13_TXN/SATA0B_TXN GPP_E2/SATAXPCIE2/SATAGP2
34 PCIE_TXP13_SSD
34 PCIE_RXN13_SSD
34 PCIE_RXP13_SSD
B36
G35
E35
PCIE13_TXP/SATA0B_TXP
PCIE13_RXN/SATA0B_RXN
PCIE13_RXP/SATA0B_RXP
GPP_F0/SATAXPCIE3/SATAGP3
AD35
AD31
AD38
AC43
SATA_GP4
SATA_GP5
SATA_GP6
M.2_SSD2_PEDET 34 2/27 Tim
Sheet 16 of 58
A35 AB44 SATA_GP7
^^ϭ΀DͲ<z΁
34
34
34
34
PCIE_TXP12_SSD
PCIE_TXN12_SSD
PCIE_RXP12_SSD
PCIE_RXN12_SSD
B35
H33
G33
PCIE12_TXP
PCIE12_TXN
PCIE12_RXP
PCIE12_RXN
GPP_F21/EDP_BKLTCTL
GPP_F20/EDP_BKLTEN
W36 L_BKLTCT
W35 L_BKLTEN
W42 L_VDDEN
Modify,4/4 Tim
R360 560_04 H_THRMTRIP# H_THRMTRIP# 3 SPT-H 2/7
C424 0.1u_10V_X7R_04 J45 GPP_F19/EDP_VDDEN C454 *47PF_50V_X5R_04
DESIGN NOTE:
37 PCIE_TXP20_GLAN2 PCIE20_TXP
'>EϮ 37 PCIE_TXN20_GLAN2
C423 0.1u_10V_X7R_04 K44
N38 PCIE20_TXN
HOST
THERMTRIP#
AJ3 H_THRMTRIP#_PCH
AL3 PCH_PECI Modify,3/4 Tim
R357
R358
1K_04
*0_04
PECI TO PCH OPTION
H_PECI 3,22
37 PCIE_RXP20_GLAN2 N39 PCIE20_RXP PECI AJ4 R363 30.1_1%_04
37 PCIE_RXN20_GLAN2 PCIE20_RXN PM_SYNC H_PM_SYNC 3
C422 0.1u_10V_X7R_04 H44 AK2 PLTRST_CPU_N 3
36 PCIE_TXP19_GLAN1 PCIE19_TXP PLTRST_CPU#
'>Eϭ 36 PCIE_TXN19_GLAN1
C421 0.1u_10V_X7R_04 H43
L39 PCIE19_TXN PM_DOWN
AH2 H_PM_DOWN 3
C455
36 PCIE_RXP19_GLAN1 L37 PCIE19_RXP L_BKLTCT R706 *100K_04
36 PCIE_RXN19_GLAN1 PCIE19_RXN *0.01u_16V_X7R_04
3 OF 12 L_BKLTEN R707 *100K_04
Modify 0.1uF for Gen2,2/25 Tim Z170 ? REV = 1.3 L_VDDEN R336 *100K_04
GFX SELECT TABLE
GFX STYLE 3.3VA DESIGN NOTE: H_THRMTRIP# C431 *0.1u_10V_X7R_04
DESIGN NOTE: VDD3 REQUEST EC TO GENERATE 10MS DELAY
1 CUSTOMER GFX Add,6/7 Tim
V3P3A PWRGD CIRCUIT VDD3
0 NORMAL GFX R797 Modify6/7 Tim
R795 10K_04
3.3VA
U58
100K_04
5
B 3.3VS R372 10K_04 GP39_GFX_CRB_DETECT VCC_3P3A_PWRGD 46 *TC7SZ08FU B
VCC_3P3A_PWRGD R796 *0_04 1
R794
3
R371 *10K_04 D 4 RSMRST_PWRGD# 22

6
D Modify,4/2 Tim R799 *10K_04 2

100K_04 17,22,41,49 SLP_SUS#
5 G Q48B
2 G Q48A S MTDK5S6R
46 VCC_1P0A_PWRGD
4
3
S MTDK5S6R
1
C897
Modify value, R798 *0_04
0.01u_16V_X7R_04 8/14 Tim
3.3V
PCH_PWRGD & VCCST_PWRGD Function Table
DESIGN NOTE: A Y
SV ADVANCE MENU TABLE
SCHMITT-TRIGGER INVERTER L H
BOARD STYLE R791 C892
22K_04 0.1u_10V_X7R_04 H L
1 NORMAL MENU (DEFAULT) U57
Q47
0 SV ADVANCE MENU 1 5
D
2SK3018S3 2 NC VCC
Modify,4/11 Tim A
DESIGN NOTE: 43 VR_READY
R789 10K_04 G
3 4 74LVC1G14GW_OUT 20
S
SV ADVANCE MENU JUMPER C895 GND Y
R790
3.3VS R373 20K_04 SV_ADVANCE_GP48 74LVC1G14GW
*10K_04 1u_6.3V_X5R_04 Modify,6/3 Tim
A R370 *0_04 A
Title
3,15,17,19,20,41 3.3VA [16] SPT-H 2/7-CLINK/FAN/SATA
15,17,19,20,22,23,33,36,37,38,41,42,43,45,46,49 VDD3

5 4 3 2 1
SPT-H 2/7 B - 17
Schematic Diagrams
SPT-H 3/7
5 4 3 2 1
DVDDIO_AUDIO
IF SAMPLED HIGH,FLASH
DESCRIPTOR SECURITY
SPT-H (HDA,SMB,JTAG,GPIO)
IS OVERIDEN EMI天㯪:R1015 D02 BOM STUFF BEAD(6-19-31001-238),
R758 *1K_04 HDA_SDOUT 6/18 Tim
SKL_PCH_H 3.3VA
*22p_50V_NPO_04 U31D ?
C940 Bead㓡军⮷㜧,
6/15 Tim
R1015 0_04 BA9 BB17 SX_EXIT_HOLDOFF *10K_04 R432
Remove EC_RTC_RESET circuit and JUMP, 38 HDA_BITCLK HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
BD8 AW22 PM_CLKRUN#
4/16 Tim Cancel 33ohm,3/1 Tim 38 HDA_RST# HDA_RST# GPP_A8/CLKRUN# PM_CLKRUN# 24
BE7
38 HDA_SDIN0 HDA_SDI1 BC8 HDA_SDI0 AR15 LANPHYPC
D 3/5 Tim HDA_SDI1 GPD11/LANPHYPC D
BB7 AV13 SLP_WLAN#
38 HDA_SDOUT HDA_SDO GPD9/SLP_WLAN#
BD9
38 HDA_SYNC HDA_SYNC BC14 DRAM_CRESETB
Cancel 33ohm,3/1 Tim TP_PCH_BD1 BD1 DRAM_RESET# BD23 VRALERTB_PU
TP_PCH_BE2 BE2 RSVD GPP_B2/VRALERT# AL27
RSVD GPP_B1 Modify,4/4 Tim
AR27 DDR_VOLTAGE_SEL
AUDIO GPP_B0 DDR_VOLTAGE_SEL 44
R382 33_04 AUD_AZACPU_SDO AM1 N44 TP_GPP_G_17
3 AUD_AZACPU_SDO_R DISPA_SDO GPP_G17/ADR_COMPLETE
AN2 AN24
3 AUD_AZACPU_SDI R381 33_04 AUD_AZACPU_SCLK AM2 DISPA_SDI GPP_B11 AY1 SYS_PWROK
3 AUD_AZACPU_SCLK_R DISPA_BCLK SYS_PWROK SYS_PWROK 20
ĳıŮŪŭŴ
SSP0_SCLK AL42 BC13 PCIE_WAKE# PCIE_WAKE# 28,33,35,36,37

SSP0_RXD AN42 GPP_D8/SSP0_SCLK WAKE# BC15 SLP_A#_N
VDD3 Followℙ䓐姕妰, GPP_D7/SSP0_RXD GPD6/SLP_A#
6/7 Tim RTCVCC SSP0_TXD AM43 AV15 SLP_LAN#
SSP0_SFRM AJ33 GPP_D6/SSP0_TXD SLP_LAN# BC26 SLP_S0#
DMIC_DATA0 AH44 GPP_D5/SSP0_SFRM GPP_B12/SLP_S0# AW15
A
GPP_D20/DMIC_DATA0 GPD4/SLP_S3# SUSB# 20,22,23,27,28,38,41,42,43,44
DMIC_CLK0 AJ35 BD15
D60 GPP_D19/DMIC_CLK0 GPD5/SLP_S4# SUSC# 22,23,41,42,43,44
R808 C180 1u_6.3V_X5R_04 DMIC_DATA1 AJ38 BA13 SLP_S5#
*RB751S-40H DMIC_CLK1 AJ42 GPP_D18/DMIC_DATA1 GPD10/SLP_S5# 1/30
1.5K_1%_04 GPP_D17/DMIC_CLK1
D7 AN15 SUS_CLK
Sheet 17 of 58 R792 GPD8/SUSCLK BD13 BATLOW_N

SUS_CLK 33,34
C
follow common design, GPD0/BATLOW#
1 A 20K_1%_04 6/7 Tim follow common design, BB19 SUSACK# R407 *0_04
C 3 6/7 Tim RTC_RST# BC10 GPP_A15/SUSACK# BD19 SUS_PWR_ACK R406 *0_04
RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK SUS_PWR_ACK_R 22
2 A SRTCRST# BB10
SPT-H 3/7
1
R809 C896 SRTCRST#
JOPEN2
RTC_VBAT_1
45.3K_1%_04 BAT54CWH AW11 BD11 PCH_LAN_WAKE# R342 *0_04 SWI# 16,22

*CV_40mil 1u_6.3V_X5R_04 15,20,22 PM_PCH_PWROK PCH_PWROK GPD2/LAN_WAKE#
Modify value,4/20 Tim BA11 BB15 AC_PRESENT
22,49 RSMRST# RSMRST# GPD1/ACPRESENT BB13 AC_PRESENT 22 R768 *0_04
2
SLP_SUS# SLP_SUS# 16,22,41,49
R767 AV11 AT13 PWR_BTN#
C 49 PCH_DPWROK DSW_PWROK GPD3/PWRBTN# PWR_BTN# 22 Remove PCH_SLP_SUS# to EC, C
20K_1%_04 PCH_PORT80_LED BB41 AW1 SYS_RESET#
GPP_C2/SMBALERT# SYS_RESET# 6/7 Tim
ĲıŮŪŭŴ AW44 BD26 HDA_SPKR
SMBUS
14,15,38 PCH_SMB_CLK GPP_C0/SMBCLK GPP_B14/SPKR HDA_SPKR 18,38
14,15,38 PCH_SMB_DATA BB43 AM3 H_PWRGD_R R361 30.1_1%_04
GPP_C1/SMBDATA PROCPWRGD H_PWRGD 3
R96 C893 GPP_C_5 BA40 Modify,3/4 Tim
SMLINK0_CLK AY44 GPP_C5/SML0ALERT# AT2 ITP_PMODE
1K_04 1u_6.3V_X5R_04 SMLINK0_DATA BB39 GPP_C3/SML0CLK ITP_PMODE AR3 PCH_JTAGX
GPP_C4/SML0DATA JTAGX PCH_JTAGX 3
PCH_HOT_R_N AT27 JTAG AR2 PCH_JTAG_TMS
GPP_B23/SML1ALERT#/PCHHOT# JTAG_TMS PCH_JTAG_TMS 3 1.0VA
R390 *0_04 SMC_CPU_THERM_R AW42 AP1 PCH_JTAG_TDO
22 SMC_CPU_THERM GPP_C6/SML1CLK JTAG_TDO PCH_JTAG_TDO 3
22 SMD_CPU_THERM R807 *0_04 SMD_CPU_THERM_R AW45 AP2 PCH_JTAG_TDI
GPP_C7/SML1DATA JTAG_TDI PCH_JTAG_TDI 3
AN3 PCH_JTAG_TCK
1
Modify,4/17 Tim JTAG_TCK

4 OF 12 ITP_PMODE R387 1K_04
J_CBAT1
+
R386
53011-00201-001 Z170 ? REV = 1.3
3.3VS
2/27 Tim
3.3VA *51_04 Modify,3/27 Tim
3.3VA
-
PM_CLKRUN# R437 8.2K_04

SYS_PWROK R399 *1K_04
2
R760 DESIGN NOTE: SYS_RESET# R397 2.2K_04

R403 VDDQ
PLATFORM RST BUFFER Follow P75,4/16 Tim
499_1%_04 499_1%_04
SMLINK0_CLK SMLINK0_DATA STUFF FOR NON-DEEP SX SUS_PWR_ACK R408 *1K_04

C467 C886
RSMRST# 10K_04 R456
3.3VA DESIGN NOTE: 3.3VA
DESIGN NOTE: *100PF_50V_X7R_04 *100PF_50V_X7R_04 R458 C474 Modify,7/2 Tim
U34 470_04
5
TLS CONFIDENTIALITY ENABLED ESPI/LPC SELECT STRAP 0.1u_10V_X7R_04
IF SAMPLED HIGH(DEFAULT) IF SAMPLED HIGH, ESPI IS DRAM_CRESETB 1
B
PCH HAS INTERNAL WEAK PD SELECTED ELSE LPC 4 DESIGN NOTE: B
PCH HAS INTERNAL WEAK PD DDR4_DRAMRST# 7,8,9,10
R743 SUSC# 2 AC_PRESENT
Modify,4/13 Tim R742 3.3VA 3.3VA Function Table DEEP SX:PU 10K VDD3
4.7K_04 Remove 0Ohm,6/7 Tim NON-DEEP SX:NC
*TC7SZ08FU
3
PCH_PORT80_LED *4.7K_04 A B Y Modify,2/27 Tim
GPP_C_5 PCIE_WAKE# R449 10K_04
R388 R389 L L L
R745 R434 0_04 BATLOW_N R450 10K_04
R744 1K_04 1K_04 PCH_LAN_WAKE# R448 4.7K_04
*20K_04
L H L R405 *100K_04 AC_PRESENT R454 *10K_04
SMC_CPU_THERM_R SMD_CPU_THERM_R R431 C477 PWR_BTN# R447 3K_1%_04
*20K_04
C462 H L L
C463 *10K_04 *0.1u_10V_X7R_04
*100PF_50V_X7R_04 H H H 3.3VA
*100PF_50V_X7R_04 Follow SKL MOW,3/1 Tim
3.3VS VRALERTB_PU R410 10K_04

JOPEN1 PU/PD for JTAG signals
*CV_40mil VCCST_VCCPLL DESIGN NOTE: 1/30
R769 1K_04 1 2 R771 1K_04 TOP SWAP OVERRIDE STRAP
3.3VA ME_WE# 22 DESIGN NOTE: PCH_JTAG_TMS R385 51_04 HIGH:TOP SWAP ENABLED R413
3.3VA EXI BOOT STALL BYPASS IS PCH_JTAG_TDI R383 51_04 LOW:TOP SWAP DISABLED(DEFAULT)
PCH_JTAG_TDO R384 51_04 PCH HAS INTERNAL WEAK PD
R770 *910_04 A C HDA_SDOUT ENABLED IF SAMPLED HIGH *4.7K_04
PCH HAS INTERNAL WEAK PD
D45 RB751V-40(lision)
HDA_SPKR
R749
*4.7K_04
R411 OD PLL VR ENABLE: DISABLED WHEN SAMPLED LOW
SUS_CLK R720 1.5K_04
A PCH_HOT_R_N *20K_04 A
1/30
R750
*20K_04
3,15,16,19,20,41 3.3VA
20,41,46 1.0VA
5,7,8,9,10,44 VDDQ Title
15,16,19,20,22,23,33,36,37,38,41,42,43,45,46,49 VDD3
[17] SPT-H 3/7-HDA/SMB/JTAG/GPI
20 DVDDIO_AUDIO
15,20 RTCVCC
A3 SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
B - 18 SPT-H 3/7
Schematic Diagrams
SPT-H 4/7
5 4 3 2 1
SPT-H (CLK,REQ,GPP,DDP) TEST SETUP MENU TABLE

BOARD STYLE
U31G SKL_PCH_H ? 1 DISABLED (DEFAULT)
C849 L1 PCH_XDP_CLK_R_DN
22p_50V_NPO_04 P/N: 3/20 Tim TP_CLKOUT_48 AR17 CLKOUT_ITPXDP L2 PCH_XDP_CLK_R_DP
6-22-24R00-1BA Modify,4/2 Tim GPP_A16/CLKOUT_48 CLKOUT_ITPXDP_P 0 TEST SETUP MENU ENABLED
3 PCH_CPU_NSSC_CLK_DP G1 J1 PCH_CPU_PCIBCLK_DN 3
3
2
F1 CLKOUT_CPUNSSC_P CLKOUT_CPUPCIBCLK J2
X5
3 PCH_CPU_NSSC_CLK_DN CLKOUT_CPUNSSC CLKOUT_CPUPCIBCLK_P PCH_CPU_PCIBCLK_DP 3 DESIGN NOTE:
D R690 D
FSX3M_24MHZ 3 PCH_CPU_BCLK_DP G2 TEST SETUP MENU JUMPER
H2 CLKOUT_CPUBCLK_P
1M_1%_04 3 PCH_CPU_BCLK_DN CLKOUT_CPUBCLK
C850 3.3VS
22p_50V_NPO_04 Remove 0Ohm,6/8 Tim XTAL_24M_PCH_OUT A5 N7
4
1
XTAL24_OUT CLKOUT_PCIE_N0 CLK_PCIE_WLAN# 33

XTAL_24M_PCH_IN A6 N8
XTAL24_IN CLKOUT_PCIE_P0 CLK_PCIE_WLAN 33
R683 10K_04 TEST_SETUP_MENU
V1P0A_VCCF24_1P0 R310 2.7K_1%_04 XCLK_RBIAS E1 L7
XCLK_BIASREF CLKOUT_PCIE_N1 CLK_PCIE_CARD# 35
L5 R686
CLKOUT_PCIE_P1 CLK_PCIE_CARD 35
RTC_X1 BC9
RTC_X2 BD10 RTCX1 D3 *0_04
RTCX2 CLKOUT_PCIE_N2 TBT_REFCLK_100_N 28
F2
CLKOUT_PCIE_P2 TBT_REFCLK_100_P 28
33 WLAN_CLKREQ# BC24
AW24 GPP_B5/SRCCLKREQ0# E5
35 CARD_CLKREQ# GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_N3 CLK_PCIE_SSD1# 34 2/27 Tim
28 TBT_CLKREQ_N AT24 G4
GPP_B7/SRCCLKREQ2# CLKOUT_PCIE_P3 CLK_PCIE_SSD1 34
34 SSD1_CLKREQ# BD25
BB24 GPP_B8/SRCCLKREQ3# D5
34 SSD2_CLKREQ# GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_N4 CLK_PCIE_SSD2# 34
11 MXM1_CLKREQ# BE25 E6
GPP_B10/SRCCLKREQ5# CLKOUT_PCIE_P4 CLK_PCIE_SSD2 34
12 MXM2_CLKREQ# AT33 RECOVER/CONFIGURE HEADER MODE
GPP_H0/SRCCLKREQ6#
11,22 MXM1_PRSNT# AR31 D8 DESIGN NOTE:
GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_N5 CLK_PCIE_MXM1# 11
12,22 MXM2_PRSNT# BD32 D7 * DEFAULT JUMPER SETTING
GPP_H2/SRCCLKREQ8# CLKOUT_PCIE_P5 CLK_PCIE_MXM1 11
BC32
4/3 Tim BB31 GPP_H3/SRCCLKREQ9# R8 FOR SOP ENABLE AND FLASH
GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_N6 CLK_PCIE_MXM2# 12 STUFF FOR RECOVERY USAGE ONLY
R468 STUFF NORMAL
BC33 R7
GPP_H5/SRCCLKREQ11# CLKOUT_PCIE_P6 CLK_PCIE_MXM2 12
R766 10K_04 CARD_CLKREQ# BA33 R412 STUFF,R468 REMOVE CONFIGURE
3.3VS AW33 GPP_H6/SRCCLKREQ12# U5
R414 10K_04 SSD1_CLKREQ# GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_N7 CLK_PCIE_GLAN1# 36
BB33 U7 R442 STUFF,R468 REMOVE RECOVERY
R719 *1K_04 MXM1_PRSNT# R435 10K_04 SSD2_CLKREQ# GPP_H8/SRCCLKREQ14# CLKOUT_PCIE_P7 CLK_PCIE_GLAN1 36
BD33
R421 *1K_04 MXM2_PRSNT# GPP_H9/SRCCLKREQ15#
Sheet 18 of 58
R415 10K_04 MXM1_CLKREQ# W10
CLKOUT_PCIE_N8 CLK_PCIE_GLAN2# 37
R764 10K_04 MXM2_CLKREQ# R13 W11 3.3VS
C CLKOUT_PCIE_N15 CLKOUT_PCIE_P8 CLK_PCIE_GLAN2 37 C
R11
R323 47K_04 MXM1_PRSNT# CLKOUT_PCIE_P15 N3
R422 47K_04 MXM2_PRSNT# P1 CLKOUT_PCIE_N9 N2 R468 1K_04
SPT-H 4/7
CLKOUT_PCIE_N14 CLKOUT_PCIE_P9 PCH_CONFIG_JUMPER 16
R2
Follow NV,3/5 Tim CLKOUT_PCIE_P14 P3
Adj value,6/8 Tim W7 CLKOUT_PCIE_N10 P2 R700
C465 Y5 CLKOUT_PCIE_N13 CLKOUT_PCIE_P10 10K_04
12p_50V_NPO_04 CLKOUT_PCIE_P13
Follow PDG,3/2 Tim Modify,6/10 Tim
U2 R3
U3 CLKOUT_PCIE_N12 CLKOUT_PCIE_N11 R4
CLKOUT_PCIE_P12 7 OF 12 CLKOUT_PCIE_P11
P/N: Z170 ? REV = 1.3 R412 *2.2K_04
X4
2
1
6-22-32R76-0B2 R442 *2.2K_04 HDA_SPKR 17,38

R404 6-22-32R76-0BG LPSS_GSPI0_MOSI 15
1TJS125DJ4A420P_32.768KHz
6-22-32R76-0BJ
C466 10M_06
3
4
12p_50V_NPO_04 RTC_X1
RTC_X2
2/27 Tim
3.3VS
U31E ? R687 *301_1%_04 DGPU_RST#_PCH R684 10K_04

SKL_PCH_H dGPU_PWR_EN# R543 10K_04
Add,6/15 Tim
BB3 GC6_FB_EN R313 *10K_04
B C A GPP_I0 AW4 GPP_I7/DDPC_CTRLCLK BD6 B
3.3VS Modify,4/14 Tim 19,22,23 SMI# STRAP:GPP_I6,I8,I10(internal PD) Reserved,4/2 Tim
D71 RB751V-40(lision) AY2 GPP_I0/DDPB_HPD0 GPP_I8/DDPC_CTRLDATA BA5
GPP_I1/DDPC_HPD1 GPP_I5/DDPB_CTRLCLK 0: PORT B,C,D NOT detected GC6_FB_EN R312 *10K_04
AV4 BC4 1:PORT B,C,D detected
GPP_I2/DDPD_HPD2 GPP_I6/DDPB_CTRLDATA
R394 *10K_04 GPP_I0 Remove test point,6/10 Tim BA4 GPP_I3/DDPE_HPD3 GPP_I9/DDPD_CTRLCLK
BE5
R393 *10K_04 BE6
R735 10K_04 GPP_I10/DDPD_CTRLDATA
3.3VS
Y44
GPP_F14 V44 H_SKTOCC_N 3
follow PDG,3/1 Tim GPP_F23 W39
GPP_F22 DGPU_RST#_PCH 11
R400 100K_04 DDSP_1_HPD0 BD7
GPP_I4/EDP_HPD L43 IVCAM_DFU 4/3 Tim
GPP_G23 L44
GPP_G22 dGPU_PWR_EN# 11,12
U35
GPP_G21 GC6_FB_EN 11
R35 TEST_SETUP_MENU
GPP_G20 BD36 DESIGN NOTE:
GPP_H23 TBTA_ACE_GPIO7 30
3/6 Tim
SYS_PWROK NORMAL POWER DOWN
5 OF 12
TRIGGERED BY PCH
Z170 ? REV = 1.3
Remove SUSB# to SYS_PWROK circuit,

6/7 Tim
A A
Title
[18] SPT-H 4/7-CLK,REQ,GPP
20 V1P0A_VCCF24_1P0
2,13,14,16,24,29,33,38,41,42,44,46 3.3V Size Document Number Rev

5 4 3 2 1
SPT-H 4/7 B - 19
Schematic Diagrams
SPT-H 5/7
5 4 3 2 1
SPT-H (DMI,PCIe,USB,LPC)
SKL_PCH_H
U31B ?
L27
2 DMI_TXN0 N27 DMI_RXN0 AF5
D 2 DMI_TXP0 DMI_RXP0 USB2N_1 USB_PN1 27 3.3VA D
C27 AG7
2 DMI_RXN0 DMI_TXN0 USB2P_1 USB_PP1 27
B27 AD5 USB TABLE
2 DMI_RXP0 DMI_TXP0 USB2N_2 USB_PN2 40
E24 AD7
2 DMI_TXN1 DMI_RXN1 USB2P_2 USB_PP2 40 USB2.0 USB3.0 DEVICE R712 10K_04
G24 AG8 USB2_OC0# 27
2 DMI_TXP1 DMI_RXP1 USB2N_3 USB_PN3 40 1 1 USB3 PORT 1
B28 AG10 RN2
2 DMI_RXN1 DMI_TXN1 USB2P_3 USB_PP3 40 2 2 USB3 PORT 2 4 5 USB2_OC1#
A28 AE1
2 DMI_RXP1 DMI_TXP1 USB2N_4 USB_PN4 40 USB3 PORT 3 3 6 USB2_OC4#
G27 DMI AE2 3 3
2 DMI_TXN2 DMI_RXN2 USB2P_4 USB_PP4 40 2 7 USB2_OC2#
E26 AC2 4 4 USB3 PORT 4
2 DMI_TXP2 DMI_RXP2 USB2N_5 USB_PN5 40 1 8 USB2_OC5#
B29 AC3 5 5 USB3 PORT 5
C29 AF2 6 CCD 10K_8P4R_04 Modify,6/10 Tim
L29 AF3 7 FINGERPRINT
2 DMI_TXN3 DMI_RXN3 USB2P_6 USB_PP6 27
K29 AB3 8 BT R339 10K_04 USB2_OC6#
2 DMI_TXP3 DMI_RXP3 USB2N_7 USB_PN7 38
B30 USB 2.0 AB2 R340 10K_04 GPIO_PCIESLOT_RST_R
A30 AL8

AL7
R301 100_1%_04 USB2P_8 USB_PP8 33
PCIECOMP_N B18 AA1
PCIECOMP_P C17 PCIE_RCOMPN USB2N_9 AA2
PCIE_RCOMPP USB2P_9 AJ8
Follow Checklist,3/27 Tim USB2N_10 AJ7
H15 USB2P_10 W2
G15 PCIE1_RXN/USB3_7_RXN USB2N_11 W3
PCIE1_RXP/USB3_7_RXP USB2P_11
PCIe/USB 3
A16 AD3
B16 PCIE1_TXN/USB3_7_TXN USB2N_12 AD2
Sheet 19 of 58 B19
C19
E17
PCIE1_TXP/USB3_7_TXP
PCIE2_TXN/USB3_8_TXN
PCIE2_TXP/USB3_8_TXP
USB2P_12
USB2N_13
USB2P_13
V2
V1
AJ11
G17 PCIE2_RXN/USB3_8_RXN USB2N_14 AJ13
SPT-H 5/7 C
33 PCIE_RXN3_WLAN
33 PCIE_RXP3_WLAN
L17
K17
PCIE2_RXP/USB3_8_RXP
PCIE3_RXN/USB3_9_RXN
PCIE3_RXP/USB3_9_RXP
USB2P_14
C
t>E 33 PCIE_TXN3_WLAN
C395
C394
0.22u_10V_X5R_04
0.22u_10V_X5R_04
B20
C20 PCIE3_TXN/USB3_9_TXN AD43 USB2_OC0#
DESIGN NOTE:
DFX TEST MODE
33 PCIE_TXP3_WLAN PCIE3_TXP/USB3_9_TXP GPP_E9/USB2_OC0#
E20 AD42 USB2_OC1# XTAL INPUT IS SINGLE ENDED IF SAMPLED LOW ELSE DIFFERENTIAL
35 PCIE_RXN4_CARD G19 PCIE4_RXN/USB3_10_RXN GPP_E10/USB2_OC1# AD39 USB2_OC2# R364 *10K_04
ĂƌĚZĞĂĚĞƌ
35 PCIE_RXP4_CARD C396 0.1u_10V_X7R_04 B21 PCIE4_RXP/USB3_10_RXP GPP_E11/USB2_OC2# AC44 VISACH2_D3 R367 10K_04 Modify,4/3 Tim
35 PCIE_TXN4_CARD PCIE4_TXN/USB3_10_TXN GPP_E12/USB2_OC3# 3.3VA
C397 0.1u_10V_X7R_04 A21 Y43 USB2_OC4#
Modify 0.1uF for Gen2,2/25 Tim 35 PCIE_TXP4_CARD PCIE4_TXP/USB3_10_TXP GPP_F15/USB2_OCB_4
K19 Y41 USB2_OC5# Modify,6/14 Tim
28 PCIE_RXN5_TBT L19 PCIE5_RXN GPP_F16/USB2_OCB_5 W44 USB2_OC6#
28 PCIE_RXP5_TBT C834 0.22u_10V_X5R_04 D22 PCIE5_RXP GPP_F17/USB2_OCB_6 W43 GPIO_PCIESLOT_RST_R
28 PCIE_TXN5_TBT PCIE5_TXN GPP_F18/USB2_OCB_7
C833 0.22u_10V_X5R_04 C22 Modify,3/30 Tim
28 PCIE_TXP5_TBT PCIE5_TXP
G22
28 PCIE_RXN6_TBT E22 PCIE6_RXN AG3 USB2_COMP R334 113_1%_04
28 PCIE_RXP6_TBT C398 0.22u_10V_X5R_04 B22 PCIE6_RXP USB2_COMP AD10 USB2_VBUSSENSE R721 1K_04
DESIGN NOTE:
28 PCIE_TXN6_TBT PCIE6_TXN USB2_VBUSSENSE
USB2 COMP RES: PLACE WITHIN 1 INCH
ůƉŝŶĞZŝĚŐĞ 28 PCIE_TXP6_TBT
C399 0.22u_10V_X5R_04 A23
L22 PCIE6_TXP RSVD_AB13
AB13 TP_PCH_AB13
AG2 USB2_ID R362 1K_04
28 PCIE_RXN7_TBT K22 PCIE7_RXN USB2_ID
28 PCIE_RXP7_TBT C401 0.22u_10V_X5R_04 C23 PCIE7_RXP
28 PCIE_TXN7_TBT PCIE7_TXN
C400 0.22u_10V_X5R_04 B23
28 PCIE_TXP7_TBT PCIE7_TXP
K24 BD14 RSVD_PCH_BD14_N R451 *10K_04 VDD3
28 PCIE_RXN8_TBT L24 PCIE8_RXN GPD7/RSVD
28 PCIE_RXP8_TBT C403 0.22u_10V_X5R_04 C24 PCIE8_RXP Modify,6/8 Tim
28 PCIE_TXN8_TBT PCIE8_TXN
C402 0.22u_10V_X5R_04 B24
28 PCIE_TXP8_TBT PCIE8_TXP 3.3VS
2 OF 12 DESIGN NOTE:
Z170 ? REV = 1.3
USED TO DETECT 2X4 PRESENCE
JA PIN 4 WILL PULL GPIO TO GND
WHEN 2X4 PLUG IN
SKL_PCH_H CONNECT TO GPIO
B U31F ? B
C11 AT22 2X4_POWER_DETECT R338 *10K_04
LPC/eSPI
27 USB3_TXN1 USB3_1_TXN GPP_A1/LAD0/ESPI_IO0 LPC_AD0 22,23,24
B11 AV22
27 USB3_TXP1 USB3_1_TXP GPP_A2/LAD1/ESPI_IO1 LPC_AD1 22,23,24
B7 AT19
27 USB3_RXN1 USB3_1_RXN GPP_A3/LAD2/ESPI_IO2 LPC_AD2 22,23,24
A7 BD16
27 USB3_RXP1 USB3_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD3 22,23,24
B12 *10mil_short Modify,6/8 Tim 3.3VS
40 USB3_TXN2 USB3_2_TXN/SSIC_1_TXN BE16 L_FRAME_N_R R754 LPC_FRAME# 22,23,24
A12 GPP_A5/LFRAME#/ESPI_CS#
40 USB3_TXP2 USB3_2_TXP/SSIC_1_TXP BA17 SERIRQ SERIRQ 22,23,24
C8 GPP_A6/SERIRQ
40 USB3_RXN2 USB3_2_RXN/SSIC_1_RXN AW17 R787 10K_04 3.3VS Follow Checklist,3/27 Tim SERIRQ R788 10K_04
B8 GPP_A7/PIRQA#/ESPI_ALERT0#
USB TABLE 40 USB3_RXP2 USB3_2_RXP/SSIC_1_RXP AT17 SB_KBCRST# SB_KBCRST# 22 SB_KBCRST#R786 10K_04
B15 GPP_A0/RCIN#/ESPI_ALERT1# BC18 S4_STATE# Modify,3/17 Tim PCH_SMI_N R325 *10K_04
USB2.0 USB3.0 DEVICE USB3_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET# S4_STATE# 24
C15 PCH_SMI_N R326 *10K_04
1 1 USB3 PORT 1 K15 USB3_6_TXP Modify,3/18 Tim
USB3_6_RXN
USB
2 2 USB3 PORT 2 K13 BC17 LPC_0_ESPI_CLK_EC R755 22_1%_04
USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK PCLK_KBC 22,23
3 3 USB3 PORT 3
Add,2/27 Tim AV19 PCH_CLK_PCI_TPM R753 22_1%_04 PCLK_TPM 24
4 B14 GPP_A10/CLKOUT_LPC1
4 USB3 PORT 4 40 USB3_TXN5 Add,3/13 Tim
C14 USB3_5_TXN M45 PCH_SMI_N R327 *0_04 3.3VA
5 5 USB3 PORT 5 40 USB3_TXP5
G13 USB3_5_TXP GPP_G19/SMI# N43 2X4_POWER_DETECTR344 *10mil_short
SMI# 18,22,23 DESIGN NOTE:
6 CCD 40 USB3_RXN5 USB3_5_RXN GPP_G18/NMI# PCH_MUTE# 38
7 FINGERPRINT H13 PD FOR I2S MODE
40 USB3_RXP5 USB3_5_RXP Modify,6/8 Tim DEFAULT PU HDA MODE
8 BT R702
C13 AE45 TP_GPP_E_6
40 USB3_TXN3 USB3_3_TXN/SSIC_2_TXN GPP_E6/DEVSLP2 100K_04
D13 AG43 TP_GPP_E_5
40 USB3_TXP3 USB3_3_TXP/SSIC_2_TXP GPP_E5/DEVSLP1
A9 AG42
40 USB3_RXP3 USB3_3_RXP/SSIC_2_RXP GPP_E4/DEVSLP0 SSD1_SATA_DEVSLP 34
B10 AB39 TP_GPP_F_9 PCH_CODEC_IRQ
40 USB3_RXN3 USB3_3_RXN/SSIC_2_RXN GPP_F9/DEVSLP7 AB36 TP_GPP_F_8
SATA
B13 GPP_F8/DEVSLP6 AB43 TP_GPP_F_7
40 USB3_TXP4 USB3_4_TXP GPP_F7/DEVSLP5 Modify,4/3 Tim R703
A14 AB42 PCH_CODEC_IRQ
40 USB3_TXN4 USB3_4_TXN GPP_F6/DEVSLP4 *100K_04
Add,2/27 Tim G11 AB41
40 USB3_RXP4 USB3_4_RXP GPP_F5/DEVSLP3 SSD2_SATA_DEVSLP 34
A E11 A
40 USB3_RXN4 USB3_4_RXN 6 OF 12
Z170 ? REV = 1.3
Title
[19] SPT-H 5/7-DMI,PCIe,USB
3,15,16,17,20,41 3.3VA
15,16,17,20,22,23,33,36,37,38,41,42,43,45,46,49 VDD3 Size Document Number Rev
7,8,9,10,11,12,13,14,15,16,17,18,20,22,23,24,25,26,27,29,31,32,33,35,38,39,41,43,44,46,47 3.3VS A3 SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
B - 20 SPT-H 5/7
Schematic Diagrams
SPT-H 6/7
5 4 3 2 1
DESIGN NOTE: DESIGN NOTE:

PLACE HOLDER FOR VCCAUSB_1P0 AND VCCAAZPLL_1P0 FILTER SPT-H (POWER) 1.0VA
EDGE CAP FOR VCCMPHY_1P0 AND VCCDUSB_1P0
1.0VA 1.0VA
1.0VA Modify short pad,6/10 Tim V1P0A_VCCAPLL Modify short pad,6/10 Tim
Add 0.1u,6/15 Tim SKL_PCH_H
1.0VA U31H ? C865
R734 C866
R722 *15mil_short
Close to AN19 AA23 *15mil_short
VCCPRIM_1P0 1u_6.3V_X5R_04 22u_6.3V_X5R_08
C868 C876 AA26
C955 AA28 VCCPRIM_1P0 AL22 +P1V0_PRIME_PCH_FUSE_2V8
*0.1u_10V_X7R_04 VCCPRIM_1P0 VCCPRIM_1P0 VCCPGPPA 3.3VA
CORE
*22u_6.3V_X5R_08 22u_6.3V_X5R_08 AC23
AC26 VCCPRIM_1P0 BA24
D AC28 VCCPRIM_1P0 VCCDSW_3P3 VDD3 DESIGN NOTE: D
NEAR AJ5,AL5 VCCPRIM_1P0
VCCGPIO
AE23 BA31 R763 *15mil_short BOARD CAP FOR VCCPRTCPRIM_3P3
AE26 VCCPRIM_1P0 VCCPGPPA BC42
VCCPRIM_1P0 VCCPGPPBH 3.3VA 3.3VA
DESIGN NOTE: Y23 BD40 Modify short pad,6/10 Tim
Y25 VCCPRIM_1P0 VCCPGPPBH AJ41
PLACE HOLDER FOR VCCMPHYPLL_1P0 FILTER BA29 VCCPRIM_1P0 VCCPGPPEF AL41 C874
P1V0_PCH_VCCDSW DCPDSW_1P0 VCCPGPPEF
1.0VA AD41
1.0VA Modify short pad,6/10 Tim V1P0A_VCCAMPHYPLL C873 N17 VCCPGPPG AN5 1u_6.3V_X5R_04
DESIGN NOTE: R19 VCCCLK1 VCCPRIM_3P3
R311 *15mil_short
Modify,4/3 Tim
BOARD CAP FOR VCCDSW_1P0 1u_6.3V_X5R_04 U20 VCCCLK3 NEAR BA20
V17 VCCCLK4 AD15
VCCCLK2 VCCPRIM_1P0 1.0VA
C407 C406 C408 R17 AD13 3.3VS DESIGN NOTE:
VCCCLK6 VCCATS BA20
VCCRTCPRIM_3P3 3.3VA
*22u_6.3V_X5R_08 *22u_6.3V_X5R_08 22u_6.3V_X5R_08 V1P0A_VCCF24_1P0 K2 BA22 VCCPRTC_3P3
EDGE CAP FOR VCCPHVC_3P3
K3 VCCCLK5 VCCRTC BA26 VCC_RTCEXT_CAP (PLACE HOLDER)
VCCCLK5 DCPRTC 3.3VA
NEAR A42,A43,B43 U21
1.0VA VCCMPHY_1P0 C881
MPHY
U23 AJ20 1.0VA Modify,4/3 Tim
VCCMPHY_1P0 VCCPRIM_1P0 0.1u_10V_X7R_04
DESIGN NOTE: U25 AJ21 C872
U26 VCCMPHY_1P0 VCCPRIM_1P0 AJ23
VCCMPHY_1P0 VCCPRIM_1P0 0.1u_10V_X7R_04
PLACE HOLDER FOR VCCMPHYPLL_1P0 FILTER V26 AJ25 V3P3A_V1P8A_PCH_SPI Modify,6/11 Tim
V1P0A_VCCAMPHYPLL A43 VCCMPHY_1P0
VCCAMPHYPLL_1P0
VCCPRIM_1P0 NEAR AJ41,AL41
1.0VA Modify short pad,6/10 Tim V1P0A_VCCF24_1P0 B43 BE41 R761 *15mil_short
VCCAMPHYPLL_1P0 VCCSPI 3.3V_SPI
C44 BE43 DESIGN NOTE:
R691 *15mil_short C45 VCCPCIE3PLL_1P0 VCCSPI BE42
Modify,4/3 Tim VCCPCIE3PLL_1P0 VCCSPI Modify short pad,6/10 Tim
BOARD CAP FOR VCCATS
C851 C852 1.0VA V28
VCCAPLLEBB_1P0 VCCPGPPCD
BC44 VCCPGPPD 3.3VS
Sheet 20 of 58
USB
AC17 BA45
*22u_6.3V_X5R_08 22u_6.3V_X5R_08 AJ5 VCCPRIM_1P0 VCCPGPPCD BC45
C V1P0A_VCCAPLL VCCUSB2PLL_1P0 VCCPGPPCD C
AL5 BB45 Modify short pad,6/10 Tim C867
NEAR K2,K3
DVDDIO_AUDIO
VDD3
AN19
BA15
W15
VCCUSB2PLL_1P0
VCCHDAPLL_1P0
VCCHDA
VCCDSW_3P3
VCCPGPPCD
VCCPRIM_3P3
VCCPRIM_3P3
BD3 +VCCPFUSE_3P3
BE3
R776 *15mil_short
3.3VA 1u_6.3V_X5R_04
NEAR AD13
SPT-H 6/7
BE4
8 OF 12 VCCPRIM_3P3
Z170 ? REV = 1.3
R726 0_04 SYS_PWROK_R R724 1K_04
22 PM_PWROK SYS_PWROK 17
ALL_SYS_PWROK to EC delay 99ms

generate PM_PWROK R727
Modify,4/11 Tim
10K_04
VCCIO_EN=(VDDQ_PWRGD & SUSB#)
VDD3 VDD3
VDD3
U54C
14
U54B close to U54
74LCX08FT
14
74LCX08FT SUSB# 9 C890 0.1u_10V_X7R_04

43,46,47 VCCIO_PWRGD 4 8 U54D
VR_ON 47
14
6 10 74LCX08FT
5 12
42 5VS_PWRGD
11
7
R729 C870 BUF_PLT_RST# 22,23,24,28,33,34,35,36,37
PLT_RST# 13
7
VDD3 11,15 PLT_RST#

10K_04 *0.1u_10V_X7R_04 R781
7
U54A Modify,6/6 Tim
14
74LCX08FT 100K_04
B B
16 74LVC1G14GW_OUT 1
R784 249_1%_04 ALL_SYS_PWRGD 11,12,13,22
3
VCCST_PWRGD 3
2
17,22,23,27,28,38,41,42,43,44 SUSB#
DESIGN NOTE: DESIGN NOTE:

7
Modify,6/3 Tim R783 249_1%_04

PM_PCH_PWROK 15,17,22 EDGE CAP FOR VCCPGPPBCH (PLACE HOLDER)
DESIGN NOTE:
BOARD CAP FOR VCCPRTC_3P3
EDGE CAP FOR VCCPGPPG(PLACE HOLDER)
3.3VA
VCCPRTC_3P3
RTCVCC Modify short pad,6/10 Tim NEAR AD41 3.3VA
NEAR BC42,BD40
1.0VA->SUSC#->VDDQ->DDR1.2V_PWRGD->VCCIO R751 *15mil_short C864
C871 Modify,4/3 Tim
*0.1u_10V_X7R_04
C882 0.1u_10V_X7R_04
1u_6.3V_X5R_04
NEAR BA22
DESIGN NOTE: DESIGN NOTE: DESIGN NOTE:
BOARD GENERAL DCPL CAPS DESIGN NOTE: DESIGN NOTE: EDGE CAP FOR VCCPGPPEF(PLACE HOLDER) EDGE CAP FOR VCCPHVC_3P3
GROUP D POWER DVDDIO_AUDIO Close (PLACE HOLDER)
SPT-H :1.8V Modify,6/14 Tim
to PCH EDGE CAP FOR VCCPUSBDSW_3P3 3.3VA V1P0A_VCCF24_1P0
3.3VA C884 PLACE HOLDER
R757 *0_06
3.3VA VDD3 Modify,4/3 Tim
Q64 C848 Modify,4/3 Tim
0.1u_10V_X7R_04 C863
S D
C869 0.1u_10V_X7R_04 1u_6.3V_X5R_04
C879 C883 C875 C885 Follow Check list,3/20 Tim
C880
A 10u_6.3V_X5R_06 1u_6.3V_X5R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 *0.1u_10V_X7R_04
*MTN7002ZHS3 1u_6.3V_X5R_04 NEAR AN5 A
NEAR W15
G
R1013 0_06
NEAR K2,K3
5V VDD3
RTCVCC 15 3.3V_SPI
3,15,16,17,19,41 3.3VA
VCCPGPPD 15 VCCPGPPA
C887 C544 C812 R731 *15mil_short 15,17 RTCVCC
3.3VA 18 V1P0A_VCCF24_1P0
0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 Title
17 DVDDIO_AUDIO
Modify short pad,6/10 Tim 17,41,46 1.0VA [20] SPT-H 6/7-POWER
11,12,14,26,30,38,40,41,43,44,46,47,48 5V
7,8,9,10,11,12,13,14,15,16,17,18,19,22,23,24,25,26,27,29,31,32,33,35,38,39,41,43,44,46,47 3.3VS A3 SCHEMATIC1 6-71-P8700-D03 1.0
15 V3P3A_V1P8A_PCH_SPI
5 4 3 2 1
SPT-H 6/7 B - 21
Schematic Diagrams
SPT-H 7/7
5 4 3 2 1
SPT -H (RSVD,GND)
D D
U31I ?
U31LSKL_PCH_H ?
SKL_PCH_H
AC18 AR5
C42 AB11 AN4 VSS VSS AR7
D10 VSS VSS AB7 AN10 VSS VSS U15
D12 VSS VSS AB14 BE14 VSS VSS AL4
D15 VSS VSS AB31 BE18 VSS VSS AE29
D19 VSS VSS AB4 BE32 VSS VSS AF18
VSS VSS VSS VSS
D21 AB5 BE37 AF20

D24 VSS VSS AC1 BE40 VSS VSS AF21
D25 VSS VSS AC20 BE9 VSS VSS AF23
D27 VSS VSS AC21 C10 VSS VSS AF25
D33 VSS VSS AB8 J7 VSS VSS AG11
D35 VSS VSS AD11 K10 VSS VSS AG13 U31J SKL_PCH_H
?
Sheet 21 of 58 D36 VSS VSS AD14 K27 VSS VSS AG31

E13 VSS VSS AB15 K33 VSS VSS AG32
E15 VSS VSS AD32 K36 VSS VSS AG33
C E31 VSS VSS AD33 K4 VSS VSS AG38 BD2 AR22 TP_PCH_AR22 C
SPT-H 7/7 E33

F44
F8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD36
AD4
AD8
K42
K43
L12
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG4
AH1
AH17
BD45
BD44
BE44
VSS
VSS
VSS
VSS
RSVD
RSVD
RSVD
RSVD
W13 TP_PCH_W13
U13 TP_PCH_U13
P31 TP_PCH_P31
G42 AE18 L13 AH18 D45 N31 TP_PCH_N31
G9 VSS VSS AE20 L15 VSS VSS AH20 A42 VSS RSVD
H17 VSS VSS AE21 L4 VSS VSS AH21 B45 VSS P27 TP_PCH_P27
H19 VSS VSS AE25 L41 VSS VSS AH23 B44 VSS RSVD R27 TP_PCH_R27
H22 VSS VSS AE28 L8 VSS VSS AH25 A4 VSS RSVD N29 TP_PCH_N29
H24 VSS VSS AL10 M35 VSS VSS AH26 A3 VSS RSVD P29 TP_PCH_P29
H27 VSS VSS AL11 M42 VSS VSS AH28 B2 VSS RSVD AN29 TP_PCH_AN29
H29 VSS VSS AL13 N10 VSS VSS AH29 A2 VSS RSVD R24 TP_PCH_R24
H3 VSS VSS AL17 N15 VSS VSS AH45 B1 VSS RSVD P24 TP_PCH_P24
H35 VSS VSS AL19 N19 VSS VSS AJ10 BB1 VSS RSVD
J10 VSS VSS AL24 N22 VSS VSS AJ14 BC1 VSS AT3
J11 VSS VSS AL29 N24 VSS VSS AJ15 A44 VSS PREQ# AT4 PCH_XDP_PREQ_R_N 3
VSS VSS VSS VSS VSS PRDY# PCH_XDP_PRDY_R_N 3
J3 AL32 N35 AJ17 AY5
J39 VSS VSS AL33 N36 VSS VSS AJ18 TP_PCH_C1 C1 CPU_TRST# AL2 R359 30.1_1%_04 H_TRST_N_R 3
J5 VSS VSS AL38 N4 VSS VSS AJ26 TP_PCH_D1 D1 RSVD PCH_TRIGOUT AK1 PCH_2_CPU_TRIGGER 2
T42 VSS VSS AM15 N41 VSS VSS AJ28 RSVD PCH_TRIGIN Modify,3/4 Tim CPU_2_PCH_TRIGGER 2
U10 VSS VSS AM17 N5 VSS VSS AJ29
U11 VSS VSS AM19 P17 VSS VSS AJ31 10 OF 12
U14 VSS VSS AM22 P19 VSS VSS AJ32 Z170 ? REV = 1.3
U17 VSS VSS AM24 P22 VSS VSS AJ36
U18 VSS VSS AM27 P45 VSS VSS AK4
U28 VSS VSS AM29 R10 VSS VSS AK42
U29 VSS VSS AM45 R14 VSS VSS AU7
U31 VSS VSS AN11 R22 VSS VSS AV17
B U33 VSS VSS AN27 R33 VSS VSS AV27 B
U8 VSS VSS AN7 T1 VSS VSS AV6
V18 VSS VSS AN8 T2 VSS VSS AW13
V20 VSS VSS AP11 T4 VSS VSS AW19
V21 VSS VSS AP4 Y18 VSS VSS AW29
V23 VSS VSS AR33 Y20 VSS VSS AW37
V25 VSS VSS AR34 Y21 VSS VSS AW9
V29 VSS VSS AR42 Y26 VSS VSS AY38
V3 VSS VSS AR9 Y28 VSS VSS AY45
V45 VSS VSS AT10 Y29 VSS VSS B25
W14 VSS VSS AT15 A18 VSS VSS B3
W33 VSS VSS AU1 A37 VSS VSS B6
W38 VSS VSS AU35 AA17 VSS VSS BA1
W4 VSS VSS AU36 AA18 VSS VSS BB11
W8 VSS VSS AU39 AA20 VSS VSS BB16
Y17 VSS VSS AU45 AA21 VSS VSS BB21
VSS VSS C4 AA25 VSS VSS BB25
VSS AA29 VSS VSS BB30
AA4 VSS VSS BB34
12 OF 12 AA42 VSS VSS BC2
AB10 VSS VSS BD43
VSS VSS
Z170 REV = 1.3
9 OF 12
?
Z170 REV = 1.3
A
? A
Title
[21] SPT-H 7/7-RSVD/GND
A3 SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
B - 22 SPT-H 7/7
Schematic Diagrams
Main EC IT8587
1 2 3 4 5 6 7 8
VDD3 VDD3
IT8587 KBC_AVDD L22

MODEL_ID
V1.0
RA
10K
RB
X
PROJECT NAME
P870DM 5VS
HCB1005KF-121T20 R681 R680
VDD3 . VDD3
2
5VS Q42A 2.2K_04 2.2K_04
G
C832 C828 C844 C435 C387 C386
VDD3 1 6 KBC_SMBus_CLK1
11,26,38 SMC_VGA_THERM
10u_10V_Y5V_08 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 RA MTDK5S6R
D
MODEL_ID R281 10K_04
G
C847 R282 *10K_04 4 3 KBC_SMBus_DAT1
11,26,38 SMD_VGA_THERM
A KBC_AGND A
Modify value,
D
L32 HCB1005KF-121T20 0.1u_16V_Y5V_04 RB Q42B MTDK5S6R 8/14 Tim
3.3VS .
EMI Solution OPTION (⎗ẍ嬲≽ὅEC㍸ὃ䘬EXECL堐) R305 R303 J9
㛒⛐EXECL堐ᷕ䘬≇傥⎗ẍ冒埴␥⎵
114
121
127
10K_04 1K_04 *OPEN_10mil-1MM
11
26
50
92
74
3
U28A VDD3 1 2
U28B
VCC
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6
VBAT
AVCC
10 58
19,23,24 LPC_AD0 GPM0/LAD0 KSI0/STB#
9 59 76 100
19,23,24 LPC_AD1 GPM1/LAD1 KSI1/AFD# 17 ME_WE# GPJ0/TACH2 5VT/SSCE0#/GPG2
8 60 80
19,23,24 LPC_AD2 GPM2/LAD2 KSI2/INIT# 23 KBC2_ADC GPJ4/DAC4/DCD0#
7 61 81
19,23,24 LPC_AD3 GPM3/LAD3 KSI3/SLIN# 25 VGA_FAN1 GPJ5/DAC5/RIG0#
13 62
19,23 PCLK_KBC GPM4/LPCCLK KSI4
6 LPC 63 78 56
19,23,24 LPC_FRAME# GPM5/LFRAME# KSI5 25 VGA_FAN2 GPJ2/DAC2//TACH0B KSO16/SMOSI/GPC3 BT_EN 33
R699 *0_04 5 64 57
19,23,24 SERIRQ GPM6/SERIRQ KSI6 KSO17/SMISO/GPC5 WLAN_EN 33
22 65 68 ⚢⭂ἧ䓐FOR WLAN
20,23,24,28,33,34,35,36,37 BUF_PLT_RST# GPD2/LPCRST#/5VT KSI7 23 KBC2_DAC GPI2/ADC2
K/B MATRIX IT8587
VDD3 R349 100K_04 KBC_WRESET# 14 36 Modify,3/18 Tim
C434 0.1u_16V_Y5V_04 WRST# KSO0/PD0 37 71 93
KSO1/PD1 11,12 VBATT_BOOST# GPI5/ADC5/DCD1# 5VT/CLKRUN#/ID0/GPH0 USB_CHARGE_EN 27,41,49
R345 0_04 126 38 R283 0_04 72
23 GA20 GPB5/GA20 KSO2/PD2 23 GPI6 GPI6/ADC6/DSR1#
4 39 EC天㯪,1/27 Tim 94
32 PS8338B_EC1 45 AC_IN# GPB6/KBRST# KSO3/PD3 5VT/CRX1/SIN1/SMCLK3/ID1/GPH1 EC_CTRL_EN# 26 1/29 Tim
16 40
38 LED_ACIN GPC7/PWUREQ#/BBO/SMCLK2ALT KSO4/PD4
20 41
17 AC_PRESENT GPE7/L80LLAT/5VT KSO5/PD5 42 96
15,17,20 PM_PCH_PWROK
18,19,23 SMI#
R350 *0_04
23
KBC_SCI# 15 GPD3/ECSCI#/5VT
KSO6/PD6
KSO7/PD7
KSO8/ACK#
43
44
45
23 KBC_SMBus_CLK1
23 KBC_SMBus_DAT1
KBC_SMBus_CLK1 115
KBC_SMBus_DAT1 116
17 SMD_CPU_THERM
118
GPC1/SMCLK1/5VT
GPC2/SMDAT1/5VT
5VT/ID3/GPH3
5VT/ID4/GPH4
5VT/ID5/GPH5
97
98
99
PS8409_EC1 14
KBC2_GPIO1 23
KBC2_GPIO2 23 Modify,6/11 Tim
WLAN_PWR_EN 33
EC暨㯪,1/30 Tim
for MXM card
Sheet 22 of 58
GPD4/ECSMI# KSO9/BUSY 46 GPF7/SMDAT2/PECIRQT# 5VT/ID6/GPH6
B
38 KBC_MUTE#
77
GPJ1
DAC KSO10/PE
KSO11/ERR#
KSO12/SLCT
51
52
53
Modify,4/7 Tim OVERT#2 24
GPA0/PWM0/5VT
5VT/EGAD/GPE1
5VT/EGCS#/GPE2
82
83
84 R276
FANSEN_SEL
0_04
25
R278
R277
*0_04 optimus
*0_04 DGPU_RST# 11 B
MXM1_PRSNT# 11,18
Main EC IT8587
25 CPU_FAN1
79
GPJ3/DAC3/TACH1B
IT8587 KSO13
KSO14
54
55
28
29 GPA2/PWM2/5VT
5VT/EGCLK/GPE3
48
Modify,7/6 Tim
MXM2_PRSNT# 12,18
C385 0.1u_16V_Y5V_04
KSO15 GPA3/PWM3/5VT TACH1/TMA1/GPD7 VGA_FANSEN 25
ADC 30 119
GPA4/PWM4/5VT 5VT/CRX0/GPC0 ALL_SYS_PWRGD 11,12,13,20
BAT_DET 66 Add,4/1 Tim
BAT_VOLT 67 GPI0/ADC0 2
GPI1/ADC1 CK32KE/GPJ7 RUN_ON 14
69 128
2 THERM_VOLT GPI3/ADC3 CK32K/GPJ6 R347 10K_04
70 125 VDD3
45 TOTAL_CUR GPI4/ADC4 23 KBC2_INT# GPE4/PWRSW
106
5VT/SSCE1#/VCEN/TM/GPG0 CCD_EN 27 KBC2_GPIO0 23
MODEL_ID 73 IT8587E/FX
GPI7/ADC7/CTS1# 10K_04
R346 VDD3
107
5VT/( PD )DTR1#/SBUSY/ID7/GPG1 DD_ON 27,41,49 Modify,4/16 Tim
SMBUS
R671 47_04 KBC_SMBCLK0 110 R316 *10K_04
12,22,23,45 SMC_BAT GPB3/SMCLK0/5VT VDD3
R659 47_04 KBC_SMBDAT0 111 95
12,22,23,45 SMD_BAT GPB4/SMDAT0/5VT 5VT/CTX1/SOUT1/DAT3/ID2/GPH2 BKL_EN 13
R330 *0_04 EC_PECI 117 Add common design, KWd/KE;⎗ẍ怠㑯㗗⏎枸䔁Ϳ VDD3
17 SMC_CPU_THERM GPF6/SMCLK2/PECI 6/7 Tim
R328 43_1%_04 35 EC_RSMRST#
3,16 H_PECI 5VT/RTS1#/GPE5 VDD3
follow common design, C425 10PF_50V_NPO_04 5VT/LPCPD#/GPE6
17
SB_KBCRST# 19 DEBUG PORT
6/10 Tim PWM 47 KBC2_ADC R279 10K_04
TACH0A/GPD6 CPU_FANSEN 25 J_80DEBUG1
38 KBC_BEEP
25
GPA1/PWM1/5VT
Pin 66~73䔞㓡gpio ⎒傥input SMC_BAT R667 1.5K_04
38 LED_BAT_CHG
31
GPA5/PWM5/5VT TMRI0/GPC4
120
LOT6_CHG 45 1 䃉㱽ouput ᶼ ⢾悐天pull high. SMD_BAT R665 1.5K_04
32 124 WLANᶵsupport,㓭remove 3IN1 BAT_DET R285 10K_04
38 LED_BAT_FULL GPA6/PWM6/SSCK/5VT TMRI1/GPC6 PM_PWROK 20 80CLK 2
34 ,6/7 Tim
3 VBATT_BOOST# R284 10K_04
Modify,4/7 Tim 38 LED_PWR GPA7/PWM7/RIG1#/5VT
4
PS/2 123
CTX0/TMA0/GPB2 LAN_WAKEUP# 36,37 85205-04001
80CLK 85 KBC_SMBCLK0 R202 *1.5K_04
C 3IN1 87 GPF0/PS2CLK0/TMB0/CEC/5VT KBC_SMBDAT0 R223 *1.5K_04 C
Modify net name,6/13 Tim Modify,6/4 Tim
GPF2/PS2CLK1/DTR0#/5VT 19
5VT/L80HLAT/BAO/GPE0 SWI# 16,17
86 PCLK_KBC R348 *10_04 PCLK_KBC_R C433 *10p_50V_NPO_04
17,20,23,27,28,38,41,42,43,44 SUSB# GPF1/PS2DAT0/TMB1/5VT Modify,3/12 Tim
88
17,23,41,42,43,44 SUSC# GPF3/PS2DAT1/RTS0#/5VT 112 R329 *0_04 BAT_VOLT C388 1u_6.3V_X5R_04
5VT/RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 RSMRST_PWRGD# 16
OVERT#1 89
90 GPF4/PS2CLK2/5VT
Remove PCH_SLP_SUS# to EC, GPF5/PS2DAT2/5VT VDD3
6/7 Tim R317 0_04
SLP_SUS# 16,17,41,49
WAKE UP VDD3 follow common design,
18 7/29 Tim C
23,41 PWR_SW# GPD0/RI1# AC
21 12,22,23,45 SMC_BAT
13,38 LID_SW# GPD1/RI2#/5VT D42 A
101 ALSPI_CE# R302 0_04 VDD3 VDD3 BAV99 RECTIFIER
5VT/FSCE#/GPG3 HSPI_CE# 15 R968 C
GP INTERRUPT 102 ALSPI_MSI R304 0_04
5VT/FMOSI/GPG4 HSPI_MSI 15 AC
33 103 ALSPI_MSO R314 0_04 47K_04 U60 12,22,23,45 SMD_BAT
5
17 PWR_BTN# GPD5/GINT/CTS0#/5VT 5VT/FMISO/GPG5 HSPI_MSO 15 TC7SZ08FU D41 A
105 ALSPI_SCLK R315 0_04
5VT/FSCK/GPG7 HSPI_SCLK 15 R969 1 BAV99 RECTIFIER
UART C
108 104 4
D
Modify,4/10 Tim 17 SUS_PWR_ACK_R GPB0/RXD/SIN0/5VT 5VT/DSR0#/GPG6 EC_GPIO 23 47K_04 2 AC
109 45 BAT_DET
3 H_PROCHOT_EC GPB1/TXD/SOUT0/5VT 8/3 9~19V D39 A
3.3VS Zener Diode-->4.85~5.1V G Q62 BAV99 RECTIFIER
3
C
VCORE
S
D59 MTN7002ZHS3 AC
AVSS
VSS1
VSS3
VSS4
VSS5
VSS6
VSS7
45 BAT_VOLT
G
Q23 C A R985 100K_04 B Q63 D40 A

VIN BAV99 RECTIFIER
MTN7002ZHS3
IT8587E/FX S D OVERT#2 ZD5231BS2 2N3904 DEFAULT㓡ᶲẞ, (⤪㰺㚱ᶲẞ, RTC便暣忶⣏)
E
12 TH_OVERT#2
12
1
27
49
91
113
122
75
RB751V-40(lision) D43 R1016 EC_RSMRST# R970 *0_04

RSMRST# 17,49
A C KBC_SCI# R351 *0_04
16 SCI# C939 100K_04
10K_04
BAV99:
D R1009 D
C432 R280 3.3VS M:6-06-00099-011
3.3VS Modify,4/8 Tim
*10mil_short *0.1u_16V_Y5V_04 EC REQ,6/12 Tim
S:6-06-00099-014
0.1u_16V_Y5V_04
G
Q19
5
MTN7002ZHS3
1 KBC_AGND S D OVERT#1
11 TH_OVERT#1
4 R203 33_04 KBC_SMBCLK0
2 R275 *0_04 Title
U52
KBC2_SCI# 23
R1021 VIN 11,12,13,38,41,42,43,44,45,46,47,48,49
DEL SPI ROM PULL DOWN 暣旣,3/23 Tim [22] MAIN EC IT8587
*TC7SZ08FU
8/1 5VS 11,12,13,14,15,25,38,39,41,44
3

*47K_04
R224 33_04 KBC_SMBDAT0
3.3VS 7,8,9,10,11,12,13,14,15,16,17,18,19,20,23,24,25,26,27,29,31,32,33,35,38,39,41,43,44,46,47
VDD3 15,16,17,19,20,23,33,36,37,38,41,42,43,45,46,49 A3 SCHEMATIC1 6-71-P8700-D03 1.0

1 2 3 4 5 6 7 8
Main EC IT8587 B - 23
Schematic Diagrams
Second EC IT8587
5 4 3 2 1
KBC_AVDD2 L24
HCB1005KF-121T20
VDD3
. VDD3
C843 C842 C827 C409
C437 C436 C438
0.1u_16V_Y5V_04 10u_10V_Y5V_08 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
C391
L23 HCB1005KF-121T20 0.1u_16V_Y5V_04 KBC_AGND

EC_VCC
3.3VS . Backlight KB 17"
D
EMI Solution D
114
121
127
11
26
50
92
74
3
U29
VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VBAT
AVCC
10 58 KB-SI0 KB-SI0 25
19,22,24 LPC_AD0 LAD0 KSI0/STB#
9 59 KB-SI1 KB-SI1 24
19,22,24 LPC_AD1 LAD1 KSI1/AFD#
8 60 KB-SI2 KB-SI2 23
19,22,24 LPC_AD2 LAD2 KSI2/INIT#
7 61 KB-SI3 KB-SI3 22
19,22,24 LPC_AD3 LAD3 KSI3/SLIN#
13 62 KB-SI4 KB-SI4 21
19,22 PCLK_KBC LPCCLK KSI4
6 63 KB-SI5 KB-SI5 20
19,22,24 LPC_FRAME# LFRAME# KSI5
R287 0_04 5 LPC K/B MATRIX 64 KB-SI6 KB-SI6 19
19,22,24 SERIRQ SERIRQ KSI6
22 65 KB-SI7 KB-SI7 18
20,22,24,28,33,34,35,36,37 BUF_PLT_RST# LPCRST#/WUI4/GPD2 KSI7
VDD3 R286 100K_04 KBC2_WRESET# 14 36 KB-SO0 KB-SO0 1

C389 0.1u_16V_Y5V_04 WRST# KSO0/PD0 37 KB-SO1 KB-SO1 2
15 KSO1/PD1 38 KB-SO2 KB-SO2 3
22 KBC2_SCI# ECSMI#/GPD4 KSO2/PD2 39 KB-SO3 KB-SO3 4
KSO3/PD3 40 KB-SO4 KB-SO4 5
KSO4/PD4 41 KB-SO5 KB-SO5 6 J_BLKB17_1
KSO5/PD5 42 KB-SO6 KB-SO6 7 85219-2607N
DAC KSO6/PD6 3.3VS
Modify,4/1 Tim R679 0_04 76 43 KB-SO7 KB-SO7 8
22 GA20 GPJ0 KSO7/PD7
Sheet 23 of 58 18,19,22 SMI#

22 KBC2_DAC
22 GPI6
R678 *0_04 77
78
79
80
GPJ1
DAC2/GPJ2
DAC3/GPJ3
KSO8/ACK#
KSO9/BUSY
KSO10/PE
44
45
46
51
KB-SO8
KB-SO9
KB-SO10
KB-SO11
R333
R332
*100K_04 KB-SO23
*100K_04 KB-SO24
KB-SO8
KB-SO9
KB-SO10
KB-SO11
9
10
11
12
DAC4/GPJ4 KSO11/ERR#
Second EC IT8587 FOR POWER SWITCH B'D,

6/13 Tim
38 LED_CT1
81
DAC5/GPJ5 KSO12/SLCT
KSO13
KSO14
52
53
54
55
KB-SO12
KB-SO13
KB-SO14
KB-SO15
KB-SO12
KB-SO13
KB-SO14
KB-SO15
13
14
15
16
ADC
C
66
IT8587 KSO15
KSO16/GPC3
56
57
KB-SO16
KB-SO17
KB-SO16
KB-SO17
17
26
C
22 KBC2_ADC ADC0/GPI0 KSO17/GPC5

67
68 ADC1/GPI1
69 ADC2/GPI2 108 KB-SO18 KB-SO18 1
70 ADC3/GPI3 RXD/GPB0 109 KB-SO19 KB-SO19 2
71 ADC4/GPI4 TXD/GPB1 123 KB-SO20 KB-SO20 3
ADC5/GPI5 K/B 2" CTX/GPB2
72 126 KB-SO21 KB-SO21 4
73 ADC6/GPI6 GA20/GPB5 4 KB-SO22 Add,4/13 Tim KB-SO22 5
ADC7/GPI7 KBRST#/GPB6 119 KB-SO23 6
CRX/GPC0 PS8330B_EC2 31
SMBUS 16 KB-SO24 7
R668 *47_04 KBC2_SMBus_CLK0 110 PWUREQ#/GPC7 18 KB-SO25 KB-SO25 8
12,22,45 SMC_BAT SMCLK0/GPB3 RI1#/WUI0/GPD0
R666 *47_04 KBC2_SMBus_DAT0 111
12,22,45 SMD_BAT SMDAT0/GPB4
R663 0_04 KBC2_SMBus_CLK1 115 21 KB-SO26 KB-SO26 9
22 KBC_SMBus_CLK1 SMCLK1/GPC1 RI2#/WUI1/GPD1
R662 0_04 KBC2_SMBus_DAT1 116 23 KB-SO27 KB-SO27 10 J_BLKB17_2
22 KBC_SMBus_DAT1 SMDAT1/GPC2 ECSCI#/GPD3 VDD3
117 33 KB-SO28 KB-SO28 11 50584-0260N-001
14 PS8409_EC2 SMCLK2/GPF6 GINT/GPD5
118 47 KB-SO29 KB-SO29 12
32 PS8338B_EC2 SMDAT2/GPF7 TACH0/GPD6 48 KB-SO30 KB-SO30 13
TACH1/GPD7 R355 1.5K_04 KBC2_SMBus_CLK0
PWM 19 KB-SO31 KB-SO31 14
L80HLAT/GPE0 R353 1.5K_04 KBC2_SMBus_DAT0
24 82 KB-SO32 KB-SO32 15
34 EC_SSD_LED# PWM0/GPA0 EGAD/GPE1
25 83 KB-SO33 KB-SO33 16
38 LED1_PS1 PWM1/GPA1 EGCS#/GPE2
28 125 KB-SO34 KB-SO34 17
Modify,4/16 Tim 38 LED1_PS2 PWM2/GPA2 PWRSW/GPE4
29 35 KB-SO35 R356 33_04 KBC2_SMBus_CLK0 KB-SO35 18
38 LED1_PS3 PWM3/GPA3 WUI5/GPE5
30 17 KB-SO36 KB-SO36 19
38 LED1_PS4 PWM4/GPA4 LPCPD#/WUI6/GPE6
dK>ϭKZ 38 LED1_PS5
31
32 PWM5/GPA5 L80LLAT/GPE7
20
85
KB-SO37
KB-SO38 8/1
R1022 KB-SO37
KB-SO38
20
21
38 LED1_PS6 PWM6/GPA6 PS2CLK0/GPF0
34 86 KB-SO39 *47K_04 KB-SO39 22
38 LED1_PS7 PWM7/GPA7 PS2DAT0/GPF1 87 KB-SO40 R354 33_04 KBC2_SMBus_DAT0 KB-SO40 23
PS2CLK1/GPF2 88 KB-SO41 KB-SO41 24
B
PS/2 PS2DAT1/GPF3 B
89 93 KB-SO42 KB-SO42 25
38 TP_CLK PS2CLK2/GPF4 ID0/GPH0
90 94 KB-SO43 KB-SO43 26
38 TP_DATA PS2DAT2/GPF5 ID1/GPH1 95 KB-SO23
ID2/GPH2
PWM/COUNTER
120 FLASH 100 R677 100K_04
22,41 PWR_SW# TMRI0/WUI2/GPC4 FLFRAME#/GPG2 VDD3
124 101 KBC2_SPI_CE# For Auto load code
22 KBC2_INT# TMRI1/WUI3/GPC6 FLAD0/SCE# 102 KBC2_SPI_SI
FLAD1/SI 103 KBC2_SPI_SO
EXT GPIO FLAD2/SO
84 104
17,22,41,42,43,44 SUSC# EGCLK/GPE3 FLAD3/GPG6 105 KBC2_SPI_SCLK
FLCLK/SCK 106
LPC/WAKE UP FLRST#/WUI7/TM/GPG0
112 VDD3
17,20,22,27,28,38,41,42,43,44 SUSB# RING#/PWRFAIL#/LPCRST#/GPB7 U27
CLOCK GPIO 96 8 5 R291 47_04 KBC2_SPI_SI
ID3/GPH3 KBC2_GPIO0 22 VDD SI
2 97 2 R319 15_1%_04 KBC2_SPI_SO
CK32KE ID4/GPH4 KBC2_GPIO1 22 SO
R288 10K_04 128 98 C392 1 R318 15_1%_04 KBC2_SPI_CE#
CK32K ID5/GPH5 KBC2_GPIO2 22 CE#
99 KB-SO24 6 R669 47_04 KBC2_SPI_SCLK
Modify,4/9 Tim ID6/GPH6 SCK
R320 1K_04 3
0.1u_16V_Y5V_04
107 WP# C393
( PD )ID7/GPG1 EC_GPIO 22
AVSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
8/3 *20p_50V_NPO_04
R289 4.7K_04 7 4
IT8587E/FX HOLD# VSS
12
1
27
49
91
113
122
75
GD25D10BTIGR
M-SO8 6-04-02510-A91
C390
NC1 SHORT
A
0.1u_16V_Y5V_04 A
KBC_AGND
Title
[23] 2ND EC IT8587
3.3VS 7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,24,25,26,27,29,31,32,33,35,38,39,41,43,44,46,47
VDD3 15,16,17,19,20,22,33,36,37,38,41,42,43,45,46,49 A3 SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
B - 24 Second EC IT8587
Schematic Diagrams
TPM SLB9665TT
5 4 3 2 1
TPM_PWR
SLB9665TT & NPCT650 COLAY follow common design,6/10 Tim NPCT650ĺSTUFF

R999 *0_04
3.3V SLB9665TT
D D
C459 C941
3.3VS
U22 SLB9665TT
U30 0.1u_16V_Y5V_04 10u_6.3V_X5R_06
R1000 0_04
R248 4.7K_04
26 5
19,22,23 LPC_AD0
19,22,23 LPC_AD1
23 LAD0 VSB 10
SLB9665ĺSTUFF
C302 0.1u_16V_Y5V_04
LAD1 NC_2
19,22,23 LPC_AD2
20
17 LAD2 VDD3
19
24
PIN5 PIN5 C303 0.1u_16V_Y5V_04
19,22,23 LPC_AD3 3.3VS
LAD3 VDD4 C301 0.1u_16V_Y5V_04
21 TPM
19 PCLK_TPM LCLK C458 C412 C942
C304 0.1u_16V_Y5V_04
19,22,23 LPC_FRAME#
22
LFRAME# 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 10u_6.3V_X5R_06
R276 0_04
16
20,22,23,28,33,34,35,36,37 BUF_PLT_RST#
TPM_BADD 9 LRESET#
27 GPIO3/BADD PIN10 PIN19 PIN24
19,22,23 SERIRQ SERIRQ
R376 *10K_04 TPM_PP 7 6 TPM_GPIO R374 *4.7K_04
3.3VS PP GPIO2/GPX 3.3VS FORℙ䓐䶂嶗天㯪,1/27 Tim
R375 4.7K_04 1
2 GPIO0/XOR_OUT
SLB9665ĺSTUFF 4.7K Ohm GPIO1 TPM_PWR
NPCT650ĺSTUFF 0 Ohm 3
SLB9665ĺNO STUFF
NPCT650ĺSTUFF 0 Ohm
8
12
13
NC_1
TEST
NC_4
NC_5
VSS_1
NC_3
4
11
PCLK_TPM
R322
PCLK_TPM1
C411
Sheet 24 of 58
14 18
TPM SLB9665TT
NC_6 VSS_2 *33_04 *10p_50V_NPO_04
R990 *0_04 CLKRUN# 15 25 R378
17 PM_CLKRUN# CLKRUN#/GPIO4 VSS_3
19 S4_STATE#
R991 *0_04 LPCPD#_TPM 28
LPCPD#
H:W TPM 10K_04
3.3VS R992 *10K_04 SLB9665TT L:W/O TPM

C SLB9665 and NPCT650ĺNO STUFF
15 TPM_DET# C
BUF_PLT_RST# R377 *0_04 TPM_BADD
R379
*100K_04
R994 *10K_04
Asserted before entering S4 Modify,3/9 Tim
SLB9665 and NPCT650ĺNO STUFF
LPC reset timing:
LPCPD# inactive to LRST# inactive 32~96us
B B
2,13,14,16,29,33,38,41,42,44,46 3.3V
A 7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,25,26,27,29,31,32,33,35,38,39,41,43,44,46,47 3.3VS A
Title
[24] TPM2.0 SLB9665TT
A3 SCHEMATIC1 6-71-P8700-D03 1.0
5 4 3 2 1
TPM SLB9665TT B - 25
Schematic Diagrams
CPU, VGA Fan Conn
5 4 3 2 1
CPU FAN CONTROL

5VS_2 U24
D CFON1# 1
2 FON GND
8
7
D
3 VIN GND 6
C348 C349 4 VOUT GND 5
VSET GND
0.1u_16V_Y5V_04 AX995SA
Remove,4/7 Tim 4.7u_6.3V_X5R_06
CPU_FAN1 22 CPU_FAN
5VS_CPU_FAN1
J_CPUFAN1
1
C610 2
3
10u_6.3V_X5R_06 50273-0037N-001
CPU_FANSEN1 J_FAN1
3
R581 4.7K_04
3.3VS
Sheet 25 of 58 1
CPU, VGA Fan VGA2 FAN CONTROL

VGA1 FAN CONTROL
Conn C
5VS_2 U44
C
VFON1# 1 8
5VS_2 U49 2 FON GND 7
VFON2# 1 8 3 VIN GND 6
2 FON GND 7 VOUT GND
C616 C660 4 5
3 VIN GND 6 VSET GND
VOUT GND Modify㔯⫿,6/4 Tim
C816 C815 4 5 0.1u_16V_Y5V_04 AX995SA
VSET GND
4.7u_6.3V_X5R_06
0.1u_16V_Y5V_04
4.7u_6.3V_X5R_06
AX995SA
Modify㔯⫿,6/4 Tim VGA_FAN1 22 VGA_FAN
VGA_FAN2 22 VGA_FAN 5VS_VGA_FAN1
J_VGAFAN2
5VS_VGA_FAN2
J_VGAFAN1 1
C588 2
1 3
C692 2
10u_6.3V_X5R_06 50273-0037N-001
3
10u_6.3V_X5R_06 50273-0037N-001
VGA_FANSEN1 J_FAN1
3
VGA_FANSEN2 J_FAN2 R558 4.7K_04
3.3VS
3 1
R606 4.7K_04
3.3VS
1
B B
5VS
U51
CPU_FANSEN1 2 12 C845 0.1u_16V_Y5V_04
11 0B0 VCC
1B0 1
A0 CPU_FANSEN 22
10 3
S0 GND
VGA_FANSEN1 5 9
VGA_FANSEN2 8 0B1 VCC
1B1 4
A1 VGA_FANSEN 22
7 6
22 FANSEN_SEL S1 GND
C846
*120P_50V_NPO_04 C830
2/5 Tim PI5A3158BZAE
śɥ
*120P_50V_NPO_04
śɨ
A A
Title
[25] CPU,VGA FAN CONN
11,12,13,14,15,22,38,39,41,44 5VS Size Document Number Rev
26,42 5VS_2
7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,26,27,29,31,32,33,35,38,39,41,43,44,46,47 3.3VS A3 SCHEMATIC1 6-71-P8700-D03 1.0
5 4 3 2 1
B - 26 CPU, VGA Fan Conn

Schematic Diagrams
Backlight Keyboard
5 4 3 2 1
BACKLIGHT KEYBOARD
D D
3.3VS
R200 *15mil_short
U23
9
5VS_2 Modify,6/4 Tim
R201 *0_06 32 7 KBZONE1_B
VDD LED0 Add short pad,6/9 Tim
8 KBZONE1_R J_KBLED_1
C318 C292 LED1 10 KBZONE1_G 1 2 KB_LED_PWR R987 *15mil_short
LED2 5VS_2 1
2 PJ33 OPEN_2A R988 *15mil_short
A0 2
0.1u_10V_X5R_04
*0.1u_10V_X5R_04
3 11 KBZONE2_B R989 *15mil_short
R217 R218 R219 4 A1 LED3 12 KBZONE2_R KBZONE1_B 3
5 A2 LED4 13 KBZONE2_G DEFAULT SHORT C291 KBZONE1_R 4
10K_04
10K_04
*10K_04
Modify,6/9 Tim 6 A3 LED5 4.7u_25V_X5R_08 KBZONE1_G 5

28 A4 15 KBZONE3_B KBZONE2_B 6 NC2
29 A5 LED6 16 KBZONE3_R KBZONE2_R 7
A6 LED7 17 KBZONE3_G KBZONE2_G 8 NC1
27 LED8 KBZONE3_B 9
R215 0_04 30 OE# 18 LEDB1 KBZONE3_R 10
11,22,38 SMC_VGA_THERM
Sheet 26 of 58
R214 0_04 31 SCL LED9 20 LEDR1 KBZONE3_G 11
11,22,38 SMD_VGA_THERM SDA LED10 12
21 LEDG1
1 LED11 FP225H-012S10M
9 VSS 22 LEDB2
R220
*0_04
R216
0_04
14
19
24
VSS
VSS
VSS
VSS
LED12
LED13
LED14
LED16
23
25
26
LEDR2
LEDG2
ἧ䓐ᶳ㍍妠CONN Backlight Keyboard
Modify LED backlight control,
C C
PCA9622 6/9 Tim
22 EC_CTRL_EN#
check, EC EC_CTRL_EN#,TP_EN # to 2nd EC,1/12
FOR A側⃱LED BOARD
5V
J_LED2
LEDR1
1 LEDG1
2 LEDB1
3
4 page38 change to page26,6/7 Tim
LEDR2
5 LEDG2
6 LEDB2
7
8
B B
85204-08001
6-20-53100-008
A A
Title
11,12,14,20,30,38,40,41,43,44,46,47,48 5V
[26] BACKLIGHT KEYBOARD
25,42 5VS_2 Size Document Number Rev
7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,27,29,31,32,33,35,38,39,41,43,44,46,47 3.3VS
A3 SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
Backlight Keyboard B - 27
Schematic Diagrams
CCD, USB Charging

5 4 3 2 1
CCD CCD_PWR
3.3VS
48 mil
U10
1A 4 1
1A
5 VIN VOUT
VIN
C132
D C140 C139 D
3 2
1u_6.3V_X5R_04 EN GND 2.2u_6.3V_X5R_04 *0.1u_16V_Y5V_04
AP2821KTR-G1
Modify,4/7 Tim
22 CCD_EN
From KBC default HI

Port 5 J_CCD1
Modify,2/27 Tim
1
19 USB_PN6 2
19 USB_PP6 3
4
3.3VS 5
38 MIC_DATA 6
38 MIC_CLK 7
8
WB247H-008S11M
6-21-C3A00-108
Sheet 27 of 58
CCD, USB
C C
Charging
SLG55583 USB Charging PORT Footprint M-SOT23-5ᾖ㓡䁢M-SOT23-5A

6/14 Tim
R239 *0_04
19 USB2_OC0#
For Safety LPS. USBVCC3.0_1
W/ USB CHARGER VDD5
3
U22
1
80 mil
OC# VOUT
For W/ or W/O Intel Vpro 5
change parts stuff VIN C367
VDD5 C338 4 2
EN# GND 0.1u_16V_Y5V_04
10u_10V_Y5V_08 SY6288D20AAC
PCB Footprint = M-SOT23-5A
R299 USBVCC3.0_1
22,41,49 USB_CHARGE_EN 2A/90mohm
B If select CB pin contact to SUSB#, you can Support 100K_04 B
DCP mode and Apple-compliant devices charge in VDD5 R269
S3 status. 1M_04 USB_DD_ON# USB3.0 PORT1
6
D
R264 Q18B Q18A C364 22u_6.3V_X5R_08
10K_04 MTDK5S6R 2G MTDK5S6R C336 22u_6.3V_X5R_08
S
1
3
R265 *0_04 D C337 *220u_6.3V_6.3*6.3*4.2
+
17,20,22,23,28,38,41,42,43,44 SUSB# Modify value,
U25 Default Low 8/14 Tim
22,41,49 DD_ON R266 0_04 8 1 PRE# 5G C384 6-11-22711-AB7
CB PRE# S
4
USB_PN1 7 2 USB_PN1_R 0.1u_16V_Y5V_04
19 USB_PN1 TDM DM D20 J_USB3_1
USB_PP1 6 3 USB_PP1_R 19 USB3_TXP1 C365 0.1u_10V_X7R_04 USB3_TX1P 1
19 USB_PP1 TDP DP VBUS
R268 10 1 USB3_TX1PJ 9 GND1
GND
5 4 USB3_TX1N 9 2 USB3_TX1NJ 8 SSTX+ SHIELD

100K_04 C366 0.1u_10V_X7R_04
Standard-A
VDD5 VCC CDP 19 USB3_TXN1 SSTX-
8 3 GND2
USB3_RXP1 7 4 USB3_RX1_PJ 6 SHIELD
SLG55593VTR 19 USB3_RXP1
9
C383 R263 USB3_RXN1 6 5 USB3_RX1_NJ 5 SSRX+ GND3

TDFN8-2X2MM 19 USB3_RXN1 SSRX- SHIELD
*10K_04 7
0.1u_16V_Y5V_04 GND_D GND4
PUSB3F96
SHIELD
L21 D21
2/2 Tim PRE# R267 *0_04 USB_DD_ON#
USB_PP1_R 1 2 USB_PP1R 6 5 USB_PP1_RJ USB_PN1_RJ 2
SLG55593VTR: 6-02-55593-9D0 7 4 USB_PN1_RJ USB_PP1_RJ 3 D-
USB_PN1_R 4 3 USB_PN1R 8 3 D+
9 2 4 D02
*WCM2012F2S-161T03-short GND
10 1
C19009-90905-L
USB_PN1 R653 *0_04 USB_PN1_R
W/O USB CHARGER 2/27 Tim USB_PP1
DD_ON#
R654 *0_04 USB_PP1_R
USB_DD_ON#
PUSB3F96 6-21-B4A20-009
40,41,44 DD_ON# R300 *0_04
PCBfootprint: Modify,4/2 Tim
A USB3.0 Max Trace length A
Follow Design Guide dfn10-2_5x1mm-short
Title
VDD5 38,41,44,49 [27] CCD,USB Charging
3.3VS 7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,29,31,32,33,35,38,39,41,43,44,46,47

5 4 3 2 1
B - 28 CCD, USB Charging

Schematic Diagrams
AR_TBT
5 4 3 2 1
XTAL NOTE:
SNK0_DDC_data/clk ?connect to 2k PU only if SRC0 is connected and support HDMI (a.i HDMI or DP++ connector). Otherwise can be 100k PD.
TBT_XTAL_25_IN SNK1_DDC_data ?connect to 100k PD. If SRC0 support HDMI, connect as SNK0_CFG1 to GPU and/or appropriate AUX/DDC demux control
2 1
SNK1_DDC_clk ?connect to 100k PD.
TBT_XTAL_25_OUT
4 3 X3 Y23 V23 PET0_P C379 0.22u_10V_X5R_04
19 PCIE_TXP5_TBT PCIE_RX0_P PCIE_TX0_P PCIE_RXP5_TBT 19
FSX3L 25MHZ C327 C326 Y22 V22 PET0_N C380 0.22u_10V_X5R_04
19 PCIE_TXN5_TBT PCIE_RX0_N PCIE_TX0_N PCIE_RXN5_TBT 19
CPU PCIE RX
20p_50V_NPO_04 20p_50V_NPO_04 T23 P23 PET1_P C357 0.22u_10V_X5R_04
19 PCIE_TXP6_TBT PCIE_RXP6_TBT 19
CPU PCIE TX
PCIE_RX1_P PCIE_TX1_P
PCIe GEN3
T22 P22 PET1_N C356 0.22u_10V_X5R_04
M23 K23 PET2_P C359 0.22u_10V_X5R_04
19 PCIE_TXP7_TBT PCIE_RX2_P PCIE_TX2_P PCIE_RXP7_TBT 19
M22 K22 PET2_N C358 0.22u_10V_X5R_04
D H23 F23 PET3_P C329 0.22u_10V_X5R_04 D

VCC3V3_FLASH 19 PCIE_TXP8_TBT PCIE_RX3_P PCIE_TX3_P PCIE_RXP8_TBT 19
AR/PPS COMMON FLASH H22 F22 PET3_N C328 0.22u_10V_X5R_04
V19 L4 BUF_PLT_RST#_AR
18 TBT_REFCLK_100_P PCIE_REFCLK_100_IN_P PERST_N
T19
18 TBT_REFCLK_100_N PCIE_REFCLK_100_IN_N
R656 R610 C817 R655 R651 AC5 N16 PCIe_RBIAS R607 3.01K_1%_04
18 TBT_CLKREQ_N PCIE_CLKREQ_N PCIE_RBIAS
0.1u_10V_X7R_04 C371 0.1u_10V_X7R_04 DPSNK0_ML0_P AB7 R2
3.3K_1%_04
3.3K_1%_04 32 OUT2_D0p DPSNK0_ML0_P DPSRC_ML0_P

3.3K_1%_04
3.3K_1%_04
C372 0.1u_10V_X7R_04 DPSNK0_ML0_N AC7 R1

32 OUT2_D0n DPSNK0_ML0_N DPSRC_ML0_N VCC3V3_SX_SYS
C373 0.1u_10V_X7R_04 DPSNK0_ML1_P AB9 N2
32 OUT2_D1p DPSNK0_ML1_P DPSRC_ML1_P Add昼㺷暣,6/11 Tim
C374 0.1u_10V_X7R_04 DPSNK0_ML1_N AC9 N1
SOURCE PORT 0
32 OUT2_D1n DPSNK0_ML1_N DPSRC_ML1_N U62
5
U50
SINK PORT 0
8 5 TBT_EE_DI C375 0.1u_10V_X7R_04 DPSNK0_ML2_P AB11 L2 1
DDI1(MUX)
VDD SI 32 OUT2_D2p DPSNK0_ML2_P DPSRC_ML2_P
C376 0.1u_10V_X7R_04 DPSNK0_ML2_N AC11 L1 BUF_PLT_RST#_AR 4
32 OUT2_D2n DPSNK0_ML2_N DPSRC_ML2_N
2 TBT_EE_DO 2
SO C378 0.1u_10V_X7R_04 DPSNK0_ML3_P AB13 J2 BUF_PLT_RST# 20,22,23,24,33,34,35,36,37
32 OUT2_D3p DPSNK0_ML3_P DPSRC_ML3_P
TBT_EE_WP_N 3 1TBT_EE_CS_N C377 0.1u_10V_X7R_04 DPSNK0_ML3_N AC13 J1
WP# CE# 32 OUT2_D3n DPSNK0_ML3_N DPSRC_ML3_N TC7SZ08FU
6TBT_EE_CLK C793 0.1u_10V_X7R_04 DPSNK0_AUX_P Y11 W19
SCK 32 OUT2_AUXp_SCL DPSNK0_AUX_P DPSRC_AUX_P
C794 0.1u_10V_X7R_04 DPSNK0_AUX_N W11 Y19
32 OUT2_AUXn_SDA DPSNK0_AUX_N DPSRC_AUX_N
TBT_HOLD_N 7 4
HOLD# VSS AA2 G1 TBT_SRC_HPD
32 OUT2_HPD DPSNK0_HPD DPSRC_HPD
W25Q80DV
Add,6/12 Tim
Modify,3/16 Tim
TBT_SNK0_DDC_CLK
TBT_SNK0_DDC_DATA
Y5
R4 DPSNK0_DDC_CLK
DPSNK0_DDC_DATA
DPSRC_RBIAS
N6
U1
DPSRC_RBIAS
TBT_I2C_SDA
R227 14K_1%_04
Sheet 28 of 58
AB15 GPIO_0 U2 TBT_I2C_SCL
RTD3_CIO_PWR_EN R1010 *10K_04 VCC3V3_S0_SYS AC15 DPSNK1_ML0_P GPIO_1 V1 TBT_EE_WP_N
AR_TBT
LC GPIO
RTD3_USB_PWR_EN R1011 *10K_04 DPSNK1_ML0_N GPIO_2 V2 TBT_TMU_CLK_OUT R973 check ,1/14
TBT_CLKREQ_N R262 10K_04 AB17 GPIO_3 W1 TBT_PCIe_WAKE_N R255 0_04
DPSNK1_ML1_P GPIO_4 PCIE_WAKE# 17,33,35,36,37
C TBT_RESET_N R601 *10K_04 AC17 W2 TBT_CIO_PLUG_EVENT_NR228 0_04 TBCIO_PLUG_EVENT 15 C
DPSNK1_ML1_N GPIO_5 Y1 TBT_HDMI_DDC_DATA
Modify,3/18 Tim GPIO_6
AB19 Y2 TBT_HDMI_DDC_CLK
SINK PORT 1
AC19 DPSNK1_ML2_P GPIO_7 AA1 TBT_SRC_CFG1 TBTA_HPD
TBT_I2C_SDA R231 2.2K_1%_04 2/4 Tim VCC3V3_SX_SYS DPSNK1_ML2_N GPIO_8 TBTA_HPD 28,30
J4 TBTA_I2C_INT TBT_I2C_SDA
TBT_I2C_SCL R230 2.2K_1%_04 POC_GPIO_0 TBT_I2C_SDA 30
AB21 E2 TBTB_I2C_INT TBT_I2C_SCL
POC GPIO
TBT_PCIe_WAKE_N R256 *10K_04 DPSNK1_ML3_P POC_GPIO_1 TBT_I2C_SCL 30
AC21 D4 RTD3_USB_PWR_EN TBTA_I2C_INT
TBT_CIO_PLUG_EVENT_N R232 10K_04 DPSNK1_ML3_N POC_GPIO_2 TBTA_I2C_INT 30
TBT_SLP_S3_N R603 10K_04 H4 TBT_FORCE_PWR R608 0_04 TBT_FRC_PWR 15
follow intel,6/11 Tim POC_GPIO_3
TBT_BATLOW_N R206 10K_04 Y12 F2 TBT_BATLOW_N
W12 DPSNK1_AUX_P POC_GPIO_4 D2 TBT_SLP_S3_N R604 *0_04
Manager
TBTA_I2C_INT R602 10K_04 DPSNK1_AUX_N POC_GPIO_5 SUSB# 17,20,22,23,27,28,38,41,42,43,44
RTD3_CIO_PWR_EN
Policy
TBTB_I2C_INT R205 10K_04 Add PU 10K,2/25 Tim F1
POC_GPIO_6 Modify,6/11 Tim
CPU /
DPSNK1_HPD Y6
DPSNK1_HPD E1 TBT_TEST_EN R207 100_04
TBT_SNK1_DDC_CLK Y8 TEST_EN
Misc
SINK0_CFG1 N4 DPSNK1_DDC_CLK AB5 TBT_TEST_PWG R261 100_04
DPSNK1_DDC_DATA TEST_PWR_GOOD
TBT_HDMI_DDC_DATA R258 100K_04 Modify,3/16 Tim R627 14K_1%_04 DPSNK_RBIAS Y18 F4 TBT_RESET_N 30
DPSNK_RBIAS RESET_N
TBT_HDMI_DDC_CLK R257 100K_04
TBT_SNK0_DDC_CLK R630 100K_04 VCC3V3_LC R631 *10K_04 TBT_TDI Y4 D22 TBT_XTAL_25_IN
R633 *10K_04 TBT_TMS V4 TDI XTAL_25_IN D23 TBT_XTAL_25_OUT
TBT_SNK0_DDC_DATA R635 100K_04 TMS XTAL_25_OUT
TBT_TMU_CLK_OUT R634 100K_04
Add,3/6 Tim R636 *10K_04 TBT_TCK T4
R632 *10K_04 TBT_TDO W4 TCK AB3
TBT_FORCE_PWR R605 100K_04 TDO MISC EE_DI TBT_EE_DI 30
RTD3_CIO_PWR_EN R208 100K_04 AC4 TBT_EE_DO 30
+/-0.5% R599 4.75K_0.5%_04 TBT_RBIAS H6 EE_DO AC3
RTD3_USB_PWR_EN R600 100K_04 7/30 RBIAS EE_CS_N TBT_EE_CS_N 30
DPSNK1_HPD R629 100K_04 Modify,3/17 Tim TBT_RSENSE J6 AB4
RSENSE EE_CLK TBT_EE_CLK 30
OUT2_HPD R260 100K_04
TBTA_LSRX R178 1M_04 A15 B7
30 TBTA_CA2HD_1_P PA_RX1_P NC_B7
TBTA_LSTX R180 1M_04 B15 A7 VCC3V3_SX_SYS
30 TBTA_CA2HD_1_N PA_RX1_N NC_A7
TBTA_HPD R609 100K_04
TBT_SNK1_DDC_CLK R628 100K_04 C301 0.22u_10V_X5R_04 TBTA_TX1_P A17 A9 Add昼㺷暣,6/11 Tim
30 TBTA_HD2CA_1_P PA_TX1_P NC_A9
SINK0_CFG1 R226 100K_04 C302 0.22u_10V_X5R_04 TBTA_TX1_N B17 B9
30 TBTA_HD2CA_1_N PA_TX1_N NC_B9 U63
5
B NC_B4 R179 1M_04 B
NC_B5 R181 1M_04 C304 0.22u_10V_X5R_04 TBTA_TX0_P A19 A11 1
30 TBTA_HD2CA_0_P PA_TX0_P NC_A11
TBT USB TYPE C
Modify,3/12 Tim C303 0.22u_10V_X5R_04 TBTA_TX0_N B19 B11 TBT_SLP_S3_N 4

NC_G2 R225 100K_04 30 TBTA_HD2CA_0_N PA_TX0_N NC_B11
2
TBT PORTS
SUSB# 17,20,22,23,27,28,38,41,42,43,44
B21 A13
30 TBTA_CA2HD_0_P PA_RX0_P NC_A13
NOTE: A21 B13
Port A
30 TBTA_CA2HD_0_N PA_RX0_N NC_B13 TC7SZ08FU
3
DPSRC NOT IS USE:STUFF
DPSRC IS USE:NO STUFF. C790 0.1u_10V_X7R_04 TBTA_AUX_P Y15 Y16
30 TBTA_DPSRC_AUX_P PA_DPSRC_AUX_P NC_Y16
3/16 Tim C789 0.1u_10V_X7R_04 TBTA_AUX_N W15 W16
30 TBTA_DPSRC_AUX_N PA_DPSRC_AUX_N NC_W16
TBT_SRC_CFG1 R259 1M_04
E20 E19
30 TBTA_USB2_D_P PA_USB2_D_P NC_E19
TBT_SRC_HPD R229 1M_04 D20 D19
30 TBTA_USB2_D_N PA_USB2_D_N NC_D19
A5 B4 NC_B4
30 TBTA_LSTX PA_LSTX NC_B4
POC
A4 B5 NC_B5 Modify,3/6 Tim
30 TBTA_LSRX PA_LSRX NC_B5
M4 G2 NC_G2
28,30 TBTA_HPD PA_DPSRC_HPD NC_G2
IF SOME OF GPIOs ARE NOT IN USE FOLLOW TABLE BELOW:
GPIO | TERMINATION | Power Rail R598 499_1%_04 PA_USB2_RBIAS H19 F19 PB_USB2_RBIAS R597 499_1%_04
PA_USB2_RBIAS NC_F19
----------------------------------------------------
GPIO_0 | 10K PU | VCC3V3_LC DEBUG PINs: AC23 D6
AB23 THERMDA MONDC_SVR
GPIO_1 | 10K PU | VCC3V3_LC THERMDA A23
GPIO_2 | 100K PD | PIN | TERMINATION ATEST_P
------------------------------- V18 B23
GPIO_3 | 100k PD | PCIE_ATEST ATEST_N
GPIO_4 | 10K PU | VCC3V3_LC MONDC_SVR | GND AC1 E18
GPIO_5 | 10K PU | VCC3V3_LC MONDC_DPSNK_0 | GND TEST_EDM DEBUG USB2_ATEST
GPIO_6 | 100K PD | MONDC_DPSNK_1 | GND L15 W13
MONDC_DPSRC | GND N15 FUSE_VQPS_64 MONDC_DPSNK_0
GPIO_7 | 100K PD | FUSE_VQPS_128
GPIO_8 | 100K PD | MONDC_CIO_0 | GND W18
MONDC_CIO_1 | GND C23 MONDC_DPSNK_1
POC_GPIO_0 | 10K PU | VCC3V3_TBT_SX MONDC_CIO_0
POC_GPIO_1 | 10K PU | VCC3V3_TBT_SX TEST_EDM | GND C22 AB2
NC_C22 MONDC_DPSRC
A POC_GPIO_2 | 100K PD | FUSE_VQPS_64 | GND A
POC_GPIO_3 | 100K PD | FUSE_VQPS_128 | GND U33A
POC_GPIO_4 | 10K PU | VCC3V3_TBT_SX ATEST_P/N | FLOATING Alpine-RIDGE-SP
USB2_ATEST | FLOATING Y
POC_GPIO_5 | 10K PU | VCC3V3_TBT_SX
POC_GPIO_6 | 100K PD | PCIE_ATEST | FLOATING
Title
29 VCC3V3_LC
[28] AR_TBT
30 VCC3V3_FLASH Size Document Number Rev
29,30 VCC3V3_SX_SYS
29 VCC3V3_S0_SYS Custom SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
AR_TBT B - 29
Schematic Diagrams
AR_Power
5 4 3 2 1
VCC0V9_CIO VCC0V9_USB VCC0V9_PCIE VCC0V9_DP VCC3V3_LC VCC3V3_SX_SYS VCC3V3_S0_SYS

VCC0V9_DP check CRB schematic ,1/12 follow intel,6/13 Tim
VCC3V3_S0
C699 C686 C300 C283 C298 C299
C706 C687
0.1u_10V_X7R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
R13
R6
H9
C702 C703 C791 C792 C688 C708 C683
F8
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 L8 A2
VCC3P3_SX
VCC3P3_S0
VCC3P3_LC
VCC3P3A
L11 VCC0P9_DP VCC3P3_SVR A3
L12 VCC0P9_DP VCC3P3_SVR B3
M8 VCC0P9_DP VCC3P3_SVR
T11 VCC0P9_DP
D T12 VCC0P9_DP L9 VCC0V9_SVR D
VCC0V9_USB VCC0P9_DP VCC0P9_SVR
L6 M9 C685 C684 C668 C705 C701 C681 C680
M6 VCC0P9_ANA_DPSRC VCC0P9_SVR E12
V11 VCC0P9_ANA_DPSRC VCC0P9_SVR_ANA E13 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
V12 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F11
C697 C698 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA
V13 F12
VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F13
1u_6.3V_X5R_04 1u_6.3V_X5R_04 VCC0P9_SVR_ANA
M13 F15
M15 VCC0P9_PCIE VCC0P9_SVR_ANA J9
M16 VCC0P9_PCIE VCC0P9_SVR_SENSE Modify Footprint(䇰㛔忚昶),3/9 Tim
L19 VCC0P9_PCIE XFL4012-601MEC 㧁姣䵈刚㟮㟮:Share same GND plane with SVR_VSS of AR
N19 VCC0P9_ANA_PCIE_1 C1 TBT_SVR_IND L17 PCB Footprint = XFL4012-1
L18 VCC0P9_ANA_PCIE_1 SVR_IND C2
VCC0V9_PCIE VCC0P9_ANA_PCIE_2 SVR_IND
M18 D1
N18 VCC0P9_ANA_PCIE_2 SVR_IND
VCC
VCC0P9_ANA_PCIE_2 C297 C296 C282
R15 A1
C696 C693 C695 C694 VCC0P9_USB SVR_VSS 47u_6.3V_X5R_08 47u_6.3V_X5R_08 47u_6.3V_X5R_08 Modify,3/13 Tim
R16 B1
VCC0P9_USB SVR_VSS B2
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 SVR_VSS
R8
R9 VCC0P9_CIO
R11 VCC0P9_CIO
R12 VCC0P9_CIO F18 VCC0V9_LVR_OUT
VCC0P9_CIO VCC0P9_LVR
H18
VCC3V3_ANA_PCIE L16 VCC0P9_LVR J11 C678 C667 C677 C682
VCC0V9_CIO VCC3P3_ANA_PCIE VCC0P9_LVR
VCC3V3_ANA_USB2 J16 H11
VCC3P3_ANA_USB2 VCC0P9_LVR_SENSE 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
C676 C679 A6 V5
A8 VSS_ANA VSS_ANA V6
C C707 C704 C700 VSS_ANA VSS_ANA C
1u_6.3V_X5R_04 1u_6.3V_X5R_04 A10 V8
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 VSS_ANA VSS_ANA
A14 V15
Sheet 29 of 58 A20
A22
B6
B8
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
W5
W6
W8
W9
VSS_ANA VSS_ANA
AR_Power Modify circuit,

DEFAULT SHORT
PJ78
B10
B12
B14
B16
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
W20
W22
W23
Y9
*2mm VCC3V3_SX_SYS B18 Y13
6/11 Tim B20 VSS_ANA VSS_ANA Y20
120MIL 1 2 VSS_ANA VSS_ANA
3.3V B22 AA22
D8 VSS_ANA VSS_ANA AA23
R1004 0_06 VSS_ANA VSS_ANA
D9 AB6
D11 VSS_ANA VSS_ANA AB8
PJ34 VCC3V3_S0 L52 VCC3V3_S0_SYS
*2mm CPI160809UF-1R0M
GND
3.3VS
120MIL 1 2 . E8 VSS_ANA VSS_ANA AB20
E9 VSS_ANA VSS_ANA AB22
E11 VSS_ANA VSS_ANA AC6
C944 C943 C945 VSS_ANA VSS_ANA
E15 AC8
B B
1u_6.3V_X5R_04 47uF_6.3V_X5R_08 47uF_6.3V_X5R_08 VSS_ANA VSS_ANA
E23 AC14
F9 VSS_ANA VSS_ANA AC16
G22 VSS_ANA VSS_ANA AC22
G23 VSS_ANA VSS_ANA D5
H1 VSS_ANA VSS E4
H2 VSS_ANA VSS E5
H12 VSS_ANA VSS E6
H13 VSS_ANA VSS F5
H15 VSS_ANA VSS F6
H16 VSS_ANA VSS H5
H20 VSS_ANA VSS H8
J5 VSS_ANA VSS J8
J18 VSS_ANA VSS J12
J19 VSS_ANA VSS J13
J20 VSS_ANA VSS J15
J22 VSS_ANA VSS L13
J23 VSS_ANA VSS M11
K1 VSS_ANA VSS M12
K2 VSS_ANA VSS N8
L5 VSS_ANA VSS N9
L20 VSS_ANA VSS N11
L22 VSS_ANA VSS N12
L23 VSS_ANA VSS N13
M1 VSS_ANA VSS T6
M2 VSS_ANA VSS T8
A M5 VSS_ANA VSS T9 A
M19 VSS_ANA VSS T13
M20 VSS_ANA VSS T15
N5 VSS_ANA VSS T16
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
N20 VSS_ANA VSS T18
N22 VSS_ANA VSS AB1
N23 VSS_ANA VSS AC2
VSS_ANA VSS
Title
U33B 28 VCC3V3_LC [29] AR_Power
P1
P2
R5
R18
R19
R20
R22
R23
T1
T2
T5
T20
U22
U23
Alpine-RIDGE-SP 28,30 VCC3V3_SX_SYS
N 28 VCC3V3_S0_SYS Size Document Number Rev
2,13,14,16,24,33,38,41,42,44,46 3.3V
7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,31,32,33,35,38,39,41,43,44,46,47 3.3VS

5 4 3 2 1
B - 30 AR_Power
Schematic Diagrams
TPS65982
5 4 3 2 1
VCC5V0_SYS
TBTA_VBUS
C382 C381 C361 C330
80Ohm, 0.01Ohm DCR, 8A Idc
TBTA_LDO_BMC 22u_25V_X5R_08 22u_25V_X5R_08 22u_25V_X5R_08 22u_25V_X5R_08
VCC1V8D_TBTA_LDO L30 HCB2012KF-800T80
VCC1V8A_TBTA_LDO
0_04
C
2/4 Tim J_TYPEC1 Modify Footprint,6/10 Tim
C332 C335 C308 C613 D33 D34 DX07S024JJ2
D D
R596
1u_25V_X5R_06 Y C825~C828 change to 1u_25V_X5R_06
2.2u_16V_X5R_06 2.2u_16V_X5R_06 2.2u_16V_X5R_06 A1 B12
*CSOD140SH
close to pin,1/14
CSOD140SH
2/4 Tim GND GND
0_04
C331
A
TBTA_HD2CA_0_P A2 B11 TBTA_CA2HD_0_P
VCC_HV_SYS
TBTA_HD2CA_0_N A3 TX0_P RX0_P B10 TBTA_CA2HD_0_N
0.1u_10V_X7R_04 TX0_N RX0_N
R233
VCC3V3_SX_SYS C251 1u_25V_X5R_06 A4 B9 C252 1u_25V_X5R_06
C360 VBUS VBUS Modify net,6/11 Tim
TBTA_CC1_J A5 B8 TBTA_SBU2_J
CC1 SBU2
2/4 Tim 10u_25V_X5R_08
C334 C333 Modify net,6/11 Tim TBTA_USB2_TP_J A6 B7 TBTA_USB2_BN_J
TBTA_USB2_TN_J A7 USB2_P_T USB2_N_B B6 TBTA_USB2_BP_J
10u_6.3V_X5R_06 1u_16V_X5R_06 USB2_N_T USB2_P_B
H10
C11
D11
A11
B11
B10
A10
H1
TBTA_SBU1_J A8 B5 TBTA_CC2_J
B1
K1
A2
E1
A6
A7
A8
B7
B9
A9
SBU1 CC2
F1 C611 1u_25V_X5R_06 A9 B4 C612 1u_25V_X5R_06
LDO_1V8A
LDO_1V8D
LDO_BMC
VIN_3V3
VDDIO
PP_CABLE
PP_5V0
PP_5V0
PP_5V0
PP_5V0
PP_HV
PP_HV
PP_HV
PP_HV
SENSEP
SENSEN
HV_GATE1
HV_GATE2
I2C_ADDR VBUS VBUS
D1 TBTA_CA2HD_1_N A10 B3 TBTA_HD2CA_1_N
28 TBT_I2C_SDA I2C_SDA1 RX1_N TX1_N
D2 TBTA_CA2HD_1_P A11 B2 TBTA_HD2CA_1_P
28 TBT_I2C_SCL I2C_SCL1 RX1_P TX1_P
CGND
CGND
CGND
CGND
C1
28 TBTA_I2C_INT I2C_IRQ1Z A12 B1
GND GND
Sheet 30 of 58
ACE_I2C_SDA2 A5
FOR 2nd TPS65982(RESERVED), ACE_I2C_SCL2 B5 I2C_SDA2 3A 3A
GND1
GND2
GND3
GND4
3/6 Tim TBTA_I2C_IRQ2Z B6 I2C_SCL2 H11
I2C_IRQ2Z VBUS J10
R238 *0_04 GPIO_0 B2 VBUS J11
C
15 TBTA_ACE_GPIO0
15 TBTA_ACE_GPIO2
R210
R183
*0_04
*0_04
C2
D10
G11
GPIO_0
GPIO_1
GPIO_2
VBUS
VBUS
K11
H2
Modify,4/9 Tim
C665 1u_16V_X5R_06 C
TPS65982
15 TBTA_ACE_GPIO3
28 TBTA_HPD
RESERVED,3/6 Tim
C10
E10
GPIO_3
GPIO_4
GPIO_5
Primary VOUT_3V3 VCC3V3_FLASH
TBTA_ACE_GPIO6 G10 G1
R593 *0_04 GPIO_7 D7 GPIO_6 LDO_3V3
18 TBTA_ACE_GPIO7 GPIO_7
H6 C307
Modify,6/13 Tim GPIO_8 K6 TBTA_USB2_TP
C_USB_TP
28 TBT_EE_CLK
28 TBT_EE_DI
A3
B4 SPI_CLK
SPI_MOSI
C_USB_TN
L6 TBTA_USB2_TN 10u_25V_X5R_08
NOTE:
A4
TO AP SPI ROM 28 TBT_EE_DO
28 TBT_EE_CS_N
B3 SPI_MISO
SPI_SS_Z Modify,3/18 Tim PAY ATTENTION SYMBOL
28 TBTA_USB2_D_P
28 TBTA_USB2_D_N
L5
K5 USB_RP_P
USB_RP_N C_USB_BP
K7 TBTA_USB2_BP
OF TPS65982 BASED ON DS R0.92
L7 TBTA_USB2_BN
3/16 Tim
R595 1M_04
E2
F2 UART_TX
C_USB_BN AND MIGHT BE FUTURE CHANGES.
UART_RX 2/4 Tim
F4 L9 TBTA_CC1 C306 220p_50V_NPO_04
2/5 Tim G4 SWD_DAT C_CC1 L10 TBTA_CC2 C305 220p_50V_NPO_04
SWD_CLK C_CC2
NO STUFF,6/18 Tim WHEN CONNECT BUSPOWERZ TO GND,
TBTA_CA2HD_1_P
CONNECT ALSO RPD_Gn to C_CCn 28 TBTA_CA2HD_1_P
TBTA_CA2HD_1_N
R185 *0_04 E11 K9 28 TBTA_CA2HD_1_N
15 TBTA_MRESET M_RESET RPD_G1 K10
RPD_G2 VCC3V3_FLASH TBTA_HD2CA_0_N
R209 100K_04 28 TBTA_HD2CA_0_N
TBTA_HD2CA_0_P
28 TBTA_HD2CA_0_P
E4 TBTA_DBG_CTL1 R594 10K_04
1
L4 DEBUG_CTL1 D5 TBTA_DBG_CTL2 R591 10K_04
B 28 TBTA_LSTX LSX_R2P DEBUG_CTL2 D51 D63 B
K4
28 TBTA_LSRX LSX_P2R
R187 100K_04 TBTA_DIG_AUD_P L3
DEBUG3 TEA10402V15A0
1
R186 100K_04 TBTA_DIG_AUD_N K3 K8 TBTA_SBU1 TEA10402V15A0
DEBUG4 C_SBU1 D61 D62
2
R189 100K_04 TBTA_DEBUG1 L2 L8 TBTA_SBU2
R188 100K_04 TBTA_DEBUG2 K2 DEBUG1 C_SBU2
DEBUG2 TEA10402V15A0
Add,3/12 Tim Modify,6/11 Tim TEA10402V15A0
J1
28 TBTA_DPSRC_AUX_P
2
J2 AUX_P F11R184 0_04
28 TBTA_DPSRC_AUX_N AUX_N RESETZ TBT_RESET_N 28
VCC3V3_FLASH F10
BUSPOWERZ H7 TBTA_SS
TBTA_ROSC G2 SS
TBTA_CA2HD_0_P
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCC3V3_FLASH R_OSC 28 TBTA_CA2HD_0_P TBTA_CA2HD_0_N

2/4 Tim 7/30 28 TBTA_CA2HD_0_N
R584 U35 C666 TBTA_HD2CA_1_N
A1
B8
D6
D8
E5
E6
E7
E8
F5
F6
F7
F8
G5
G6
G7
G8
H4
H5
H8
L1
R582 100K_04 TBTA_DPSRC_AUX_N 15K_0.1%_04 TPS65982ABZQZ 0.22u_10V_X5R_04 28 TBTA_HD2CA_1_N TBTA_HD2CA_1_P

Y 28 TBTA_HD2CA_1_P
R583 100K_04 TBTA_DPSRC_AUX_P 0.1%
1
Modify value,8/6 Tim
R585 0_04 D64 D67
TI⺢嬘,2/5 Tim
TEA10402V15A0
1
VCC3V3_SX_SYS TEA10402V15A0
D65 D66
2
R237 *10K_04 GPIO_0 5V PJ36 VCC5V0_SYS D68 D14
Modify,6/13 Tim *3mm PUSB3F96 PUSB3F96
TEA10402V15A0 TEA10402V15A0
A R592 *10K_04 GPIO_7 1 2 A
2
TBTA_CC2 10 1 TBTA_CC2_J TBTA_USB2_TN 10 1 TBTA_USB2_TN_J
TBTA_CC1 9 2 TBTA_CC1_J TBTA_USB2_TP 9 2 TBTA_USB2_TP_J
R182 *10K_04 TBTA_ACE_GPIO6 Add,3/6 Tim DEFAULT 8 3 8 3
Add,6/4 Tim TBTA_SBU1 7 4 TBTA_SBU1_J TBTA_USB2_BN 7 4 TBTA_USB2_BN_J
VCC3V3_SX_SYS
TBTA_SBU2 6 5 TBTA_SBU2_J TBTA_USB2_BP 6 5 TBTA_USB2_BP_J
Title
R236 *3.3K_04 ACE_I2C_SDA2 Add,6/11 Tim Modify,6/11 Tim
[30] TPS65982,TYPE C
R235 *3.3K_04 ACE_I2C_SCL2 Add,3/6 Tim 28 VCC3V3_FLASH Size Document Number Rev
R234 *10K_04 TBTA_I2C_IRQ2Z 28,29 VCC3V3_SX_SYS Custom SCHEMATIC1 6-71-P8700-D03 1.0
11,12,14,20,26,38,40,41,43,44,46,47,48 5V
5 4 3 2 1
TPS65982 B - 31
Schematic Diagrams
Mini Display Port A

5 4 3 2 1
MINI DISPLAY PORT A(PS8330B)

3.3VS
3.3VS
C243 C192
10K_04
D D
0.1u_10V_X7R_04 0.01u_16V_X7R_04
PDB PIN:
Footprint M-SOT23-5ᾖ㓡䁢M-SOT23-5A
R116
L:Chip power down 6/14 Tim
H:Normal operation(default)
PS8330B_AUXp_SCL
PS8330B_AUXn_SDA
Modify,4/13 Tim For Safety LPS. 3.3VS_FUSE_DP1
PS8330B_AUXp
PS8330B_AUXn
R119 *0_04 3.3VS
mDPA_AUXN
mDPA_AUXP
PS8330B_PCH 15 U11
R118 *0_04 3 1
C193 2.2u_6.3V_X5R_04 PS8330B_EC2 23 OC# VOUT
R117 *0_04
PS8409_PD 14 5
VIN C166
3.3VS 3.3VS 3.3VS
Reserved,4/13 Tim C175 4 2
EN# GND 10u_6.3V_X5R_06
10u_6.3V_X5R_06
SY6288D20AAC
U16 PCB Footprint = M-SOT23-5A
36
35
34
33
32
31
30
29
28
27
26
25
PS8330B
VDD33
RST#
SDA_DDC
SCL_DDC
VDD33
GND
AUX_SRCp
AUX_SRCn
AUX_SNKp
AUX_SNKn
PD#
VDD33
11,14,32,41,44 SUSB
Modify,3/19 Tim
月PS8330B 月Mini DP Conn

37
NC GND
24 MINI DP PORT
C212 0.1u_16V_X7R_04 IN0P_R 38 23 C144 0.1u_16V_X7R_04 PS8330B_D0p J_MDP1
11 mDPA_0P IN0p OUT0p 3.3VS_FUSE_DP1 C17722-120A9-L
Sheet 31 of 58 C213 0.1u_16V_X7R_04 IN0N_R 39 22 C150 0.1u_16V_X7R_04 PS8330B_D0n PCB Footprint = c17722-120xx-l
11 mDPA_0N IN0n OUT0n
PS8330B_CFG1 40 21 20
C CFG1 NC DP_PWR C
C214 0.1u_16V_X7R_04 IN1P_R 41 20 C151 0.1u_16V_X7R_04 PS8330B_D1p PS8330B_D0p_J 3

11 mDPA_1P IN1p OUT1p ML_LANE0P
Mini Display Port A

PS8330B_D0n_J 5
ML_LANE0N
11 mDPA_1N C215 0.1u_16V_X7R_04 IN1N_R 42 19 C152 0.1u_16V_X7R_04 PS8330B_D1n
IN1n OUT1n PS8330B_D1p_J 9
43
PS8330B 18 PS8330B_D1n_J 11 ML_LANE1P
3.3VS
NC GND ML_LANE1N
PS8330Bℏ悐㚱㈿ESD,3/17 Tim
C216 0.1u_16V_X7R_04 IN2P_R 44 17 C153 0.1u_16V_X7R_04 PS8330B_D2p PS8330B_D2p_J 15
11 mDPA_2P IN2p OOUT2p D4 ML_LANE2P
PS8330B_D2n_J 17
ML_LANE2N
IN2n OUT2n PS8330B_D0p 6 5 PS8330B_D0p_J R95 PS8330B_D3p_J 10
PS8330B_D0n 7 4 PS8330B_D0n_J 100K_04 PS8330B_D3n_J 12 ML_LANE3P
46 15
NC NC 8 3 ML_LANE3N
C240 0.1u_16V_X7R_04 IN3P_R 47 14 C164 0.1u_16V_X7R_04 PS8330B_D3p PS8330B_D1p 9 2 PS8330B_D1p_J PS8330B_AUXp_SCL16
11 mDPA_3P IN3p OUT3p PS8330B_D1n 10 1 PS8330B_D1n_J AUX_CHP
PS8330B_AUXn_SDA18
AUX_CHN
IN3n OUT3n PS8330B_CA_DET 4
*PUSB3F96 CONFIG1
SDA_CLTCFG0
6
SCL_CTLPEQ
CONFIG2
CGND
CGND
CGND
CGND
D5
I2C_ADDR
49 PS8330B_HPD 2
CAD_SRC
HPD_SRC
CAD_SNK
HPD_SNK
GND
GND
GND
GND
GND
EPAD 19 HPD
VDD33
VDD33
VDD33
PS8330B_D2p 6 5 PS8330B_D2p_J RETURN
CEXT
REXT
PS8330B_D2n 7 4 PS8330B_D2n_J Y
C145 1
C155 7
8
13
14
GND1
GND2
GND3
GND4
8 3
PS8330B_D3p 9 2 PS8330B_D3p_J R94 R85
R86
100K_04
2.2u_6.3V_X5R_04 2
PS8330B_CA_DET 10
11
12
PS8330B_D3n 10 1 PS8330B_D3n_J 1M_04 5.1M_04
PS8330B_CFG0
PS8330B_PEQ
IN_CAD_SRC
mDPA_HPD
4.99K_1%_04
*PUSB3F96
PS8330B_HPD
0.01u_16V_X7R_04
0.01u_16V_X7R_04
3.3VS
3.3VS 3.3VS
B B
C242
R140
11 mDPA_HPD
DESIGN NOTE:CFG0 DESIGN NOTE:PEQ

3.3VS
Configuration pin for automatic EQ and Programmalbe input equalization levels;internal pull
3.3VS *4.7K_04 R161 PS8330B_CFG0 Aux interception; Internal pull down at down at~150k ,3.3v I/O
~150Kohm,3.3V I/O L: default, LEQ, compensate channel loss up to 12dB at
*4.7K_04 R139 L: default, automatic EQ enable and Aux interception enable HBR2
check IN_CA,1/13 H: automatic EQ disable and AUX interception enable H: HEQ, compensate channel loss up to 15dB at HBR2
R102 R104 R103 3.3VS
4.7K_04 4.7K_04 4.7K_04 M: automatic EQ disable and AUX interception M:LLEQ, compensate channel loss up to 5dB at HBR2
C195 0.1u_10V_X7R_04 PS8330B_AUXp *4.7K_04 R114 PS8330B_CFG1
disable,no pre-emphasis, 600mVpp swing
11 mDPA_AUXP
C194 0.1u_10V_X7R_04 PS8330B_AUXn *4.7K_04 R115 DESIGN NOTE:CFG1
11 mDPA_AUXN
Configuration pin for auto test and input offset
cancellation,3.3V IO, internal pull up at~150K
D
S
AO3415 G AO3415 G 3.3VS

H: default, auto test disable and input offset cancellation
A Q12 Q13 G IN_CAD_SRC *4.7K_04 R160 PS8330B_PEQ enable A
DDC DATA/CLK MTN7002ZHS3 L: auto test enable and input offset cancellation enable
D
mDPA_AUXP Q14 *4.7K_04 R138

mDPA_AUXN M: auto test disable and input offset cancellation disable
Hybrid DDC/AUX
Title
[31] PS8330B+mDP_A

5 4 3 2 1
B - 32 Mini Display Port A

Schematic Diagrams
Mini Display Port B
5 4 3 2 1
MINI DISPLAY PORT B(PS8338B)
PS8338B_PEQ R163 *4.7K_04 3.3VS 3URJUDPPDEOHLQSXWHTXDOL]DWLRQOHYHOV,QWHUQDOSXOOGRZQDWa.㫉,
3 Levels Input: 3.3V I/O. PC10 R105 *4.7K_04 3.3VS AUX interception disable for Port y (y = 1, 2). Internal pull down at
L: Low R164 *4.7K_04 GND L: default, LEQ, compensate channel loss up to11.5dB @ HBR2 ~150K㫉, 9,2
H: High H: HEQ, compensate channel loss up to 14.5dB @ HBR2 R106 *4.7K_04 GND L: AUX interception enable, driver configuration is set by link training
M: LLEQ, compensate channel loss up to 8.5dB @ HBR2 (default)
M: VDD33/2, connect both H: AUX interception disable, driver output with fixed 800mV and 0dB
PC20 R109 *4.7K_04 3.3VS
pull-up and pull-down resistors M: AUX interception disable, driver output with fixed 400mV and 0dB
D PI0 R121 *4.7K_04 3.3VS

Automatic EQ disable; Internal pull down at
R110 *4.7K_04 GND
~150K㫉, 3.3V IO
PS8338B_CFG0 R120 *4.7K_04 3.3VS 3/12 Tim L: Automatic EQ enable (default) PC11 R107 *4.7K_04 3.3VS
H: Automatic EQ disable
R108 *4.7K_04 GND Output swing adjustment for Port y (y = 1, 2). Internal pull down at
Chip operational mode configuration; PI1 R122 *4.7K_04 3.3VS ~150K㫉, 9,2
Internal pull down at ~150K㫉, 3.3V $XWRWHVWHQDEOH,QWHUQDOSXOOGRZQDWa.㫉, 3.3V I/O. PC21 R111 *4.7K_04 3.3VS L: default
I/O. L: Auto test disable & input offset cancellation enable H: +20%
L: Control switching mode (default) R123 *4.7K_04 GND M: -16.7%
(default) R112 *4.7K_04 GND
H: Automatic switching mode H: Auto test enable & input offset cancellation enable
M: Auto test disable & input offset cancellation disable
16 PS8338B_SW PS8338B_SW R143 *4.7K_04 3.3VS
Port switching control or priority configuration;
Internal pull down at ~150K㫉, 3.3V I/O.
L: Port1 is selected or with higher priority (default)
H: Port2 is selected or with higher priority
Modify,3/12 Tim
PS8338B_CFG0
C199 C197 Footprint M-SOT23-5ᾖ㓡䁢M-SOT23-5A

月Mini DP Conn
6/14 Tim
3.3VS
3.3VS
0.01u_16V_X7R_04 0.1u_16V_X7R_04
PC10
PC11
PC20
PC21
PI0
For Safety LPS. 3.3VS_FUSE_DP2
Sheet 32 of 58
C172 0.1u_16V_X7R_04 OUT1_D0p 3.3VS
U17 U18
61
60
59
58
57
56
55
54
53
52
51
C173 0.1u_16V_X7R_04 OUT1_D0n 3 1

OC# VOUT
EPAD
PI0/SDA_CTL
CFG0
CFG1
VDD33
PC10
PC11
PC20
PC21
GND
VDD33
C181 0.1u_16V_X7R_04 OUT1_D1p 5

VIN
Mini Display Port B

C223
月PS8338B MUX_HPD PI1 1 50 C182 0.1u_16V_X7R_04 OUT1_D1n C222 4 2
C11 MUX_HPD 2
3
PI1/SCL_CTL
I2C_CTL_EN
OUT1_D0p
OUT1_D0n
49
48 OUT1_HPD C183 0.1u_16V_X7R_04 OUT1_D2p
10u_6.3V_X5R_06
EN#
SY6288D20AAC
GND 10u_6.3V_X5R_06
C196 0.1u_16V_X7R_04 IN_CA_DET 4 IN_HPD OUT1_HPD 47 PCB Footprint = M-SOT23-5A

11 MUX_0P IN_CA_DET OUT1_D1p
C247 0.1u_16V_X7R_04 3.3VS 5 46 C184 0.1u_16V_X7R_04 OUT1_D2n
C217 0.1u_16V_X7R_04 IN_D0p 6 VDD33 OUT1_D1n 45
11 MUX_0N IN_D0p OUT1_D2p 11,14,31,41,44 SUSB
IN_D0n 7 44 C185 0.1u_16V_X7R_04 OUT1_D3p
PS8338B_PEQ 8 IN_D0n OUT1_D2n 43 OUT1_CA_DET
C218 0.1u_16V_X7R_04 IN_D1p 9 PEQ OUT1_CA_DET 42 C200 0.1u_16V_X7R_04 OUT1_D3n
11 MUX_1P IN_D1p OUT1_D3p
IN_D1n 10 41
11 MUX_1N C219 0.1u_16V_X7R_04 11 IN_D1n PS8338B OUT1_D3n 40 OUT2_D0p
IN_D2p 12 GND OUT2_D0p 39 OUT2_D0p 28
IN_D2n 13 IN_D2p OUT2_D0n 38
IN_D2n OUT2_HPD OUT2_HPD 28 OUT2_D0n MINI DP PORT
C220 0.1u_16V_X7R_04 PS8338B_PD 14 37 OUT2_D0n 28
11 MUX_2P PD OUT2_D1p check add ESD ,1/12
IN_D3p 15 36
IN_D3p OUT2_D1n OUT2_D1p J_MDP2
11 MUX_2N C221 0.1u_16V_X7R_04 IN_D3n 16 35 OUT2_D1p 28
IN_D3n OUT2_D2p 3.3VS_FUSE_DP2 C17722-120A9-L
OUT1_AUXn_SDA
OUT2_AUXn_SDA
OUT1_AUXp_SCL
OUT2_AUXp_SCL
Add,4/7 Tim 17 34
CEXT OUT2_D2n OUT2_D1n PCB Footprint = c17722-120xx-l
PS8338B_SW 18 33 OUT2_CA_DET OUT2_D1n 28
SW OUT2_CA_DET
IN_DDC_SDA
IN_DDC_SCL
11 MUX_3P C244 0.1u_16V_X7R_04 19 32

C246 GND OUT2_D3p OUT2_D2p 20
20 31 OUT2_D2p 28 DP_PWR
IN_AUXp
IN_AUXn
C245 0.1u_16V_X7R_04 REXT OUT2_D3n

11 MUX_3N
VDD33
VDD33
OUT2_D2n OUT1_D0p_J 3
2.2u_6.3V_X5R_04 OUT2_D2n 28 ML_LANE0P
OUT1_D0n_J 5
R144 OUT2_D3p ML_LANE0N
OUT2_D3p 28
4.99K_1%_04 OUT1_D1p_J 9
OUT2_D3n ML_LANE1P
21
22
23
24
25
26
27
28
29
30
OUT2_D3n 28 OUT1_D1n_J 11
ML_LANE1N
3.3VS
OUT1_AUXn_SDA
OUT2_AUXn_SDA
OUT1_AUXp_SCL
OUT1_D2p_J 15
OUT2_AUXp_SCL
3.3VS
3.3VS
ML_LANE2P
MUX_AUXN
MUX_AUXP
Modify,3/16 Tim OUT1_D2n_J 17

ML_LANE2N
IN_AUXp
IN_AUXn
3.3VS
OUT1_D3p_J 10
R553 ML_LANE3P
OUT1_D3n_J 12
100K_04 ML_LANE3N
C250 C198
OUT1_AUXp_SCL 16
B PD PIN: 0.1u_16V_X7R_04 0.01u_16V_X7R_04 R146
PS8338Bℏ悐㚱㈿ESD,2/5 Tim
D8
OUT1_AUXn_SDA18 AUX_CHP
AUX_CHN
L:Normal operation(default) 100K_04
OUT1_CA_DET 4
H:Chip power down OUT1_D0p 6 5 OUT1_D0p_J 6 CONFIG1
OUT1_D0n 7 4 OUT1_D0n_J CONFIG2
R253 *0_04 PS8338B_PD OUT2_AUXn_SDA 28
CGND
CGND
CGND
CGND
15 PS8338B_PCH 8 3 OUT1_HPD 2
GND
GND
GND
GND
GND
OUT2_AUXp_SCL 28 HPD
R254 *0_04 OUT1_D1p 9 2 OUT1_D1p_J 19
22 PS8338B_EC1 OUT1_D1n 10 1 OUT1_D1n_J RETURN
R145 Y
R290 *0_04
C174 1
C186 7
8
13
14
GND1
GND2
GND3
GND4
23 PS8338B_EC2 100K_04
*PUSB3F96 R552 R100 R99
100K_04 1M_04 5.1M_04
D9
OUT1_D2p 6 5 OUT1_D2p_J 1/30 Tim
0.01u_16V_X7R_04
0.01u_16V_X7R_04
OUT1_D2n 7 4 OUT1_D2n_J
8 3
OUT1_D3p 9 2 OUT1_D3p_J
OUT1_D3n 10 1 OUT1_D3n_J
3.3VS
3.3VS
3.3VS
check IN_CA,1/13 *PUSB3F96

R142 R141 R162
4.7K_04 4.7K_04 4.7K_04
11 MUX_AUXP C248 0.1u_16V_X7R_04 IN_AUXp
11 MUX_AUXN C249 0.1u_16V_X7R_04 IN_AUXn
W^ϴϯϯϴͲWŝŶŽŶƚƌŽůDŽĚĞ
D
S
S
G AO3415 G DEFAULT:LOW
AO3415
Q16 Q17 G IN_CA_DET
MTN7002ZHS3
DDC DATA/CLK
S
Hybrid DDC/AUX
D
A A
D
Q15
GND
MUX_AUXP
MUX_AUXN
3/19 Tim
Title
[32] PS8338B+mDP_B
5 4 3 2 1
Mini Display Port B B - 33

Schematic Diagrams
M.2 WLAN+BT
5 4 3 2 1
WLAN+BT
D J_WLAN1 D
RF暨㯪,3/18 Tim
75 74 40 mil
GND10 3.3V3 WLAN_3.3V
73 72
71 Reserved/REFCLKN1 3.3V2 70 C295 C293 C294
69 Reserved/REFCLKP1 UIM_Power_In/Gpio1/PEWake1# 68
67 GND9 UIM_Power_Out/CLKREQ1# 66 CLOSE TO SLOT SIDE,1/20 Tim 0.1u_16V_Y5V_04 22u_6.3V_X5R_08 22u_6.3V_X5R_08
65 Reserved/PERn1 UIM_SWP/PERST1# 64
63 Reserved/PERp1 Reserved1 62 R176 10K_04
GND8 ALERT#(I) WLAN_3.3V
3.3VS R158 10K_04 61 60 R177 10K_04
59 Reserved/PETn1 I2C CLK(O) 58 RF暨㯪,3/12 Tim R204 *0_04
Reserved/PETp1 I2C DATA(IO) LPSS_GSPI0_MISO 15 Add,3/4 Tim
57 56 R175 0_04
GND7 W_DISABLE#1(O) WLAN_EN 22

R159 *0_04 55 54
17,28,35,36,37 PCIE_WAKE# PEWake0#(IO) Reserved/W_DISABLE#2(O) BT_EN 22
WLAN_CLKREQ# 53 52
18 WLAN_CLKREQ# CLKREQ0#(IO) PERST0#(O) BUF_PLT_RST# 20,22,23,24,28,34,35,36,37
51 50 R174 0_04
GND6 SUSCLK(32Khz)(O) SUS_CLK 17,34
49 48
18 CLK_PCIE_WLAN# REFCLKN0 COEX1(I/O)1.8V
47 46
18 CLK_PCIE_WLAN REFCLKP0 COEX2(I/O)1.8V
45 44
43 GND5 COEX3(I/O)1.8V 42 R173 *0_04
19 PCIE_RXN3_WLAN PERn0 VENDOR DEFINED2 CL_CLK1 16
41 40 R172 *0_04
19 PCIE_RXP3_WLAN PERp0 VENDOR DEFINED1 CL_DATA1 16
39 38
Sheet 33 of 58
R171 *0_04
GND4 VENDOR DEFINED0 CL_RST#1 16
37 36
19 PCIE_TXN3_WLAN PETn0 NC8
35 34
19 PCIE_TXP3_WLAN PETp0 NC7
33 32
GND3 NC6
M.2 WLAN+BT E KEY

23 22
C 21 NC5 NC4 20 C
follow common design, NC3 NC2 J8 2 1 OPEN_2A
6/7 Tim 19 18 3.3V
17 NC1 GND2 16
NC0 LED#2(I)(OD) VDD3 WLAN_3.3V
U21
>80 mil >80 mil
5 1
A KEY VIN VOUT
4
7 6 VIN/SS C325
GND1 LED#1(I)(OD) C355
5 4 40 mil
19 USB_PN8 USB_D- 3.3V1 3 2
USB暨婳BIOS姕⭂䁢XHCI 3 2 EN GND
19 USB_PP8 USB_D+ 3.3V0 WLAN_3.3V 1u_6.3V_X5R_04 0.1u_16V_Y5V_04
1
GND0 AP2821KTR-G1
Modify,3/30 Tim
NASA0-S6701-TS50
22 WLAN_PWR_EN
M: NCT3522U -- 6-02-03522-9C0
D02 BOM STUFF H=4MM(6-21-84K20-075),
6/18 Tim S: G5243A ---- 6-02-05243-9C0
AP2821KTR-G1 6-02-02821-9C0
B B
A A
Title
[33] M.2 WLAN+BT
7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,35,38,39,41,43,44,46,47
15,16,17,19,20,22,23,36,37,38,41,42,43,45,46,49
3.3VS
VDD3 A3 SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
B - 34 M.2 WLAN+BT
Schematic Diagrams
M.2 M Key, B Key
5 4 3 2 1
NGFF_M (M2) SSD1 (PCIE 4X) 3.3VS_2
L:SATA >120 mil

H:PCIE 3.3VS_2
R307
C823 C822 C824
*10K_04 J_SSD1
0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06
16 M.2_SSD1_PEDET
75
D
73 GND13 74
71 GND12 3.3V8 72 GND GND GND
G NGFF_PEDET1 69 GND11 3.3V7 70
Q21 67 PEDET(NC-PCIe/GND-SATA) 3.3V6 68 R296 *80.6_1%_04
SUS_CLK 17,33,34
S
NC18 SUSCLK(32Khz)(O)
D R321
*MTN7002ZHS3
0_04 M KEY
D
57 58
55 GND10 NC17 56
18 CLK_PCIE_SSD1 REFCLKP NC16
53 54
18 CLK_PCIE_SSD1# REFCLKN PEWake#(IO)
51 52
0.22u_10V_X5R_04 GND9 CLKREQ#(IO) SSD1_CLKREQ# 18
C413 49 50
16 PCIE_TXP9_SSD PETp0/SATA-A+ PERST#(O) BUF_PLT_RST# 20,22,23,24,28,33,34,35,36,37
C414 0.22u_10V_X5R_04 47 48
16 PCIE_TXN9_SSD PETn0/SATA-A- NC15
45 46
43 GND8 NC14 44
16 PCIE_RXN9_SSD PERp0/SATA-B- NC13
41 42
16 PCIE_RXP9_SSD PERn0/SATA-B+ NC12 Add,4/3 Tim
39 40
C415 0.22u_10V_X5R_04 37 GND7 NC11 38 R652 0_04
16 PCIE_TXP10_SSD PETp1 DEVSLP(O) SSD1_SATA_DEVSLP 19
C416 0.22u_10V_X5R_04 35 36
16 PCIE_TXN10_SSD PETn1 NC10
33 34
31 GND6 NC9 32
16 PCIE_RXP10_SSD PERp1 NC8
29 30
16 PCIE_RXN10_SSD PERn1 NC7
27 28 >120 mil
GND5 NC6
C417 0.22u_10V_X5R_04 25 26 3.3VS_2
16 PCIE_TXP11_SSD PETp2 NC5
C418 0.22u_10V_X5R_04 23 24
21 22 C820 C819 C821
19 GND4 NC3 20
17 18 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06
16 PCIE_RXN11_SSD PERn2 3.3V5
15 16
C419 0.22u_10V_X5R_04 13 GND3 3.3V4 14
16 PCIE_TXP12_SSD PETp3 3.3V3
C420 0.22u_10V_X5R_04 11 12 GND GND GND
16 PCIE_TXN12_SSD PETn3 3.3V2
9 10 follow common design
7 GND2 DAS/DSS#(I)(OD) 8
16 PCIE_RXP12_SSD PERp3 NC1 6/11 Tim
5 6 80 mils FOLLOW COMMON DESIGN
3 4 6/11 Tim
Sheet 34 of 58
GND1 3.3V1 3.3VS_2 3.3VS_2
1 2
GND0 3.3V0 C818
NASM0-S6701-TS50 0.1u_10V_X7R_04
5
M.2 M Key, B Key
GND D02 BOM STUFF H=4MM(6-21-84K70-075), 1 R293 0_04
6/18 Tim EC_SSD_LED# 23
4
GND 38 PCH_HDD_LED
Remove SATA,PCIE select circuit 2
6/11 Tim
C U26 TC7SZ08FU
C
3
R297 *0_04
PCH_SATA_LED# 16
default IRST CONTROL
NGFF_M (M2) SSD2 (PCIE 4X)

3.3VS_2
R92
>120 mil
*10K_04 3.3VS_2
M.2_SSD2_PEDET L:SATA C161 C160 C162
16 M.2_SSD2_PEDET
H:PCIE
D
J_SSD2 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06

G NGFF_PEDET2 75
Q10 73 GND13 74 GND GND GND
S
*MTN7002ZHS3 71 GND12 3.3V8 72

NGFF_PEDET2 69 GND11 3.3V7 70
R93 0_04 67 PEDET(NC-PCIe/GND-SATA) 3.3V6 68 R91 *80.6_1%_04
NC18 SUSCLK(32Khz)(O) SUS_CLK 17,33,34
B B
M KEY
57 58
55 GND10 NC17 56
18 CLK_PCIE_SSD2 REFCLKP NC16
53 54
18 CLK_PCIE_SSD2# REFCLKN PEWake#(IO)
51 52
0.22u_10V_X5R_04 GND9 CLKREQ#(IO) SSD2_CLKREQ# 18
C141 49 50
16 PCIE_TXP16_SSD PETp0/SATA-A+ PERST#(O) BUF_PLT_RST# 20,22,23,24,28,33,34,35,36,37
C143 0.22u_10V_X5R_04 47 48
16 PCIE_TXN16_SSD PETn0/SATA-A- NC15
45 46
43 GND8 NC14 44
16 PCIE_RXN16_SSD PERp0/SATA-B- NC13
41 42
16 PCIE_RXP16_SSD PERn0/SATA-B+ NC12
39 40 Add,4/3 Tim
C142 0.22u_10V_X5R_04 37 GND7 NC11 38 R545 0_04
16 PCIE_TXP15_SSD PETp1 DEVSLP(O) SSD2_SATA_DEVSLP 19
C135 0.22u_10V_X5R_04 35 36
33 34
31 GND6 NC9 32
29 30
27 28 >120 mil
C134 0.22u_10V_X5R_04 25 GND5 NC6 26
16 PCIE_TXP14_SSD PETp2 NC5 3.3VS_2
C133 0.22u_10V_X5R_04 23 24
21 22 C543 C539 C542
19 GND4 NC3 20
17 18 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06
16 PCIE_RXN14_SSD PERn2 3.3V5
15 16
C127 0.22u_10V_X5R_04 13 GND3 3.3V4 14
16 PCIE_TXP13_SSD PETp3 3.3V3 GND GND GND
C126 0.22u_10V_X5R_04 11 12
16 PCIE_TXN13_SSD PETn3 3.3V2
9 10 follow common design
7 GND2 DAS/DSS#(I)(OD) 8
16 PCIE_RXP13_SSD PERp3 NC1 6/11 Tim
5 6
16 PCIE_RXN13_SSD PERn3 NC0 80 mils
3 4 3.3VS_2
1 GND1 3.3V1 2
GND0 3.3V0
C540
NASM0-S6701-TS50
GND 0.1u_10V_X7R_04
D02 BOM STUFF H=4MM(6-21-84K70-075),
6/18 Tim
GND
Remove SATA,PCIE select circuit
6/11 Tim
A A
Title
41 3.3VS_2 [34] M.2 M KEY,B KEY
A2 SCHEMATIC1 6-71-P8700-D03 1.0
5 4 3 2 1
M.2 M Key, B Key B - 35

Schematic Diagrams
RTS5250
5 4 3 2 1
RTS5250
CARD READER
Support Runtime D3 mode => R489 and R490 don't mount
No Support Runtime D3 mode => R489 and R490 mount
D SD_CARD SUPPORT UHS-II D
3.3V_IN 3.3VAUX
PCH䪗ᶲẞ,2/3 Tim
R709 0_04 R710 *10K_04 PCIE_WAKE#
3.3VS
LENGTH <2INCH MDIO0~5 攟䞕ⶖ<200 mil
PCH䪗ᶲẞ | CLK - DATA | <= 100mils
R696 *10K_04 CARD_CLKREQ# 3.3VAUX | DATA.x - DATA.y | <= 100mils
SD_WP/MS_BS CR1_LEDN R708 10K_04 3.3V_IN CLK NEED DOUBLE SPACE THEN OTHER
R695
SD_CD#
MS_INS# CN1
*10K_04 50ohm +/- 15%
SD_LN0_P SD_WP/MS_BS 1
PCIE_WAKE# SD_LN0_M C857 C858 SD_D1/SD_RCLK_M 2 WP
17,28,33,36,37 PCIE_WAKE# DAT1/RCLK-
100ohm +/- 15% SD_D0/SD_RCLK_P 3
10u_6.3V_X5R_06 0.1u_16V_Y5V_04 4 DAT0/RCLK+
5 VSS5
SD_LN1_P 6 VSS2
32
31
30
29
28
27
26
25
U53 SD_CLK/MS_D0 7 D1+
SD_LN1_M 8 CLK
Sheet 35 of 58
WAKE#
GPIO
MS_INS#
SD_CD#
SP7
3V3aux
SD_LN0_P
SD_LN0_M
20,22,23,24,28,33,34,36,37 BUF_PLT_RST# 9 D1-
VCC_CARD VDD1
10
SD_VDD2 VDD2
11
VSS1
RTS5250 C453 SD_CD# 12

1 24 SDREG2 20 mil C856 1u_6.3V_X5R_04 0.1u_16V_Y5V_04 C429 13 CD
CARD_CLKREQ# 2 PERST# SDREG2 23 SD_LN1_M 0.1u_16V_Y5V_04 SD_CMD/MS_D2 14 VSS4
18 CARD_CLKREQ#
C 19 PCIE_TXP4_CARD
3
4
CLKREQ#
HSIP RTS5250
SD_LN1_M
SD_LN1_P
22
21
SD_LN1_P 100ohm +/- 15%
SP6 R694 0_04 SD_D2/MS_CLK
SD_LN0_M
SD_D3/MS_D3
15
16
CMD
D0-
C
19 PCIE_TXN4_CARD HSIN SP6 CD/DAT3
5 20 SP5 R693 0_04 SD_D3/MS_D3 SD_LN0_P 17 21
18 CLK_PCIE_CARD
6 REFCLKP QFN32 SP5 19 SP4 R692 0_04 SD_CMD/MS_D2 SD_D2/MS_CLK 18 D0+ GND1 22
18 CLK_PCIE_CARD# REFCLKN SP4 DAT2 GND2
SP1/SD_RCLK_M
C854 0.1u_10V_X7R_04 RTS5249_HSOP 7 18 DV33_18 20 mil C853 1u_6.3V_X5R_04 19 23
SP2/SD_RCLK_P
19 PCIE_RXP4_CARD HSOP DV33_18 VSS3 GND3
C841 0.1u_10V_X7R_04 RTS5249_HSON 8 17 20 24
19 PCIE_RXN4_CARD HSON SP3 SP3 R674 0_04 SD_CLK/MS_D0 GND GND4
CARD_3V3
SD_VDD2
DV12_S
C835 8191-3520-ZC71
3V3_IN
RREF
33
AV12
GND 5/21 update PCB Footprint 6.8p_50V_NPO_04
0618 VALUE UPDATE
9
10
11
12
13
14
15
16
RTS5250-GR
SP2 R673 0_04 SD_D0/SD_RCLK_P 100ohm +/- 15% VCC_CARD

SP1 R672 0_04 SD_D1/SD_RCLK_M
R676 6.2K_1%_04 12 mil RREF
40 mil Follow℔䓐䶂嶗,1/28 Tim
DV12_S
L<200mils C452 C450 C451
DV12_S AV12 C837 C836
40 milPlace Near Conn 0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06 *10u_6.3V_X5R_06
20 mil SD_VDD2
R675 0_06 4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04
C427 C428
DEL 4.7uf_6.3V_X5R_06,1/14 C840
4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
3.3VS 3.3V_IN CARD_3V3 Near Cardreader CONN Near Cardreader CONN
60 mil 60 mil 1.2A 40 mil 40 mil
B R661 0_06 CARD_3V3 R698 0.2R 5% SMD0603
VCC_CARD B
C839 C838 C855
R697
0.1u_16V_Y5V_04 10u_6.3V_X5R_06 0.1u_16V_Y5V_04
*150_06
NEAR PIN11
SD Card Remove Fall time less than 1 ms

when SD card remove.
A A
Title
[35] RTS5250 (CardReader only)
7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,38,39,41,43,44,46,47 3.3VS A3 SCHEMATIC1 6-71-P8700-D03 1.0
5 4 3 2 1
B - 36 RTS5250
Schematic Diagrams
LAN_1E2400
5 4 3 2 1
LAN_1(E2400) LAN POWER PLAN change to VDD3_1,
6/11
VDD3 VDD3_1
Add FOR PDA test
6/11 Tim ȱȱŗ VDD3_1
R1002 *15mil_short
BUF_PLT_RST# R153
Rg
*4.7K_04 ȱ ȱ
Modify,4/11 Tim PCIE_WAKE# R167 *4.7K_04
C235 C234 Rh
C233 C232 C231 BUF_PLT_RST#
Rg,Rh are pull-up resisters, which might not be BUF_PLT_RST# 20,22,23,24,28,33,34,35,37
D 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 0.1u_16V_X7R_04 *1000P_50V_X7R_04 necessary due to existence on motherboard. D

VDD3_1
PCIE_WAKE#
PCIE_WAKE# 17,28,33,35,37
0.1u_16V_X7R_04
1u_6.3V_X5R_04
VDD3
R129 PU 10K on EC side VDD3 15,16,17,19,20,22,23,33,37,38,41,42,43,45,46,49
*10K_04
0.1u_16V_X7R_04
Stanley 0104 LAN WAKE UP
PCIE_RXP19_GLAN1
PCIE_RXP19_GLAN1 16
ONLY FOR SWR MODE R155 0_04 PCIE_RXN19_GLAN1
LAN_WAKEUP# 22,37 PCIE_RXN19_GLAN1 16
(no stuff)
C257
C230
AVDDVCO_A
PCIE_TXP19_GLAN1
0.1u_16V_X7R_04
C228 *4.7u_6.3V_X5R_06
PCIE_TXP19_GLAN1 16
*1u_6.3V_X5R_04
ȱȱŚŖ L12
La
LX_A LAN_WAKEUP#_A C A PCIE_WAKE#
PCIE_TXN19_GLAN1
PCIE_TXN19_GLAN1 16
PCIE_TXN19_GLAN1
PCIE_TXP19_GLAN1
C227
*BCMC252012-4R7SM D13 RB751S-40H CLK_PCIE_GLAN1# 18
CLK_PCIE_GLAN1#
CLK_PCIE_GLAN1
C258 C259 C260
FOR S5 WAKE UP ON LAN CLK_PCIE_GLAN1 18
Cc Cb Ca Modify value,4/20 Tim
*1000P_50V_X7R_04 *0.1u_16V_X7R_04 *10u_6.3V_X5R_06
AVDDVCO_A
LED_LINK_A
LED_ACT_A
DVDDL_A
AVDDL_A
Modify,4/11 Tim
LX_A
C229
C256
DVDDL_A
41
40
39
38
37
36
35
34
33
32
31
U15
If AVDDL/DVDDL comes from internal SWR:
Sheet 36 of 58
GND
LX
RX_P
LED[1]
LED[0]
DVDDL_REG
RX_N
AVDDL
REFCLK_P
REFCLK_N
AVDDL
mount La,Ca,Cb,Cc
If AVDDL/DVDDL comes from internal LDO:
no mount La,Ca,Cb,Cc
C BUF_PLT_RST# R154
VDD3_1 1
*10mil_short RSTn_A 2 VDD33 TX_P
30
29
C226
C225
0.1u_16V_X7R_04 PCIE_RXP19_GLAN1
0.1u_16V_X7R_04 PCIE_RXN19_GLAN1 C
LAN_1 E2400
LAN_WAKEUP#_A 3 PERSTn TX_N 28
CLKREQn_A
DEBUGMODE[0]_A 5
AVDDL_A
4
6
WAKEn
CLKREQn
DEBUGMODE[0]
Atheros NC
TESTMODE[2]
TESTMODE[1]
27
26
25
XTLO_A 7 AVDDL_REG TESTMODE[0] 24 R126 *499_04 PPS_A PPS_A is used for IEEE 1588 timing synchronization and
VDD3_1
R128 4.7K_04 CLKREQn_A C207 C204
1u_6.3V_X5R_04 0.1u_16V_X7R_04
XTLI_A
AVDDH_A
RBIAS_A
8
9
10
XTLO
XTLI
AVDDH_REG
RBIAS
E2400 PPS
LED[2]
AVDDH
TRXN3
23
22
21
LED2_A
AVDDH_A C201 0.1u_16V_X7R_04
is an output pin to output an accurate 1Hz clock.
Currently this pin can be floating.
VDD3_1 R127 30K_1%_04 DEBUGMODE[0]_A
R113
2.37K_1%_04
AVDD33
AVDDL
AVDDL
>ͺ>/E<ͺ
TRXN0
TRXN1
TRXN2
TRXP0
TRXP1
TRXP2
TRXP3
C202 C203
/ĨƐǁŝƚĐŚƌĞŐƵůĂƚŽƌĂƉƉůŝĞĚ͕ŵŽƵŶƚZĂ
VDD3_1
R719 ONLY FOR SWR MODE
0.1u_16V_X7R_04 1u_6.3V_X5R_04 (no stuff)
E2400 /Ĩ>KĂƉƉůŝĞĚ͕ŵŽƵŶƚZď
11
12
13
14
15
16
17
18
19
20
Modify,3/12 Tim
0.1u_16V_X7R_04 AVDDL_A
0.1u_16V_X7R_04 AVDDL_A
MDI3+_A
LDO MODE
MDI0+_A
MDI1+_A
MDI2+_A
MDI3-_A
MDI0-_A
MDI1-_A
MDI2-_A
VDD3_1
R124 R149 R152
VDD3_1
*0_06 ONLY FOR SWR MODE ȱȱŗŜ 4.7K_04 4.7K_04 *4.7K_04
>ͺdͺ
R147 0_06 R148 Re Rc Ra
(no stuff)
0.1u_16V_X7R_04
Lc Lb
1u_6.3V_X5R_04
AVDDVCO_A L10
*BLM18KG601SN1
AVDDL_A L11
*BLM18KG601SN1
DVDDL_A
LED2_A /ĨŚŝŐŚĐŽƌĞǀŽůƚĂŐĞĂƉƉůŝĞĚ͕ŵŽƵŶƚZĐ
600ohm/1.3A LED_ACT_A ZĞĐŽŵŵĞŶĚƚŽƵƐĞŚŝŐŚĐŽƌĞǀŽůƚĂŐĞŵŽĚĞĨŽƌϮϮϬϭͲ͘
LED_LINK_A
If AVDDL/DVDDL comes from internal SWR: mount Lb;
If AVDDL/DVDDL comes from internal LDO: no mout Lb /ĨůŽǁĐŽƌĞǀŽůƚĂŐĞĂƉƉůŝĞĚ͕ŵŽƵŶƚZĚ
R125 R150 R151
*10K_04 *10K_04 10K_04
C188
C189
C190
C187
Rf Rd Rb
>Ϯͺ
Adj value,6/8 Tim
/ĨϮϱD,ǌĐůŽĐŬĂƉƉůŝĞĚ͕ŵŽƵŶƚZĞ
B C206 18P_50V_NPO_04 XTLO_A /ĨϰϴD,ǌĐůŽĐŬĂƉƉůŝĞĚ͕ŵŽƵŶƚZĨ B
3 4
X1
2 1 FSX3L 25MHZ
C205 18P_50V_NPO_04 XTLI_A
Cd
C191 *5P_50V_NPO_04
L57
An external clock source can be used in place of a crystal. NMDI0+_A 13 12 MDI0+_A C121 *470P_50V_X7R_04
MX4- TD4-
The value of Cd depends on the voltage of clock source. NMDI0-_A 14
MX4+ TD4+
11 MDI0-_A
NMDI1+_A 16 9 MDI1+_A C122 *10u_6.3V_X5R_06
For detailed information, please refer to the design guide. NMDI1-_A 17 MX3- TD3- 8 MDI1-_A
MX3+ TD3+ C59 *0.1u_16V_X7R_04
8/4 EMI
NMDI2+_A 19 6 MDI2+_A
choke modify short for EMI, MX2- TD2-
6/11 Tim NMDI2-_A 20 5 MDI2-_A
NMDI3+_A 22 MX2+ TD2+ 3 MDI3+_A C60 *10u_6.3V_X5R_06
NMDI3-_A 23 MX1- TD1- 2 MDI3-_A
NMDI0-_A_R 2 L1 1 NMDI0-_A MX1+ TD1+ C58 *470P_50V_X7R_04
15 10 G1_GND GND
J_RJ1 NMDI0+_A_R 3 4 NMDI0+_A MCT4 TCT4
18 7
NMDI0+_A_R 1 GND1 *WCM2012F2S-161T03-short 21 MCT3 TCT3 4
DA+ shield MCT2 TCT2 G1_GND
NMDI0-_A_R 2 GND2 24 1
NMDI1+_A_R 3 DA- shield NMDI1-_A_R 2 L2 1 NMDI1-_A MCT1 TCT1
NMDI1-_A_R 6 DB+ NS892402
DB- G1_GND
NMDI1+_A_R 3 4 NMDI1+_A
75_04
75_04
75_04
75_04
G1_GND *WCM2012F2S-161T03-short C111 C109 C91 C66 C120 0.1u_16V_X7R_04

NMDI2+_A_R 4 Ce Cf Cg Ch
NMDI2-_A_R 5 DC+ NMDI2-_A_R 2 L3 1 NMDI2-_A C64
DC- *1000P_50V_X7R_04 *1000P_50V_X7R_04 *1000P_50V_X7R_04 *1000P_50V_X7R_04 Ci
R42
NMDI3+_A_R 7
R55
NMDI3-_A_R 8 DD+ NMDI2+_A_R 3 4 NMDI2+_A C110 C92 C90 C65 *1u_6.3V_X5R_04

R65
G1_GND G2_GND
R66
DD-
*WCM2012F2S-161T03-short
A PJS-08SL3B
Main 6-21-B4000-008 NMDI3-_A_R 2 L4 1 NMDI3-_A
0.1u_16V_X7R_04 0.1u_16V_X7R_04 0.1u_16V_X7R_04 0.1u_16V_X7R_04
8/4 EMI A
2nd 6-21-B4070-008 C61
3rd 6-21-B4080-008 NMDI3+_A_R 3 4 NMDI3+_A
*WCM2012F2S-161T03-short
Ce, Cf, Cg, Ch, Ci reserved for EMI.
100P_2KV_NPO_12
G1_GND
G1_GND ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[36] LAN_1 E2400
5 4 3 2 1
LAN_1E2400 B - 37
Schematic Diagrams
LAN_2 E2400
5 4 3 2 1
LAN_2(E2400) LAN POWER PLAN change to VDD3_2,
6/11
Add FOR PDA test VDD3_2

VDD3 6/11 Tim
ȱȱŗ VDD3_2
R1001 *15mil_short
BUF_PLT_RST# R199 Rg *4.7K_04 ȱ ȱ
PCIE_WAKE# R198 *4.7K_04
C344 C347 Rh
C317 C314 C315 BUF_PLT_RST#
Rg,Rh are pull-up resisters, which might not be BUF_PLT_RST# 20,22,23,24,28,33,34,35,36
D 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 0.1u_16V_X7R_04 *1000P_50V_X7R_04 necessary due to existence on motherboard. D

PCIE_WAKE#
Modify,4/11 Tim PCIE_WAKE# 17,28,33,35,36
VDD3_2
0.1u_16V_X7R_04
1u_6.3V_X5R_04
VDD3
VDD3 15,16,17,19,20,22,23,33,36,38,41,42,43,45,46,49
0.1u_16V_X7R_04
R195
*10K_04
PCIE_RXP20_GLAN2
PCIE_RXP20_GLAN2 16
PCIE_RXN20_GLAN2
Stanley 0104 LAN WAKE UP PCIE_RXN20_GLAN2 16
C343
C342
AVDDVCO_B
PCIE_TXP20_GLAN2
0.1u_16V_X7R_04
C339 *4.7u_6.3V_X5R_06
R196 0_04 PCIE_TXP20_GLAN2 16
*1u_6.3V_X5R_04
ȱȱŚŖ La LAN_WAKEUP# 22,36 PCIE_TXN20_GLAN2
PCIE_TXN20_GLAN2 16
LX_B
CLK_PCIE_GLAN2
PCIE_TXN20_GLAN2
PCIE_TXP20_GLAN2
C313
L20 *BCMC252012-4R7SM LAN_WAKEUP#_B C A PCIE_WAKE# FOR S5 WAKE UP ON LAN CLK_PCIE_GLAN2 18
CLK_PCIE_GLAN2#
CLK_PCIE_GLAN2
C368 C345 C346 D16 RB751S-40H CLK_PCIE_GLAN2#
Cc Cb Ca CLK_PCIE_GLAN2# 18
*1000P_50V_X7R_04 *0.1u_16V_X7R_04 *10u_6.3V_X5R_06
AVDDVCO_B
LED_LINK_B
LED_ACT_B
DVDDL_B
AVDDL_B
Modify,4/11 Tim
LX_B
C340
C341
DVDDL_B
41
40
39
38
37
36
35
34
33
32
31
Sheet 37 of 58 If AVDDL/DVDDL comes from internal SWR:
U20
GND
LX
LED[1]
LED[0]
DVDDL_REG
RX_N
RX_P
AVDDL
REFCLK_P
REFCLK_N
AVDDL
mount La,Ca,Cb,Cc
If AVDDL/DVDDL comes from internal LDO:
LAN_2 E2400 no mount La,Ca,Cb,Cc
C BUF_PLT_RST# R197
VDD3_2 1
*10mil_short RSTn_B
LAN_WAKEUP#_B 3
2 VDD33
PERSTn
TX_P
TX_N
30
29
28
C312
C311
0.1u_16V_X7R_04
0.1u_16V_X7R_04
PCIE_RXP20_GLAN2
PCIE_RXN20_GLAN2 C
CLKREQn_B
DEBUGMODE[0]_B 5
AVDDL_B
4
6
WAKEn
CLKREQn
DEBUGMODE[0]
Atheros NC
TESTMODE[2]
TESTMODE[1]
27
26
25
XTLO_B 7 AVDDL_REG TESTMODE[0] 24 R192 *499_04 PPS_B PPS_B is used for IEEE 1588 timing synchronization and
VDD3_2 R194 4.7K_04 CLKREQn_B C316 C672
1u_6.3V_X5R_04 0.1u_16V_X7R_04
XTLI_B
AVDDH_B
RBIAS_B
8
9
10
XTLO
XTLI
AVDDH_REG
RBIAS
E2400 PPS
LED[2]
AVDDH
TRXN3
23
22
21
LED2_B
AVDDH_B C691 0.1u_16V_X7R_04
is an output pin to output an accurate 1Hz clock.
Currently this pin can be floating.
VDD3_2 R193 30K_1%_04 DEBUGMODE[0]_B
R166
2.37K_1%_04
AVDD33
AVDDL
AVDDL
>ͺ>/E<ͺ
TRXN0
TRXN1
TRXN2
TRXP0
TRXP1
TRXP2
TRXP3
C690 C689
/ĨƐǁŝƚĐŚƌĞŐƵůĂƚŽƌĂƉƉůŝĞĚ͕ŵŽƵŶƚZĂ
VDD3_2
0.1u_16V_X7R_04 1u_6.3V_X5R_04
E2400 /Ĩ>KĂƉƉůŝĞĚ͕ŵŽƵŶƚZď
11
12
13
14
15
16
17
18
19
20
Modify,3/12 Tim
0.1u_16V_X7R_04 AVDDL_B
0.1u_16V_X7R_04 AVDDL_B
LDO MODE
MDI3+_B
MDI0+_B
MDI1+_B
MDI2+_B
MDI3-_B
MDI0-_B
MDI1-_B
MDI2-_B
VDD3_2
R165 R242 R244
VDD3_2
ȱȱŗŜ 4.7K_04 4.7K_04 *4.7K_04
>ͺdͺ
R211 0_06 R240 *0_06 Re Rc Ra
0.1u_16V_X7R_04
Lc Lb
1u_6.3V_X5R_04
AVDDVCO_B L18
*BLM18KG601SN1
AVDDL_B L19
*BLM18KG601SN1
DVDDL_B
LED2_B /ĨŚŝŐŚĐŽƌĞǀŽůƚĂŐĞĂƉƉůŝĞĚ͕ŵŽƵŶƚZĐ
600ohm/1.3A LED_ACT_B ZĞĐŽŵŵĞŶĚƚŽƵƐĞŚŝŐŚĐŽƌĞǀŽůƚĂŐĞŵŽĚĞĨŽƌϮϮϬϭͲ͘
LED_LINK_B
If AVDDL/DVDDL comes from internal SWR: mount Lb; /ĨůŽǁĐŽƌĞǀŽůƚĂŐĞĂƉƉůŝĞĚ͕ŵŽƵŶƚZĚ
If AVDDL/DVDDL comes from internal LDO: no mout Lb R191 R241 R243
*10K_04 *10K_04 10K_04
C674
C673
C675
C671
Rf Rd Rb
>Ϯͺ
Adj value,6/8 Tim
/ĨϮϱD,ǌĐůŽĐŬĂƉƉůŝĞĚ͕ŵŽƵŶƚZĞ
B C290 18P_50V_NPO_04 XTLO_B /ĨϰϴD,ǌĐůŽĐŬĂƉƉůŝĞĚ͕ŵŽƵŶƚZĨ B
3 4
X2
2 1 FSX3L 25MHZ
C289 18P_50V_NPO_04 XTLI_B
L58 C157 *470P_50V_X7R_04
Cd C125 *10u_6.3V_X5R_06
NMDI0+_B 13 12 MDI0+_B
C288 *5P_50V_NPO_04 NMDI0-_B 14 MX4- TD4- 11 MDI0-_B
NMDI1+_B 16 MX4+ TD4+ 9 MDI1+_B C124 *0.1u_16V_X7R_04
NMDI1-_B 17 MX3- TD3- 8 MDI1-_B
8/4 EMI
MX3+ TD3+ C156 0.1u_16V_X7R_04
An external clock source can be used in place of a crystal.
The value of Cd depends on the voltage of clock source. NMDI2+_B 19 6 MDI2+_B C158 *10u_6.3V_X5R_06
For detailed information, please refer to the design guide. NMDI2-_B 20 MX2- TD2- 5 MDI2-_B
NMDI3+_B 22 MX2+ TD2+ 3 MDI3+_B C123 *470P_50V_X7R_04
NMDI3-_B 23 MX1- TD1- 2 MDI3-_B
MX1+ TD1+ G2_GND GND
15 10
choke modify short for EMI, 18 MCT4 TCT4 7
6/11 Tim MCT3 TCT3 G2_GND
21 4
24 MCT2 TCT2 1
NMDI0-_B_R 2 L5 1 NMDI0-_B MCT1 TCT1
NS892402
J_RJ2 NMDI0+_B_R 3 4 NMDI0+_B
75_04
75_04
75_04
75_04
NMDI0+_B_R 1 GND1 *WCM2012F2S-161T03-short C147 C146 C137 C131
NMDI0-_B_R 2 DA+ shield GND2 Ce Cf Cg Ch C149
NMDI1+_B_R 3 DA- shield
DB+ NMDI1-_B_R 2 L6 1 NMDI1-_B *1000P_50V_X7R_04 *1000P_50V_X7R_04 *1000P_50V_X7R_04 *1000P_50V_X7R_04 Ci
NMDI1-_B_R 6
R79
R80
R88
R87
DB- C148 C138 C136 C130 *1u_6.3V_X5R_04

G2_GND NMDI1+_B_R 3 4 NMDI1+_B
NMDI2+_B_R 4 *WCM2012F2S-161T03-short 0.1u_16V_X7R_04 0.1u_16V_X7R_04 0.1u_16V_X7R_04 0.1u_16V_X7R_04
NMDI2-_B_R 5 DC+ G2_GND
DC- NMDI2-_B_R 2 L7 1 NMDI2-_B
NMDI3+_B_R 7
NMDI3-_B_R 8 DD+
NMDI2+_B_R 3 4 NMDI2+_B C159
DD-
Ce, Cf, Cg, Ch, Ci reserved for EMI.
A PJS-08SL3B
Main 6-21-B4000-008
*WCM2012F2S-161T03-short 100P_2KV_NPO_12 A
NMDI3-_B_R 2 L8 1 NMDI3-_B
2nd 6-21-B4070-008 G2_GND
3rd 6-21-B4080-008 NMDI3+_B_R 3 4 NMDI3+_B
*WCM2012F2S-161T03-short G2_GND
Title
[37] LAN_2 E2400
5 4 3 2 1
B - 38 LAN_2 E2400
Schematic Diagrams
Click, Finger Conn

5 4 3 2 1
FOR POWER SWITCHLED BOARD 5VS FOR CLICK,FINGER BOARD
FOR ESD枸䔁
C369 *10u_6.3V_X5R_06
J_CLICK1
TO POWER LED BOARD 3.3VS 1 C370 1u_6.3V_X5R_04 TP_DATA *V15AVLC0402 2 1 D17
2 3.3VS TP_CLK *V15AVLC0402 2 1 D18
3 C352 1u_6.3V_X5R_04 TP_SMB_DATA *V15AVLC0402 2 1 D38
J_PWR1 5VS
4 TP_SMB_CLK *V15AVLC0402 2 1 D37
1 FOR NEW POWER SWITCH B'D, 5
2 5/7 Tim 6
3 7 Modify,3/19 Tim
Modify pin define R249 0_04
4 LED_CT1 8 TP_DATA 23 3.3VS
LED_CT1 23 6/16 Tim R250 0_04
5 PCH_HDD_LED 9 TP_CLK 23
6 PCH_HDD_LED 34 10 TP_SMB_DATA R251 *0_04
7 TP_I2C_DATA 15
D 11 TP_SMB_CLK R252 *0_04 D
C751
C753
C752
8 M_BTN# 12 TP_I2C_CLK 15
9 M_BTN# 41 13
LID_SW# R222 R221
10 LID_SW# 13,22 14 USB_PP7 19
LED1_PS1 23 TP_SMB_DATA R639 2.2K_04 3.3VS
11 15 USB_PN7 19 10K_04 10K_04
*10u_10V_Y5V_08
0.1u_10V_X7R_04
1u_6.3V_X5R_04
12 LED1_PS2 23 16 TP_SMB_CLK R638 2.2K_04
13 LED1_PS3 23 17 LED_BAT_CHG 22 TP_CLK TP_DATA
14 LED1_PS4 23 18 LED_BAT_FULL 22 FOR TP I2C interface,6/6 Tim
15 LED1_PS5 23 NC1 19 C354 C353
16 LED1_PS6 23 NC2 20
17 LED1_PS7 23 21 LED_PWR 22 5VS C804
VDD3 47p_50V_NPO_04 47p_50V_NPO_04
18 VDD5 22 LED_ACIN 22 0.1u_10V_X7R_04
NC1 19 3.3VS
FP225H-02261BM
NC2 20
G
21 6-20-94K10-022 Q39
close conn,1/22 Tim
22 MTN7002ZHS3
Modify,3/30 Tim C805
FP225H-02261BM TP_SMB_DATA S D PCH_SMB_DATA 14,15,17
FOR NEW POWER SWITCH B'D,
10u_6.3V_X5R_06
G
6-20-94K10-022 5/7 Tim Q38
Modify,3/31 Tim MTN7002ZHS3
TP_SMB_CLK S D PCH_SMB_CLK 14,15,17
Modify,4/20 Tim
Sheet 38 of 58
2
H32
2
H34
2
H35 Click, Finger Conn
3 3 3
C FOR AUDIO BOARD
4
5
1 4
5
1 4
5
1
Modify,6/4 Tim
C
3.3VS MTH8_0D2_8 MTH8_0D2_8 MTH8_0D2_8
J_AUDIO1
H51 H14 H33
2 H36 H31
1 2 2
3 2 2
2 Modify pin define,6/11 Tim 3 3
4 1 3 3
3 4 1 4 1 1 1
HDA_BITCLK 17 5 4 4
4 5 5 5 5
5
NC2 6 HDA_SDOUT 17 MTH8_0D2_8 MTH8_0D2_8 MTH8_0D2_8
HDA_SDIN0 17 MTH8_0D2_8 MTH8_0D2_8
7
NC1 8 HDA_SYNC 17 Modify,6/10 Tim
9 HDA_RST# 17 H25 H4 H5
PCH_SMB_CLK H7 H12 H28
10 2 2 2
PCH_SMB_DATA 2 2 2
11 枸䔁暣旣㓦⮷㜧, 3 3 3
AMP_EN 3 3 3
㍍GND,6/16 Tim 12 6/14 Tim
3.3VS Add,3/4 Tim 4
5
1 4
5
1 4 1 4 1 4 1 4 1
5 5
FP225H-012S10M 5 5
MTH8_0D2_8 MTH8_0D2_8 MTH8_0D2_8
6-20-94K50-012 MTH8_0D2_8 MTH8_0D2_8 MTH8_0D2_8
C894
Modify,4/21 Tim AMP_EN R778
*0.1u_10V_X5R_04 Modify,6/4 Tim Modify,4/17 Tim
100K_1%_04 M3 M6 M7 H29 H38 H20 H44 H26 H19 H45 H47 H48 H49
M-MARK M-MARK M-MARK H6_0D3_2 H6_0D3_2 H6_0D3_7 H6_0D3_7 H6_0D3_7 H6_0D3_7 H6_0D3_7 H6_0D4_0 H6_0D4_0 H6_0D4_0
3.3V C A
22 KBC_MUTE#
D48
RB751V-40(lision)
J_AUDIO3 C A Reserve for AMP_EN deley
17,20,22,23,27,28,41,42,43,44 SUSB#
SMC_VGA_THERM 11,22,26 D47
1 for bo sound
SMD_VGA_THERM 11,22,26 RB751V-40(lision)
2 Stanley C A
3 19 PCH_MUTE#
D46 M1 M2 M4
B 4 U55
B
5
*RB751V-40(lision) R779 M-MARK Modify,4/14 Tim

5 PCM_INT_1863 15 M-MARK M-MARK
R777 *0_04 1 0_04 Modify,6/10 Tim Modify,6/8 Tim ME modify,6/8 Tim
6
4 AMP_EN
FP225H-006S10M HDA_RST# 2 H50 H24 H27 H11 H17 H18 H10 H21 H46
PCB Footprint = fp225h-006xxxm H8_0D2_8 H8_0D2_8 H12_0D2_8 H8_0D5_8 H8_0D5_8 H8_0D5_8 H8_0D5_8 H12_0B8_0D2_8 H6_0D4_0
R759 C888
TC7SZ08FU
3
Add 6pin conn,

6/14 Tim *47K_04
Modify value,4/20 Tim *0.1u_16V_Y5V_04
M8 M5 M9
M-MARK M-MARK M-MARK
Follow TI recommend,4/14 Tim
H3 H1 H43 H13 H41 H23 H22 H15

C110D110N C110D110N C110D110N C158D158N C110D110N C158D158N C158D158N C158D158N
AMP_PWR
J_AUDIO2 M11 M12
M10
1 M-MARK M-MARK M-MARK
2
3
4
5
6
7 Add,4/16 Tim
8 5V H2 H42 H30 H37 H8 H9 H39
9 C79D79N C79D79N C79D79N C79D79N C79D79N C79D79N C79D79N
10
11
12 5VS
13
14 D44
15 Modify pin define Remove H6,H16,6/10 Tim
6/16 Tim A 1
16 KBC_BEEP 22
BEEP 3 C
17 A 2
A NC1
18
19
MIC_CLK 27
MIC_DATA 27
HDA_SPKR 17,18
A
BAT54CWH
NC2 20
21 Modify value,4/20 Tim
22 VIN
FP225H-02261BM Modify,6/4 Tim
6-20-94K10-022 2,13,14,16,24,29,33,41,42,44,46 3.3V
Modify,3/30 Tim 11,12,13,22,41,42,43,44,45,46,47,48,49 VIN
27,41,44,49 VDD5
Title
11,12,14,20,26,30,40,41,43,44,46,47,48 5V
43 AMP_PWR [38] CLICK,FINGER CONN
15,16,17,19,20,22,23,33,36,37,41,42,43,45,46,49 VDD3
11,12,13,14,15,22,25,39,41,44 5VS
Click, Finger Conn B - 39

Schematic Diagrams
HDD & Second HDD
5 4 3 2 1
D
SATA(HDD1& HDD2) D
J_HDD1
S1
S2 SATATXP2 C862 0.01u_16V_X7R_04
PCIE_TXP17_HDD1 16
S3 SATATXN2 C861 0.01u_16V_X7R_04
PCIE_TXN17_HDD1 16
S4
S5 SATARXN2 C860 0.01u_16V_X7R_04 PCIE_RXN17_HDD1 16

S6 SATARXP2 C859 0.01u_16V_X7R_04 PCIE_RXP17_HDD1 16
S7
3.3VS
P1
P2
P3 C456 C439
P4
Sheet 39 of 58 P5
P6
P7
*0.01u_16V_X7R_04 *10u_6.3V_X5R_06
5VS
P8
HDD & Second

Add,6/12 Tim
P9
P10
P11
P12 C457 C441 C440 C426
HDD
+
P13 C951 C952
C
P14 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 22u_6.3V_X5R_08 22u_6.3V_X5R_08 *EEFCX0J221YR C
P15
C166JH-12209-L
Modify(㕁嘇⼭䡢娵),4/2 Tim
J_HDD2
S1
S2 SATATXP3 C442 0.01u_16V_X7R_04 PCIE_TXP18_HDD2 16
S3 SATATXN3 C443 0.01u_16V_X7R_04
S4 PCIE_TXN18_HDD2 16
S5 SATARXN3 C444 0.01u_16V_X7R_04
PCIE_RXN18_HDD2 16
S6 SATARXP3 C445 0.01u_16V_X7R_04
PCIE_RXP18_HDD2 16
B S7 B
3.3VS
P1
P2
P3 C460 C446
P4
P5 *0.01u_16V_X7R_04 *10u_6.3V_X5R_06
P6
P7 5VS
P8
Add,6/12 Tim
P9
P10
P11
P12 C461 C448 C447
P13 C953 + C449
C954
P14 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 22u_6.3V_X5R_08 22u_6.3V_X5R_08
P15 *EEFCX0J221YR
C166JH-12209-L
Modify(㕁嘇⼭䡢娵),4/2 Tim
A A
Title
[39] HDD&2nd HDD
7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,41,43,44,46,47 3.3VS
11,12,13,14,15,22,25,38,41,44 5VS Size Document Number Rev
A3 SCHEMATIC1 6-71-P8700-D03 1.0

5 4 3 2 1
B - 40 HDD & Second HDD

Schematic Diagrams
USB Port
5 4 3 2 1
USB3.0 PORT2
USB3.0 PORT3
USBVCC3.0_2
USBVCC3.0_3
100 MIL
U19 100 MIL
3 1 C310 C309
D 5V
5
OC#
VIN
VOUT
0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 3
U14
OC# VOUT
1 C178 C179 D
4 2 5 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
EN# GND 5V VIN
C287
10u_6.3V_X5R_06 SY6288D20AAC 2/11 Tim ken 0604 D12 4 2
PCB Footprint = M-SOT23-5A C170 EN# GND D10
10u_6.3V_X5R_06 SY6288D20AAC 2/11 Tim 6 5 Modify,4/17 Tim
2A/90mohm C286 *220u_6.3V_6.3*6.3*4.2 USB3_TXP2_R 10 1 USB3_TXP2_RJ ken 0604
+
PCB Footprint = M-SOT23-5A 7 4
USB3_TXN2_R 9 2 USB3_TXN2_RJ 8 3
R190 *10mil_short_04 2A/90mohm
27,40,41,44 DD_ON# 8 3 C169 *220u_6.3V_6.3*6.3*4.2
+
C253 22u_6.3V_X5R_08 USB_PP3_R 9 2 USB_PP3_RJ
USB3_RXP2 7 4 USB3_RXP2_RJ USB_PN3_R 10 1 USB_PN3_RJ
R101 *10mil_short_04
USB3_RXN2 6 5 USB3_RXN2_RJ 27,40,41,44 DD_ON#
C224 22u_6.3V_X5R_08 C168 22u_6.3V_X5R_08
USBVCC3.0_2
PUSB3F96 swap ,1/13 C167 22u_6.3V_X5R_08 PUSB3F96
D15 USBVCC3.0_3
J_USB3_2 D6
CLOSE TO CONNECTOR USB_PP2_R 6 5 USB_PP2_RJ
USB3_RXN3 6 5 USB3_RXN3_RJ
C254 0.1u_10V_X7R_04 USB3_TXP2_R USB3_TXP2_RJ 9 GND1 USB_PN2_R 7 4 USB_PN2_RJ J_USB3_3
19 USB3_TXP2 USB3_RXP3 7 4 USB3_RXP3_RJ
SSTX+ SHIELD 8 3 CLOSE TO CONNECTOR
Standard-A
1 8 3
C255 0.1u_10V_X7R_04 USB3_TXN2_R USB3_TXN2_RJ 8 VBUS GND2 9 2 C176 0.1u_10V_X7R_04 USB3_TXP3_R USB3_TXP3_RJ 9 GND1
19 USB3_TXN2 SSTX- SHIELD 19 USB3_TXP3 SSTX+ SHIELD USB3_TXN3_R 9 2 USB3_TXN3_RJ
10 1
Standard-A
19 USB_PN2 4 3 USB_PN2_R USB_PN2_RJ 2 1 USB3_TXP3_R 10 1 USB3_TXP3_RJ
L16 4 D- GND3 C177 0.1u_10V_X7R_04 USB3_TXN3_R USB3_TXN3_RJ 8 VBUS GND2
GND SHIELD 19 USB3_TXN3 SSTX- SHIELD
1 2 *WCM2012F2S-161T03-short USB_PP2_R USB_PP2_RJ 3 19 USB_PN3 4 3 USB_PN3_R USB_PN3_RJ 2
19 USB_PP2 D+ PUSB3F96 D-
USB3_RXP2 USB3_RXP2_RJ 6 GND4 L9 4 GND3 PUSB3F96
19 USB3_RXP2 SSRX+ SHIELD GND SHIELD
7 1 2 *WCM2012F2S-161T03-short USB_PP3_R USB_PP3_RJ 3
GND_D 19 USB_PP3 D+
USB3_RXN2 USB3_RXN2_RJ 5 USB3_RXP3 USB3_RXP3_RJ 6 GND4
19 USB3_RXN2 SSRX- 19 USB3_RXP3 SSRX+ SHIELD
EMI暨㯪,3/18 Tim 7
USB3_RXN3 USB3_RXN3_RJ 5 GND_D
19 USB3_RXN3 SSRX-
C19009-90905-L
6-21-B4A20-009 C19009-90905-L
Modify,4/2 Tim 6-21-B4A20-009

Modify,4/2 Tim
C C
Sheet 40 of 58
USB3.0 PORT4 USB3.0 PORT5 USB Port
USBVCC3.0_4
USBVCC3.0_5
Modify,3/9 Tim
100 MIL Modify,3/9 Tim
U48
100 MIL
3 1 C788 C787 U6
OC# VOUT
3 1 C12 C13 Modify,4/14 Tim
5 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 OC# VOUT D28
5V VIN
5 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 USB_PN5_R 6 5 USB_PN5_RJ
4 2 5V VIN
EN# GND USB_PP5_R 7 4 USB_PP5_RJ
C829 4 2 8 3
10u_6.3V_X5R_06 SY6288D20AAC 2/11 Tim Modify,4/14 Tim C14 EN# GND
ken 0604 D36 9 2
PCB Footprint = M-SOT23-5A 10u_6.3V_X5R_06 SY6288D20AAC 2/11 Tim ken 0604 10 1
USB_PN4_R 6 5 USB_PN4_RJ
2A/90mohm C825 *220u_6.3V_6.3*6.3*4.2 PCB Footprint = M-SOT23-5A
+
USB_PP4_R 7 4 USB_PP4_RJ
2A/90mohm C480 *220u_6.3V_6.3*6.3*4.2
+
R660 *10mil_short_04 8 3
27,40,41,44 DD_ON# 9 2 PUSB3F96
C813 22u_6.3V_X5R_08 R8 *10mil_short_04
10 1 27,40,41,44 DD_ON# C481 22u_6.3V_X5R_08 D1
B USBVCC3.0_4
C814 22u_6.3V_X5R_08
PUSB3F96
USBVCC3.0_5
C482 22u_6.3V_X5R_08
USB3_RXN5
USB3_RXP5
6
7
8
5
4
3
USB3_RXN5_RJ
USB3_RXP5_RJ B
J_USB3_4 D19 USB3_TXN5_R 9 2 USB3_TXN5_RJ
CLOSE TO CONNECTOR USB3_RXN4 USB3_RXN4_RJ
J_USB3_5 USB3_TXP5_R 10 1 USB3_TXP5_RJ
6 5
C363 0.1u_10V_X7R_04 USB3_TXP4_R USB3_TXP4_RJ 9 GND1 USB3_RXP4 7 4 USB3_RXP4_RJ
CLOSE TO CONNECTOR
19 USB3_TXP4 SSTX+ SHIELD
Standard-A
1 8 3 C11 0.1u_10V_X7R_04 USB3_TXP5_R USB3_TXP5_RJ 9 10
Standard-A
C362 0.1u_10V_X7R_04 USB3_TXN4_R USB3_TXN4_RJ 8 VBUS GND2 19 USB3_TXP5 SSTX+ SHIELD PUSB3F96
19 USB3_TXN4 USB3_TXN4_R 9 2 USB3_TXN4_RJ 1 11
1 2 USB_PN4_R USB_PN4_RJ 2 SSTX- SHIELD VBUS SHIELD
19 USB_PN4 USB3_TXP4_R 10 1 USB3_TXP4_RJ C10 0.1u_10V_X7R_04 USB3_TXN5_R USB3_TXN5_RJ 8
L31 4 D- GND3 19 USB3_TXN5 SSTX-
19 USB_PN5 1 2 USB_PN5_R USB_PN5_RJ 2
4 3 *WCM2012F2S-161T03-short USB_PP4_R USB_PP4_RJ 3 GND SHIELD D-
19 USB_PP4 L29 4
USB3_RXP4 USB3_RXP4_RJ 6 D+ GND4 GND
19 USB3_RXP4 PUSB3F96 4 3 *WCM2012F2S-161T03-short USB_PP5_R USB_PP5_RJ 3
7 SSRX+ SHIELD 19 USB_PP5 D+
USB3_RXP5 USB3_RXP5_RJ 6
USB3_RXN4 USB3_RXN4_RJ 5 GND_D 19 USB3_RXP5 SSRX+
19 USB3_RXN4 7 GND1
SSRX- GND_D SHIELD
USB3_RXN5 USB3_RXN5_RJ 5 GND2
19 USB3_RXN5 SSRX- SHIELD
C19009-90905-L
93-0022-02
6-21-B4A20-009
Modify,4/2 Tim 6-20-B4A30-009
Modify,6/19 Tim
A A
Title
[40] USB PORT_2_3_4_5
5V 11,12,14,20,26,30,38,41,43,44,46,47,48 Size Document Number Rev
5 4 3 2 1
USB Port B - 41
Schematic Diagrams
5VS, 3.3VS, 1.0 V Series

5 4 3 2 1
VIN1
U9 close to P2808B0
R73 10K_04 1 8 R52 100K_04 DD_ON VIN1 VA VIN
VA VA VIN1
Follow℔䓐䶂嶗, R74 1_06 2 7 R51 *100K_04 USB_CHARGE_EN 2/27 Tim
VIN VIN DD_ON_LATCH C108 C128 C129
3/16 Tim
R75 10K_04 3 6 R54 10K_04
38 M_BTN# M_BTN# PWR_SW# VDD3 0.1u_50V_Y5V_06 0.1u_50V_Y5V_06 0.1u_50V_Y5V_06 Modify 5V,2/27 Tim
R76 *100K_04 4 5 R53 1K_1%_04 VDD5 VDD5
INSTANT-ON GND PWR_SW# 22,23
22,27,49 USB_CHARGE_EN R77 1K_1%_04 C549 U42 EM5209 C545
P2808B0
5V 0.1u_16V_Y5V_04 1
2 IN1
IN1
IN2
IN2
6
7
0.1u_16V_Y5V_04 5V
D 5V
6A 13
14 OUT1 OUT2
8
9
6A 5V D
C558 OUT1 OUT2 C555
12 10
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04
VBIAS
For CV test
GND
GND
C556
EN1
EN2
C557
VDD3 220p_50V_NPO_04 220p_50V_NPO_04
VDD3 PR85 10K_04 VDD3_R 1 2
15
11
5
convert PJ27
R670 *CV-40mil R83
10K_04
10K_04 DD_ON 1 2 DD_ON_EN R84 DD_ON_EN
VDD5
VCCST_VCCPLL 10K_04
DD_ON# PJ25 C548 C547 C546
DD_ON# 27,40,44
OPEN_4mil 1u_6.3V_X5R_04
D
Q41 DEFAULT *0.1u_10V_X7R_04 *0.1u_10V_X7R_04
G MTN7002ZHS3 C831
22,27,49 DD_ON VDD3
3.3VA R522 ON
S
*0.1u_16V_Y5V_04
R658 1 2
16,17,22,41,49 SLP_SUS#
R391 R392 *100_04 PJ26
100K_04 2/27 Tim OPEN_4mil
VDD3 10K_04
100_04
SLP_SUS
D
3
D Q29
6
R657 D
Sheet 41 of 58
Follow common design,
6/8 Tim 5 G Q25B G
42 SUSC
100K_04 SLP_SUS#2 G S MTDK5S6R *MTN7002ZHS3
Q25A
S
4
S Modify value,
MTDK5S6R
1
SUSB 8/14 Tim
SUSB 11,14,31,32,44
D
5VS, 3.3VS, 1.0V C
17,20,22,23,27,28,38,42,43,44 SUSB#
G
Q40
MTN7002ZHS3 C826 㓡ᶲẞ,6/14 Tim 2/10
S
*0.1u_16V_Y5V_04 㓦暣徜嶗枸䔁ᶵᶲ
㓦暣徜嶗枸䔁ᶵᶲ VDD3 VDD3
Series
R664
C487 U37 EM5209 C486
100K_04
3.3VS_2 0.1u_16V_Y5V_04 1
2 IN1
IN1
IN2
IN2
6
7
0.1u_16V_Y5V_04
3.3VS
3.3VS_2
6A 13
14 OUT1 OUT2
8
9
6A 3.3VS
C491 OUT1 OUT2 C488
12 10
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04
VBIAS
DEFAULT
GND
GND
EN1
EN2
C490 C489
DEFAULT
220p_50V_NPO_04 220p_50V_NPO_04
2 1 SUSB#_EN
15
11
5
PJ53
R477 OPEN_4mil
10K_04
3.3VS_EN R478 3.3VS_EN 2 1 VDD3_R
VDD3
10K_04
C485 C484 C483 PJ54
1u_6.3V_X5R_04 *CV-40mil
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04 For CV test
3.3VA VCCST_VCCPLL
VDD3 1.0VA
ken 0604 C899 U59 EM5209 C901
0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04
2 IN1 IN2 7
IN1 IN2
3.3VA
6A 13
14 OUT1 OUT2
8
9
6A VCCST_VCCPLL
C900 OUT1 OUT2 C906 Cancel VDDQ廱9&&3//B2&$GG967LP
B 0.1u_16V_Y5V_04
12
CT1 CT2
10
0.1u_16V_Y5V_04
VDD3 VDD5
B
VBIAS
GND
GND
EN1
EN2
DEFAULT C902 C903
DEFAULT C554 U43 EM5209 C550
220p_50V_NPO_04 220p_50V_NPO_04
VDD3_R 1 2
2 1
SUSC# 17,22,23,42,43,44
3.3V 0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04
5VS
3
15
11
2 IN1 IN2 7
PJ74 IN1 IN2
PJ77
*CV-40mil
R811
10K_04
OPEN_4mil
3.3V
6A 13
14 OUT1 OUT2
8
9
6A 5VS
1 2 R810 2 1 VDD3_R C562 OUT1 OUT2 C559
16,17,22,41,49 SLP_SUS# VDD3
OPEN_4mil 10K_04 12 10
C904 C898 C905 PJ75 0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04
PJ76
VBIAS
1u_6.3V_X5R_04 *CV-40mil
For CV test
GND
GND
EN1
EN2
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04 C560
For CV test C561
220p_50V_NPO_04 470p_50V_X7R_04
2 1 VDD3_R
15
11
5
ON PJ24
R544 R82 *CV-40mil
10K_04 10K_04
DD_ON_EN 1 2 VDD5 SUSB#_EN 2 1 SUSB#
PJ21 C553 C552 C551 PJ23

OPEN_4mil 1u_6.3V_X5R_04 OPEN_4mil
VDD3_R1 2
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04 DEFAULT
PJ22
*CV-40mil ON
A A
49 VIN1
3,15,16,17,19,20 3.3VA
34 3.3VS_2
7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,39,43,44,46,47 3.3VS
2,13,14,16,24,29,33,38,42,44,46 3.3V
15,16,17,19,20,22,23,33,36,37,38,42,43,45,46,49 VDD3
27,38,44,49 VDD5
11,12,13,22,38,42,43,44,45,46,47,48,49 VIN
45 VA Title
11,12,14,20,26,30,38,40,43,44,46,47,48 5V
11,12,13,14,15,22,25,38,39,44 5VS
[41] 5VS,3.3VS,1.0V SERIES
17,20,46 1.0VA Size Document Number Rev
3,5,17,45,47 VCCST_VCCPLL Custom SCHEMATIC1 6-71-P8700-D03 1.0
5 4 3 2 1
B - 42 5VS, 3.3VS, 1.0 V Series

Schematic Diagrams
2.5V, 5VS_2
2 1
VIN
PC147 PR119
PC148 EMI REQ,1/22 Tim
4.7u_25V_X5R_08 4.7u_25V_X5R_08 PC146 PC145
0.1u_25V_X7R_06 0.1u_25V_X7R_06
0_06
PC126 2.5V/4A
10
PU8 0.1u_10V_X7R_04 ken 0604
PL5 PJ37 2.5V
BST
PJ41 *CV-40mil
1
VIN LX
8
9
TMPC0603H-1R5M-Z01
1 2
4A *OPEN-5mm
2 1
LX
PC119
PC118
PC120
PR138 100K_04 1 2 15
PC117
VDD3 LX 16
LX
+ DEFAULT
7
VOUT
22u_6.3V_X5R_06
22u_6.3V_X5R_06
0.1u_10V_X7R_04
PJ40 1 2 1mm 13 Short
*330uF_2.5V_12m_6.6*6.6*4.2
17,22,23,41,42,43,44 SUSC# EN PR118
B C430 B
NB671GQ-Z PC121 PC125
POWER暨㯪,
*1u_16V_X7R_04 3
LP# 1/30 Tim
0.1u_10V_X7R_04 *10K_1%_04 *0.1u_25V_X7R_06
VDD3
PR256 12
*10K_1%_04 FB
C
POWER暨㯪,
R308 PD6 1/29 Tim
PR128
10K_04 11 2 31.6K_1%_04
VCC PGND
Sheet 42 of 58
CSOD140SH
PR129
A
SUSC PR255 4 14 PR130 *10K_1%_04
SUSC 41 PG AGND
10K_1%_04 PR127
D
2.5V, 5VS_2
Q22 10K_1%_04
G MTN7002ZHS3 C405
17,22,23,41,42,43,44 SUSC#
PC133
S
*20mil_04
*0.1u_16V_Y5V_04
1/26 月役PIN11
R309
1u_25V_X5R_06
100K_04 NB671_SIGNAL_GND3
NB671_SIGNAL_GND3 NB671_SIGNAL_GND3
VIN
PC115 PR112
PC116 EMI REQ,1/22 Tim
4.7u_25V_X5R_08 4.7u_25V_X5R_08 PC113 PC114
0.1u_25V_X7R_06 0.1u_25V_X7R_06
0_06
PC123 5VS_2/6A
10
PU7 0.1u_10V_X7R_04
PL4 V5S_2 ken 0615 PJ35 5VS_2
BST
1 8 TMPC0603H-1R5M-Z01 *OPEN-5mm
VIN LX
PC110
PJ38 *CV-40mil 9 1 2 2 1
LX
PC109
PC108
PC107
VDD3 PR117 100K_04 1 2 15
LX 16
LX
+ DEFAULT
7
VOUT
22u_6.3V_X5R_06
22u_6.3V_X5R_06
0.1u_10V_X7R_04
220u_6.3V_6.3*6.3*4.2
PJ39 1 2 1mm 13 Short
17,20,22,23,27,28,38,41,43,44 SUSB# EN PR111
C404
NB671GQ-Z PC112 PC122
A *1u_16V_X7R_04 3 A
LP# 0.1u_10V_X7R_04 *10K_1%_04 *0.1u_25V_X7R_06
PR110 12
*10K_1%_04 FB
C
PD15
PR114
11 2 75K_1%_04
VCC PGND
CSOD140SH
PR115
A
PR109 4 14 PR116 *10K_1%_04

*10K_1%_04 PG AGND PR113 25,26 5VS_2
10K_1%_04 2,13,14,16,24,29,33,38,41,44,46 3.3V
5VS_PWRGD 15,16,17,19,20,22,23,33,36,37,38,41,43,45,46,49 VDD3
20 5VS_PWRGD
7,8,9,10 2.5V
PR108 100K_04 PC124 11,12,13,22,38,41,43,44,45,46,47,48,49 VIN
*20mil_04
3.3V 月役PIN11
3/2 Tim
1u_25V_X5R_06
NB671_SIGNAL_GND2
NB671_SIGNAL_GND2
NB671_SIGNAL_GND2
Title
[42] 2.5V,5VS_2
A3 SCHEMATIC1 6-71-P8700-D03 1.0

2 1
2.5V, 5VS_2 B - 43
Schematic Diagrams
AMP10V, VCCSA
2 1
AMP POWER 12V VIN
PL15
AMP_PWR
PU16 PR258 4.7_06 PC227 0.1u_10V_X7R_04 BCIHP0730-4R7M
1 3 4.7UH_6.8*7.3*3.5
PR150
IN BST PCB Footprint = BCIHP0735A 12V/6A
4 2
EN/SYNC SW
PR262 3K_1%_04
PC226
PR257 *100K_1%_04
7 5 PR259
PC229
100K_1%_04 VCC FB
1
4.7u_25V_X5R_08
*0_04
POK
8 9 + +
SS GND
10u_25V_X5R_08
10u_25V_X5R_08
10u_25V_X5R_08
143K_1%_04
*1000p_50V_X7R_04
MP8715DN
180u_16V_6.3*5.8
180u_16V_6.3*5.8
PR151 6
0.1u_25V_X7R_06
2
PC230
PC158
PR260
PC228
100K_1%_04 0.01u_50V_X7R_04 *0.01u_50V_X7R_04
Modify value, ken ,1/13
PR263
PC217
PC219
PC218
B 8/14 Tim B
PC224
PC223
PQ27A 100K_1%_04
3
MTDK5S6R D D AMP POWER->12V Modify value
10K_1%_04
PR152 6/18 Tim
PR275 0_04 2G 5G
17,20,22,23,27,28,38,41,42,44 SUSB# S 100K_1%_04 S PQ27B
1
Modify,3/30 Tim
4
2
PR261
MTDK5S6R
PR276 *0_04 PJ42
17,22,23,41,42,44 SUSC#
*CV-40mil
1
Add SUSC# signal POWER暨㯪,1/30 Tim
Sheet 43 of 58 6/14 Tim
AMP10V, VCCSA
VIN
VCCSA For CV test

*CV-40mil
PR44 820K_1%_06
PJ49 PU2 PQ37 PC183 PC51

PR41 100K_04 1 2 MDU1516 PC52
D
VDD3 ULTRASO-8
4.7u_25V_X5R_08 4.7u_25V_X5R_08
Modify,3/20 Ken G 0.1u_50V_Y5V_06
PR45 10K_04 PJ50 1 2 *1mm VCCSA_EN 15 13 PR36 0_06 PC38
46 VCCIO_EN
S
EN_PSV BST
5V 0.1u_10V_X7R_04
PJ51 1 2 1mm 16 12 R479 0_06
20,46,47 VCCIO_PWRGD TON DH
ken 0604 PL7
DEFAULT PR200
1 11
EMI暨㯪,3/18 Tim BCIHP0730-1R0M
1 2
15A VCCSA
2.2_04 VOUT LX PCB Footprint = BCIHP0735A

PC42 Modify value,4/21 Ken
PC182
PC179
2 10 PR35 4.12K_1%_04
*0.01u_16V_X7R_04 VCC ILIM
PC40 ken 0604 FOR PQ28
D02 8/4
PD9
3 9 5V
C
VFB VDD MDU1512
1u_6.3V_X5R_04 ULTRASO-8 +
560u_2.5V_6.6*6.6*5.9
4 8 G
Modify,6/12 Tim PGOOD DL
22u_6.3V_X5R_08
S
CSOD140SH
PR273 *0_04 PR37 10K_04 PC39
3.3VS
A
6 7
AGND PGND 17 1u_6.3V_X5R_04
PGND
3.3VS
NC
NC
ken 0604
U61
5
14
1 VR_READY_SA G5602R41U
16 VR_READY 4
2
VR_READY_VCORE 47 PR199 40.2K_1%_04
A
PC175 *15p_50V_NPO_04 PR39 100_04 A
TC7SZ08FU
3
PR198
PR274 *0_04
100K_1%_04 PR38 0_04 VCCSA_SENSE 5

(40.2K/100K+1)*0.75=1.05V
PR197 0_04 VSS_SA_IO_SENSE 5
PR196
100_04
11,12,14,20,26,30,38,40,41,44,46,47,48 5V
27,38,41,44,49 VDD5
38 AMP_PWR Title
5 VCCSA [43] AMP10V,VCCSA
7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,39,41,44,46,47 3.3VS
11,12,13,22,38,41,42,44,45,46,47,48,49 VIN A3 SCHEMATIC1 6-71-P8700-D03 1.0

2 1
B - 44 AMP10V, VCCSA
Schematic Diagrams
DDR4 VDDQ & VTT, VCCPLL_OC

2 1
PD1 VIN
PQ18
5V A C MDU1516 PC96 PC98 PC97
D
1.2V/0.6VS
1
ULTRASO-8
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_50V_Y5V_06
PU6 + PC99
UP6163 RB0540S2 G
PC92 VDDQ_R *15u_25V_6.3*4.4
VTT_MEM
2
10u_10V_Y5V_08
23
VLDOIN VBST
22
PC91 0.1u_10V_X5R_04
1.2V
2
PJ30
1
2A 24 21
PR106
VDDQ_R
Short
VTT_MEM VTT DRVH PL3
2mm 0_06 1.0UH_10*10*4.5 PJ32
DEFAULT PC93 PC94 PC95
1
VTTGND LL
20 1 2 10A 1 2
VDDQ
PC105
PC106
PCB Footprint = TMPC1004H KEN 6/15
PC101
PC104
Short PR103 PR105 8mm
22u_6.3V_X5R_08 *10u_10V_Y5V_08 *10u_10V_Y5V_08 0_06 2
VTTSNS DRVL
19 DEFAULT
PD2
PQ17 + +
C
0_06 MDU1512
220u_6.3V_6.3*6.3*4.2
220u_6.3V_6.3*6.3*4.2
3 18 ULTRASO-8
D
GND PGND
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
VDDQ_R PR97 0_06 17 PR102 0_06
CS_GND
B 4 16 5V G B
CSOD140SH
5V PR98 *0_04 PR101 7.5K_1%_06
A
MODE CS
S
PR104 *0_04 PC88 0.1u_10V_X5R_04 15
5 PVCC5 14 PR96 2.2_04
VTTREF VCC5 ken 0604
5V PR99 0_06 6 13 PC86 PC87
COMP PGOOD 3.3V
1u_10V_Y5V_06
1u_10V_Y5V_06
8 11
VDDQSNS S5
*1000p_X5R_06
PC89
*10_06
PR100
PR95 *22_04 R90 PR246
VTT_MEM
9 10 10K_04
VDDQSET S3 0_06 VDDQ
EMI
D
Remove DDR1.2V_PWRGD
VDDQSET
GND
*1000p_X5R_06
PQ16
NC
NC
6/14 Tim
PC90
SUSB G
*MTN7002ZHS3 PC103 PC102
S
12
25
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
3.3VS
5V
PR91
*10K_1%_04
5V
PR89 47K_04
PR93 6.04K_1%_04
Sheet 44 of 58
PR94 10K_1%_06 PC85 *100p_50V_NPO_04
DDR4 VDDQ & VTT,
D
PR90 10K_04 VTTEN
D
5VS
R81 100K_04
1230 Stanley PQ11 PC83

PR83 100K_04 G MTN7002ZHS3 PQ10
D
PC84 G 0.1u_10V_X7R_04
VCCPLL_OC
D
PJ28 1mm
S
1
PQ15 ⮔⹎≈⣏䁢8mil *MTN7002ZHS3
S
1 2 G *0.1u_16V_Y5V_04 PQ12 PJ20
MTN7002ZHS3 17,22,23,41,42,43 SUSC# G *CV-40mil
S
C
MTN7002ZHS3
2
3 DDR_VTT_CNTL
B Q7 DEFAULT SHORT ken 0604
暣⡻ὅTABLE
PR84 100_04
2N3904 27,40,41 DD_ON#
E
11,14,31,32,41 SUSB
1 2 DDR GPIO OUTPUT VOLTAGE SELECT
PJ29 1mm
2
3.3V
PJ73
*CV-40mil GPIO DDR Vout 1.5A
1
Add,4/15 Ken
FOR D02
HI 1.2V PC82 PC81
VDDQSET_R PR92 *0_04 VDDQSET *10u_6.3V_X5R_06 *0.1u_10V_X5R_04
3/2 Tim
VDD5
VCCPLL_OC
3.3V LO 1.35V R58
PR79 *47K_04
PC78 (FOR OCK 1.8V)
PU5 *1u_10V_Y5V_06
*0_04 *G9661-25ADJF11U
3.3V PR86
3 4 VCCPLL_OC_1.8V 1A VCCPLL_OC
3.3V 5V VIN VCNTL
*100K_04 PJ11
1 6 1 2
PR78 POK VOUT
PR88 DDR1.2V_PWRGD PR80
POWER天㯪ᶵᶲẞ,2/11 Tim 5 *OPEN_1mm
*29.4K_1%_04 NC
D
Modify,4/16 Ken VCCPLL_OC_EN 2 PR65 PC70 PC72 PC71 PC63

*100K_04 PQ14 PR72 *29.4K_1%_04 EN
A *MTN7002ZHS3
PR64 PJ17 8 7
Ra *12.7K_1%_04
A
OPEN_4mil
D
G Add,3/9 Ken
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*82p_50V_NPO_04
*0.1u_16V_Y5V_04
*100K_04 9 GND VFB
*100K_04 1 2 GND
DEFAULT PQ7 17,20,22,23,27,28,38,41,42,43 SUSB#
S
PR87 G
C
*100_04 PJ13 PQ6 *MTN7002ZHS3 PJ18 OPEN_4mil

S
VDDQ B PQ13 DDR1.2V_PWRGD 1 2 PR66

1
*BTN3904 1 2 G
17 DDR_VOLTAGE_SEL
*MTN7002ZHS3 PJ16 PJ15 Rb
E
*10K_1%_04
S
1mm *CV-40mil *CV-40mil

Short PR71
2
*10K_04
ON Vout = 0.8V ( 1 + Ra / Rb )
5 VCCPLL_OC
7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,39,41,43,46,47 3.3VS
2,13,14,16,24,29,33,38,41,42,46 3.3V
11,12,13,22,38,41,42,43,45,46,47,48,49 VIN Title
27,38,41,49 VDD5
7,8,9,10 VTT_MEM
[44] DDR4 VDDQ&VTT,VCCPLL_OC
11,12,14,20,26,30,38,40,41,43,46,47,48 5V Size Document Number Rev
11,12,13,14,15,22,25,38,39,41 5VS
5,7,8,9,10,17 VDDQ

2 1
DDR4 VDDQ & VTT, VCCPLL_OC B - 45

Schematic Diagrams
Power Charger, DC IN
2 1
VA
SMART CHARGER
470K_04
PC222
Modify,3/9 ken
0.1u_50V_Y5V_06
PR248
8
7 3 PQ38
6 2 EMB20P03V
Modify,3/9 ken 5 1 VIN
4
1 5 V_BAT
4
2 6
EML4 8 3 7 PR142
HCB2012KF-800T80 7 3 PQ2 8
6 2 EMB20P03V
5 1 PC220 PQ19 20K_04
PC131 EMB20P03V
EML3
4
HCB2012KF-800T80
1500p_50V_04
0.1u_50V_Y5V_06
Footprint㓡0805, 8 1 5
4/20 Ken 7 3 2 6
EML2 6 2 PQ39 3 7
HCB2012KF-800T80 5 1 EMB20P03V 8 ken 0604
PQ20
4
EML1 VA PRS1 0.01_1%_32 EMB20P03V PRS2 *0.005_1%_32
J_AC1 HCB2012KF-800T80 VA1 PD7
8 PL6
1
PC177 7 3 BCIHP-0730 8R2M

2 PRS4 0.01_1%_32 PRS3 0.01_1%_32
6 2 C A Z4104
FMS3004-AS-H PD19
3 PC37 PC176 PR147 5 1
B 4 B
0_04
*470K_04 POWER暨㯪,1/28 Tim EMI REQ,1/22 Tim PR139
PC128
FMS3004-AS-H
22u_25V_X5R_08 PC127
0.1u_50V_Y5V_06
0.1u_50V_Y5V_06
0_04
0_04
22u_25V_X5R_08 PC138
22u_25V_X5R_08 PC137
0.1u_50V_Y5V_06
2MJ-3432-008H PQ3 PR222 2.2_04 PC152
4
PC134
0_04
PR220
P/N = 6-20-B3H20-103 EMB20P03V 100K_04 PC50 PC221 PC225 PC129 PC135 PC150 PC136
PC130
PCB Footprint = 2MJ-0402A120A PC149 PC151
22u_25V_X5R_08
22u_25V_X5R_08
4.7u_25V_X5R_08
4.7u_25V_X5R_08
*4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_50V_Y5V_06
PC153
22u_25V_X5R_08
22u_25V_X5R_08
22u_25V_X5R_08
1500p_50V_04
1000p_50V_X7R_04
Z4103 0.1u_25V_X7R_06
A
PR221
PR132
PR131
4700p_50V_X7R_04
Sheet 45 of 58 PR146
PR223
15K_1%_04
PC132
PC154 PC155
34
14
15
16
17
18
19
24
25
26
20
21
22
23
27
33
Power Charger,
PC157 PC156 4700p_50V_X7R_04
Z4105 4700p_50V_X7R_04
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
GNDP
GNDP
GNDP
LX
LX
LX
LX
LX
LX
VA
*0_06 PD8 POWER暨㯪,1/28 Tim 4700p_50V_X7R_04 4700p_50V_X7R_04 0.22u_16V_X7R_06 Modify,3/4 ken
RB0540S2 PR140 4 ICHP J_BATT1
S D A CZ4102 VAC ICHP
DC IN PR145
PQ25
MTE1K0P15KN3
2.2_06
C A VDDP
BST 13
29
BST ICHM
1
11
ICHM
PR122 330_04 SMD_BAT

7/30 M-R0402-->M-L0402
PL17 HCB1005KF-121T20 SMD_BAT_C
9
8
7
G
VDDP SDA BAT_DET
SMD_BAT_C 6
300K_1%_04 PD16 MDL914S2 IACM 32 10 PR123 330_04 SMC_BAT PL16 HCB1005KF-121T20 SMC_BAT_C 5
IACM SCL SMC_BAT_C
PU9 4
C
IACP 31 6 IAC1 BAT_DET
22 BAT_DET 3
C
IACP IAC PD18 PD4 PD17
Follow P75,4/16 Ken 2
PQ40 G PR125 100K_04 AC AV 9 OZ8685 VCCST_VCCPLL PD3
EMC2
ACAV 1
*MMSZ5232BS
*MMSZ5232BS
SS1040WG
PR144 MTN7002ZHS3 PR121
S
C144PW-K09A9-L
SS1040WG
30 12 *51_04
EMC1
A
A
100K_1%_04 VAC PROCHOT# P/N = ?
A
COMP
PMON
2/27 Tim
GNDA
GNDA
PSYS
5
30p_50V_NPO_04
ken 0604 㕁嘇⼭䡢娵,4/13 Tim
FBV
PQ24 PR124 PC160 IBSET H_PROCHOT# 3,47
EMC3
D
MTN7002ZHS3 PC139 PR120 *0_04
30p_50V_NPO_04
SMC_BAT 12,22,23
100K_04
28
35
8
1000p_50V_X7R_04
G 1u_25V_X5R_06 ken 0615
22 LOT6_CHG
30p_50V_NPO_04
S
POWER暨㯪,1/29 Tim PR253
PC159 PR252 100K_1%_04
Hi-----Battery in Charge 470K_04 V_BAT
PR134
4.7u_25V_X5R_08
Low-----Battery remove no
charge EC GPIO PD pin 33_1%_04 SMD_BAT 12,22,23
PR254
30K_1%_04 PC140 PR247
PC142 24.9K_1%_04 PR135 10_04
TOTAL_CUR 22
4.7u_6.3V_X5R_06
PR133
Z4106 0.1u_10V_X7R_04 PC141 24K_1%_04 PC111
47p_50V_NPO_04
GND_SIGNAL
GND_SIGNAL 1u_25V_X5R_06
8/4
PR126 GND
ken 0604 GND_SIGNAL GND_SIGNAL Option close to EC
*0_04 PR141
PR250 *0_04 *15mil_short_06
47 PSYS
1/26,ken
PR249
*15K_1%_04 GND_SIGNAL
VDD3
PR136 Add,1/27 Tim

10K_04
Need to modify for 2,3,4 cells battery
AC/BATL# 11,12
BAT DET(BATTERY INTERNAL) :
D
PQ22
2S / 5K / NT1912
VDD3 G MTN7002ZHS3
2S / 10K / NT1908
S
PQ26 PR148 3S / 2K
Close to VDDP pin MTE1K0P15KN3 300K_1%_04
A A
PR137 V_BAT S D Z4108
BAT_VOLT 22 3S/2800mAH / 4.02K
47K_04 4S / 390
G
Modify,3/18 Tim PR143
AC_IN# 22
100K_04 PC161
4S/2800mAH /7.15K
C
PD5 PR277
10K_04 PR149
C A B PQ21 Z4107 0.1u_16V_Y5V_04
VA
2N3904 60.4K_1%_04
D
ZD5245BS2
E
PC144
PC143 PR278 *0.047u_10V_X7R_04 G PQ23
VDD3
10K_04 MTN7002ZHS3
S
*0.1u_50V_Y5V_06
Modify,7/28 KEN
Modify,6/11 Tim
AC_IN
Title
VCCST_VCCPLL 3,5,17,41,47 [45] PWR CHARGER, DC IN
41 VA Size Document Number Rev
15,16,17,19,20,22,23,33,36,37,38,41,42,43,46,49
11,12,13,22,38,41,42,43,44,46,47,48,49
VDD3
VIN

2 1
B - 46 Power Charger, DC IN
Schematic Diagrams
VCCIO, 1.0VA
2 1
ken 0604 VCCIO OPTION ken 0604 DEFAULT SHORT

3/16
1 2 VCCIO
PJ56 3mm
U40
1.0VA 1 2 9 8
C522 C507 VIN VOUT C506 C502 R503
PJ58 *3mm
10u_6.3V_X5R_06
10u_6.3V_X5R_06
7
VOUT
10u_6.3V_X5R_06
10u_6.3V_X5R_06
6
VOUT
*200_04
5
VOUT
M5938BRD1U
VCCIO_EN 2 4 5V
EN VBIAS
B B
R527
*10K_04 C521
1u_6.3V_X5R_04
D31
ON
*RB0540S2
Sheet 46 of 58
C
1 3
GATE GND
C520
VCCIO, 1.0VA
Modify,6/3 Tim
0.1u_10V_X7R_04
V1P0A VCCIO_EN 3.3VS
3.3V R31
For CV test VIN
100K_04
PR243 100K_04 1 2 PR242 820K_1%_06 3.3VS R25
VDD3
PJ63 *CV-40mil VCCIO_EN
D
VCCIO_EN 43
100K_04 Q4
PC213 PC210 PC212
1
1 2 PC211 G MTN7002ZHS3
16 VCC_3P3A_PWRGD R23
15u_25V_6.3*4.4
*4.7u_25V_X5R_08
*4.7u_25V_X5R_08
0.1u_50V_Y5V_06
PJ64 1mm PU15 +
S
DEFAULT SHORT C563 Q3
10K_04
2
*0.01u_16V_X7R_04 PR245 PC215 MDU1516 G MTN7002ZHS3
0_06 0.1u_10V_X7R_04
1V/10A
S
VDD5_VREG5 VDD1.0_EN 15 13 ULTRASO-8 C38
D
EN_PSV BST PQ49 R24

*0.01u_16V_Y5V_04
ken 0604 100K_04
PR241
16
TON DH
12 G
PL14 V1.0A
15A 1.0VA
S
1.0UH_10*10*4.5 DEFAULT SHORT

1 11 1 2 1 2
2.2_04 VOUT LX
MDU1512
PR244 PQ48 PCB Footprint = TMPC1004H PJ66 6mm
D
ULTRASO-8
2 10 4.12K_1%_04 3.3VS
VCC ILIM
PC209
3 9
ken 0604
VDD5_VREG5
G
3/18
VCCIO_PWRGD
S
VFB VDD PR47

PD14
+ PC216 3.3V
C
1u_6.3V_X5R_04 100K_04 ken 0604
560u_2.5V_6.6*6.6*5.9
4 8
PGOOD DL
PR46 VCCIO_PWRGD 20,43,47
PC214
D
CSOD140SH
6 7 20mils-40mils 100K_04
A
AGND PGND 17 1u_6.3V_X5R_04

A PGND PQ4 A
G MTN7002ZHS3
R546 10K_04
NC
NC
VDD3
S
ken 0604 PR42
C
3/17 1K_04
16 VCC_1P0A_PWRGD
5
14
G5602R41U B PQ1
VCCIO
2N3904
PR43
E
100K_04
PR239 33.2K_1%_04
PC208 *15p_50V_NPO_04
PR240
100K_1%_04
49 VDD5_VREG5
11,12,14,20,26,30,38,40,41,43,44,47,48 5V
2,13,14,16,24,29,33,38,41,42,44 3.3V
2,3,5 VCCIO
Title
17,20,41 1.0VA
11,12,13,22,38,41,42,43,44,45,47,48,49 VIN [46] VCCIO,1.0VA
27,38,41,44,49 VDD5
15,16,17,19,20,22,23,33,36,37,38,41,42,43,45,49
7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,39,41,43,44,47
VDD3
3.3VS Custom SCHEMATIC1 6-71-P8700-D03 1.0

2 1
VCCIO, 1.0VA B - 47
Schematic Diagrams
VCore & VCCGT

2 1
,QWHO6.</$.(,09332:(5&.73+$6(
3.3VS 3.3VS 5V VIN
PR160 VCCST_VCCPLL
2/27 Tim
10K_04 10K_04 PR162
2.2_06
1K_1%_04
Modify,3/30 Ken
Modify,4/11 Tim
PR177
PR16
PC6 PC5 PC162
PR156 PR159 PR158 1u_6.3V_X5R_04
DEFAULT 4.7u_6.3V_X5R_06 0.01u_50V_X7R_04 100_04 *45_04
45.3_1%_04
PC7 PC9 PU1
PJ72 NCP81203PMNTXG PUT CLOSE
20 VR_ON 1 2 0.1u_10V_X7R_04 0.1u_10V_X7R_04 6X6 52PIN QFN TO PWM
POWER天㯪,2/11 Tim
9
OPEN_4mil
3 PR14 10_04
VCC
VRMP
SDIO H_CPU_SVIDDAT 3
20,43,46 VCCIO_PWRGD 1 2 2 5 PR12 49.9_1%_04 PROG
PJ3 OPEN_4mil EN SCLK H_CPU_SVIDCLK 3
4 PR13 0_04
ALERT# H_CPU_SVIDALERT# 3
43 VR_READY_VCORE PR157 0_04 6 35

VRDY DRVON DRVON 48
34
POWER暨㯪,1/29 Tim PWM1 PWM1 48

50 38 CSN1
DIFF CSN1 CSN1 48
B PR171 39 PR28 *100K_1%_04 PR179 B
ken 0604 PR155
47.5_1%_04
PC12
470p_50V_X7R_04 4.02K_1%_04
PC21 48
COMP
CSP1
CSP1
POWER暨㯪,1/29 Tim 75K_1%_04
48 CSP1 4+1 Modify value,4/21 Ken
2200p_50V_X7R_04 PR30 7.5K_1%_04 PC23 0.022u_25V_X7R_04
PR173 1K_1%_04 PC19 33 CONFIGURATION
PWM2 PWM2 48
47p_50V_NPO_04 49 40 CSN2
FB CSN2 CSN2 48
41 PR27 *100K_1%_04
CSP2
CSP2
Sheet 47 of 58
48 CSP2
PR29 7.5K_1%_04 PC22 0.022u_25V_X7R_04
Modify,3/18 Tim 32
PWM3 PWM3 48 VBOOT/ADDR
42 CSN3
CSN3 CSN3 48
PR19 0_04 51 43 PR20 *100K_1%_04
2
2
5 VCCCORE_SENSE VSP CSP3
VCore & VCCGT

PC11 PJ5
PJ4
1000p_50V_X7R_04 CSP3
48 CSP3 VCORE VBOOT OPEN_4mil *CV-40mil
PR18 0_04 52 PR21 7.5K_1%_04 PC13 0.022u_25V_X7R_04
5 VSSCORE_SENSE VSN
SET AT 0V,
1
PR17 1K_1%_04 31
1
PWM2A PWM2A 48
PC10 24 CSN2A CSN2A 48 SVID PR3 PR22
CSN2A 23 PR33 *100K_1%_04
4700p_50V_X7R_04 CSP2A POWER暨㯪,1/29 Tim ADDRESS=00h 15K_1%_04 21.5K_1%_04
48 CSP2A CSP2A
PR31 7.5K_1%_04 PC25 0.022u_25V_X7R_04
ken 0604
1 ken 0604
IOUT 45 PR167 57.6K_1%_06 CSP1
POWER暨㯪,1/29 Tim CSSUM POWER暨㯪,1/29 Tim
VCORE PORTION
47 PR172 PR174 PR166 57.6K_1%_06 CSP2
PR15 PC8 CSCOMP 36K_1%_04 100K_1%_04
24K_1%_04 PROG 10 1 2 PC20 180p_50V_NPO_04PR153 57.6K_1%_06 CSP3 IMAX
470p_50V_X7R_04 VBOOT/ADDR 28 PH/FDm/FDa/SR/DDR 46 PR175 NTC4
IMAX 36 VBOOT/ADDR ILIM 30K_1%_04 100k_1%_04_NTC PC18 1500p_50V_04 PR192 57.6K_1%_06 CSP2A
ICCMAX
ken 0604 44 PR169 10_04 CSN1
CSREF
5V VCORE
16 PR170 10_04 CSN2 PR188
PR164 DIFFA IMAX SET 95.3K_1%_04
PR8 PC14 PC166 18 ken 0604 PR154 10_04 CSN3 AT 80A
*47.5_1%_04 *470p_50V_X7R_04 *4.02K_1%_04 COMPA
PR269
*2200p_50V_X7R_04 PR191 10_04 CSN2A
VCCGT PR26 *1K_1%_04 PC165 2K_04
*47p_50V_NPO_04 17 ken 0604 PC164 1000p_50V_X7R_04
FBA
PR264 0_04 30
PWM1A PWM1A 48
PR5 26 CSN1A
CSN1A CSN1A 48
25 PR34 VBOOTA/ADDRA
*100_04 CSP1A *100K_1%_04
2
PR6 *0_04 15 CSP1A PR32 PJ2 PJ1
6 VCCGT_SENSE VSPA 48 CSP1A
PC1 *7.5K_1%_04 PC26 *0.022u_25V_X7R_04 OPEN_4mil *CV-40mil
*1000p_50V_X7R_04
1
PR7 *0_04 14 21 PR193 *51K_1%_06 CSP1A VccGT VBOOT PR1
6 VSSGT_SENSE VSNA CSSUMA PR2
PR9 *1K_1%_04 PR23 SET AT 0V,
PC2 19 *36K_1%_04 PR24 *150K_1%_04 SVID *15.8K_1%_04
PR4 PR265 0_04 CSCOMPA PR268 0_04 *10K_1%_04
ken ,2/3 *4700p_50V_X7R_04 1 2 ADDRESS=01h
*100_04 NTC2 PC17 *100p_50V_NPO_04 ken 0604
*100k_1%_04_NTC
CPU side STUFF 20 PR181
13 ILIMA *7.5K_1%_04 PC15 *1000p_50V_X7R_04
VCCST_VCCPLL IOUTA 22 PR25 *10_04 CSN1A
ken 0604 CSREFA
2/27 Tim
PR180 PC4 *470p_50V_X7R_04 PC16
0_04 PR267 PWM1A
PR161 VBOOTA/ADDRA 27 0_04 *1000p_50V_X7R_04
*1K_1%_04 29 VBOOTA/ADDRA
45 PSYS PSYS SA PORTION
A PR190 20K_1%_04 A
PR163 100_04 12 VCCSA
3,45 H_PROCHOT# VRHOT 11 PR189
TSENSEA IMAX SET
ROSC
EPAD
37 ken 0604 *15.8K_1%_04
TSENSE AT 8A
PR11
PR187 *4.12K_1%_04 ken 0604
PC3
8
53
Modify,3/30 Ken
4.12K_1%_04 PUT CLOSE
*0.1u_10V_X7R_04
TO VCCSA
1
1
PC172 PR266
PUT CLOSE PR176 0.1u_10V_X7R_04 0_04 HOT SPOT
Work F= BOTTOM PAD PR10
TO VCORE NTC3 PR178 *9.31K_1%_04 NTC1
450kHz CONNECT TO
2
2
HOT SPOT 9.31K_1%_04 *100k_1%_04_NTC
100k_1%_04_NTC 20K_1%_04 GND Through
5 VIAs
Modify 7/30 EMI
7,8,9,10,11,12,13,14,15,16,17,18,19,20,22,23,24,25,26,27,29,31,32,33,35,38,39,41,43,44,46 3.3VS Title
11,12,14,20,26,30,38,40,41,43,44,46,48 5V
[47] VCORE & VCCGT
11,12,13,22,38,41,42,43,44,45,46,48,49 VIN Size Document Number Rev
6,48 VCCGT Custom SCHEMATIC1 6-71-P8700-D03 1.0

2 1
B - 48 VCore & VCCGT

Schematic Diagrams
VCore & VCCGT Output Stage

2 1
VCORE & VCCGT OUTPUT STAGE

VIN
8/4
PC35 PC36
1
PC24
1u_25V_X7R_06
4.7u_25V_X5R_08
+
5V + PC232
25TQC15MYFB
2
+ PC231 *220u_25V_6.3*12
220u_25V_6.3*12
PR165 PC169
2.2_06 PR185
2.2_06
0.22u_16V_X7R_06 D1 1 D1 1
PU10 2 2
NCP81151MNTBG
INS23935496 INS23935555
1 8 PR202 1_06 3 G1 MLP08
COMMON
3 G1 MLP08
COMMON
BST HG PL8
4
2 PR201 10K_06 S1 S1 TMPC0603H-R15MG-0M9-D
47 PWM1 PWM SW 7
D2 6 D2 6 2 1
VCORE
3 GND 6
8 8 PCB Footprint = BCIHP0735A
47,48 DRVON EN VIN
7 7
PR212
2.2_1%_06
*20mil_04
*20mil_04
4 5
VCC LG PQ30
1
B PAD CSD87350Q5D PQ29 PC29 PC28 PC33 B
PC163 5 G2 5 G2 CSD87350Q5D +
0V~1.2V/80A
1u_25V_X7R_06
4.7u_25V_X5R_08
25TQC15MYFB
PC184 5V
2.2u_6.3V_X5R_04 9 9
2
S2 S2
PR210
PR211
2200p_50V_X7R_04
PC174
PR195
BOTTOM PAD PR184 2.2_06
CONNECT TO
GND Through
4 VIAs
47 CSP1
2.2_06
PU13
NCP81151MNTBG
0.22u_16V_X7R_06 D1 1
2
INS23948925
D1 1
2
INS23948957
Sheet 48 of 58
47 CSN1 PR208 1_06 3 G1 MLP08
3 G1 MLP08
VCore & VCCGT

VIN 1 8 COMMON COMMON
BST HG PL11
4
2 PR207 10K_06 S1 S1 TMPC0603H-R15MG-0M9-D
47 PWM2A PWM SW 7
6 6 2 1
1
PC32 PC27 D2 D2
PC34 3 8 8 PCB Footprint = BCIHP0735A
47,48 DRVON GND 6
Output Stage
+ EN 7 7
1u_25V_X7R_06
4.7u_25V_X5R_08
25TQC15MYFB
5V
PR209
2.2_1%_06
4 5
VCC LG PQ36
*20mil_04
*20mil_04
2
PAD CSD87350Q5D
PC180
PQ35
PC171 PC168 5 G2 5 G2 CSD87350Q5D
PR186
PR168 2.2_06 2.2u_6.3V_X5R_04 S2 9 S2 9
2200p_50V_X7R_04
2.2_06 0.22u_16V_X7R_06 D1 1 D1 1
PR218
PR219
PU11 2 2 BOTTOM PAD
NCP81151MNTBG CONNECT TO
INS23939855 INS23939887
GND Through
1 8 PR204 1_06 3 G1 MLP08
COMMON
3 G1 MLP08
COMMON 4 VIAs
BST HG PL9
4
PR203 10K_06 S1 S1 TMPC0603H-R15MG-0M9-D

47 PWM2 2
PWM SW 7 OS-CON
D2 6 D2 6 2 1
3 GND 6
8 8 PCB Footprint = BCIHP0735A
47,48 DRVON EN 47 CSP2A
7 7
*20mil_04
*20mil_04
4 5 PR214
VCC LG PQ32 47 CSN2A
2.2_1%_06 PC44 PC46 PC43 PC48 PC49 PC47 PC45
PAD CSD87350Q5D PQ31 + + + + + + +
PC170 5 G2 5 G2 CSD87350Q5D
330u_2.5V_V_B
330u_2.5V_V_B
330u_2.5V_V_B
330u_2.5V_V_B
330u_2.5V_V_B
330u_2.5V_V_B
*330u_2.5V_V_B
PC185
2.2u_6.3V_X5R_04 S2 9 S2 9
PR213
PR224
2200p_50V_X7R_04
BOTTOM PAD ken 0604

CONNECT TO VIN
GND Through 5V
4 VIAs
PC69 PC67
47 CSP2 PC62
*1u_25V_X7R_06
*4.7u_25V_X5R_08
VIN PR59
47 CSN2 PR61 *2.2_06
*2.2_06 *0.22u_16V_X7R_06 D1 1
1
PC31 PC30 PC41 PU4 2

+ *NCP81151MNTBG
5V
1u_25V_X7R_06
4.7u_25V_X5R_08
25TQC15MYFB
INS23945626
1 8 PR63 *1_06 3 G1 MLP08
COMMON Reserve 220ufx1 ? 1/12
2
BST HG PL2
4
PC173 2 PR62 *10K_06 S1 *TMPC0603H-R15MG-0M9-D
PR194 47 PWM1A PWM SW 7
D2 6 2 1 VCCGT
PR183 2.2_06 3 GND 6
8 PCB Footprint = BCIHP0735A
47,48 DRVON
PC80
2.2_06 0.22u_16V_X7R_06 1 1 EN 7 8A
D1 D1
PC206
PC203
PC205
PR73
*2.2_1%_06
*20mil_04
*20mil_04
PU12 2 2 4 5
VCC LG +
NCP81151MNTBG
Remove PR217,PC186 PAD PQ5
*2200p_50V_X7R_04
INS23943106 INS23943138
*330u_2.5V_V_A
1 8 PR206 1_06 3 G1 MLP08
COMMON
3 G1 MLP08
COMMON
6/16 Tim PC61 5 G2 *CSD87350Q5D
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
A BST HG PL10 A
4
2 PR205 10K_06 S1 S1 TMPC0603H-R15MG-0M9-D *2.2u_6.3V_X5R_04 9
PC68
47 PWM3 PWM SW 7 S2
PR81
PR82
D2 6 D2 6 2 1
3 GND 6
8 8 PCB Footprint = BCIHP0735A BOTTOM PAD
47,48 DRVON EN 7 7 CONNECT TO
*20mil_04
*20mil_04
4 5 GND Through
VCC LG PQ34
PAD CSD87350Q5D 4 VIAs 47 CSP1A
PQ33
PC167 5 G2 5 G2 CSD87350Q5D
47 CSN1A
2.2u_6.3V_X5R_04 S2 9 S2 9
PR215
PR216
BOTTOM PAD
CONNECT TO
GND Through
4 VIAs
47 CSP3
Title
47 CSN3 5 VCORE [48] VCORE & VCCGT OUTPUT STAGE
6,47 VCCGT Size Document Number Rev
11,12,13,22,38,41,42,43,44,45,46,47,49
11,12,14,20,26,30,38,40,41,43,44,46,47
VIN
5V
6-71-P8700-D03
Custom SCHEMATIC1 1.0

2 1
VCore & VCCGT Output Stage B - 49

Schematic Diagrams
VDD3, VDD5
2 1
VREF
PR229 *0_04 PR230 0_04

PC199
1u_10V_Y5V_06
PR227 PR235
EN_3V EN_5V
VIN PC191
84.5K 84.5K PC198
PC194 PC65 PC64 1000p_50V_X7R_04 1000p_50V_X7R_04 VIN
1
PU14
4.7u_25V_X5R_08
4.7u_25V_X5R_08
VREG3
0.1u_50V_Y5V_06
EN2
VFB2
TONSEL
VREF
VFB1
EN1
PC75 PC66 PC195 8/4
7 24
VO2 VO1 + PC53
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_50V_Y5V_06
VDD3 PC190 8
Cancel VDD3_5_POK,
23 2/27 Tim PR234 SYS5V
220u_25V_6.3*12
PQ41
MDU1516
1u_6.3V_X5R_04
PC189 9
LDO3 POK
22
PC201
10K_04
PQ47
MDU1516
VDD5
D
ULTRASO-8 BOOT2 BOOT1 ULTRASO-8
uP6182B
Short 0.1u_10V_X7R_04 0.1u_10V_X7R_04

B VDD3 FOR D02
6-19-41001-73C G 10 21 G Short
B
SYS3V PL12 UGATE2 UGATE1 PL13 SYS5V VDD5
12A
S
PJ52 BCIH1040-2R2M BCIH1040-2R2M PJ62
1 2 1 2 11
PHASE2 PHASE1
20 1 2 12A 1 2
H = 4mm H = 4mm
PD13
8mm PCB Footprint = TMPC1004H PQ46 PCB Footprint = TMPC1004H R1 8mm
C
DEFAULT PQ42
DEFAULT
PC187
PC178
PD11
12 19 MDU1512 PR237
GND PAD
C
SKIPSEL
PC181 MDU1512 LGATE2 LGATE1 ULTRASO-8 PC200
R1
Sheet 49 of 58 ULTRASO-8
LDO5
VCLK
PR231 PC192 G 30K_1%_06
GND
EN0
G
VIN
0.1u_16V_Y5V_04
+ + 1000p_50V_X7R_04 PC204 PC207
S
100p_50V_NPO_04
CSOD140SH
13K_1%_06
A
220u_6.3V_6.3*6.3*4.2
220u_6.3V_6.3*6.3*4.2
CSOD140SH
VDD3, VDD5 + +
13
14
25
15
16
17
18
SCAR250-1
SCAR250-1
R2 PC202
KEN 6/11
SCAR250-1
220u_6.3V_6.3*6.3*4.2
SCAR250-1
220u_6.3V_6.3*6.3*4.2
PR225 PR236
R2 EN_ALL 0.1u_16V_Y5V_04
PR228 18.7K_1%_06
*680K_1%_04 VDD5
20K_1%_04 KEN 6/11
VREF PR226 0_04 PR271 *0_06
PR232
Vout Vout
PR233 *0_04
=2*(1+R1/R2) VREG5 =2*(1+R1/R2)
=2*(1+13K/20K) PR272 *0_04 VREG5 =2*(1+30K/18.7K)
2.2_06
VDD5_VREG5
=3.3V PR270 0_06 =5.208V
VIN1
FOR D02 Qpxfs!po!WEE40WEE6!QXN
PC196 PC197
VIN C A R496 *0_04 EN_3V
4.7u_25V_X5R_08 1u_6.3V_X5R_04 VREG5
EN_3V5V
PD12
RB751V-40(lision) R497 0_04 EN_5V
M-SOD323A
R498 Modify,3/31 Tim
6
10K_04 D
KEN 6/11 PQ44A
ℐ悐㓡ᶵᶲẞ,
DD_ON_EN_VDD 2 G MTDK5S6R
VDD3
VCC_3P3DSW_PWRGD S
PC233
6/14 Tim 1
1
DESIGN NOTE: Function Table D Modify value,
8/14 Tim
PQ44B PJ55 R499
PCH_DPWROK >10MS DELAY VDD3 A Y 5G MTDK5S6R *CV-40mil
R465 22,27,41 USB_CHARGE_EN S 100K_04
*0.1u_10V_X7R_04
4
2
U36 C478 L H
*22K_04
D
no stuff,6/15 Tim *0.1u_10V_X7R_04
R466 1 5 H L
2 NC VCC PQ45
*47K_04 Q26 A G MTN7002ZHS3
22,27,41 DD_ON
D
*2SK3018S3
S
3 4 R462 *249_1%_04
GND Y PCH_DPWROK 17
R467 *0_04 G
*74LVC1G14GW 1/30
C479
S
D
Modify,3/30 Tim
*1u_6.3V_X5R_04 R457 0_04 PQ43
RSMRST# 17,22
G *MTN7002ZHS3
STUFF,6/15 Tim 16,17,22,41 SLP_SUS#
S
A Add,6/11 Tim A
46 VDD5_VREG5
Title
41 VIN1
11,12,13,22,38,41,42,43,44,45,46,47,48 VIN
[49] VDD3,VDD5
27,38,41,44 VDD5 Size Document Number Rev
15,16,17,19,20,22,23,33,36,37,38,41,42,43,45,46 VDD3
A3 SCHEMATIC1 6-71-P8700-D03 1.0

2 1
B - 50 VDD3, VDD5
Schematic Diagrams
Charger LED Board
5 4 3 2 1
D D
CC_D2
CC_LED_ACIN CC_R1 220_04 1 2
Modify,4/14 Tim Y
CCJ_LED1
SG
CC_LED_BAT_CHG CC_LED_PWR CC_R2 220_04 3 4
1 CC_LED_BAT_FULL
2 RY-SP195UHYUYG4
3 CC_GND
AC IN/POWER ON LED 6-52-55002-04E
4 CC_LED_PWR
5 CC_LED_ACIN
6
FP225H-006S10M
PCB Footprint = fp225h-006xxxm
CC_GND
Sheet 50 of 58
CC_LED_BAT_CHG CC_R4 220_04 1
CC_D1
2
Charger LED Board
C
Y C
SG
CC_LED_BAT_FULL CC_R3 220_04 3 4
RY-SP195UHYUYG4
BAT CHARGE/FULL LED 6-52-55002-04E
CC_GND
CC_H2
H5_5d2_3 Modify,3/5 Tim
1CCR *0_04 4CCR *0_04

B B
2CCR *0_04 5CCR *0_04
3CCR *0_04 6CCR *0_04

CC_GND
A A
Title
[50] CHARGER LED BOARD
A3 SCHEMATIC1 6-71-P8704-D02 1.0

5 4 3 2 1
Charger LED Board B - 51

Schematic Diagrams
Click Board
5 4 3 2 1
T5VS
T3.3VS TP_3.3VS
T5VS
TL2
FCM1005KF-121T03 Add,6/7 Tim
.
TJ_CLICK1 TL3 TR8 *0_04
.
FCM1005KF-121T03
1 TC19
TGND T3.3VS
2
3 0.1u_10V_X7R_04 TC28
4 TGND TR9 0_04 Modify,6/14 Tim TJ_TP1
5 0.1u_10V_X7R_04 Modify,6/8 Tim
TP_3.3VS
6 8 TTP_CLK
7 TJ_LED1 7
TTP_DATA TTP_DATA
8 TLED_ACIN TJ_CLICK2 㨇㥳⶚㓡ㆸ冯℞Ṿ㨇䧖䚠⎴,3/4 Tim 6
TTP_CLK 6 TTPBUTTON_L
9 TLED_PWR TO POWER LED B'D 5
5 TGND TTPBUTTON_R
10 TGND 1 TTPBUTTON_L 4
TTP_SMB_DATA 4 2 TGND
D 11 3 TTP_SMB_CLK
D
TTP_SMB_CLK 3 TLED_BAT_FULL 3
12 TTPBUTTON_R 2 TTP_SMB_DATA
Modify,6/6 Tim 2 TLED_BAT_CHG 4
13 FROM CLICK MODULE 1
TR1 26.1_1%_04 TUSB_PP7 1
14 TR2 26.1_1%_04 TUSB_PN7 FP226H-004S10M FP225H-008S10M
15 FP225H-006S10M
16 PCB Footprint = fp225h-006xxxm fp225h-008gxxxm_r
TLED_BAT_CHG Remove 33p,6/10 Tim
17 TLED_BAT_FULL 6-20-94K30-108
18 Modify,4/7 Tim
NC1 19
NC2 20 TLED_PWR
21 TLED_ACIN
22
TGND FP225H-02261BM
6-20-94K10-022
Modify,3/30 Tim TGND
It is strongly recommended that the TESD_GND has

a dedicated connection to the system chassis or
cable shield.
Sheet 51 of 58 W/O FINGER㗪㬌⋨ᶵᶲẞ
Click Board
C C
Modify all circuit,6/5 Tim
0326 UPDATE PCB FOOTPRINT

QPOFZ-24R2-XD-Z-LD
T_XIN TJ_FPB1
TR7 1M_04 T_XOUT T2.5V 1 2

3 4
TGND 5 6
3 4 7 8 TLED1
TGND 9 10 TLED2
2 1 11 12 TDISCON
TX1 13 14
TC5 HSX321G_12Mhz TC4 T_XIN 15 16
T_XOUT 17 18
15p_50V_NPO_04 15p_50V_NPO_04 T_RST_N 19 20
21 22 TUSB_PN7_R
T3.3VS 23 24 TUSB_PP7_R
*CON24A
TGND TGND Modify,6/7 Tim
TGND Place Botton TGND
B B
T3.3VS Modify,6/7 Tim

T2.5V T3.3VS
S
Modify,6/7 Tim G TDISCON
TU1
TQ1
1 10 AO3415
D
2 9 Modify,6/7 Tim TLED1 TR5 10K_04
TGND 3 8 TGND TC8 TC3 TC6 TC2 TUSB_PP7 TR3 1.5K_04
TUSB_PP7 4 7 TUSB_PP7_R
TUSB_PN7 5 6 TUSB_PN7_R 0.1u_10V_X7R_04 4.7u_6.3V_X5R_06 0.1u_10V_X7R_04 4.7u_6.3V_X5R_06 TLED2 TR4 10K_04
PUSB3F96 TR6 47K_04 T_RST_N

T3.3VS
TGND
FOR ESD, 月役FFC CONNECTOR㒢㓦 TGND TGND
TC7
CLOSE TO SENSOR POWER PIN 1u_6.3V_X5R_04
TGND
A A
Modify,4/13 Tim
TH4 TH3 TH1 TH2

H5_5D3_7 H5_5D3_7 C197D197N C197D197N
Modify,3/20 Tim
㕘⡆ⶍ䦳ISSUE
1TR *0_04 4TR *0_04 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/

2TR *0_04 5TR *0_04 Title
[51] CLICK BOARD
TGND TGND 3TR *0_04 6TR *0_04

5 4 3 2 1
B - 52 Click Board
Schematic Diagrams
Finger Sensor Board

5 4 3 2 1
Finger Sensor Board

D D
Modify all circuit,6/5 Tim
NOTE: MODE
MODE=HIGH (NC) , USB MODE
FU1 MODE=LOW , SPI MODE
1 30
EGND MODE
F3.3VS 2 29 FUSB_PP
Modify,6/7 Tim AVDD DP FJ_FPB1
F2.5V
F3.3VS
3
4
DVDD DN
28
27
FUSB_PN
F3.3VS
F2.5V
FMOSI
1
3
5
2
4
6
Sheet 52 of 58
Modify,6/7 Tim VDDIO UVDD Modify,6/7 Tim
C
FLED1
FMOSI
5
6
LED1 SPI_CS
26
25
FMCS
FMISO
FMCLK
FMCS
FMISO
7
9
11
8
10
12
FLED1
FLED2
FDISCON
C
Finger Sensor
SPI_MOSI SPI_MISO 13 14
FMCLK
FDISCON
7
8
SPI_CLK LED2
24
23
FLED2
F_XIN
F_XOUT
F_RST_N
15
17
19
16
18
20
Board
DISCON DVSS_1 21 22 FUSB_PN
F3.3VS F3.3VS 23 24 FUSB_PP
9 22
UVSS AVSS_1
Modify,6/7 Tim SPNZ-24S1-B-017-1-R
F_XOUT 10 21 F_XIN
XO XI
FGND FGND
F2.5V 11 20
DVDD_1 AVSS
Modify,6/7 Tim F3.3VS 12 19 F3.3VS Modify,6/7 Tim

RVDD AVDD_1
F_RST_N 13 18
RESETN CLK_SEL NOTE: CLK_SEL
14 17 CLK_SEL=HIGH (NC) , FREQ=12MHz Crystal
DVSS EGND_2 CLK_SEL=LOW , FREQ=48MHz OSC
15 16
SGND EGND_1
ES603-WB
FGND FGND
B B
**FU1㕩怲ᶵ⎗≈㷔溆,ẍ⃵ᶲẞ⼴䞕嶗
FJ1
1 23 23 1
2 24 24 2
BOTTON VIEW TOP VIEW
A A
Title
[52] FINGER SENSOR BOARD
A3 SCHEMATIC1 6-71-P870F-D03 1.0

5 4 3 2 1
Finger Sensor Board B - 53

Schematic Diagrams
Power Switch LED Board
5 4 3 POWER BACKLIGHT LED

2 1
L3.3VS
L5VS
LJ_PWR1
22
L5VS
Modify pin define LID SWITCH IC POWER BUTTON POWER
L5V_LED1 L5V_LED2 LHDD_LED L5V_LED4 LAIRPLANE_LED L5V_LED6 L5V_LED7 LN_LOCK_LED L5V_LED5 LC_LOCK_LED L5V_LED3 LS_LOCK_LED L5V_LED1
LAIRPLANE_LED
LS_LOCK_LED
21 6/16 Tim SWITCH
LHDD_LED
L5V_LED4
LN_LOCK_LED
LC_LOCK_LED
L5V_LED2
L5V_LED6
L5V_LED5
L5V_LED3
NC2 20 LSW1 Modify,4/17 Tim
NC1 19 TJE-532-Q-T/R 20mil 20mil
LED
LLED_CT1
18 Modify,3/20 Tim 3 1 LR27 LR15
LPCH_HDD_LED
17 4 2 LM_BTN#
LGND 16 LVDD3 220_04 220_04
15 LM_BTN#
5
6
14 20mil
D
20mil 20mil
LLID_SW# LR16 100K_04 20mil 20mil 20mil 20mil 20mil 20mil 20mil 20mil 20mil 20mil 20mil 20mil
D
1
13 LR1 LR2 LR4 LR5 LR6
LLED1_PS1 20mil LR3 LR7 LR8 LR9 LR10 LR11 LR12 LR13 LR14
12 LD2 LC2 20mil LC1
LLED1_PS2 LU8
11 220_04 220_04 220_04 220_04 220_04
LLED1_PS3 1 2 LLID_SW# 220_04 220_04 220_04 220_04 220_04 220_04 220_04 220_04 220_04
10 LLED1_PS4 VCC OUT LGND 0.1u_50V_Y5V_06 *0.1u_16V_Y5V_04
GND
9 LLED1_PS5 *V15AVLC0402
8 LLED1_PS6 LC4 LC5 LC6 VARISTOR
2
7 6-24-30003-006 20mil 20mil 20mil 20mil 20mil
LLED1_PS7 LGND 20mil 20mil 20mil 20mil 20mil
A
20mil 20mil 20mil 20mil
A
3
6 LVDD3 *1u_10V_Y5V_06 0.1u_16V_Y5V_04 AH9249NTR-G1 *100p_50V_NPO_04
5 LVDD5 LD28 LD1
4 LGND
3 RY-SP190DBW71-5A RY-SP190DBW71-5A
LGND LGND
2 LGND LGND
A
LD11
A
A
A
LD14
A
A
LD15
1
A
LD12
LD16
A
LD13
LD17
LD26
LD25
LD21
1
LD27
LD22
LD24
LD23
1
1
C
1
1
C
1
Modify,6/4 Tim
1
1
1
1
1
FP225H-02261BM LD29 LD30 LD31 LD32 LD34
LD33 LD35 LD36 LD37 LD40 LD41 LD42
LD38 LD39
RY-SP190DBW71-5A
RY-SP190DBW71-5A
RY-SP190DBW71-5A
6-20-94K10-022
RY-SP190DBW71-5A
RY-SP190DBW71-5A
LID
RY-SP190DBW71-5A
RY-SP190DBW71-5A
RY-SP190DBW71-5A
RY-SP190DBW71-5A
RY-SP190DBW71-5A
RY-SP190DBW71-5A
RY-SP190DBW71-5A
RY-SP190DBW71-5A
RY-SP190DBW71-5A
LGND
*V15AVLC0402
Modify,7/2 Tim
C
Modify,6/13 Tim
*V15AVLC0402
*V15AVLC0402
*V15AVLC0402
*V15AVLC0402
C
*V15AVLC0402
*V15AVLC0402
*V15AVLC0402
C
*V15AVLC0402
C
*V15AVLC0402
*V15AVLC0402
*V15AVLC0402
C
C
*V15AVLC0402
*V15AVLC0402
C
C
2
C
2
2
LLED_CT1_N LR31 10K_04 B LQ8
2
2
2
2
2
2
1
2
2N3904
FUNCTION CONTROL
E
LLED1_PS2:SCROLL LOCK LED LGND LGND LGND LGND LGND LGND LGND LGND LGND LGND LGND LGND
LGND LGND
LLED1_PS4:CAPS LOCK LED
LLED1_PS5:AIRPLANE LED LGND
LLED1_PS6:NUM LOCK LED
LS_LOCK_LED LAIRPLANE_LED
L5V_LED3H
Sheet 53 of 58 C C
D
D
D
LQ1 LQ3
LQ10
LLED_CTL G MTN7002ZHS3 LLED_CTL G MTN7002ZHS3
LLED_CTL G MTN7002ZHS3
S
S
H= 1.4- 1.75 mm (Typical-1.6 mm)
S
H= 1.4- 1.75 mm (Typical-1.6 mm) L5V_LED2 L5V_LED5
LHDD_LED
Power Swtch LED H= 1.4- 1.75 mm (Typical-1.6 mm) LVDD5 LU3

LVDD5 LU2 LLED1_PS3FON# 1 8
LVDD5 LU1 LLED1_PS2FON# 1 8 FON GND LN_LOCK_LED
2 7 LC_LOCK_LED L5V_LED3H
LLED1_PS1FON# 1 8 2 FON GND 7 VIN GND
FON GND 3 6
2 7 VIN GND VOUT GND
D
VIN GND 3 6 LC17 LC18 4 5
D
3 6 LC13 LC14 4 VOUT GND 5 VSET GND
VOUT GND VSET GND LQ4
LQ2 LQ11
Board
LC9 LC10 4 5 0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06 AX995SA
VSET GND G MTN7002ZHS3
0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06 AX995SA LGND G MTN7002ZHS3 G MTN7002ZHS3
0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06 AX995SA LGND
S
S
S
LGND LGND LGND LR21 10K_04 LLED1_PS3 L5V_LED6
LGND LGND LR20 10K_04 LLED1_PS2 L5V_LED4 L5V_LED3
LGND LGND LR19 10K_04 LLED1_PS1 LC20 LVDD5
LC16 L5V_LED3H
LC12 LS_LOCK_LED 1u_6.3V_X5R_04 LVDD5
L5V_LED1 1u_6.3V_X5R_04
1u_6.3V_X5R_04 LR30
VOUT/VSET= 1.552-1.648(V/V) LC19 VOUT/VSET= 1.552-1.648(V/V) L5VS
LGND Iout=0.5A Modify,7/27 Tim 10K_04 L5VS
VOUT/VSET= 1.552-1.648(V/V) LC15 Iout=0.5A
LC11 LGND 10u_6.3V_X5R_06
LGND Iout=0.5A LLED_CTL
10u_6.3V_X5R_06 LR29
10u_6.3V_X5R_06
D
1K_04
LGND LQ7 LR18 LR35
LGND LLED_CT1_N G MTN7002ZHS3 0_04
LGND 750_1%_04
S
LLED_CT1 LR28 100_04 B LQ6
C
B 2N3904
L3.3VS LR34 100_04 B LQ9 B
E
2N3904
E
LGND LR17
LGND
100K_04 Modify,7/28 Tim
LHDD_LED
C
H= 1.4- 1.75 mm (Typical-1.6 mm) H= 1.4- 1.75 mm (Typical-1.6 mm)
H= 1.4- 1.75 mm (Typical-1.6 mm) LR32 10K_04 B LQ5
LVDD5 H= 1.4- 1.75 mm (Typical-1.6 mm) LVDD5 LU7 2N3904
LU4 LVDD5 LU6
LLED1_PS4FON# 1 8 LVDD5 LU5 LLED1_PS7FON# 1 8
LLED1_PS6FON# 1 8 FON GND
E
2 FON GND 7 LLED1_PS5FON# 1 8 FON GND 2 7
FON GND 2 7 VIN GND LR33
3 VIN GND 6 2 7 VIN GND 3 6
VOUT GND VIN GND 3 6 LC33 LC34 4 VOUT GND 5 10K_04
LC21 LC22 4 5 3 6 LC29 LC30 4 VOUT GND 5 VSET GND LPCH_HDD_LED
VSET GND LC25 LC26 4 VOUT GND 5 VSET GND
VSET GND 0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06 AX995SA
0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06 AX995SA 0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06 AX995SA
LGND 0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06 AX995SA LGND HDD LED
LGND
LGND
LGND LGND LR22 10K_04 LLED1_PS4 LGND LGND LR25 10K_04 LLED1_PS7
LGND LGND LR24 10K_04 LLED1_PS6 LGND
LGND LGND LR23 10K_04 LLED1_PS5
LC24 LC3
LC32 L5V_LED7
LC_LOCK_LED LC28 LN_LOCK_LED
1u_6.3V_X5R_04 LAIRPLANE_LED 1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
VOUT/VSET= 1.552-1.648(V/V) VOUT/VSET= 1.552-1.648(V/V)
LC23
VOUT/VSET= 1.552-1.648(V/V) LC35 Iout=0.5A
Iout=0.5A VOUT/VSET= 1.552-1.648(V/V) LC31 Iout=0.5A LGND
LGND LC27 LGND
LGND Iout=0.5A 10u_6.3V_X5R_06
10u_6.3V_X5R_06 10u_6.3V_X5R_06
10u_6.3V_X5R_06
LGND LGND
LGND
LGND
A A
LH7 LH4 LH1 LH3 LH5 LH6
LH2 Modify,3/5 Tim
c99D99n c99D99n c99D99n H6_0D2_3 H6_0D2_3 H6_0D2_3 H6_0D2_3
1LR *0_04 4LR *0_04 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/

2LR *0_04 5LR *0_04 Title
3LR *0_04 6LR *0_04

[53] POWER SWITCHLED BOARD
Modify,6/10 Tim Size Document Number Rev
LGND LGND LGND LGND
Custom SCHEMATIC1 6-71-P870S-D03 1.0
5 4 3 2 1
B - 54 Power Switch LED Board

Schematic Diagrams
Audio Codec
5 4 3 2 1
CODEC Realtek ALC892

place between PIN 46 and PIN 47 place between PIN 12 and PIN13
AR109 *20mil_08 AR83 *20mil_08 AC130 0.1u_16V_Y5V_04
AC146 0.1u_16V_Y5V_04
Layout Note:
U43 pin 1 ~ pin 11 and pin 47 and pin 48
D are Digital signals. AAUDG AGND
AC162 0.1u_16V_Y5V_04 AC131 0.1u_16V_Y5V_04 D
The others are Analog signals. AAUDG AGND
for EMI,6/11 Tim
follow common design, AAUDG for EMI AGND AAUDG
A5VS_AUD ADGND
A3.3VS A3.3VS_AUD 6/11 Tim
Follow Common-Disgn,1/10
AL5 HCB1005KF-121T20
40mil 40milclose to PIN38 close to PIN25 AL21 *HCB1005KF-121T20
Layout Note: A5VS
AC77 AMIC1-VREFO-R
(1)MIC1-L (U13.21) (2)MIC1-R (U13.22) AC53 AC79 AC137 AC138 AC44
AC132
(3)LINE-L (U13.23) (4)LINE-R (U13.24) 10u_6.3V_X5R_06
*0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 1u_6.3V_X5R_04
AR100
␐⚵⽭枰⊭央 AUDG, ᶼ⃀慷性⃵嶐崲
+5VS & +VIN plane. close to PIN1 close to PIN9 2.2K_04
AGND AAUDG AAUDG change C547 to 10uf,C544,,L15 no stuff
AGND
25
38
follow REALTEK recommend ,1/10 AMIC1-R
1
9
AU3
AMIC_CLK HCB1005KF-121T20 1 2 AL18 AVREF_CODEC
DVSS2
DVDD1
DVDD2
AVDD1
AVDD2
AC28
AMIC_DATA HCB1005KF-121T20 1 2 AL17 AC76 0.1u_16V_Y5V_04 follow common design, *680p_50V_X5R_04
2 6/11 Tim
L13,L14 change to 0_04,C545,C548 no stuff
AGND AC109 47p_50V_NPO_04 AGND AC107 10u_6.3V_X5R_06 4 GPIO0/DMIC-CLK 27 AC74 10u_6.3V_X5R_06
FOLLOW REALTEK,1/10
AGND AC108 47p_50V_NPO_04 3 DMIC_DAT VREF
GPIO1/DMIC-DATA AAUDG
Remove AC78,6/7 Tim AMIC1-VREFO-L
AL28 AHDA_SDOUT AR69 33_04 5 28 AMIC1-VREFO-L AAUDG
AHDA_BITCLK AR62 33_04 6 SDATA-OUT VREFOOUT-B_L 32 AMIC1-VREFO-R AMIC2-VREFO
AR70 *0_04 AMIC_DATA AHDA_SDIN0 AR61 33_04 8 BIT-CLK VREFOUT-B_R
AGND
ALC889
ᶲẞ.
Add,6/15 Tim
EMI天㯪:STUFF 30ohm MF
7/28 Tim
FCM1005MF-300T03 AHDA_SYNC
AHDA_RST#
Add test point,6/11 Tim

AR50
AR49
Max: 0.5inch
33_04
33_04
AEAPD_MODE 47
10
11
SDATA-IN
SYNC
RESET#
DIGITAL
SRUW$ SURR-OUT-R
SURR-OUT-L
39
41
30 AMIC2-VREFO
AR98
2.2K_04
AR99
2.2K_04 Sheet 54 of 58
SPDIFI/EAPD VREFOUT-F_L AT4 AMIC1-L
Audio Codec
PC BEEP 31
ASPDIFO 48 VREFOUT-E AT5 AINT_MIC
妋BO倚⓷柴,8/6 Tim 57 ASPDIFO SPDIFO AC29
35 AFRONT_L
ABEEP AR48
AR47
160K_04
2K_04
AC52 1u_6.3V_X5R_04 12
PCBEEP SRUW' FRONT-OUT-R
FRONT-OUT-L 36 AFRONT_R
AFRONT_L 55
AFRONT_R 55
AC30
*680p_50V_X5R_04
PC_BEEP change to DIGITAL,1/14
AC51 *0.1u_16V_X7R_04 婧PC beep倚, 14 AHEADPHONE-L 330p_50V_X7R_04
C AL24
*HCB1005KF-121T20 Modify,7/3 Tim
8/14 Tim
AJD_SENSEA 13
SRUW(FR_HP-R
FR_HP-L 15 AHEADPHONE-R
AAUDG C
57 AJD_SENSEA
A5VS AGND AJD_SENSEB 34 Sense A 43
57 AJD_SENSEB
AL25
HCB1005KF-121T20
Follow REALTEK recommend,
Sense B
37
SRUW* CENTER
LFE
44 change to AUDG
AAUDG
4/19 Tim NC
ALDO_IN 29 45 ASIDE-L_R AC135 10u_6.3V_X5R_06 AR81 75_1%_04 ASIDE_L
A5V LDO_IN ANALOG SRUW+ SIDE-R
SIDE-L 46 ASIDE-R_R AC136 10u_6.3V_X5R_06 AR82 75_1%_04 ASIDE_R
ASIDE_L 57
ASIDE_R 57
AMIC2_L 16
C
AC50 4.7u_6.3V_X5R_06
AD1
AC104
AINT_MIC AR36 1K_04 AINT_MIC_R AC49 4.7u_6.3V_X5R_06 AMIC2_R 17 MIC2-L
MIC2-R SRUW) CAP
33 ACAPPIN33(NC) FOLLOW REALTEK,1/10 AC105
AC106
*10u_6.3V_X5R_06
*0.1u_16V_Y5V_04
*ZD5231BS2 22u_6.3V_X5R_08 18 40
19
20
CD-L
CD-GND
JDREF
23
AR80 20K_1%_04 AAUDG BluRay content
A
CD-R
SRUW& LINE1-R
LINE1-L 24 AR79 *5.1K_1%_04 AAUDG
follow common design,
protection
AVSS1
AVSS2
AAUDG 6/11 Tim AMIC1-L AR35 1K_04 AC48 4.7u_6.3V_X5R_06 21
AAUDG57 AMIC1-L
57 AMIC1-R
AMIC1-R AR34 1K_04 AC47 4.7u_6.3V_X5R_06 22 MIC1-L
MIC1-R SRUW% AC134 *100p_50V_NPO_04
Connect standby power(for REALTEK RECOMMEND 1K_04
ALC892
26
42
pop noise) ALINE_L_CAC46 4.7u_6.3V_X5R_06 AR33 75_04 ALINE-L ALINE-L 57
ALINE_R_CAC45 4.7u_6.3V_X5R_06 AR32 75_04 ALINE-R
ALINE-R 57
AAUDG
A3.3VS
Connector
A5V
HeadPhone SV3H612 & SV3H615 COLAY AJ_AUDIO1
Modify,3/21 Tim 12
㍍AGND,6/15 Tim 11
AR104 0_04 AC71 AC70 AC69 AC39 AC161 10
+ AHDA_BITCLK
B NC1 9
B
2.2u_6.3V_X5R_04
0.1u_16V_Y5V_04
22u_6.3V_X5R_08
*22u_6.3V_X5R_08
AC26 *470u_6.3V_ESR35M AHEADPHONE-L_L

+
220u_6.3V_6.3*6.3*4.2 8 AHDA_SDOUT
NC2 7 AHDA_SDIN0 AAMP_PWR
SV612:C742,R270,R273,R772,C702ᶵᶲẞ AR60 *0_04 6 AJ_AUDIO2
AR59 0_04 AHDA_SYNC
5 AHDA_RST# Modify,3/19 Tim 22
SV615:R770,R768,R275,R284,R709ᶵᶲẞ AR58 *0_04 4
AR57 *0_04 AAMP_EN APCH_SMB_CLK 21
3 APCH_SMB_DATA NC2 20
AHP_SGND AR46 *0_04 2
AR45 *10mil_short AHP_AUDG AGND AAMP_EN NC1 19
AHP_AUDG 57 1 AAMP_EN 55,56
Modify,4/11 Tim 18
AHEADPHONE-L AHEADPHONE-L_LPF SV3H612 ㍍⇘AUDIO JACK䘬GND A5V
AHP_AUDG
FP225H-012S10M 17
AC99 1u_16V_X5R_06 AAUDG 6-20-94K50-012 AGND 16
Add,6/4 Tim 15 A5V
16
15
14
13
AHEADPHONE-R AHEADPHONE-R_LPF AU2 AC145 AVIN Modify,4/21 Tim 14

AR118 13
AC103 1u_16V_X5R_06 AU8 Modify pin define,
OUTL
VDD
JD
SGND
15_1%_04 AGND 12
AC40 0.01u_16V_X7R_04 4 1 *0.1u_16V_Y5V_04 6/11 Tim
AHEADPHONE-L_L 2 NC1 V+ 11 A5VS
NO1 AR116
AHEADPHONE-L_LPFAR66 470_04 1 12 AC41 0.01u_16V_X7R_04 AAUDG A3.3V 10
INL C2_3DL
D
2 11 AAMP_EN 5 3 AHEADPHONE-LC 9
VREF C1_3DL IN1 COM1 1M_04 Modify pin define
3 10 8 6/16 Tim
REXT PGND AAUDG AQ2
AHEADPHONE-R_LPFAR68 470_04 4 VSS 9 8 9 AHEADPHONE-RC AJ_AUDIO3 7 ABEEP
INR C1_SDR NC2 COM2 AHP_AUDG_ENG MTN7002ZHS3
6
C2_3DR
AC42 0.01u_16V_X7R_04 AHEADPHONE-R_L10 ASMC_VGA_THERM AMIC_CLK

NO2
D
ASMC_VGA_THERM 55,56 5
OUTA
AC100
AC102
AC101
AR67
S
1 ASMD_VGA_THERM AMIC_DATA
SDA
SCL
17 AC43 0.01u_16V_X7R_04 AAMP_EN 7 6 2 ASMD_VGA_THERM 55,56 4

VSS IN2 GND AQ1 AR117 3 3
AHP_AUDG G MTN7002ZHS3
SV3H612V *TS5A22364DGSR 4 2
APCM_INT_1863
5
6
7
8
1M_04 APCM_INT_1863 55 1 AVIN

S
AAUDG AAUDG 5
AAUDG 6 FP225H-02261BM Modify,6/4 Tim
2200p_50V_X7R_04
2200p_50V_X7R_04
1u_6.3V_X5R_04
0A1-A_1127_Alex AHEADPHONE-L_L AR103 0_04 AHEADPHONE-LC FP225H-006S10M

AHEADPHONE-R_L AR102 AHEADPHONE-LC 57 6-20-94K10-022
0_04 AHEADPHONE-RC PCB Footprint = fp225h-006xxxm
AHEADPHONE-RC 57
*240K_04
AGND Modify,3/30 Tim AGND

Add 6pin conn,
AHP_SCL AR78 22_1%_04 APCH_SMB_CLK APCH_SMB_CLK 55,56 6/14 Tim
AHP_SDA AR77 22_1%_04 APCH_SMB_DATA APCH_SMB_DATA 55,56 AGND
AC72 100p_50V_NPO_04
AC27 *470u_6.3V_ESR35M AC73 100p_50V_NPO_04
+
Modify,3/5 Tim
A AAUDG
AR101 0_04 AHEADPHONE-R_L
1AR *0_04 4AR *0_04 A
AAUDG
2AR *0_04 5AR *0_04
AJ4
Modify,6/5 Tim Modify,7/30 3AR *0_04 6AR *0_04
*OPEN-5mm
2 1 AH1 AH2
AH3 H6_0D2_3 H6_0D2_3
2 AJ5
3 *OPEN-5mm
4 1
2 1
5 AAUDG 55,56 A3.3V Title
MTH8_0D2_8 AJ6
57 A5VS
55,56 A3.3VS
[54] AUDIO B'D CODEC ALC892
*OPEN-5mm 55,56 AAMP_PWR Size Document Number Rev
AGND 2 1
AGND Custom SCHEMATIC1 6-71-P8708-D03 1.0
5 4 3 2 1
Audio Codec B - 55
Schematic Diagrams
Audio Board (Speaker)
5 4 3 2 1
AUDIO AMP FOR SPEAKER(TAS5766DCA_1)
Add,6/11 Tim 7/30 0805-->0603
AAMP_PWR
A3.3V AL26 AMP POWER->12V Modify value
1
AAMP1_3.3VS 6/14 Tim
HCB1608KF-121T30 AC90 AC88 AC152 AC87 AC151
Modify,6/11 Tim Modify 22Ohm,6/14 Tim + AC61
54,56 ASMD_VGA_THERM ASMD_VGA_THERMAR92 *22_04 1u_25V_X5R_06 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 180u_16V_6.3*5.8
AAMP1_3.3VS ADGND ADGND
2
54,56 APCH_SMB_DATA APCH_SMB_DATA AR93 22_04
A3.3VS AL23
*HCB1608KF-121T30 ADGND ADGND ADGND ADGND ADGND ADGND NEAR 5766 PIN6/PIN7
1u_25V_X5R_06
1u_6.3V_X5R_04
2.2u_16V_X5R_06
2.2u_16V_X5R_06
75K_1%_04
47K_1%_04
ASMC_VGA_THERMAR94 *22_04
54,56 ASMC_VGA_THERM AC64 AL10
AC142 AC149 AC147 54,56 APCH_SMB_CLK APCH_SMB_CLK AR95 22_04
0.22u_16V_X7R_06 HCB1608KF-121T30
AMP3.3VS= A5766_BSPR1 . A5766_OUTR1+
D 22u_6.3V_X5R_08 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
AVDD,CPVDD =24-32 mA (PD=0.5mA) D
A5766_GAIN1
AC62
ADGND ADGND ADGND +DVDD, =12-15 mA (PD=0.2mA) A5766_OUTPR1
1000p_50V_X7R_04
AR52 Stanley ,1/10
AC150
AR110
A5766_GVDD1AR106
3.3_06
A5766_INPR1AC120
A5766_INNR1AC119
AC89
ADGND ADGND AC63
A5766_DACR1
A5766_SDA1
A5766_SCL1
A5766_MCLK1
A5766_OUTNR1 820p_50V_X7R_04
ADGND ADGND
56 AADC_BCLK AADC_BCLK AC65
ADGND ADGND ADGND 0.22u_16V_X7R_06 AL11
AADC_DOUT A5766_BSNR1 HCB1608KF-121T30 ADGND
Remove OSC power circuit ,6/11 Tim 56 AADC_DOUT
. A5766_OUTR1-
AC33
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
1
AU5
1000p_50V_X7R_04 AR38
DIN
BCLK
SCLK
GPIO3
ADR2
GPIO2
GPIO1
SCL
SDA
GND3
AVDD
DACR
INPR
INNR
GND2
GAIN/FSW
GVDD
PVCC2
PVCC1
BSPR
OUTPR
GND1
OUTNR
BSNR
3.3_06
ADGND
Modify,3/12 Tim
AC34
I2C Address 2W 820p_50V_X7R_04
Modify,6/14 Tim Address ADR2 ADR1
TAS5766DCA PowerPAD
49
Sheet 55 of 58
0x98 0 0 ADGND
AAMP1_3.3VS AR74
10K_04 AX2
XSMT/UVP
1 2 ADGND
ADGND
FAULTZ
G GND
CPVDD
OUTNL
OUTPL
PVCC3
PVCC4
LRCLK
CAPM
Audio Board
LDOO
DVDD
VNEG
Modify,4/8 Tim
GND4
GND5
GND6
AVCC
GND7
CAPP
ADR1
DACL
BSNL
BSPL
INNL
INPL
4 3 AR89 22_04 A5766_MCLK1 TAS5766MDCA
VCC OUT
C AC116 AC115 FCO-536B 24.576000MBA AR88 22_04 A5766_MCLK2 C
25
26
27
A5766_LDOO128
29
30
31
A5766_CAPP132
33
A5766_CAPM134
A5766_VNEG135
A5766_DACL1 36
A5766_INPL1 37
A5766_INNL1 38
39
40
41
42
43
A5766_BSPL1 44
A5766_OUTPL1 45
46
A5766_OUTNL1 47
48
A5766_MCLK2 56
(Speaker) 0.1u_16V_Y5V_04 1u_6.3V_X5R_04
AU6
AADC_3.3VS_D
56 AADC_LRCK
AADC_LRCK
ADGND ADGND
AC66
0.22u_16V_X7R_06
A5766_BSNL1
AL12
HCB1608KF-121T30
. A5766_OUTL1- 60mil
5
ADGND
AR87 22_04 1 AC36 AR39
ADGND
4 AADC_MCLK
1u_25V_X5R_06
1u_6.3V_X5R_04
1u_6.3V_X5R_04
2.2u_16V_X5R_06
2.2u_16V_X5R_06
2 AAMP_EN ADGND 1000p_50V_X7R_04 3.3_06
54,56 AAMP_EN ADGND
AC123 1u_6.3V_X5R_04
AAMP1_3.3VS
Speaker TC7SZ08FU
3
ADGND
AJ_SPK1 Modify value,4/20 Tim AC35
A5766_OUTL1+ 820p_50V_X7R_04
1 A5766_OUTL1- ADGND AC67 AL13
2 A5766_OUTR1+ Modify,4/8 Tim
0.22u_16V_X7R_06 HCB1608KF-121T30 ADGND
3 A5766_OUTR1- 60mil
4 . A5766_OUTL1+
AC124
AC148
AC126
AC125
AC92
3.3_06
1000p_50V_X7R_04
85204-04001 6-20-43130-104
AC38
AAMP_PWR
AR53
PCB Footprint = 85204-04R 7/30 0805-->0603
AR71 *20mil_P_04 ADGND ADGND AC91 AC93 AC94 AC95 AC96
820p_50V_X7R_04
ADGND ADGND
/Ed^W<Z AC127 0.1u_16V_Y5V_04 AR105 *0_04
1u_25V_X5R_06 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 ADGND
&ƌŽŶƚ>
AC143 0.1u_16V_Y5V_04
AC37
ADGND ADGND ADGND ADGND ADGND
ADGND for EMI
AGND NEAR 5766 PIN41/PIN42/PIN43
/Ed^W<Z
&ƌŽŶƚZ ADGND
B B
Modify,4/7 Tim AU1
A3.3VS A3.3VS A3.3VS
A3.3VS
PCM1861 Modify,6/11 Tim
AAUDG
AAUDG
AC13
AC14
2.2u_6.3V_X5R_04
2.2u_6.3V_X5R_04
1
2
VINL2/VIN1M
VINR2/VIN2M
VINR3/VIN3P
VINL3/VIN4P
30
29
AC1
AC2
2.2u_6.3V_X5R_04
2.2u_6.3V_X5R_04
AAUDG
AAUDG
AR2 AR1 AR5 AR3 AR31
AADC_VINL 3 28 AC3 2.2u_6.3V_X5R_04 AR7 AR6 AR4
VINL1/VIN1P VINR4/VIN3M AAUDG
AC6 AR18 AC8 AR22
1u_16V_X5R_06 7.5K_1%_04 1u_16V_X5R_06 100_1%_04 AADC_VINR 4 27 AC4 2.2u_6.3V_X5R_04 AAUDG
VINR1/VIN2P VINL4/VIN4M *10K_04 *10K_04 *10K_04
AFRONT_R AADC_VINR *10K_04 10K_04 *10K_04 *10K_04 *2.2K_04
54 AFRONT_R AMic_Bias 5 26 APCM_MD0 APCM_MD6 APCM_MD1 APCM_MD4 AMic_Bias
Mic Bias MD0
AC10 APCM_MD5
AR20 AAUDG AC16 2.2u_6.3V_X5R_04 6 25 APCM_MD1 APCM_MD0 APCM_MD3
VREF MD1
0.01u_50V_X7R_04 APCM_MD2
22K_04 AAUDG 7 24 APCM_MD3
Modify,6/11 Tim AGND MD3
8 23 APCM_MD2 Add PCM1863枸䔁SMBUS,6/11 Tim AR15 AR14 AR12 AR10 AR9 AR13 AR11 AR27
AC7 AR19 AC9 AR23 AAUDG AADC_3.3VS_A AVDD MD2 AC15
1u_16V_X5R_06 7.5K_1%_04 AAUDG 1u_16V_X5R_06 100_1%_04
AFRONT_L AADC_VINL AADC_XO 9 PCM1861 22 APCM_MD4
54 AFRONT_L XO MD4
AADC_XI 10 21 APCM_MD5 10K_04 10K_04 10K_04 10K_04 *10K_04 10K_04 10K_04 *10K_04 4.7u_6.3V_X5R_06
AC11 XI MD5
AR21 AR112 *0_04
AADC_3.3VS_D A3.3VS 0.01u_50V_X7R_04 ADGND AC19 2.2u_6.3V_X5R_04 11 20 APCM_MD6 APCM_INT_1863 54
LDO MD6 ADGND ADGND ADGND
22K_04 ADGND ADGND ADGND ADGND AAUDG AAUDG
12 19 APCM_INT AR115 10K_04
AR24 3.3_06 ADGND DGND INT ADGND
AAUDG PCM1863
AC20 AC23 13 18 AADC_DOUT Modify,6/4 Tim PCM1861
AAUDG AADC_3.3VS_D DVDD DOUT MD0 Control Method Select Terminal: MD6/MD5/MD2 Analog MUX and Gain Select
AADC_XO SPI (tied high) or I2C (tied low) 0 0 0 SE Ch 1 (VINL1 / VINR1) MD3 Filter Select
0.1u_16V_Y5V_04 10u_6.3V_X5R_06 14 17 AADC_BCLK MD1 SPI-Mode Chip Select or 0 = FIR Decimation Filter,
IOVDD BCK 0 0 1 SE Ch 2 (VINL2 / VINR2)
AR28 *1M_04 AADC_XI I2C-Mode Address Terminal 0 1 0 SE Ch 3 (VINL3 / VINR3) 1 = IIR Short Latency Decimation Filter
AADC_MCLK 15 16 AADC_LRCK MD2 SPI-Mode Master Out, Slave IN or MD1/MD0 Audio Interface Mode
SCKI LRCK 0 1 1 SE Ch 4 (VINL4 / VINR4)
ADGND ADGND AX1 I2C-Mode SDA 1 0 0 SE Ch 4 with 12dB gain 0 0 Slave Mode,256fS,384fS,512fS Auto Detect
A AADC_3.3VS_A A3.3VS ADGND 2 1 Modify,6/6 Tim PCM1861 PCM1863
AR1 STUFFAR1 NO STUFF
MD3 SPI-ModeSerial Bit Clock I2C-Mode
Serial Bit Clock
MD4 SPI-Mode Master In, Slave Out or
1 0 1 SE Ch 4 with 32dB gain
1 1 0 Diff Ch1(VIN1P/VIN1M,VIN2P/VIN2M) 1
0
1
1 Master Mode (512fS)
A
AR30 3.3_06 3 4 ADGND MD0 AR9 NO STUFF AR9 STUFF I2C-Mode GPIO0,
MD5 GPIO 1, Interrupt A or
1 1 1 Diff Ch2(VIN3P/VIN3M,VIN4P/VIN4M)
with 12dB gain
AC17
AC22 *FSX3M 24.576MHZ AC21
Add PCM1863枸䔁SMBUS,6/11 Tim
MD1 AR10 STUFF
AR12 STUFF
AR10 STUFF Digital Microphone Input
MD6 GPIO 2, Interrupt B or
MD4 Audio Format
high = Left Justified, low = I2S
AC18
*20p_50V_NPO_04 MD2 AR4 NO STUFF AR12 NO STUFF Digital Microphone Clock Output
*20p_50V_NPO_04
0.1u_16V_Y5V_04 10u_6.3V_X5R_06 AR11 STUFF
ADGND ADGND APCH_SMB_DATA AR113 *22_04 APCM_MD2 MD3 AR3 NO STUFF AR11 NO STUFF
Title
AAUDG AAUDG
APCH_SMB_CLK AR114 *22_04 APCM_MD3
MD4 AR13 STUFF AR13 NO STUFF
[55] AUDIO B'D 1861+5766_1(SPK)
MD5 AR14 STUFF AR14 NO STUFF 54,56 A3.3V Size Document Number Rev
MD6 AR15 STUFF AR15 NO STUFF
54,56 A3.3VS
54,56 AAMP_PWR Custom SCHEMATIC1 6-71-P8708-D03 1.0
5 4 3 2 1
B - 56 Audio Board (Speaker)

Schematic Diagrams
Audio Board (Subwoofer)

5 4 3 2 1
AUDIO AMP FOR SUB WOOFER(TAS5766DCA_2)
D D
Follow TI recommend,4/14 Tim AAMP_PWR
7/30 0805-->0603
1
AAMP2_3.3VS AMP POWER->12V Modify value
Modify 22Ohm,6/14 Tim 6/14 Tim AC83 AC159 AC160 AC81 + AC54
AC80
Modify,3/30 Tim
54,55 ASMD_VGA_THERM ASMD_VGA_THERM AR72 *22_04
APCH_SMB_DATA AR84 22_04 1u_25V_X5R_06 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 180u_16V_6.3*5.8
2
54,55 APCH_SMB_DATA ADGND ADGND
1u_6.3V_X5R_04
1u_25V_X5R_06
2.2u_16V_X5R_06
AW_5766_INNRAC110 2.2u_16V_X5R_06
75K_1%_04
47K_1%_04
ADGND ADGND ADGND ADGND ADGND ADGND NEAR 5766 PIN6/PIN7
Add,6/11 Tim ASMC_VGA_THERM AR73 *22_04
54,55 ASMC_VGA_THERM
54,55 APCH_SMB_CLK APCH_SMB_CLK AR85 22_04
A3.3V AL27
HCB1608KF-121T30
AW_5766_GAIN
AC56 0.22u_16V_X7R_06 AL6 HCB1608KF-121T30
AW_5766_BSPR . ASUBWOOFER+
AC158
AC31
AW_5766_GVDD AR108
AR111
AW_5766_OUTPR
AW_5766_INPRAC111
AR37
A3.3VS AAMP2_3.3VS 1000p_50V_X7R_04
AC82
AL22 3.3_06
AW_5766_SDA
AW_5766_SCL
AW_5766_DACR
*HCB1608KF-121T30
A5766_MCLK2 ADGND ADGND AW_5766_OUTNR
55 A5766_MCLK2 ADGND AC55
AADC_BCLK ADGND AC57
AC139 AC155 AC157 55 AADC_BCLK ADGND ADGND ADGND 0.22u_16V_X7R_06 820p_50V_X7R_04
22u_6.3V_X5R_08 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 55 AADC_DOUT
AADC_DOUT AW_5766_BSNR
AL7
HCB1608KF-121T30
.
ADGND Sheet 56 of 58
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
4 Ohm Speaker
Audio Board
1
ADGND ADGND ADGND AU4
C SUBWOOFER C
DIN
GPIO3
GPIO2
GPIO1
BCLK
SCLK
ADR2
SCL
SDA
GND3
AVDD
DACR
INPR
INNR
GND2
GAIN/FSW
GVDD
PVCC2
PVCC1
BSPR
OUTPR
GND1
OUTNR
BSNR
AJ_SUBWOOF1
ASUBWOOFER+
(Subwoofer)
Follow TI Recommend 1/10
ASUBWOOFER- 2
1
Follow TI recommend,4/14 Tim 85205-02701
P/N:6-20-41100-002
I2C Address
Address ADR2 ADR1

TAS5766DCA PowerPAD
49
0x9A 0 1
XSMT/UVP
FAULTZ
ADGND
CPVDD
OUTNL
PVCC3
PVCC4
OUTPL
LRCLK
CAPM
VNEG
LDOO
DVDD
GND4
GND5
GND6
AVCC
GND7
CAPP
ADR1
DACL
BSNL
BSPL
INNL
INPL
TAS5766MDCA
25
26
27
1u_6.3V_X5R_04 AW_5766_LDOO28
29
30
31
AW_5766_CAPP 32
33
AW_5766_CAPM34
1u_25V_X5R_06 AW_5766_VNEG35
AW_5766_DACL 36
37
38
39
40
41
42
43
AW_5766_BSPL 44
AW_5766_OUTPL 45
46
AW_5766_OUTNL 47
48
AADC_LRCK AC58 AL8
55 AADC_LRCK
0.22u_16V_X7R_06 HCB1608KF-121T30
AR86 ADGND AW_5766_BSNL . ASUBWOOFER-
10K_04 ADGND
AC59
AR51
1u_6.3V_X5R_04
1000p_50V_X7R_04
ADGND 3.3_06
AC112 1u_6.3V_X5R_04
AAMP2_3.3VS AAMP2_3.3VS ADGND

AC32
AAMP_EN ADGND 820p_50V_X7R_04
B 54,55 AAMP_EN
Remove Net,3/12 Tim
AC60 AL9
B
0.22u_16V_X7R_06 HCB1608KF-121T30 ADGND
.
AC113
AC156
AC114
ADGND
AAMP_PWR
7/30 0805-->0603
ADGND ADGND ADGND AC84 AC86 AC153 AC85 AC154
AR107 *0_04 1u_25V_X5R_06 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08
ADGND ADGND ADGND ADGND ADGND

NEAR 5766 PIN41/PIN42/PIN43
A A
Title
54,55 A3.3V
54,55 A3.3VS
[56] AUDIO B'D 5766_2(WOOFER)
54,55 AAMP_PWR Size Document Number Rev
Custom SCHEMATIC16-71-P8708-D03 1.0
5 4 3 2 1
Audio Board (Subwoofer) B - 57

Schematic Diagrams
Audio Jack
5 4 3 2 1
AUDIO JACK
D D
LINE
AJ_LINE1
5
ALINE_SENSE 4
ALINE-R AL1 FCM1005KF-121T03 3
54 ALINE-R
6
ALINE-L AL2 FCM1005KF-121T03 2
54 ALINE-L
1
AC5 AC12 2SJ-T351-033H
AR26 AR17 AR16 AR25 Modify,7/30
680p_50V_X7R_04
680p_50V_X7R_04
*1K_04
*1K_04
22K_04 22K_04 AAUDG
Modify value(NPOĺX7R),1/27 Tim
AAUDG AAUDG
AAUDG AAUDG MIC

AAUDG AAUDG AJ_MIC1
5
AMIC_SENSE 4
AMIC1-R AL3 1 2 FCM1005KF-121T03 3 AR8 10K_1%_04 ALINE_SENSE
Sheet 57 of 58 54 AMIC1-R
54 AMIC1-L
AMIC1-L AL4 1 2 FCM1005KF-121T03
6
2
1
54 AJD_SENSEA
54 AJD_SENSEB
AJD_SENSEA
AJD_SENSEB
AR29
AR41
AR64
20K_1%_04
39.2K_1%_04
5.1K_1%_04
AMIC_SENSE
AHP_SENSE
ASIDE_SENSE
AC24 AC25 2SJ-T351-033H
Audio Jack C Modify,7/30

C
680p_50V_X7R_04
680p_50V_X7R_04
AAUDG
Modify value(NPOĺX7R),1/27 Tim
SPDIFO
AAUDG AAUDG AJ_SPDIF1
1
ASIDE_L AL161 2 FCM1005KF-121T03 2
54 ASIDE_L AL191
ASIDE_R 2 FCM1005KF-121T03 3
54 ASIDE_R
ASIDE_SENSE 4
AC98 AC129 5
A5VS AAUDG 7/30 EMI
AAUDG 680p_50V_X7R_04 A AJ1

AR65 AR76 680p_50V_X7R_04 B DRIVE
AL201 1 2
2 FCM1005KF-121T03 C IC
54 ASPDIFO TX
22K_04
22K_04
AC144 TOJ-0015STR2-2-H4-PA9T-J *3mm

AJ2
0.1u_16V_Y5V_04 1 2
AR75 AC128
*220_04 180p_50V_NPO_04 *8mm
AAUDG AAUDG
AJ3
AGND AGND AGND 1 2
B ADD R920,R921,CHANGE R569,R570 to 75_04
FOLLOW REALTEK,1/10
B
*3mm
AJ7
1 2
*3mm

HP AGND AAUDG
AJ_HP1
AR43 AL14 AAUDG 5
56_04 FCM1005KF-121T03 AHP_SENSE 4
AHEADPHONE-RC 3
54 AHEADPHONE-RC
AHP1_PLUG 6
AHEADPHONE-LC 2
54 AHEADPHONE-LC
AL15 1
AR56 FCM1005KF-121T03 2SJ-T351-033H
56_04 Modify,7/30
AR55 AR44 AC68 AC97 AR54 AR63 AR42 AR40
0_04
100p_50V_NPO_04
100p_50V_NPO_04
*1K_04
*1K_04
*0_04
22K_04
22K_04
A A
AAUDG AAUDG AAUDG AAUDG AAUDG AAUDG
AHP_AUDG AAUDG
54 AHP_AUDG
Title
[57] AUDIO B'D AUDIO JACK
54 A5VS Size Document Number Rev
A3 SCHEMATIC16-71-P8708-D03 1.0
5 4 3 2 1
B - 58 Audio Jack
Schematic Diagrams
Power Sequence
5 4 3 2 1
Power on
RTCRST#
PWR_SW#
DD_ON 1.35s
D D
3.3V 1.69ms
931.15ms
VDD5
5V 1.76ms
SLP_SUS# 32ms
3.3VA 24.15us
1.0VA 958.65us
51.18ms
RSMRST# (=DPWROK)
81.84ms 122ms
PWR_BTN#
SUSC#
2.5V 910.06us
Sheet 58 of 58
C C
VCCST_VCCPLL
7.94us
Power Sequence
1.46ms
VDDQ
36us
SUSB#
5VS 569.37us
3.3VS 615.31us
910.72us
5VS_2
VCCIO_EN
11.88ms
VCCIO 9.33ms
VCCIO_PWRGD 9.17ms
10.88ms
B VCCSA 953.58us B
VR_READY 5.05ms
ALL_SYS_PWRGD 12ms
VCCST_PWRGD 37ns
PM_PCH_PWROK 10.73ms
51.9ns
DDR_VTT_CNTL 10.73ms
9.96us
VTT_MEM
127.74ms
PCH_CLKOUT
1.98ms
H_PWRGD
EC DELAY_PWRGD (=PM_PWROK) 103.23ms
A A
SYS_PWROK
S4_STAT# 2.58ms
70us
PLTRST#
VCORE 2.51ms
Title
[58] SEQUENCE
Custom SCHEMATIC1 1.0

5 4 3 2 1
Power Sequence B - 59
Schematic Diagrams
B - 60
BIOS Update
Appendix C:Updating the FLASH ROM BIOS 

BIOS Version
To update the FLASH ROM BIOS, you must: Make sure you down-
• Download the BIOS update from the web site. load the latest correct
• Unzip the files onto a bootable CD/DVD/USB Flash Drive. version of the BIOS ap-
propriate for the com-
• Reboot your computer from an external CD/DVD/USB Flash Drive. puter model you are
• Use the flash tools to update the flash BIOS using the commands indicated below. working on.
• Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
You should only
• Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
download BIOS ver-
• After rebooting the computer you may restart the computer again and make any required changes to the default BIOS sions that are
settings.
C:BIOS Update
V1.01.XX or higher as
appropriate for your
Download the BIOS computer model.
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. Note that BIOS versions
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files are not backward com-
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model patible and therefore
(see sidebar for important information on BIOS versions). you may not down-
grade your BIOS to an
older version after up-
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive grading to a later ver-
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the sion (e.g if you upgrade
a BIOS to ver 1.01.05,
downloaded files.
you MAY NOT then go
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB back and flash the BIOS
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software). to ver 1.01.04).
Set the computer to boot from the external drive

1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the “+” and “-” keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.
C - 1
BIOS Update
Use the flash tools to update the BIOS

1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message “Starting MS-DOS”. You will then be prompted to give “Y” or “N” responses to the programs
being loaded by DOS. Choose “N” for any memory management programs.
2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB
flash drive).
3. Type the following command at the DOS prompt:
C:\> Flash.bat
4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
C:BIOS Update
restarts.
Restart the computer (booting from the HDD)

1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F3) and select “Yes” to confirm the selection.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.
Your computer is now running normally with the updated BIOS

You may now enter the BIOS and make any changes you require to the default settings.
C-2

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About this Manual

The following information is included:

Appendix A, Part Lists

IMPORTANT SAFETY INSTRUCTIONS

Instructions for Care and Operation

Also note the following

• Hazardous mov- The computer has specific power requirements:

User’s Manual on Disc

4. Securely attach any peripherals you want to use with

SPT-H 6/7 ..................................................................................... B-21 Finger Sensor Board .....................................................................B-53

M.2 M Key, B Key ....................................................................... B-35

Specifications Processor Options Pointing Device

NVIDIA® GeForce GTX 980M PCIe Video Card

Interface Environmental Spec

1 - 4 External Locator - Top View with LCD Panel Open

External Locator - Front & Right side Views Figure 2

External Locator - Front & Right side Views 1 - 5

External Locator - Left Side & Rear View

1 - 6 External Locator - Left Side & Rear View

External Locator - Bottom View Figure 6

To prevent your com-

External Locator - Bottom View 1 - 7

Figure 7 Mainboard Overview - Top (Key Parts)

1 - 8 Mainboard Overview - Top (Key Parts)

Mainboard Overview - Bottom (Key Parts) Figure 8

Mainboard Overview - Bottom (Key Parts) 1 - 9

Figure 9 Mainboard Overview - Top (Connectors)

1. RJ-45 LAN Jacks

1 - 10 Mainboard Overview - Top (Connectors)

Mainboard Overview - Bottom (Connectors) Figure 10

Mainboard Overview - Bottom (Connectors) 1 - 11

An example of these types of boxes are shown in the sidebar.

To remove the Battery: To remove and install the Processor:

1. Remove the battery page 2 - 5

To remove and install the Video Card:

Removing the Battery Figure 1

Removing the Battery 2 - 5

5. Carefully remove screws 13 - 16 (Figure 2b).

2 - 6 Removing the Battery

Removing the Hard Disk Drive Figure 3

Removing the Hard Disk Drive 2 - 7

There are two hard disk drive options:

• 2 Screws For more information, contact your distributor/supplier, and bear in

2 - 8 Removing the Hard Disk Drive

Hard Disk Size Note (Foam Rubber Insert)

• If you are replacing a 9.5mm(H)

Removing the Hard Disk Drive 2 - 9

Figure 6 Removing the Primary System Memory (RAM)

Memory Upgrade Process

2 - 10 Removing the Primary System Memory (RAM)

5. Pull the latches to release the second module if necessary.

Be careful not to touch the metal pins on the module’s connecting

Removing the Primary System Memory (RAM) 2 - 11

2 - 12 Removing the System Memory (RAM) from Under the Keyboard

Be careful not to touch the metal pins on the mod- 15 

Removing the System Memory (RAM) from Under the Keyboard 2 - 13

Figure 9 Removing and Installing the Video Card

Heat Sink Screw Removal

22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 560u_2.5V_6.66.65.9 560u_2.5V_6.66.65.9