Electronics and Circuits: Lecture Notes
Electronics and Circuits: Lecture Notes
Electronics and Circuits: Lecture Notes
Electronics and
Circuits
Lecture Notes
2015
1 1H i (t )
vs 1F 1H
+5 V
3 7 20 k
3 k 3 k
8
REF
G=100 AD620B 6 IN
499
3 k 3 k 1 5 DIGITAL
10 k ADC DATA
2 4 OUTPUT
AD705 AGND
20 k
PMcL
Preface
These notes comprise part of the learning material for 48520 Electronics and
Circuits. They are not a complete set of notes. Extra material and examples
may also be presented in the lectures and tutorials.
These notes are hyperlinked. All green text is a link to somewhere else within
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There are also some internal linked words that take you to the relevant text.
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Contact
If you discover any errors or feel that some sections need clarifying, please do
not hesitate in contacting me:
Peter McLean
School of Electrical, Mechanical and Mechatronic Systems
Faculty of Engineering and Information Technology
University of Technology, Sydney
Contents
PMcL Index
2015 Contents
ii
Index PMcL
Contents 2015
iii
PMcL Index
2015 Contents
iv
5 Reactive Components
Introduction ...................................................................................................... 5.2
5.1 The Capacitor ............................................................................................. 5.3
5.1.1 Capacitor v-i Relationships ........................................................... 5.5
5.1.2 Energy Stored in a Capacitor ........................................................ 5.7
5.1.3 Summary of Important Capacitor Characteristics ....................... 5.10
5.2 The Inductor ............................................................................................. 5.11
5.2.1 Inductor v-i Relationships ........................................................... 5.14
5.2.2 Energy Stored in an Inductor ...................................................... 5.19
5.2.3 Summary of Important Inductor Characteristics ......................... 5.22
5.3 Practical Capacitors and Inductors ........................................................... 5.23
5.3.1 Capacitors.................................................................................... 5.23
5.3.2 Electrolytic Capacitors ................................................................ 5.24
5.3.3 Inductors...................................................................................... 5.25
5.4 Series and Parallel Connections of Inductors and Capacitors ................. 5.27
5.4.1 Inductors...................................................................................... 5.27
5.4.2 Capacitors.................................................................................... 5.30
5.5 Circuit Analysis with Inductors and Capacitors ...................................... 5.32
5.5.1 DC Circuits ................................................................................. 5.32
5.5.2 Nodal and Mesh Analysis ........................................................... 5.34
5.6 Duality...................................................................................................... 5.36
5.7 Summary .................................................................................................. 5.40
5.8 References ................................................................................................ 5.41
Exercises ........................................................................................................ 5.42
Index PMcL
Contents 2015
v
PMcL Index
2015 Contents
vi
Index PMcL
Contents 2015
vii
10 Op-Amp Imperfections
Introduction ................................................................................................... 10.2
10.1 DC Imperfections .................................................................................. 10.3
10.1.1 Offset Voltage ............................................................................. 10.4
10.1.2 Input Bias Currents ..................................................................... 10.5
10.2 Finite Open-Loop Gain .......................................................................... 10.8
10.2.1 Noninverting Amplifier .............................................................. 10.8
10.2.2 Inverting Amplifier ..................................................................... 10.9
10.2.3 Percent Gain Error .................................................................... 10.11
10.3 Finite Bandwidth ................................................................................. 10.12
10.4 Output Voltage Saturation ................................................................... 10.13
10.5 Output Current Limits ......................................................................... 10.14
10.6 Slew Rate ............................................................................................. 10.15
10.6.1 Full-Power Bandwidth .............................................................. 10.16
10.7 Summary.............................................................................................. 10.17
10.8 References ........................................................................................... 10.18
Exercises ...................................................................................................... 10.19
PMcL Index
2015 Contents
viii
12 Circuit Simulation
Introduction .................................................................................................... 12.2
12.1 Project Flow ........................................................................................... 12.3
12.1.1 Starting a New Project ................................................................ 12.3
12.1.2 Drawing the Schematic ............................................................... 12.4
12.1.3 Simulation ................................................................................... 12.4
12.2 Schematic Capture ................................................................................. 12.5
12.2.1 Ground ........................................................................................ 12.5
12.2.2 SI Unit Prefixes ........................................................................... 12.6
12.2.3 All Parts Must Have Unique Names ........................................... 12.6
12.2.4 Labeling Nodes ........................................................................... 12.7
12.3 Simulation .............................................................................................. 12.8
12.3.1 DC Bias ....................................................................................... 12.8
12.3.2 Time-Domain (Transient) Simulations ....................................... 12.8
12.3.3 AC Sweep / Noise Simulations ................................................. 12.11
Exercises ...................................................................................................... 12.16
Index PMcL
Contents 2015
ix
PMcL Index
2015 Contents
x
14 Amplifier Characteristics
Introduction .................................................................................................... 14.2
14.1 Amplifier Performance .......................................................................... 14.3
14.1.1 Voltage Gain ............................................................................... 14.4
14.1.2 Current Gain ................................................................................ 14.4
14.1.3 Power Gain .................................................................................. 14.4
14.2 Cascaded Amplifiers .............................................................................. 14.5
14.3 Power Supplies and Efficiency .............................................................. 14.8
14.3.1 Efficiency .................................................................................... 14.9
14.4 Amplifier Models ................................................................................. 14.10
14.4.1 Voltage Amplifier ..................................................................... 14.10
14.4.2 Current Amplifier ...................................................................... 14.11
14.4.3 Transconductance Amplifier ..................................................... 14.12
14.4.4 Transresistance Amplifier ......................................................... 14.13
14.5 Amplifier Impedances .......................................................................... 14.14
14.6 Frequency Response ............................................................................ 14.17
14.6.1 AC Coupling and Direct Coupling............................................ 14.18
14.6.2 Half-Power Frequencies and Bandwidth .................................. 14.20
14.7 Linear Waveform Distortion ................................................................ 14.21
14.7.1 Amplitude Distortion ................................................................ 14.21
14.7.2 Phase Distortion ........................................................................ 14.21
14.7.3 Distortionless Amplification ..................................................... 14.25
14.8 Step Response ...................................................................................... 14.26
14.9 Harmonic Distortion ............................................................................ 14.27
14.10 Summary ............................................................................................ 14.29
14.11 References .......................................................................................... 14.30
Index PMcL
Contents 2015
xi
15 Frequency Response
Introduction ................................................................................................... 15.2
15.1 Frequency Response Function ............................................................... 15.3
15.2 Frequency Response Representation ..................................................... 15.4
15.3 Determining the Frequency Response from Circuit Analysis ............... 15.5
15.4 Magnitude Responses ............................................................................ 15.7
15.5 Phase Responses .................................................................................. 15.11
15.6 Determining the Frequency Response Experimentally ....................... 15.13
15.7 Bode Plots ............................................................................................ 15.14
15.7.1 Bode Plot Factors ...................................................................... 15.16
15.7.2 Approximating Bode Plots ....................................................... 15.18
15.8 Approximate Bode Plot Frequency Response Factors ........................ 15.21
15.9 Summary.............................................................................................. 15.22
15.10 References ......................................................................................... 15.22
Exercises ...................................................................................................... 15.23
PMcL Index
2015 Contents
xii
18 Waveform Generation
Introduction .................................................................................................... 18.2
18.1 Open-Loop Comparator ......................................................................... 18.3
18.2 Comparator with Hysteresis (Schmitt Trigger)...................................... 18.4
18.3 Astable Multivibrator (Schmitt Trigger Clock) ..................................... 18.6
18.4 Waveform Generator ............................................................................. 18.9
18.5 Summary .............................................................................................. 18.12
18.6 References ............................................................................................ 18.13
Index PMcL
Contents 2015
xiii
PMcL Index
2015 Contents
xiv
21 Complex Frequency
Introduction .................................................................................................... 21.2
21.1 Complex Frequency ............................................................................... 21.3
21.2 The Damped Sinusoidal Forcing Function ............................................ 21.7
21.3 Generalized Impedance and Admittance ............................................. 21.11
21.4 Frequency Response as a Function of ............................................ 21.14
21.5 Frequency Response as a Function of ............................................ 21.18
21.6 The Complex-Frequency Plane............................................................ 21.23
21.7 Visualization of the Frequency Response from a Pole-Zero Plot ........ 21.29
21.8 Summary .............................................................................................. 21.32
21.9 References ............................................................................................ 21.32
Exercises ...................................................................................................... 21.33
22 Specialty Amplifiers
Introduction .................................................................................................... 22.2
22.1 Differential and Common-Mode Signals ............................................... 22.3
22.2 Difference Amplifiers ............................................................................ 22.4
22.2.1 Difference Amplifier Deficiencies .............................................. 22.6
22.2.2 Difference Amplifier ICs ............................................................ 22.6
22.3 Instrumentation Amplifiers .................................................................... 22.7
22.3.1 In-Amp Advantages .................................................................... 22.8
22.3.2 In-Amp Disadvantages ................................................................ 22.9
22.3.3 In-Amp Application .................................................................. 22.10
22.4 Programmable Gain Amplifiers ........................................................... 22.11
22.4.1 PGA Design Issues.................................................................... 22.12
22.4.2 PGA Example ........................................................................... 22.12
22.5 Isolation Amplifiers ............................................................................. 22.13
22.6 Summary .............................................................................................. 22.16
22.7 References ............................................................................................ 22.16
Exercises ...................................................................................................... 22.17
Index PMcL
Contents 2015
xv
23 Transfer Functions
Introduction ................................................................................................... 23.2
23.1 Transfer Functions ................................................................................. 23.3
23.1.1 Characteristic Equation ............................................................... 23.4
23.1.2 Pole-Zero Plot ............................................................................. 23.4
23.1.3 Transfer Function Form .............................................................. 23.5
23.1.4 Relationship to Differential Equation ......................................... 23.6
23.1.5 Circuit Abstraction...................................................................... 23.7
23.2 Forced Response .................................................................................... 23.8
23.3 Frequency Response ............................................................................ 23.12
23.4 Natural Response ................................................................................. 23.15
23.5 Complete Response ............................................................................. 23.21
23.6 Summary.............................................................................................. 23.24
23.7 References ........................................................................................... 23.25
Exercises ...................................................................................................... 23.26
Pierre Simon de Laplace (1749-1827) ......................................................... 23.29
PMcL Index
2015 Contents
xvi
25 System Modelling
Introduction .................................................................................................... 25.2
25.1 Differential Equations of Physical Systems ........................................... 25.3
25.2 Linear Approximations of Physical Systems ......................................... 25.5
25.3 The Transfer Function............................................................................ 25.8
25.4 Block Diagrams ..................................................................................... 25.9
25.5 Feedback .............................................................................................. 25.16
25.6 Summary .............................................................................................. 25.19
25.7 References ............................................................................................ 25.19
Exercises ...................................................................................................... 25.20
26 Revision
Answers
Index PMcL
Contents 2015
1.1
Contents
Introduction
Electric circuit theory and electromagnetic theory are the two fundamental
theories upon which all branches of electrical engineering are built. Many
branches of electrical engineering, such as power, electric machines, control,
electronics, communications, and instrumentation, are based on electric circuit
theory. Circuit theory is also valuable to students specializing in other branches
of the physical sciences because circuits are a good model for the study of
energy systems in general, and because of the applied mathematics, physics,
and topology involved.
Electronic circuits are used extensively in the modern world – society in its
present form could not exist without them! They are used in communication
systems (such as televisions, telephones, and the Internet), digital systems (such
as personal computers, embedded microcontrollers, smart phones), and
industrial systems (such as robotic and process control systems). The study of
electronics is therefore critical to electrical engineering and related professions.
One goal in this subject is to learn various analytical techniques and computer
software applications for describing the behaviour of electric circuits. Another
goal is to study various uses and applications of electronic circuits.
We will start by revising some basic concepts, such as KVL, KCL and Ohm’s
Law. We will then introduce the concept of the electronic amplifier, and then
study a device called an operational amplifier (op-amp for short), which has
been used as the building block for modern analog electronic circuitry since its
invention in the 1960’s.
1.1 Current
Charge in motion represents a current. The current present in a discrete path,
such as a metallic wire, has both a magnitude and a direction associated with it
– it is a measure of the rate at which charge is moving past a given reference
point in a specified direction. Current is symbolised by i and thus:
Current defined as
dq
i
the rate of change of
charge moving past (1.1)
a reference dt
Representation of
current in a circuit
i
Figure 1.1
The arrow does not indicate the “actual” direction of charge flow, but is simply
part of a convention that allows us to talk about the current in an unambiguous
manner.
The use of terms such as “a current flows through the resistor” is a tautology
Correct usage of the
term “current” and should not be used, since this is saying a “a charge flow flows through the
resistor”. The correct way to describe such a situation is “there is a current in
the resistor”.
1
Later we shall also see that a periodic current (e.g. a square wave), with no DC term, can also
be referred to as an alternating current.
1.2 Voltage
A voltage exists between two points in a circuit when energy is required to
move a charge between the two points. The unit of voltage is the volt (V) and
is equivalent to JC-1 . In a circuit, voltage is represented by a pair of +/- signs:
Representation of
voltage in a circuit
A
Figure 1.2
Once again, the plus-minus pair does not indicate the “actual” voltage polarity.
A A
v = -5 V v=5V
B B
(a) (b)
A A
v=5V v = -5 V
B B
(c) (d)
Ideal circuit
relationship. Although ideal circuit elements are not “off-the-shelf” circuit
elements are used components, their importance lies in the fact that they can be interconnected
to model real circuit
elements (on paper or on a computer) to approximate actual circuits that are composed
of nonideal elements and assorted electrical components – thus allowing for the
analysis of such circuits.
vs
Figure 1.3
If the value of the voltage source is constant, that is, does not change with time, An ideal battery is
then we can also represent it as an ideal battery: equivalent to an
independent voltage
source that has a
constant value
Vs Vs
Figure 1.4
Although a “real” battery is not ideal, there are many circumstances under
which an ideal battery is a very good approximation.
A few typical voltage waveforms are shown below. The waveforms in (a) and
(b) are typical-looking amplitude modulation (AM) and frequency modulation
(FM) signals, respectively. Both types of signals are used in consumer radio
communications. The sinusoid shown in (c) has a wide variety of uses; for
example, this is the shape of ordinary household voltage. A “pulse train”, such
as that in (d), can be used to drive DC motors at a variable speed.
v v
t t
(a) (b)
v v
t
(c) (d)
Figure 1.5
Since the voltage produced by a source is in general a function of time, then the
most general representation of an ideal voltage source is as shown below:
The most general
representation of an
ideal independent
voltage source
vs ( t ) vs ( t )
"intuitive" AS 1102
IEC 60617
Figure 1.6
Index Independent Sources PMcL
Terminal 1
is
Terminal 2
Figure 1.7
Since the current produced by a source is in general a function of time, then the
most general representation of an ideal current source is as shown below:
The most general
representation of an
ideal independent
current source
is ( t ) is ( t )
"intuitive" AS 1102
IEC 60617
Figure 1.8
i
A
v
v conductor l
Figure 1.9
Ohm found that in many conducting materials, such as metal, the current is
always proportional to the voltage. Since voltage and current are directly
proportional, there exists a proportionality constant R, called resistance, such
that:
Ohm’s Law
v Ri (1.2)
This is Ohm’s Law. The unit of resistance (volts per ampere) is referred to as
the ohm, and is denoted by the capital Greek letter omega, Ω.
R
1
Figure 1.10
l The resistance of a
R (1.3) uniform resistor
A
where l is the length of the resistor, and A is the cross-sectional area. The
resistivity, , is a constant of the conducting material used to make the
resistor.
The circuit symbol for the resistor is shown below, together with the direction
of current and polarity of voltage that make Ohm’s Law algebraically correct:
"intuitive" AS 1102
IEC 60617
Figure 1.11
PMcL The Resistor and Ohm’s Law Index
i1
10 V v 1 k
i2
The voltage across the 1 kΩ resistor is, by definition of an ideal voltage source,
vt 10 V . Thus, by Ohm’s Law, we get:
v 10
i1 0.01 A 10 mA
R 1000
and:
v 10
i2 0.01 A 10 mA
R 1000
i (t )
3cos( t ) A v( t ) 50
vt Ri t
50 3 cos t
150 cos t V
The short-circuit
i( t ) i( t )
arbitrary arbitrary
v( t ) R= 0 v( t )
circuit circuit
Figure 1.12
By Ohm’s Law:
v Ri
0i
0V (1.4)
Thus, no matter what finite value it has, vt will be zero. Hence, we see that
a zero-ohm resistor is equivalent to an ideal voltage source whose value is zero
volts, provided that the current through it is finite.
The open-circuit
i i
arbitrary arbitrary
v R = v
circuit circuit
Figure 1.13
By Ohm’s Law:
v
i
R
v
0A (1.5)
Thus, no matter what finite value vt has, it will be zero. Thus, we may
conclude that an infinite resistance is equivalent to an ideal current source
whose value is zero amperes, provided that the voltage across it is finite.
1.5.3 Conductance
Conductance
1
defined
G (1.6)
R
The unit of conductance is the siemen, and is abbreviated S. The same circuit
symbol is used to represent both resistance and conductance.
Some types of
resistors
chip array
chip - thick film chip - thin film
The “through-hole” resistors are used by hobbyists and for prototyping real
designs. Their material and construction dictate several of their properties, such
as accuracy, stability and pulse handling capability.
The wire wound resistors are made for accuracy, stability and high power
applications. The array is used where space is a premium and is normally used
in digital logic designs where the use of “pull-up” resistors is required.
Component values For example, if 6 values per decade are desired, the common ratio is
are spaced
equidistantly on a 6
10 1.468 . The six rounded-off values become 100, 150, 220, 330, 470, 680.
logarithmic scale
1.6.2 The ‘E’ Series Values
The IEC set the number of values for resistors (and capacitors) per decade
based on their tolerance. These tolerances are 0.5%, 1%, 2%, 5%, 10%, 20%
and 40% and are respectively known as the E192, E96, E48, E24, E12, E6 and
The ‘E’ series E3 series, the number indicating the quantity of values per decade in that
values explained
series. For example, if resistors have a tolerance of 5%, a series of 24 values
can be assigned to a single decade multiple (e.g. 100 to 999) knowing that the
possible extreme values of each resistor overlap the extreme values of adjacent
resistors in the same series.
Any of the numbers in a series can be applied to any decade multiple set. Thus,
for instance, multiplying 220 by each decade multiple (0.1, 1, 10 100, 1000
etc.) produces values of 22, 220, 2 200, 22 000, 220 000 etc.
The IEC also defines how manufacturers should mark the values of resistors
and capacitors in the standard called IEC 60062. The colours used on fixed
leaded resistors are shown below:
IEC labelling for
leaded resistors
4 bands 22 , 5%
5 bands 2200 , 1%
orange 3 3 3 3 1k 15 ppm
grey 8 8 8 8 1 ppm
white 9 9 9 9 Tolerance
Multiplier Temperature
Significant Figures Coefficient
The resistance colour code consists of three or four colour bands and is
followed by a band representing the tolerance. The temperature coefficient
band, if provided, is to the right of the tolerance band and is usually a wide
band positioned on the end cap.
The resistance colour code includes the first two or three significant figures of
the resistance value (in ohms), followed by a multiplier. This is a factor by
which the significant-figure value must be multiplied to find the actual
resistance value. (i.e. the number of zeros to be added after the significant
figures).
The colours used and their basic numerical meanings are recognized
internationally for any colour coding used in electronics, not just resistors, but
some capacitors, diodes, cabling and other items.
The colours are easy to remember: Black is the absence of any colour, and
therefore represents the absence of any quantity, 0. White (light) is made up of
all colours, and so represents the largest number, 9. In between, we have the The resistor colour
code explained
colours of the rainbow: red, orange, yellow, green, blue and violet. These take
up the numbers from 2 to 7. A colour in between black and red would be
brown, which has the number 1. A colour intermediate to violet and white is
grey, which represents the number 8.
When resistors are labelled in diagrams, such as schematics, IEC 60062 calls
for the significant figures to be printed as such, but the decimal point is
replaced with the SI prefix of the multiplier. Examples of such labelling are
shown below:
0.1 0R1
1 1R0
22 22R
3.3 k 3K3
100 k 100K
4.5 M 4M5
Note how the decimal point is expressed, that the ohm symbol is shown as an
R, and that 1000 is shown as a capital K. The use of a letter instead of a
decimal point solves a printing problem – the decimal point in a number may
not always be printed clearly, and the alternative display method is intended to
We use a letter in
place of a decimal help misinterpretation of component values in circuit diagrams and parts lists.
point for labelling
component values
In circuit diagrams and constructional charts, a resistor’s numerical identity, or
designator, is usually prefixed by ‘R’. For example, R15 simply means resistor
number 15.
Note that resistor R4 has the value 4.7 Ω and resistor R12 has the value 330 Ω.
Index Practical Resistors PMcL
R1 R2
v R3
R4 i
Figure 1.17
Even if the figure is redrawn to make it appear that there may be more than one
node, as in the figure below, the connection of the six elements actually
constitutes only one node.
R2
R1
v R3
node
R4 i
Figure 1.18
KCL defined
KCL: At any node of a circuit, the
(1.7)
currents algebraically sum to zero.
i
k 1
k 0 (1.8)
KCL can also be stated as: The sum of the currents entering a node is equal to
the sum of the currents leaving a node.
i1 R3 i6
i2 i5
i3 i4
Choosing the positive sense to be leaving, we apply KCL at the node and
obtain the equation:
i1 i2 i3 i4 i5 i6 0
Note that even if one of the elements – the one which carries i3 – is a short-
circuit, KCL holds. In other words, KCL applies regardless of the nature of the
elements in the circuit.
i1 i2 i3
13 A 1 v 2 2A 3
13 i1 i2 2 i3 0
i1 i2 i3 11
By Ohm’s Law:
v v v
i1 i2 i3
1 2 3
v 6 v 6 v 6
i1 6A i2 3 A i3 2A
1 1 2 2 3 3
Just as KCL applies to any node of a circuit, so must KCL hold for any closed
region, i.e. to satisfy the physical law of conservation of charge, the total
current leaving (or entering) a region must be zero.
i5
i1 i2
Region 3
a i b
Region 1 i3 Region 2 i4
i0
For Region 2:
i1 i3 i4 i2
For Region 3:
i2 i5 i4
You may now ask, “Since there is no current from point a to point b (or vice
versa) why is the connection (a short-circuit) between the points there?” If the
connection between the two points is removed, two separate circuits result. The
voltages and currents within each individual circuit remain the same as before.
Having the connection present constrains points a and b to be the same node,
and hence be at the same voltage. It also indicates that the two separate
portions are physically connected (even though there is no current between
them).
1 2
a b c
v1 v2
6 v6 v7 3
3V
v3
v8
4
f e d
v4
2A
5
v5
Figure 1.19
whereas the paths becba and fde are not:
1 2
a b c
v1 v2
6 v6 v7 3
3V
v3
v8
4
f e d
v4
2A
5
v5
Figure 1.20
PMcL Kirchhoff’s Voltage Law Index
KVL defined
KVL: Around any loop in a circuit, the
(1.9)
voltages algebraically sum to zero.
v
k 1
k 0 (1.10)
KVL can also be stated as: In traversing a loop, the sum of the voltage rises
equals the sum of the voltage drops.
v1 v2 v3 v8 v6 0
v 2 3 v 4 v7 0
In this last loop, one of the elements traversed (the element between nodes b
and e) is an open-circuit; however, KVL holds regardless of the nature of the
elements in the circuit.
2 i
v1 34 V
10 V 4 v2
6
v3
10 v1 34 v2 v3 0
Thus:
v1 v2 v3 24
v1 2i v2 4i v3 6i
v1 2i 2 2 4 V
v 2 4i 4 2 8 V
v3 6i 6 2 12 V
R1 R2 RN
i i
arbitrary v1 v2 vN arbitrary
circuit v circuit v R eq
(a) (b)
Figure 1.21
We apply KVL:
v v1 v2 v N (1.11)
v R1i R2i RN i
R1 R2 RN i
(1.12)
and then compare this result with the simple equation applying to the
equivalent circuit shown in Figure 1.21b:
v Req i (1.13)
Thus, the value of the equivalent resistance for N series resistances is:
Combining series
resistors Req R1 R2 RN (series) (1.14)
i
i
i1 i2 iN
arbitrary
circuit v G1 G2 GN
arbitrary
circuit v Geq
(a) (b)
Figure 1.22
We apply KCL:
i i1 i2 iN (1.15)
i Geq v (1.17)
and thus the value of the equivalent conductance for N parallel conductances is:
Geq G1 G2 GN
Combining parallel
(parallel) (1.18) conductances
1 1 1 1
Combining parallel
resistors (parallel) (1.19)
Req R1 R2 RN
Hence:
1 1 1 1
and (1.22)
Req R1 Req R2
or:
…results in an
equivalent
resistance smaller Req R1 and Req R2 (1.23)
than either resistor
Thus the equivalent resistance of two resistors in parallel is less than the value
of either of the two resistors.
i 5 1
28 V 4 3 v
i 5
28 V 4 4
Note that it is not possible to display the original voltage v in this figure. Since
the two 4 resistors are connected in parallel, we can further simplify the
circuit as shown below:
i 5
28 V 2
Here, the 5 and 2 resistors are in series, so we may combine them into
one 7 resistor. Then, from Ohm’s Law, we have:
28
i 4A
7
a a
v2
arbitrary arbitrary
v circuit veq v circuit
v1
b b
(a) (b)
Figure 1.23
2 i
v1 34 V
10 V 4 v2
6
v3
By rearranging the order in this one loop circuit (of course this does not
affect i), we obtain the circuit shown below:
i 2
34 V v1
10 V 4 v2
6
v3
We can now combine the series independent voltage sources and the series
resistors into single equivalent elements:
-24 V v 12
By Ohm’s Law:
24
i 2 A
12
i a i a
i1 i2 arbitrary i eq arbitrary
circuit circuit
b b
(a) (b)
Figure 1.24
Combining
independent current ieq i1 i2 (parallel) (1.26)
sources in parallel
13 A 1 v 2 2A 3
11 A 1 v 2 3
Since the equivalent resistance of the three resistors in parallel is given by:
1 1 1 1 6 3 2 11
Req 1 2 3 6 6
we obtain:
6
Req
11
v
6
11 6 V
11
i R1
v1
arbitrary
circuit v R2 v2
Figure 1.25
v
i (1.27)
R1 R2
By application of Ohm’s Law again, the voltage across R1 is:
and therefore:
R2
v2 v (1.30)
R1 R2
These equations describe how the voltage is divided between the resistors.
Because of this, a pair of resistors in series is often called a voltage divider.
i 5 1
28 V 4 v1 3 v
i 5
28 V 4 v1 4
i 5
28 V 2 v1
By voltage division:
2 56
v1 28 8V
25 7
Returning to the original circuit and applying voltage division again yields:
3 3
v v1 8 6 V
3 1 4
i
i1 i2
arbitrary
v
circuit R1 R2
Figure 1.26
R1R2
v Reqi i (1.31)
R1 R2
By application of Ohm’s Law again, the current in R1 is i1 v R1 and thus:
R1
i2 i (1.33)
R1 R2
These equations describe how the current is divided between the resistors.
Because of this, a pair of resistors in parallel is often called a current divider.
Note that a larger amount of current will exist in the smaller resistor – thus
current tends to take the path of least resistance!
i1 4
i
36 sin(100 t ) V 6 3
36 sin 100t
i1
4 63 6 3
6 sin 100t A
The current divider rule can also be derived using conductances. Referring to
Figure 1.26, the voltage across the parallel resistors is:
i i
v Reqi (1.34)
Geq G1 G2
G1
i1 i (1.35)
G1 G2
A similar result obviously holds for current i 2 . The advantage of this form of
the current divider rule is that it is the dual of the voltage divider rule – we
replace voltages with currents, and resistors with conductances.
Kvx rm i x
VCVS CCVS
Figure 1.27
These sources are mathematical models that are useful in modelling real
circuits and systems, e.g. they are used in modelling operational amplifiers.
Consider the circuit shown below. This circuit contains a dependent source
whose value in this case depends on the voltage across the 4 Ω resistor – it is a
VCVS.
3v2
i 2
v1
12 V 4 v2
v1 3v2 v2 12
or:
v1 2v2 12
By Ohm’s Law:
v1 2i and v2 4i
Therefore:
2i 24i 12
2i 8i 12
6i 12
i 2 A
Hence:
v2 4i 8 V
3v2 24 V
Ki x gm vx
CCCS VCCS
Figure 1.28
These sources are mathematical models that are useful in modelling real
circuits and systems, e.g. they are used in modelling transistors.
Consider the circuit shown below. In this circuit the value of the dependent
current source is specified by a voltage – it is a VCCS.
i1 i2
2A 3 v 4v 5
i1 i2 4v 2
Thus:
v v
4v 2
3 5
8v
4v 2
15
52v
2
15
30 15
v V
52 26
Consequently:
30
4v A
13
and this is the value of the dependent current source, in amperes. The other
variables in the circuit are:
v 5 v 3
i1 A and i2 A
3 26 5 26
1.14 Power
Power is the rate at which work is done or energy is expended. Taking the
product of voltage (energy per unit charge) and current (charge per unit time)
we get a quantity that measures energy per unit time. It’s for this reason that we
define p , the instantaneous power absorbed by an electrical circuit element, to
be the product of voltage and current:
Instantaneous
power defined p vi (1.36)
A i
Figure 1.29
If one terminal of the element (A) is v volts positive with respect to the other
Passive sign terminal (B), and if a current i is entering the element through terminal A, then
convention defined
– it gives power a power p vi is being absorbed or delivered to the element. When the
absorbed by a
circuit element current arrow is directed into the element at the plus-marked terminal, we
satisfy the passive sign convention. If the numerical value of the power using
this convention is negative, then we say that the element is generating or
delivering power.
3A
2V
p = (2)(3) = 6 W absorbed
-2 V
-3 A
p = (-2)(-3) = 6 W absorbed
-5 A
4V
i( t )
325cos(100 t ) V 100
By Ohm’s Law:
vt 325
it cos100t A
R 100
p R t vt it
325 2
cos 2 100t
100
1056 cos 2 100t W
cos 100 5 10 3 cos 0
2
i
i1 i2 i3
5V 1 2 9A 3
Note that the voltage across each of the elements is 5 V since all the elements
are in parallel. Therefore, by Ohm’s Law:
5 5 5
i1 5A i2 A i3 A
1 2 3
p1 5i1 55 25 W
5 25
p 2 5i2 5 W
2 2
5 25
p3 5i3 5 W
3 3
25 25 150 75 50 275
25 W
2 3 6 6
By KCL:
5 5 5
i 9 i1 i2 i3
1 2 3
or:
30 15 10 1
i 9 A
6 6
5
pv 5i W
6
pi 59 45 W
5 270 5 275
45 W
6 6 6
We see that the total power delivered by the sources is equal to the total power
absorbed by the resistors. Since power delivered by a circuit element is equal to
the negative of the power absorbed, this is equivalent to saying that the total
power absorbed by all circuit elements is zero. Thus, the principle of
conservation of energy (and therefore power) is satisfied in this circuit (as it is
in any circuit).
Consider the circuit shown below, which is identical to the previous example
except for the value of the current source:
i
i1 i2 i3
5V 1 2 10 A 3
In this case:
25 25
p1 25 W p2 W p3 W
2 3
i 10 i1 i2 i3
and thus:
55 5
i 10 A
6 6
5
pi 510 50 W
25
pv 5 W
6 6
275 25
p1 p 2 p3 pv pi 50 0 W
6 6
and again energy (power) is conserved. However, in this case not only do the
resistors absorb power, but so does the voltage source. It is the current source
that supplies all the power absorbed in the rest of the circuit.
i R
Figure 1.30
p Ri 2 (1.37)
v2
p (1.38)
R
A real resistor Both formulas for calculating power absorbed in a resistor R demonstrate that p
always absorbs
power is always a nonnegative number when R is positive. Therefore a resistor always
absorbs power.
Real resistors have The physical size of a resistor determines the amount of power it can safely
a power rating that
dissipate. A power dissipation that exceeds the rating of a resistor can
must not be
exceeded physically damage the resistor. In many electronic applications, resistors need
dissipate only small amounts of power, allowing their use in integrated circuits.
Index Power PMcL
1.15 Amplifiers
A linear amplifier is a device that increases the amplitude of a signal (a voltage
Amplifier defined
or a current) whilst preserving waveform shape. The circuit symbol for an
amplifier is a triangle which clearly shows the direction of signal travel.
Figure 1.31
Note the use of subscript notation: i for input, and o for output. The
relationship between the input and output for the voltage amplifier is:
The input-output
vo Kvi (1.39)
relationship for an
ideal linear voltage
amplifier
The quantity K is referred to as the gain. If the gain is a positive number, then
the amplifier is said to be non-inverting. If the gain is a negative number, then
the amplifier is said to be inverting. Note that a negative number does not
imply a decrease in the signal – it implies an inversion.
Amplifiers are used in numerous places and form one of the basic building-
blocks of electronic circuits. For example, signals in telecommunications that
come from antennas are particularly “weak” and could be in the microvolt or
millivolt range. Reliable processing of these small signals is made easier if the
signal magnitude is much larger.
PMcL Amplifiers Index
The gain K of a voltage amplifier can be expressed in two ways. The first way
is as a straight voltage ratio, with units “volts per volt”:
Amplifier gain vo
expressed in volts
per volt
K V/V
vi (1.40)
The second way comes from the historical development of amplifiers which
were first used extensively throughout telecommunication systems. In these
applications, since signals were audio in nature, it became common to compare
signal amplitudes in terms of the audio power they could deliver. Thus, we can
express the voltage gain with units of decibels:2
Amplifier gain
vo
expressed in
decibels
K 20 log10 dB (1.41)
vi
The dB unit of voltage gain is useful when circuits are cascaded – a cascade
occurs when the output of one circuit is fed into the input of another (and it has
been ensured, through careful design, that one circuit does not “load” the next,
i.e. each individual circuit’s behaviour is independent of the load placed on it).
For cascaded circuits you can add the voltage gains in dB instead of
multiplying the standard voltage gains.
2
Historically the Bel (named after Alexander Graham Bell – the inventor of the first
commercially viable and practical telephone) was used to define ratios of audio loudness i.e.
ratios of power. In the metric system, a convenient unit to use is the decibel (dB):
1 decibel 10 log10 Po Pi . If electrical power is assumed to be dissipated across equal
resistors, then since P V 2 R , the power ratio is 20 log10 Vo Vi . This power ratio became a
way to express the voltage gain of amplifiers. Note that the decibel is dimensionless, so it can
be applied to any dimensionless ratio, if one wished.
A cascade of amplifiers and circuits is shown below, with the gain (or
attenuation) expressed in V/V and dB.
vi v1 v2 vo
A1 R A2
input output
vo v1 v2 vo
A1KA2 10 12 20 100 V/V
vi vi v1 v2
Note that when the gain in V/V is negative, then the signal is inverted.
vo
20 log10 A1KA2
vi
20 log10 A1 20 log10 K 20 log10 A2
20 6 26
40 dB
vo
20 log10 100 20 2 40 dB
vi
When the gain is expressed in dB, it refers to the magnitude of the gain only –
it conveys no phase information. When the gain in dB is a negative number,
then we have attenuation.
A bipolar amplifier
showing the power
supply connections VCC (positive supply)
vi K vo
input output
Figure 1.32
where VCC 15 V and VEE 15 V , with respect to a circuit “common”. The
“CC” subscript in this case refers to the voltage at a “collector” of a transistor
inside the amplifier package, and the “EE” to an “emitter” of a transistor.
Some amplifiers are unipolar, which means they are designed to amplify
signals that are of one polarity only. These amplifiers only require a single DC
power supply, such as +5V.
A unipolar amplifier
showing the power
supply connections VCC (positive supply)
vi K vo
input output
Figure 1.33
Real amplifiers can only output a voltage signal that is within the capabilities
of the internal circuitry and the external DC power supplies. When amplifier
outputs approach their output limitation, they are said to saturate – they cannot
provide the output that is required by a linear characteristic. The resulting
transfer characteristic, with the positive and negative saturation levels denoted
L and L respectively, is shown below:
The transfer
characteristic of a
real amplifier,
vo showing that it
L+ saturates eventually
vi
Figure 1.34
Each of the two saturation levels is usually within a volt or so of the voltage of
the corresponding power supply. Obviously, in order to avoid distorting the
output signal waveform, the input signal swing must be kept within the linear
range of operation. If we don’t, then the output waveform becomes distorted
and eventually gets clipped at the output saturation levels.
The input signal and
the output signal of
a saturated amplifier
showing clipping
Figure 1.35
PMcL Amplifiers Index
For an ideal voltage amplifier, the output voltage is independent of both the
source resistance and the load resistance. Thus, to model an ideal voltage
amplifier, we would use a voltage-controlled voltage source:
The model of an
ideal voltage
amplifier
vi Kv i vo
Figure 1.36
Real voltage amplifiers have a finite input resistance as well as a finite output
resistance. Thus, a model of a real amplifier is:
A linear model of a
real voltage
amplifier
Rout
vi Rin Kv i vo
Figure 1.37
This model is only valid in its linear region of operation. Also note that the
amplifier is unilateral – there is no “path” for a voltage at the output to appear
in some way at the input of the amplifier. Thus, the use of the voltage-
controlled voltage source creates a “one way path” for the voltage from the
input to the output.
Index Amplifiers PMcL
An op-amp circuit
symbol showing all
positive connections
supply
VCC
v
inputs vo output
v
VEE
negative
supply
Figure 1.38
In many circuit diagrams it is customary to omit the power supply and common
connections (the output being understood to be taken with respect to the circuit
common), and so we normally draw:
A simplified op-amp
circuit symbol
v
vo
v
Figure 1.39
The input labelled v is termed the noninverting terminal, and the input
labelled v is termed the inverting terminal. This naming is a result of the op-
amps ability to amplify the difference between these two voltages.
PMcL The Operational Amplifier Index
The op-amp is an amplifier intended for use with external feedback elements,
where these elements determine the resultant function, or operation3. As we
shall see, op-amp circuits can perform a variety of mathematical operations,
such as addition, subtraction, integration and differentiation of voltage signals.
The feedback elements are connected between the op-amp’s output and its
inverting terminal, thus providing what is known as negative feedback.
input
output
vi
vo
Feedback
Network
Figure 1.40
In the figure, the input is applied between the op-amp (+) input and a common,
or reference point, as denoted by the “ground” symbol. This reference point is
also common to the output, the feedback network and the power supply.
3
The naming of the operational amplifier occurred in the classic paper by John R. Ragazzini,
Robert H. Randall and Frederick A. Russell, “Analysis of Problems in Dynamics by Electronic
Circuits,” Proceedings of the IRE, Vol. 35, May 1947, pp. 444-452. This paper references the
op-amp circuits (feedback amplifiers) used by Bell Labs in the development of the “M9 gun
director”, a weapon system which was instrumental in winning WWII.
A simple linear
model of a real
op-amp
Rout
v vo
Rin AOL ( v - v )
Figure 1.41
Note that, under open-circuit conditions on the output (i.e. no load is attached
to the op-amp output terminal), the op-amp’s output voltage is given by:
The open-loop
vo AOL v v (1.42)
output voltage of an
op-amp, under no-
load conditions
The gain of the amplifier under these conditions, AOL , is termed the open-loop
gain, hence the “OL” subscript. The reason for this name will become apparent
shortly.
The model parameters for a general purpose op-amp, such as the TL071, are
tabulated below:
The “ideal op-amp” is a theoretical device that pushes the typical op-amp
parameters to their ideal values:
v vo
AOL ( v - v )
v
AOL=
Figure 1.42
There are several interesting characteristics of this model that will be useful
when analysing (and designing) circuits with ideal op-amps.
An ideal op-amp
An ideal op-amp draws no input current (1.43) draws no input
current
The second characteristic of the model is that the output voltage is constrained
by a dependent voltage source (there is no output resistance), and thus:
The last and most important characteristic is due to the infinite open-loop gain.
At first glance the idealisation that AOL appears problematic from a circuit
analysis viewpoint, since for a finite input voltage difference the output will be
infinite. However, the ideal op-amp can produce a finite output voltage, but
only so long as the input voltage is zero. Thus, for an ideal op-amp to produce a
finite output voltage v o , the input voltage difference must be:
vo finite
v v 0 (1.45)
AOL
and therefore:
An ideal op-amp has
equal input voltages
v v (1.46) if it has a finite
output voltage
Thus:
Since the ideal op-amp has equal input voltages (like a short-circuit), but draws
The virtual short-
no input current (like an open-circuit), we say there is a virtual short-circuit circuit defined
across its input terminals. We will use the concept of the virtual short-circuit as
the fundamental basis for the analysis and design of circuits containing ideal
op-amps.
PMcL The Operational Amplifier Index
There are many designs for the internal circuit of an op-amp, with each design
optimising a particular parameter (or parameters) of interest to the designer.
Such parameters may be the open-loop gain (how much the input voltage
difference is amplified), the bandwidth (the highest frequency it can amplify),
or the bias current (how much DC current it draws from the input terminals).
You will become familiar with these terms later when we look more closely at
real op-amp limitations (as opposed to the ideal op-amp).
There are several device fabrication technologies that are used to construct an
op-amp. For general-purpose op-amps, bipolar junction transistors (BJTs) are
mostly used at the input because they are easy to match and are capable of
carrying large currents. However, some operational amplifiers have a field
effect transistor (FET) input, with the rest of the circuit being made from BJTs.
Complementary metal-oxide-semiconductor (CMOS) transistors are used in
op-amps that find application in the design of analog and mixed-signal very
large scale integrated (VLSI) circuits.
Figure 1.43
Figure 1.44
PMcL Negative Feedback Index
The gain of an amplifier, such as an op-amp, will vary from device to device
due to the many manufacturing variations in the transistors and resistors that
comprise it. Such component variations result in considerable uncertainty in
the overall voltage gain. For example, an op-amp datasheet may specify the
typical value for the open-loop gain as 200 000, but some specimens may
achieve a gain as low as 25 000. The open-loop gain also changes with
temperature, power supply voltage, signal frequency and signal amplitude.
Just as the steam engine needs the controlling influence of the governor, so
Negative feedback
is used to precisely most electronic amplifiers require electrical negative feedback if their gain is to
set the gain of an
amplifier be accurately predictable and remain constant with varying environmental
conditions.
Block diagram of an
amplifier with
negative feedback
amplifier
vi ve vo
AOL
vf = vo
feedback
network
Figure 1.45
The amplifier has a voltage gain AOL and the feedback network is an attenuator
which feeds a fixed fraction, , of the output back to the input. The feedback
signal, v f vo , is subtracted from the input signal (we thus have negative
We can now determine the effective voltage gain, ACL , of the amplifier with
feedback. This is given simply by the ratio of the output voltage to input
voltage:
vo
ACL (1.48)
vi
The signal at the input to the basic amplifier is:
ve vi v f vi vo (1.49)
vo AOLve (1.50)
Therefore:
Rearranging:
vo 1 AOL AOL vi
vo AOL (1.52)
vi 1 AOL
Hence:
The closed-loop
gain of an amplifier
AOL
with negative
ACL (1.53)
feedback
1 AOL
This is the general equation for an amplifier with negative feedback. The basic
gain of the amplifier, AOL , is known as the open-loop gain and the gain with
Engineers design the circuit by starting with a basic amplifier with a very large
open-loop gain (e.g., the open-loop gain of an op-amp is AOL 100,000 ) and
AOL 1 (1.54)
When this is the case, we can neglect the ‘1’ in the denominator of Eq. (1.53)
so that:
The closed-loop
gain of an amplifier
1
ACL (1.55)
with negative
feedback, if the
open-loop gain is
very large
Later, we will also see that negative feedback increases the frequency of
signals that we can apply to the amplifier, reduces nonlinear distortion,
increases input resistance and decreases output resistance. The price for these
benefits is a reduction in the amplifier gain – a trade-off that is well worth
making.
An op-amp
implements the
subtracter and the amplifier
amplifier in one
device vi vo vi
A OL vo
vf
vf
Figure 1.46
A simple feedback
network that
provides a fixed
attenuation
vf R2 vo
vf vo
R1
feedback
network
Figure 1.47
Note that for this circuit the input is on the right and the output is on the left, as
we are providing a feedback path from the output of the op-amp, and back to its
inverting input terminal.
The fixed fraction, , of the output which is fed back to the input is given by
the voltage divider rule:
vf R1
(1.56)
vo R1 R2
Thus, a circuit that implements the amplifier with negative feedback is:
The noninverting
amplifier
vi
vo
R2
R1
Figure 1.48
vo AOL
ACL (1.57)
vi 1 AOL
1 R2
ACL 1 (1.58)
R1
vi
A OL vo
R2
R1 9 k
1 k
A OL = 100 000
R1 1k 1
R1 R2 1k 9k 10
AOL 10 5 10 5
ACL 9.9990 10
1 AOL 1 10 5 10 1 10001
If the op-amp open-loop gain is changed to 200 000 (e.g. a different op-amp is
used) then the closed-loop gain changes to:
AOL 2 10 5 2 10 5
ACL 9.9995 10
1 AOL 1 2 10 5 10 1 20001
Thus, the closed-loop gain changes by only 0.005%, even though the open-loop
gain changed by 100%. This is because AOL 1, and therefore, by
Assuming an ideal op-amp with infinite open-loop gain ( AOL ), then the
overall closed-loop gain of the amplifier is given by Eq. (1.57):
AOL
ACL
1 AOL
1
1 AOL
1
1
1
(1.59)
Thus, the approximation for the closed-loop gain that we used for a real op-
amp, ACL 1 , now turns into an exact equation, ACL 1 . Thus, we will
find it expedient to analyse op-amp circuits by assuming that ideal op-amps are
used, with an understanding that the real circuits will differ in performance by
only a tiny amount.
A key point to note in this formula is that the ratio of the resistors determines
the gain. In practice this means that a range of actual R1 and R2 values can be
used, so long as they provide the same ratio.
The amplifier in this configuration provides a gain which is always greater than
or equal to 1. The output is also “in phase” with the input, since the gain is
positive. Hence, this configuration is referred to as a noninverting amplifier.
4 7
0A
5 R2
2 vi
vi vi
3 R1 vi
R1 R2 R
1
6
R1
Figure 1.49
1. We assume an ideal op-amp, and also assume that since there is a negative
feedback path around the op-amp, then it is producing a finite output
voltage (i.e., the overall amplifier is “working”). Thus, the ideal op-amp
must have a virtual short-circuit (VSC) at its input terminals. We label the
voltage across the input terminals as 0 V.
2. Since there is no difference in the voltages across the VSC, the voltage at
the inverting terminal is v vi .
4. Due to the infinite input resistance of the ideal op-amp, the current entering
the inverting terminal is 0 A.
7. KVL, from the common, across R1 , across R2 and to the output terminal
v i R2
gives vo vi R2 1 vi .
R1 R1
Kv i
R2
K = 1+ R
1
Figure 1.50
In our analysis of op-amp circuits from now on, we will assume ideal op-amps
and make frequent use of the virtual short-circuit concept.
4 k
1 k
vo
vi
Notice that we have decided to draw the inverting terminal of the op-amp at the
top, and the feedback resistors pass over the top of the op-amp. The circuit is
still the same as before. Either representation can be used, and will depend on
such factors as space or clarity in the circuit schematic.
When we attach any type of source to the input of this circuit, no current will
be drawn. For example:
4 k
1 k
50 i=0A v o = 10 V
0V vi = 2 V
vs = 2 V
Source
vo
vi
R2 0
ACL 1 1 1
R1
R1
vo
vi
or by:
R2
vo
vi
Both of these circuits will operate as buffers, but the circuit presented first uses
one less component.
You may wonder “What is the point of a buffer if it only provides a gain of 1?”
The buffer is used to
“couple” one circuit The answer lies in the other properties of the circuit – its infinite input
to another
resistance and zero output resistance.
50 i = 20 mA
1V
vs = 5 V vo = 4 V 200
Rs Ro
vs vi Ri Avi vo RL
50 i = 25 mA
i=0
vs = 5 V vi = 5 V vo = 5 V 200
The inverting
amplifier
R2
R1
vi
vo
Figure 1.51
We will analyse this circuit using the concept of the virtual short-circuit. This
can be done on the circuit schematic:
Analysis steps for
the ideal inverting
amplifier
6
vi
5 R2
vi R1
R1 R2
3
vi 2 4
R1 R1 0V 0A
vi
1 0V
vo = - R2 vi
R1
7
Figure 1.52
1. We assume an ideal op-amp, and also assume that since there is a negative
feedback path around the op-amp, then it is producing a finite output
voltage (i.e., the overall amplifier is “working”). Thus, the ideal op-amp
must have a virtual short-circuit (VSC) at its input terminals. We label the
voltage across the input terminals as 0 V.
2. Since there is no difference in the voltages across the VSC, the voltage at
the inverting terminal is v 0 .
4. Due to the infinite input resistance of the ideal op-amp, the current entering
the inverting terminal is 0 A.
vi
v R2 R2 i2 R2 , with the polarity shown.
R1
7. KVL, from the common, across the VSC, across R2 and to the output
vi R
terminal gives vo 0 R2 2 vi .
R1 R1
The negative sign indicates that there is an inversion of the signal (i.e. a 180
phase change), so that a waveform will appear amplified, but “upside down”.
The input resistance of the inverting amplifier (i.e. the resistance “seen” by the
input voltage source), is, by the definition of input resistance:
vi vo
R1 Kv i
R2
K= - R
1
Figure 1.53
One advantage of the inverting amplifier over the noninverting amplifier is that
you can achieve gain magnitudes less than one, i.e. build circuits that can
attenuate, as well as amplify.
The inverting amplifier is also the basis for many other useful circuits that we
will encounter later, such as the summer, integrator and differentiator.
5 k
1 k
vi
vo
5 k
1 k i = 1 mA 1 k
1V
0V
v o = -5 V
vi = 1 V
vs = 2 V
Source
We see that the 1 kΩ input resistance of the inverting amplifier has caused the
source to deliver current, and therefore there is a significant voltage drop
across its internal resistance. A better design to suit this particular source
would use resistors in the 100’s of kΩ:
500 k
1 k i 20 A 100 k
0V
v o -9.901 V
vi 1.980 V
20 mV
vs = 2 V
Source
Now there is less than 1% error in the gain that it provides to the source.
1.20 Summary
Current is defined as the rate of flow of charge past a certain cross-
sectional area:
dq
i
dt
Voltage is defined as the work done per unit charge in moving it from one
point to another in a circuit.
vs ( t ) is ( t )
voltage current
source source
The resistor is a linear passive circuit element that obeys Ohm’s Law:
v Ri
A resistance of 0 is known as a short-circuit.
1
G
R
Practical resistors come in a large variety of shapes, materials and
construction which dictate several of their properties, such as accuracy,
stability, pulse handling capability, resistor value, size and cost.
Kirchhoff’s Current Law (KCL) states: “At any node of a circuit, the
currents algebraically sum to zero”:
i
k 1
k 0
Kirchhoff’s Voltage Law (KVL) states: “Around any loop in a circuit, the
voltages algebraically sum to zero”:
v
k 1
k 0
Req R1 R2 RN
1 1 1 1
Req R1 R2 RN
i R1
v1
arbitrary
circuit v R2 v2
R2
v2 v
The voltage divider rule is:
R1 R2
i
i1 i2
arbitrary
v
circuit R1 R2
R1
i2 i
The current divider rule is:
R1 R2
PMcL Summary Index
An ideal source, either voltage or current, whose value depends upon some
parameter (usually a voltage or current) in the circuit to which the source
belongs is known as a dependent or controlled source. There are four types:
Kvx rm i x Ki x gm vx
p vi
v2
p Ri 2
R
A linear amplifier is a device that increases the amplitude of a signal (a
voltage or a current) whilst preserving waveform shape. The most common
is a voltage amplifier:
vi K vo =Kvi
input output
vo vo
K V/V or
K 20 log10 dB
vi vi
noninverting input v
vo output
inverting input v
AOL
ACL
1 AOL
R2
R1
vo
vi
R2
ACL 1
R1
R2
R1
vi
vo
R2
ACL
R1
1.21 References
Hayt, W. & Kemmerly, J.: Engineering Circuit Analysis, 3rd Ed., McGraw-
Hill, 1984.
Exercises
1.
A large number of electrons are moving through a conductor:
(b) If the total charge to pass a certain point on the conductor varies according
to the equation:
qt 3 1 e100t mC
(f) How many electrons are moving through the conductor at time
t = 50 ms?
2.
The total charge that has entered the upper terminal of the element below is
given by 5 sin 1000t μC .
(a) How much charge enters that terminal between t 0.5 ms and
t 0.5 ms ?
(b) How much charge leaves the lower terminal in the same time interval?
3.
For the current waveform shown below:
i( t ) (A)
300
200
100
0 1 2 3 4 5 6 7 8
t (s)
-100
-200
-300
-400
(a) 4 s (b) 7 s
4.
The charging current supplied to a 12 V automotive battery enters its positive
terminal. It is given as a function of time by:
0 t0
t 10000
i 4e A 0 t 15000 s
0 t 15000 s
(a) What is the total charge delivered to the battery in the 15000 s charging
interval?
5.
The voltage v has its positive reference at terminal A of a certain circuit
element. The power absorbed by the circuit element is 4t 1 W for t 0 .
2
6.
The resistance of 10 mm2 copper wire is 1.725 Ω/km, and, with a certain type
of insulation, it can safely carry 70 A without overheating. With a one
kilometre length of wire operating at maximum current:
7.
For the circuit shown below:
20 V
10 2 A 2 i
60 V 3A v Load
find:
8.
With reference to the network shown below:
A
8V 6A
5V B 3A vx
ix
find:
9.
Find the power supplied by the 3 V source in the circuit below:
20i 1
5
3V 10
13 V
6 i1
10.
Find the power absorbed by each element in the circuit below:
-50 V
i
vx = -6 i 0.2vx
10
11.
Consider the circuit shown below:
iy
ix
30 mA v30 1 k 10 mA 2ix
(b) Change the control on the dependent source from 2i x to 2i y and then find
v30 , i x , and i y .
12.
Consider the circuit shown below:
i
v
v 2 2 2 10 A
13.
Find Req for each of the networks shown below:
(a)
4
10 6 2
20 1
R eq
5
3
(b)
8
2 7
R eq
3
14.
By combining independent sources and resistances as appropriate, find:
30 V
8
10 20 V
2 i
30 mA v 1 k 10 mA 250
15.
Use the concepts of current division, voltage division, and resistance
combination to write expressions (by inspection) for v3 and i1 in the circuit
shown below:
R2
i1
is R1 R3 v3
16.
Determine the necessary values of v and i in the circuit shown below:
3 v
1 1A
5 4
2
17.
The circuit shown below exhibits several examples of independent current and
voltage sources in series and in parallel.
12 V -3 A
3V
2A -5 V 4A
4V
(b) To what value should the 4 A source be changed to reduce the power
supplied by the -5 V source to zero?
18.
For the ideal op-amp circuit below:
i 2 10 k
i 1 1 k
vi v1 io
vo
1V iL
1 k
19.
Given the ideal op-amp circuit below:
R2
R1
vi
vo
R3
(c) How do the results of (a) and (b) differ from the case when R3 ?
Why?
20.
Consider the ideal op-amp circuit below:
R1
R1
vi R2
R2 100
Choose values for resistors R1 and R2 such that the 100 resistor absorbs
10 mW when vi 4 V .
21.
Consider the ideal op-amp circuit below:
R
vo
ii
22.
Consider the ideal op-amp circuit below:
R1 R3
R2
i3
vo
ii
23.
Given the ideal op-amp circuit below:
vo
ii Ri i2
R2
R1
Contents
Introduction
After becoming familiar with Ohm’s Law and Kirchhoff’s Laws and their
application in the analysis of simple series and parallel resistive circuits, we
must begin to analyse more complicated and practical circuits.
Physical systems that we want to analyse and design include electronic control
circuits, communication systems, energy converters such as motors and
generators, power distribution systems, mobile devices and embedded systems.
We will also be confronted with allied problems involving heat flow, fluid
flow, and the behaviour of various mechanical systems.
To cope with large and complex circuits, we need powerful and general
methods of circuit analysis. Nodal analysis is a method which can be applied to
any circuit, and mesh analysis is a method that can be applied to any planar
circuit (i.e. to circuits that are able to be laid out on a 2D surface without
crossing elements). Both of these methods are widely used in hand design and
computer simulation. A third technique, known as loop analysis, generalises
mesh analysis and can be applied to any circuit – it is effectively the “dual” of
nodal analysis.
We will find that the judicious selection of an analysis technique can lead to a
drastic reduction in the number of equations to solve, and we should therefore
try to develop an ability to select the most convenient analysis method for a
particular circuit.
1. Select one node as the reference node, or common (all nodal voltages
are defined with respect to this node in a positive sense).
The general
principle of nodal
2. Assign a voltage to each of the remaining N 1 nodes. analysis
As will be seen, the method outlined above becomes a little complicated if the
circuit contains voltage sources and / or controlled sources, but the principle
remains the same.
5
3A 2 1 -2 A
Following the steps above, we assign a reference node and then assign nodal
voltages:
v1 5 v2
3A 2 1 -2 A
In many practical circuits the reference node is one end of a power supply
which is generally connected to a metallic case or chassis in which the circuit
resides; the chassis is often connected through a good conductor to the Earth.
Thus, the metallic case may be called “ground”, or “earth”, and this node
becomes the most convenient reference node.
The distinction
To avoid confusion, the reference node will be called the “common” unless it
between “common” has been specifically connected to the Earth (such as the outside conductor on a
and “earth”
digital storage oscilloscope, function generator, etc).
Note that the voltage across any branch in a circuit may be expressed in terms
of nodal voltages. For example, in our circuit the voltage across the 5
resistor is v1 v2 with the positive polarity reference on the left:
v1 5 v2
(v1 - v2)
We must now apply KCL to nodes 1 and 2. We do this be equating the total
current leaving a node to zero. Thus:
v1 v1 v 2
3 0
2 5
v 2 v1 v1
2 0
5 1
0.7v1 0.2v2 3
0.2v1 1.2v2 2
3 0.2
2 1.2 3.6 0.4 4
v1 5V
0.7 0.2 0.84 0.04 0.8
0.2 1.2
0.7 3
0.2 2 1.4 0.6 2
v2 2.5 V
0.8 0.8 0.8
Everything is now known about the circuit – any voltage, current or power in
the circuit may be found in one step. For example, the voltage at node 1 with
respect to node 2 is v1 v2 2.5 V , and the current directed downward
through the 2 resistor is v1 2 2.5 A .
A circuit is shown below with a convenient reference node and nodal voltages
specified.
1/4
-3 A
v1 1/3 v2 1/2 v3
-8 A 1 1/5 25 A
3v1 v2 4v1 v3 8 3 0
7v1 3v2 4v3 11
At node 2:
At node 3:
7 3 4 v1 11
3 6 2 v 3
2
4 2 11 v3 25
For circuits that contain only resistors and independent current sources, we
define the conductance matrix of the circuit as:
7 3 4
G 3 6 2
4 2 11
It should be noted that the nine elements of the matrix are the ordered array of The conductance
matrix defined
the coefficients of the KCL equations, each of which is a conductance value.
Thr first row is composed of the coefficients of the Kirchhoff current law
equation at the first node, the coefficients being given in the order of v1 , v 2
and v3 . The second row applies to the second node, and so on.
The major diagonal (upper left to lower right) has elements that are positive.
The conductance matrix is symmetrical about the major diagonal, and all
elements not on this diagonal are negative. This is a general consequence of the
systematic way in which we ordered the equations, and in circuits consisting of
only resistors and independent current sources it provides a check against
errors committed in writing the circuit equations.
v1 11
v v 2 i 3
v3 25
Our KCL equations can therefore be written succinctly in matrix notation as:
Nodal analysis
expressed in matrix Gv i
notation
The solution of the matrix equation is just:
v G 1i
11 3 4
3 6 2
25 2 11
v1
7 3 4
3 6 2
4 2 11
6 2 3 4 3 4
11 3 25
2 11 2 11 6 2
v1
6 2 3 4 3 4
7 3 4
2 11 2 11 6 2
1162 3 41 2530 682 123 750
762 3 41 430 434 123 120
191
1 V
191
Similarly:
7 11 4 7 3 11
3 3 2 3 6 3
4 25 11 4 2 25
v2 2 V v3 3 V
191 191
The previous example shows that nodal analysis leads to the equation Gv i .
We will now develop a method whereby the equation Gv i can be built up
on an element-by-element basis by inspection of each branch in the circuit.
vi G vj vi G vj
(vi - vj ) (vj - vi )
(a) (b)
Figure 2.1
Suppose that we are writing the ith KCL equation because we are considering
the current leaving node i (see Figure 2.1a). The term that we would write in
this equation to take into account the branch connecting nodes i and j is:
Gvi v j 0 (2.1)
This term appears in the ith row when writing out the matrix equation.
If we are dealing with the jth KCL equation because we are considering the
current leaving node j (see Figure 2.1b) then the term that we would write in
this equation to take into account the branch connecting nodes j and i is:
Gv j vi 0 (2.2)
This term appears in the jth row when writing out the matrix equation.
Thus, the branch between nodes i and j contributes the following element
stamp to the conductance matrix, G :
i j
The element stamp
for a conductance i G G (2.3)
j G G
If node i or node j is the reference node, then the corresponding row and
column are eliminated from the element stamp shown above.
For any circuit containing only resistors and independent current sources, the
conductance matrix can now be built up by inspection. The result will be a G
matrix where each diagonal element g ii is the sum of conductances connected
I
vi vj
Figure 2.2
In writing out the ith KCL equation we would introduce the term:
I 0 (2.4)
In writing out the jth KCL equation we would introduce the term:
I 0 (2.5)
Thus, a current source contributes to the right-hand side (rhs) of the matrix
equation the terms:
Thus, the i vector can also be built up by inspection – each row is the addition
of all current sources entering a particular node. This makes sense since
Gv i is the mathematical expression for KCL in the form of “current leaving
a node = current entering a node”.
We will analyse the previous circuit but use the “formal” approach to nodal
analysis.
1/4
-3 A
v1 1/3 v2 1/2 v3
-8 A 1 1/5 25 A
1 2 3
1 3
4 3 4 v1 8 3
2 3 1 3 2 2 v 2 3
3
4 2 5 4 2 v3 25
There are two ways around this problem. The more difficult is to assign an
unknown current to each branch with a voltage source, proceed to apply KCL
at each node, and then apply KVL across each branch with a voltage source.
The result is a set of equations with an increased number of unknown variables.
Consider the circuit shown below, which is the same as the previous circuit
except the 1 2 resistor between nodes 2 and 3 has been replaced by a 22 V
voltage source:
1/4
-3 A
supernode
22 V
v1 1/3 v2 v3
-8 A 1 1/5 25 A
3v1 v2 4v1 v3 8 3 0
7v1 3v2 4v3 11
We need one additional equation since we have three unknowns, and this is
provided by KVL between nodes 2 and 3 inside the supernode:
v3 v2 22
7 3 4 v1 11
7 4 9 v 2 28
0 1 1 v3 22
Note the lack of symmetry about the major diagonal in the G matrix as well as
the fact that not all of the off-diagonal elements are negative. This is the result
The presence of a
of the presence of the voltage source. Note also that it does not make sense to dependent source
destroys the
call the G matrix the conductance matrix, for the bottom row comes from the symmetry in the G
matrix
equation v2 v3 22 , and this equation does not depend on any
conductances in any way.
Dependent current sources are fairly easy to include into nodal analysis – we
just need to express the dependent current in terms of nodal voltages.
Dependent voltages sources are dealt with using the concept of the supernode.
Of the two types of dependent voltage source, the current controlled voltage
source (CCVS) requires the most effort to incorporate into nodal analysis. We
will analyse this case before summarizing the method of nodal analysis for any
resistive circuit.
Consider the circuit shown below, which is the same as the previous circuit
except now the 22 V voltage source has been replaced by a current controlled
voltage source:
1/4
-3 A ix
supernode
ix / 8
v1 1/3 v2 v3
-8 A 1 1/5 25 A
3v1 v2 4v1 v3 8 3 0
7v1 3v2 4v3 11
i x 4v1 v3
i x 4v1 v3
v3 v 2
8 8
v1 2v 2 3v3 0
7 3 4 v1 11
7 4 9 v 2 28
1 2 3 v3 0
v3 2.726 V .
using Ohm’s Law across the 1 4 resistor. In other cases, the dependency
may need to be found using KCL.
2ix
supernode
v1 1 v2 ix
1/2 1/3 18 A
Note how the 1 resistor contributes nothing to the KCL equation. Next, we
turn our attention to the dependent source inside the supernode. We rewrite the
dependent current in terms of nodal voltages using KCL at node 2:
v 2 v1
3v 2 i x 0
1
i x v1 4v 2
v2 v1 2i x 2v1 4v2
3v1 9v2 0
2 3 v1 18
3 9 v 0
2
We perform nodal analysis for any resistive circuit with N nodes by the The general
procedure to follow
following method: when undertaking
nodal analysis
1. Make a neat, simple, circuit diagram. Indicate all element and source
values. Each source should have its reference symbol.
2. Select one node as the reference node, or common. Then write the node
voltages v1 , v 2 , …, v N 1 at their respective nodes, remembering that
each node voltage is understood to be measured with respect to the
chosen reference.
5. Apply KCL at each of the nodes or supernodes. If the circuit has only
resistors and independent current sources, then the equations may be
built using the “element stamp” approach.
Consider the circuit shown below, which contains all four types of sources and
has five nodes.
v2
vx 1
1/2
6A
3V
v4
v1 v3
2vx
1
1/2 4vy
vy
2vx 2v2 v1
4v y 4v1
We form supernodes around the two voltage sources, and write relations for
them in terms of the nodal voltages:
v4 v1 3
v3 4v y 4v1
Thanks to the supernodes, we see that we only need to write KCL equations at
node 2 and the supernode containing both nodes 1 and 4. At node 2:
2v2 v1 6 1v2 v3 0
2v1 3v2 v3 6
1 0 01 v1 3
4
0 1 0 v 2 0
2 3 1 0 v3 6
1 0 0 2 v 4 6
v1 4 V
v 2 14 3 V
v3 16 V
v 4 1 V
The technique of nodal analysis described here is completely general and can
always be applied to any electrical circuit.
Figure 2.3
In the figure above, circuit (a) is planar, circuit (b) is nonplanar and circuit (c)
is planar, but drawn so that it appears nonplanar.
A path is made through a circuit when we start on one node and traverse
elements and nodes without encountering any nodes previously visited. A loop
is any closed path – i.e. the last node visited is the same as the starting node. A
mesh is a loop which does not contain any other loops within it. A mesh is a
property of a planar circuit and is not defined for a nonplanar circuit.
Examples of loops
and meshes
Figure 2.4
In the figure above, the set of branches in (a) identified by the heavy lines is
neither a path nor a loop. In (b) the set of branches is not a path since it can be
traversed only by passing through the central node twice. In (c) the closed path
is a loop but not a mesh. In (d) the closed path is also a loop but not a mesh. In
(e) and (f) each of the closed paths is both a loop and a mesh. This circuit
contains four meshes.
i1 i2
Figure 2.5
Although the direction of mesh currents is arbitrary, we draw the mesh currents
in a clockwise direction so that a symmetry in the equations results when
performing mesh analysis. One of the great advantages of mesh currents is that
KCL is automatically satisfied, and no branch can appear in more than two
meshes.
1
It was the famous Scottish mathematical physicist James Clark Maxwell who invented the
concept of a mesh current, and the associated methodology of formulating the “mesh
equations”. The analysis of planar circuits using mesh currents was thus reduced to solving a
set of linear equations, in the same manner as nodal analysis.
In general terms, mesh analysis for a planar circuit with M meshes proceeds as
follows:
As will be seen, the method outlined above becomes a little complicated if the
circuit contains current sources and / or controlled sources, but the principle
remains the same.
6 4
42 V i1 3 i2 10 V
42 6i1 3i1 i2 0
9i1 3i2 42
3i2 i1 4i2 10 0
3i1 7i2 10
When the circuit contains only resistors and voltages sources, the KVL
equations have a certain symmetrical form and we can define a resistance
matrix with the circuit. We will find again that the matrix equation can be
formulated by inspection of the circuit.
1
i2 2
i1 3
7V
6V
i3 1
2
7 1i1 i2 6 2i1 i3 0
1i2 i1 2i2 3i2 i3 0
2i3 i1 6 3i3 i2 1i3 0
3 1 2 i1 1
1 6 3 i 0
2
2 3 6 i3 6
For circuits that contain only resistors and independent voltage sources, we
The resistance
define the resistance matrix of the circuit as: matrix defined
3 1 2
R 1 6 3
2 3 6
Once again we note the symmetry about the major diagonal. This occurs only
for circuits with resistors and independent voltage sources when we order the
equations correctly (rows correspond to meshes).
i1 1
i i2 v 0
i3 6
Our KVL equations can therefore be written succinctly in matrix notation as:
Mesh analysis
Ri v expressed in matrix
notation
Applying Cramer’s rule to the formulation for i1 gives:
1 1 2
0 6 3
6 3 6 27 0 90 117
i1 3A
3 1 2 81 12 30 39
1 6 3
2 3 6
When a mesh has a current source in it, we must modify the procedure for
forming the circuit equations. There are two possible methods. In the first
method, we can relate the source current to the assigned mesh currents, assign
an arbitrary voltage across it (thereby increasing the number of variables by
one) and write KVL equations using this voltage. Alternately, a better method
is to take a lead from nodal analysis and formulate the dual of a supernode - a
supermesh.
1
i2 2
i1 3
7V
7A
i3 1
2
For the independent current source, we relate the source current to the mesh
currents:
i1 i3 7
We then mentally open-circuit the current source, and form a supermesh whose
interior is that of meshes 1 and 3:
i2 2
1
i1 3
7V
i3 1
supermesh 2
1 0 1 i1 7
1 4 4 i 7
2
1 6 3 i3 0
Notice that we have lost all symmetry in the matrix equation Ri v , and we
can no longer call R the resistance matrix. Applying Cramer’s rule for i1 :
7 0 1
7 4 4
0 6 3 84 42 126
i1 9A
1 0 1 12 2 14
1 4 4
1 6 3
Dependent voltage sources are fairly easy to include into mesh analysis – we
just need to express the dependent voltage in terms of mesh currents.
Dependent current sources are dealt with using the concept of the supermesh.
Of the two types of dependent current source, the voltage controlled current
source (VCCS) requires the most effort to incorporate into mesh analysis. We
will analyse this case before summarizing the method of mesh analysis for any
resistive circuit.
1
i2 2
i1 3
15 A
vx
1
v
9 x 1
i3
2
For the independent current source, we relate the source current to the mesh
currents:
i1 15
v x 3i3 i2
i3 i1
9 9
3i1 i2 2i3 0
Since the current sources appear in meshes 1 and 3, when they are open-
circuited, only mesh 2 remains. Around mesh 2 we have:
1 0 0 i1 15
3 1 2 i 0
2
1 6 3 i3 0
that we wasted a little time in assigning a mesh current i1 to the left mesh – we
should simply have indicated a mesh current and labelled it 15 A.
The general We perform mesh analysis for any resistive circuit with M meshes by the
procedure to follow
when undertaking following method:
mesh analysis
1. Make certain that the circuit is a planar circuit. If it is nonplanar, then
mesh analysis is not applicable.
2. Make a neat, simple, circuit diagram. Indicate all element and source
values. Each source should have its reference symbol.
2.3 Summary
Nodal analysis can be applied to any circuit. Apart from relating source
voltages to nodal voltages, the equations of nodal analysis are formed from
application of Kirchhoff’s Current Law.
Mesh analysis can only be applied to planar circuits. Apart from relating
source currents to mesh currents, the equations of mesh analysis are formed
from application of Kirchhoff’s Voltage Law.
2.4 References
Hayt, W. & Kemmerly, J.: Engineering Circuit Analysis, 3rd Ed., McGraw-
Hill, 1984.
Exercises
1.
(a) Find the value of the determinant:
2 1 0 3
1 1 0 1
4 0 3 2
3 0 0 1
2v1 35 v 2 3v3 0
2v3 3v 2 4v1 56
v 2 3v1 28 v3 0
2.
Use nodal techniques to determine i k in the circuit shown below:
20
3ik
4A 10 5 -3 A
ik
3.
Set up nodal equations for the circuit shown below and then find the power
furnished by the 5 V source.
1/2
5V
1/4
vx
5A 1/3 1
4vx
4.
Write mesh equations and then determine i x in each of the circuits shown
below:
60 V
10 ix
10 V 4 2A 5
(a)
4V
10
8ix
6V 4
2
ix
(b)
5.
Assign mesh currents in the circuit below, write a set of mesh equations, and
determine i.
2 k 2 k
1 k 5V
i
vx
10 V vx 1 k
6.
With reference to the circuit shown below, use mesh equations to find i A and
the power supplied by the dependent source.
2iA
100
iA
14 V 200
300
100 2V
In 1857 Kirchhoff extended the work done by the German physicist Georg
Simon Ohm, by describing charge flow in three dimensions. He also analysed
circuits using topology. In further studies, he offered a general theory of how
electricity is conducted. He based his calculations on experimental results
which determine a constant for the speed of the propagation of electric charge.
Kirchhoff noted that this constant is approximately the speed of light – but the
greater implications of this fact escaped him. It remained for James Clerk
Maxwell to propose that light belongs to the electromagnetic spectrum.
Kirchhoff’s most significant work, from 1859 to 1862, involved his close
collaboration with Bunsen. Bunsen was in his laboratory, analysing various
salts that impart specific colours to a flame when burned. Bunsen was using
coloured glasses to view the flame. When Kirchhoff visited the laboratory, he
suggested that a better analysis might be achieved by passing the light from the
flame through a prism. The value of spectroscopy became immediately clear.
Each element and compound showed a spectrum as unique as any fingerprint,
which could be viewed, measured, recorded and compared.
Spectral analysis, Kirchhoff and Bunsen wrote not long afterward, promises
“the chemical exploration of a domain which up till now has been completely
closed.” They not only analysed the known elements, they discovered new
“[Kirchhoff is] a Kirchhoff’s work on spectrum analysis led on to a study of the composition of
perfect example of
the true German light from the Sun. He was the first to explain the dark lines (Fraunhofer lines)
investigator. To
search after truth in in the Sun's spectrum as caused by absorption of particular wavelengths as the
its purest shape and
to give utterance
light passes through a gas. Kirchhoff wrote “It is plausible that spectroscopy is
with almost an also applicable to the solar atmosphere and the brighter fixed stars.” We can
abstract self-
forgetfulness, was now analyse the collective light of a hundred billion stars in a remote galaxy
the religion and
purpose of his life.” billions of light-years away – we can tell its composition, its age, and even how
– Robert von
Helmholtz, 1890. fast the galaxy is receding from us – simply by looking at its spectrum!
Contents
Introduction
Many of the circuits that we analyse and design are linear circuits. Linear
circuits possess the property that “outputs are proportional to inputs”, and that
“a sum of inputs leads to a sum of corresponding outputs”. This is the principle
of superposition and is a very important consequence of linearity. As will be
seen later, this principle will enable us to analyse circuits with multiple sources
in an easy way.
In reality all circuits are nonlinear, since there must be physical limits to the
linear operation of devices, e.g. voltages will eventually break down across
insulation, resistors will burn because they can’t dissipate heat to their
surroundings, etc. Therefore, when we draw, analyse and design a linear
circuit, we keep in mind that it is a model of the real physical circuit, and it is
only valid under a defined range of operating conditions.
Finally, through the use of Thévenin’s theorem and Norton’s theorem, we will
see that we can replace a large portion of a complex circuit (often a
complicated and uninteresting part) with a very simple equivalent circuit, thus
enabling analysis and focus on one particular element of the circuit.
3.1 Linearity
A linear circuit is one that contains linear elements, independent sources, and A linear circuit
defined
linear dependent sources.
A linear element is one that possesses a linear relationship between a cause and
A linear element
an effect. For example, when a voltage is impressed across a resistor, a current defined
results, and the amount of current (the effect) is proportional to the voltage (the
cause). This is expressed by Ohm’s Law, v Ri . Notice that a linear element
means simply that if the cause is increased by some multiplicative constant K,
then the effect is also increased by the same constant K.
A linear relationship
is defined by a
straight line through
v the origin
R
1
Figure 3.1
From the definition of a linear circuit, it is possible to show that “the response
Output is
is proportional to the source”, or that multiplication of all independent sources proportional to input
by a constant K increases all the current and voltage responses by the same for a linear circuit
factor K (including the dependent source outputs).
3.2 Superposition
The linearity property of a circuit leads directly to the principle of
superposition. To develop the idea, consider the following example:
v1 5 v2
ia 2 1 ib
There are two independent current sources which force the currents i a and ib
into the circuit. Sources are often called forcing functions for this reason, and
the voltages they produce at each node in this circuit may be termed response
functions, or simply responses.
0.7v1 0.2v 2 ia
0.2v1 1.2v 2 ib
Now we perform experiment x. We change the two current sources to iax and
ibx ; the two unknown node voltages will now be different, and we let them be
0.7v1 0.2v 2 ia
0.2v1 1.2v 2 ib
is, we may perform experiment x and note the responses, perform experiment y
and note the responses, and finally add the corresponding responses. These are
the responses of the original circuit to independent sources which are the sums
of the independent sources used in experiments x and y.
This is the fundamental concept involved in the superposition principle. It is Superposition allows
evident that we may break an independent source into as many pieces as we us to treat inputs
separately, then
wish, so long as the algebraic sum of the pieces is equal to the original source. combine individual
responses to obtain
the total response
In practical applications of the superposition principle, we usually set each
independent source to zero, so that we can analyse the circuit one source at a
time.
Setting a voltage
source to zero
creates a short-
circuit. Setting a
current source to
zero creates an 0V S.C. 0A O.C.
open-circuit.
Figure 3.2
Note that dependent sources cannot be arbitrarily set to zero, and are generally
active when considering every individual independent source.
There is also no reason that an independent source must assume only its given
value or zero – it is only necessary that the sum of the several values be equal
to the original value. However, an inactive source almost always leads to the
simplest circuit.
6
ix
vs = 3 V 9 is = 2 A
We first set the current source equal to zero (an open-circuit) and obtain the
portion of i x due to the voltage source as 0.2 A. Then if we let the voltage
source be zero (a short-circuit) and apply the current divider rule, the
remaining portion of i x is seen to be 0.8 A.
3 6
ix ix ix 2 0.2 0.8 1 A
is 0 vs 0
69 69
2 ix 1
10 V v 3A 2ix
We seek i x , and we first open-circuit the 3 A source. The single mesh equation
is:
10 2i x 1i x 2i x 0
so that:
i x 2
Next, we short-circuit the 10 V source and write the single node equation:
v v 2i x
3 0
2 1
We find:
i x 0.6
and thus:
It usually turns out that little, if any, time is saved in analysing a circuit
containing dependent sources by use of the superposition principle, because
there are at least two sources in operation: one independent source and all the
dependent sources.
1
1V 1V
Each source provides 1 A, making the total current in the resistor 2 A. The
power delivered to the resistor is therefore 4 W.
An ideal voltage
source, and its
terminal
characteristic
i v
vs
vs v
Figure 3.3
The ideal voltage source can provide any amount of current, and an unlimited
amount of power. No such device exists practically. All practical voltage
sources suffer from a voltage drop when they deliver current – the larger the
current, the larger the voltage drop. Such behaviour can be modelled by the
inclusion of a resistor in series with an ideal voltage source:
A practical voltage
source, and its
terminal
characteristic R sv i
v
vs
vs v
R sv vs
1 R sv
practical source terminal characteristic
i
Figure 3.4
The applicability of this model to a practical source depends on the device and
the operating conditions. For example, a DC power supply such as found in a
laboratory will maintain a linear relationship in its terminal characteristic over
a larger range of currents than a chemical battery.
vs vL RL
Figure 3.5
we get a load voltage which is always less than the open-circuit voltage, and
given by the voltage divider rule:
RL
vL vs vs (3.3)
Rsv RL
The load current will also be less than we expect from an ideal source:
vs v
iL s (3.4)
Rsv RL RL
PMcL Source Transformations Index
v is
is
i
Figure 3.6
The ideal current source can support any terminal voltage regardless of the load
resistance to which it is connected, and an unlimited amount of power. An
ideal current source is nonexistent in the real world. For example, transistor
circuits and op-amp circuits can deliver a constant current to a wide range of
load resistances, but the load resistance can always be made sufficiently large
so that the current through it becomes very small. Such behaviour can be
modelled by the inclusion of a resistor in parallel with an ideal current source:
A practical current
source, and its
terminal
characteristic i v
R si i s
is R si v
R si
1
is
practical source terminal characteristic
i
Figure 3.7
The terminal
v characteristic of a
i is practical current
Rsi (3.5) source
or v Rsiis Rsii
When we attach a load to a practical current source:
A load attached to a
practical current
source will always
iL exhibit less voltage
and current than the
ideal case
is R si v L RL
Figure 3.8
we get a load current which is always less than the short-circuit current, and
given by the current divider rule:
Rsi
iL is is (3.6)
Rsi RL
The load voltage will also be less than we expect from an ideal source:
Rsi RLis
vL RLis (3.7)
Rsi RL
v v
vs R si i s
R sv vs R si
1 R sv 1
is
practical voltage source
i practical current source
i
Figure 3.9
Rsv Rsi Rs
are equivalent then
they have the same (3.8)
internal resistance
so that the slopes of the two terminal characteristics are equal. We now let Rs
represent the internal resistance of either practical source. To achieve the same
voltage and current axes intercepts, we must have, respectively:
vs
vs Rsiis and is (3.9)
Rsv
But since Rsv Rsi Rs , these two relations turn into just one requirement:
The relationship
between a practical
voltage source and
a practical current
vs Rsis (3.10)
source
vs v is Rs v
= Rs is v
= s
Rs
practical voltage source practical current source
Figure 3.10
3A 2
2
6V
Rs
IL
Vs VL RL
Figure 3.11
RLVs2
PL R I 2
Rs RL 2
L L (3.11)
Assume that VS and RS are known and fixed, and that RL is allowed to vary.
A graph of the
power delivered to a
load versus the load PL
resistance shows
clearly that a peak
occurs at a certain
resistance PLmax
R L max RL
Figure 3.12
To find the value of RL that absorbs maximum power from the practical
source, we differentiate with respect to RL (using the quotient rule):
or:
The load resistance
RL Rs (3.14)
which maximizes
power delivered
from a practical
source
Since the values RL 0 and RL both give a minimum ( PL 0 ), then this
value is the absolute maximum (and not just a relative maximum).
Since we have already proved the equivalence between practical voltage and
current sources, we have proved the following maximum power transfer
theorem:
The maximum
An independent voltage source in series with a resistance Rs , power transfer
theorem…
or an independent current source in parallel with a resistance Rs ,
(3.15)
delivers a maximum power to that load resistance R L when
R L Rs .
We can only apply the maximum power transfer theorem when we have
control over the load resistance, i.e. if we know the source resistance, then we …only applies to a
choice of load
can choose RL Rs to maximize power transfer. On the other hand, if we are resistor
given a load resistance and we are free to design or choose a source resistance,
we do not choose Rs RL to maximize power transfer – by examining
Eq. (3.11), we see that for a voltage source we should choose Rs 0 (and for a
The maximum
power delivered Vs2 Vs2
from a practical PL max (3.16)
source 4 RL 4 Rs
where the signal levels are very small, so any power lost gives a worse
signal to noise ratio. e.g. in antenna to receiver connections in television,
radio and radar.
where the signal levels are very large, where the maximum efficiency is
desirable on economic grounds. e.g. a broadcast antenna, audio amplifier.
2 IL
18 V VL RL
We want to determine the values of the load resistor that draw half the
maximum power deliverable by the practical source. The maximum power
deliverable by the source is:
Vs2 18 2
PL max 40.5 W
4 Rs 4 2
2
Vs
PL R I RL
2
Rs R L
L L
2
18 324 RL
20.25 RL
2 RL 2 RL 2
2 RL 2 16 RL
RL2 12 RL 4 0
12 12 2 4 4
RL
2
6 32
11.66 or 0.3431
Figure 3.13
Norton’s theorem is the dual of Thévenin’s theorem, and uses a current source:
Norton’s theorem
allows us to replace
part of a circuit with
a practical current
source large rest rest
portion
of iN RN of
of
linear circuit circuit
circuit
Figure 3.14
The inactive circuit A will always reduce to a single resistor, which we call the
Thévenin resistance, RTh . Also, since v oc appears as an independent voltage
The inactive circuit A will always reduce to a single resistor, which we call the
Norton resistance, R N . Also, since i sc appears as an independent current
3 7
12 V 6 RL
Circuit A Circuit B
The broken lines separate the original circuit into circuits A and B. We shall
assume that our main interest is in circuit B, which consists only of a “load”
resistor R L . To form the Thévenin equivalent circuit, we disconnect circuit B
and use voltage division to determine that voc 8 V . When we set all
independent sources in circuit A to zero, we replace the 12 V source with a
short-circuit. “Looking back” into the inactive A circuit, we “see” a 7
resistor connected in series with the parallel combination of 6 and 3 .
Thus, the inactive A circuit can be represented by a 9 resistor. If we now
replace circuit A by its Thévenin equivalent circuit, we have:
9
8V RL
Note that the Thévenin equivalent circuit we have obtained for circuit A is
completely independent of circuit B – an equivalent for A may be obtained no
matter what arrangement of elements is connected to the A circuit, even if
circuit B is nonlinear!
From the viewpoint of the load resistor R L , the Thévenin equivalent circuit is
identical to the original; from our viewpoint, the circuit is much simpler and we
can now easily compute various quantities. For example, the power delivered
to the load is:
2
8
PL RL
9 RL
Furthermore, we can now easily see that the maximum voltage which can be
obtained across R L is 8 V when RL . A quick transformation of the
Thévenin equivalent circuit to a practical current source (the Norton
equivalent) indicates that the maximum current which may be delivered to the
load is 8 9 A for RL 0 . The maximum power transfer theorem shows that a
maximum power is delivered to R L when RL 9 . None of these facts is
readily apparent from the original circuit.
To form the Norton equivalent circuit, we short-circuit the B circuit and use the
current divider rule to discover:
6 12 72 72 8
i sc A
67 6 7 39 42 81 9
3
67
When we set all independent sources in circuit A to zero, we get the same
results as for the Thévenin circuit, and so RN 9 . The Norton equivalent
circuit is therefore:
8/9 A 9 RL
It should be apparent from the previous example that we can easily find the
Norton equivalent circuit from the Thévenin equivalent circuit, and vice versa,
by a simple source transformation. Using our previous results, we must have:
The Thévenin and
Norton equivalent
resistances are the RTh RN (3.19)
same
Because of this result, we usually just refer to the resistor in either equivalent
circuit as the Thévenin resistance, RTh .
We also have:
The relationship
between the
Thévenin and voc RThisc (3.20)
Norton equivalent
circuits
2 3
4V 2A 1
Circuit A Circuit B
The Thévenin and Norton equivalent circuits are desired from the perspective
of the 1 resistor. We determine RTh for the inactive network, and then find
2 3
5
8V 1 1.6 A 5 1
2 3
vx vx
4V 4
To find v oc we note that v x voc , and that the dependent source current must
pass through the 2 resistor since there is an open circuit to the right. KCL at
the top of the dependent source gives:
voc 4 voc
0
2 4
voc 8 V
10
8V
3 i
1.5i 2
3 i
1.5i 2 v 1A
v 1.5 1 v
1 0
3 2
0.6
We have seen three approaches to finding the Thévenin equivalent circuit. The
first example contained only independent sources and resistors, and we could
use several different methods on it. One involved finding v oc for the active
circuit, and then RTh for the inactive circuit. We could also have found i sc and
sources were present, and the method we used required us to find v oc and i sc .
The last example did not contain any independent sources, and we found RTh
These important techniques and the types of circuits to which they may be
applied most readily are indicated in the table below:
Suitable
methods to Circuit contains
obtain the
Thévenin
equivalent
circuit
Methods
RTh and v oc or i sc – –
v oc and i sc Possible –
i 1 A or v 1 V – –
Table 3.1 – Suitable methods to obtain the Thévenin equivalent circuit
All possible methods do not appear in the table. Another method has a certain
A method to obtain
appeal because it can be used for any of the three types of circuit tabulated. the Thévenin
equivalent circuit
Simply label the terminals of the A circuit as v, define the current leaving the that works for all
positive polarity as i, then analyse the A circuit to obtain an equation in the circuits
form v voc RTh i .
2 v1 3 i
4V 2A v
v v1 3i
8 5i
voc RTh i
5 i
8V v
2 v1 3 i
v v
4V 4
v1 4 v
i 0
2 4
v
v1 4 2i
2
v v1 3i
v
4 5i
2
8 10i
voc RTh i
10
8V
3 i
1.5i 2 v
v 1.5i v
i 0
3 2
5v 3i 0
v 0 0.6i
voc RTh i
0.6
3.5 Summary
A linear circuit is one that contains linear elements, independent sources,
and linear dependent sources. For a linear circuit, it is possible to show that
“the response is proportional to the source”.
The maximum power transfer theorem states that if we know the source
resistance Rs of a practical source, then to maximize power transfer to a
load R L , we set RL Rs .
3.6 References
Hayt, W. & Kemmerly, J.: Engineering Circuit Analysis, 3rd Ed., McGraw-
Hill, 1984.
Exercises
1.
Find the power dissipated in the 20 resistor of the circuit shown below by
each of the following methods:
1 20
27 V 4 5 6A
2.
The circuit shown below contains a dependent source. Use superposition to
find I .
-4 V
3
1
Vx 2
5Vx
2A
I
3.
Consider the linear circuit shown below.
vx
Linear
i s1 Circuit i s2
when is1 is 2 20 A .
(b) The circuit now contains a source such that vx 40 V when
is1 is 2 0 A . All data in part (a) are still correct. Find v x when
is1 is 2 20 A .
4.
Consider the circuit shown below:
1 6
a
18 A 2 12 18 V
b
(b) If a variable resistor R were placed between terminals a and b, what value
would result in maximum power being drawn from the terminals?
(c) Find the maximum power that could be drawn from terminals a and b.
Index Exercises PMcL
5.
Find the maximum power that can be delivered to a variable R in the circuit
below:
1 2
20 V
R
3 4
6.
In the circuit below, what value of resistance should be connected between
terminals a-b to draw maximum power?
vx 1
2
a
3 4 9 sin(120 t ) V
5vx b
7.
Consider the circuit below:
rm iA
iA R2
R1 IS R3
(c) What would happen if you tried to build such a circuit with rm R2 ?
Contents
Introduction
One of the reasons for the popularity of the op-amp is its versatility. As we
shall see shortly, you can do almost anything with op-amps! More importantly,
the IC op-amp has characteristics that closely approach the assumed ideal. This
implies that it is quite easy to design circuits using the IC op-amp. It also
means that a real op-amp circuit will work in a manner that is very close to the
predicted theoretical performance.
Rn
vn
R2 Rf
v2
R1
v1
vo
v1 v2 vn
i1 ,
i2 , …,
in (4.1)
R1 R2 Rn
All these currents sum together at the inverting terminal, also known as the
summing junction, to produce the current i:
i i1 i2 in (4.2)
vo 0 R f i R f i (4.3)
Thus:
Rf Rf Rf
vo v1 v2 vn (4.4)
R1 R2 Rn
We can firstly form the sum vo1 2v1 v2 by using the circuit:
20 k 20 k
v2
10 k
v1
vo 1
2.5k 10 k
v3
10 k
vo 1
vo
20 k 20 k
v2 2.5k 10 k
v3
10 k
v1 10 k
vo
R2
R1
v i1
R3
v i2
vo
R4
There are a number of ways to find the output voltage, but the easiest uses the
principle of superposition (since the circuit is linear). To apply superposition
we first reduce vi 2 to zero – that is, connect the terminal to which vi 2 is applied
to the common – and then find the corresponding output voltage, which will be
due entirely to vi1 . We denote this output v o1 , as shown in (a) below:
Analyzing a
difference amplifier
using superposition R2 R2
R1 R1
v i1
vo1 vo2
R3
v i2
R3 R4 R4
(a) (b)
R2
vo1 vi1 (4.5)
R1
Next, we reduce vi1 to zero and evaluate the corresponding output voltage vo 2 .
The circuit will now take the form shown in Figure 4.3(b), which we recognize
as the noninverting configuration with an additional voltage divider, made up
of R3 and R4 , connected across the input vi 2 . The output voltage vo 2 is
therefore given by:
R R4
vo 2 1 2 vi 2 (4.6)
R1 3R R4
The superposition principle tells us that the output voltage v o is equal to the
R2 1 R2 R1
vo vi1 vi 2 (4.7)
R1 1 R3 R4
R2 1 R2 R1
(4.8)
R1 1 R3 R4
Simplifying we get:
R2 R4
(4.9)
R1 R3
The output of a
R2
vi 2 vi1
difference amplifier
vo (4.1)
R1
Thus, if we choose R4 R3 R2 R1 then we have produced a difference
100 k
10 k
vi 10 k v o =10 v i
100 k
Note that “input resistance” is defined as the resistance “seen” between the two
input terminals. Thanks to the virtual short-circuit at the op-amp input
terminals, KVL around the input resistors gives Rin 20 k .
R
vi
vo
We use the virtual short-circuit concept to analyse the circuit (it is essentially
the same analysis as for the inverting amplifier). KCL at the inverting terminal,
which is held at 0 V by the op-amp and negative feedback, gives:
vi dv
C o (4.10)
R dt
and therefore:
vo t vi t dt vo 0
1 t
RC 0
(4.2)
Rf
R
vi
vo
This circuit provides a feedback path for DC voltages (i.e. the op-amp circuit is
operating in a closed-loop) and prevents the output from saturating. To keep
the DC offset at the output of the integrator low, we should select a small R f .
Unfortunately, however, the lower the value of R f , the less ideal the integrator
4.4 Differentiator
An ideal differentiator is shown below:
The differentiator
C
vi
vo
We use the virtual short circuit concept again to analyze the circuit. KCL at the
inverting terminal, which is held at 0 V by the op-amp and negative feedback,
gives:
dvi v
C o (4.11)
dt R
and therefore:
vo t RC
dvi
(4.12)
dt
ii R
vi
vi R2 1
R1 R
R in
To investigate the operation of this circuit, we will evaluate the input resistance
Rin of the circuit. To find Rin we apply an input voltage v i and evaluate the
input current ii . Then, by definition, Rin vi ii .
Owing to the virtual short circuit between the op-amp input terminals, the
voltage at the inverting terminal will be equal to v i . The current through R1
will therefore be vi R1 . Since the input resistance of the ideal op-amp is
1
Impedance generalises the concept of resistance – as will be seen later with the introduction
of sinusoidal steady-state analysis, phasors, and reactance.
infinite, the current through R2 will also be vi R1 . Thus, the voltage at the op-
amp output will be:
vi R2
vo vi R2 1 vi
R1
(4.13)
R1
v1 R2 R1 v R 1
v 2 (4.14)
R R1 R
Since there is no current into the positive input terminal of the op-amp, KCL
gives:
v R2
ii (4.15)
R R1
Thus:
R1
Rin R (4.16)
R2
That is, the input resistance is negative with a magnitude equal to R, the
resistance in the positive-feedback path, multiplied by the ratio R1 R2 . We
now see why the circuit is called a negative impedance converter (NIC), where
R may in general be replaced by an arbitrary circuit element, such as a
capacitor or inductor.
A voltage-to-current
converter, invented
by Prof. Bradford
Howland, MIT, NIC r
around 1962
source R R
IL
VL
Vs
RL load
IL
Vs
RL -R
Figure 4.9
Index Voltage-to-Current Converter PMcL
IL
Vs
R RL -R
R
Figure 4.10
Vs
IL =
R
Vs
RL
R
Figure 4.11
Vs
IL (4.17)
R
independent of the value of R L !. This is an interesting result; it tells us that the
circuit of Figure 4.8 acts as a voltage-to-current converter, providing a current
I L that is directly proportional to V s and is independent of the value of the
load resistance. That is, the output terminal acts as a current-source output,
with the impedance looking back into the output terminal equal to infinity.
Note that this infinite resistance is obtained via the cancellation of the positive
source resistance R with the negative input resistance R .
PMcL Voltage-to-Current Converter Index
r
vo
R R
vi
vi
i=
R vL
C
Figure 4.12
dvL vi
C (4.18)
dt R
and thus:
vL t vi t dt vL 0
1 t
RC 0
(4.19)
The output of the circuit cannot be taken at the terminal labelled v L since the
connection of a load there will change the preceding analysis. Fortunately, a
voltage source output is available that is proportional to v L – at the output of
the op-amp where you can easily verify that vo 2v L . Thus the output of the
circuit is:
vo t vi t dt vo 0
2 t
RC 0
(4.20)
4.8 Summary
The op-amp is a versatile electronic building block. Real op-amps perform
close to the ideal, making circuit design and verification relatively easy.
Rn
vn
R2 Rf
v2
R1
v1
vo
R R R
vo f v1 f v2 f vn
R1 R2 Rn
The difference amplifier:
R2
R1
v i1
R1
v i2
vo
R2
vo
R2
vi 2 vi1
R1
Index Summary PMcL
R
vi
vo
Rf
R
vi
vo
The differentiator:
C
vi
vo
vo t RC
dvi
dt
It is rarely used in practice, because it tends to act as a “noise magnifier”.
PMcL Summary Index
R2
R1
R
vi
R in
R1
Rin R
R2
R R
IL
VL
Vs
RL
Vs
IL
R
Index Summary PMcL
r
vo
R R
vi
has an output:
vo t vi t dt vo 0
2 t
RC 0
4.9 References
Deboo, Gordon: “A Novel Integrator”, NASA-TM-X-57906, NASA Ames
Research Center, 1966.
Exercises
1.
Design an op-amp circuit with a 10 kΩ input resistance which converts a
symmetrical square wave at 1 kHz having 2 V peak-to-peak amplitude and zero
average value into a triangle wave of 2 V peak-to-peak amplitude.
2.
Design a two op-amp circuit with inputs v1 and v 2 and input resistances of
100 kΩ whose output is vo v1 10v2 .
3.
Determine the output voltage of the following circuit:
60 k
30 k
v3
20 k vo
v2
20 k 20 k
v1
4.
Design a negative impedance converter having an input resistance of -1 kΩ.
This circuit is connected to the output terminal of a source whose open-circuit
voltage is 1 mV and whose output resistance is 900 Ω. What voltage is then
measured at the output of the source?
5.
Express io as a function of v i for the circuit below:
R1
R1
vi
R1 R1
R
io
RL
5 Reactive Components
Contents
Introduction
The capacitor is a circuit element whose voltage-current relationship involves
the rate of change of voltage. Physically, a capacitor consists of two conducting
surfaces on which a charge may be stored, separated by a thin insulating layer
which has a very large resistance. Energy is stored in the electric field that
exists between the capacitor’s two conducting surfaces. In addition, the
insulating layer may be made of a high permittivity material (such as ceramic)
which will dramatically increase the capacitance (compared to air).
Both the capacitor and the inductor are capable of storing and delivering finite
amounts of energy, but they cannot deliver non-zero average power over an
infinite time interval. They are therefore passive circuit elements, like the
resistor.
The capacitor and inductor are linear circuit elements. Therefore all the circuit
methods previously studied, such as nodal analysis, superposition, Thévenin’s
theorem, etc., can be applied to circuits containing capacitors and inductors.
Lastly, in dealing with the capacitor and inductor in a circuit, we will note that
the equations describing their behaviour bear a similar resemblance – they are
the duals of each other. It will be shown that the concept of duality is a
recurring theme in circuit analysis, and can be readily applied to many simple
circuits, saving both time and effort.
A
q
d
conductor
v insulator
Figure 5.1
One of the plates carries a positive charge, q, whilst the other carries an equal
but opposite charge, -q. Therefore, the capacitor stores charge. There is a
potential difference, v, between the plates. Ideally, the amount of charge q
deposited on the plates is proportional to the voltage v impressed across them.
We define a constant1 called the capacitance, C, of the structure by the linear
relationship:
The definition of
q Cv (5.1) capacitance
1
The constant only models the behaviour of the structure under certain operating conditions.
The capacitance of a structure in the real world will vary with temperature, voltage, pressure,
frequency, chemical aging, etc,
C
1
Figure 5.2
The capacitance of A
a parallel plate
capacitor
C (5.2)
d
where A is the area of either of the two parallel plates, and d is the distance
between them. The permittivity, , is a constant of the insulating material
between the plates. The permittivity is usually expressed in terms of relative
permittivity, r :
Relative permittivity
defined
r 0 (5.3)
where 0 8.854 pFm-1 is the permittivity of free space (and, for all practical
purposes, air).
We now seek a v-i relationship for the capacitor. From the definition of current:
dq
i (5.4)
dt
we substitute q Cv and obtain:
v C
Figure 5.3
v(t) (V)
1
-1 0 1 2 3 t (s)
Since the voltage is zero and constant for t 1 , the current is zero in this
interval. The voltage then begins to increase at the linear rate dv dt 1 Vs -1 ,
i (t) (A)
3
-1 0 1 2 3 t (s)
-3
dv
p vi Cv (5.7)
dt
and the energy stored in its electric field is therefore:
wC t pdt wC t0
t
t0
dt wC t0
t dv
C v
t0 dt
v t
C vdv wC t0
v t0
1
2
C v 2 t v 2 t0 wC t0
(5.8)
If the capacitor voltage is zero at t 0 , then the electric field, and hence the
wC t Cv 2 t
1 a capacitor
(5.9)
2
We can see that the energy stored in a capacitor depends only on the
capacitance and the voltage. Therefore, a finite amount of energy can be stored
in a capacitor even if the current through the capacitor is zero.
Whenever the voltage is not zero, and regardless of its polarity, energy is
stored in the capacitor. It follows, therefore, that power must be delivered to
the capacitor for a part of the time and recovered from the capacitor later.
vs 80 k 2 F
A graph of the power delivered to the capacitor versus time is shown below:
pC (W)
33.18
-10 -5 0 5 10 15 20 t (ms)
-33.18
2 2
wC (mJ)
105.6
-10 -5 0 5 10 15 20 t (ms)
The energy stored is sinusoidal and varies at twice the frequency of the voltage
source, but it also has a finite average component of 52.81 mJ.
Thus, an energy equal to 6.25% of the maximum stored energy is lost as heat in
the process of storing and removing the energy in the physical capacitor. Later
we will formalise this concept by defining a quality factor Q that is
proportional to the ratio of the maximum energy stored to the energy lost per
period.
v(t)
V
0 t0 t1 t
v(t)
V
0 t0 t1 t2 t3 t
Figure 5.4
3. For an ideal capacitor, current can change instantaneously.
v
5
0 1 2 3 4 t (ms)
dv
i = C dt
20
0 1 2 3 4 t (ms)
Figure 5.5
4. An ideal capacitor never dissipates energy, but stores it and releases it
using its electric field.
An ideal inductor produces a magnetic field which is wholly confined within it.
The closest approximation to an ideal inductor that we can physically produce
is a toroid, which has an almost uniform magnetic field confined within it:
A toroidal inductor
i
core
magnetic
field
B
winding
Figure 5.6
Magnetic flux
linkage defined N (5.10)
where N is the number of loops of wire, or turns, in the circuit, and is the
average amount of magnetic flux streaming through each loop.
Magnetic flux
linkage shown
graphically
N turns
1 2 3 ... N
Figure 5.7
An ideal inductor is a structure where the flux linkage (with itself) is directly
proportional to the current through it. We define a constant, called the self
inductance, L, of the structure by the linear relationship:
Li
The definition of
inductance (5.11)
The inductor is a
linear circuit element
L
1
Figure 5.8
For example, it can be shown for a closely wound toroid that the inductance is
approximately:
A The inductance of a
LN 2
(5.12) toroidal inductor
l
where A is the cross-sectional area of the toroid material, and l is the mean path
length around the toroid. The permeability, , is a constant of the material
used in making the toroid. The permeability is usually expressed in terms of
relative permeability, r :
r 0 (5.13)
Relative
permeability defined
where 0 400 nHm-1 is the permeability of free space (and, for all practical
purposes, air).
We now seek a v-i relationship for the inductor. In 1840, the great British
experimentalist Michael Faraday2 discovered that a changing magnetic field
could induce a voltage in a neighbouring circuit, or indeed the circuit that was
producing the magnetic field. Faraday’s Law states that the induced voltage is
equal to the rate-of-change of magnetic flux linkage:
Faraday’s Law d
v (5.14)
dt
The minus sign comes from the fact that the polarity of the induced voltage is
such as to oppose the change in flux. For an inductor, we can figure out that the
polarity of the induced voltage must be positive at the terminal where the
current enters the inductor. If we know this, then we can mark the polarity on a
circuit diagram and deal with the magnitude of the induced voltage by
dropping the minus sign (the determination of the voltage polarity is called
Lenz’s Law).
If we allow the polarity to be set by Lenz’s Law, and substitute Li into the
previous equation, then we get:
2
The American inventor Joseph Henry discovered this phenomenon independently, but
Faraday was the first to publish.
The circuit symbol for the inductor is based on the construction of the physical
device, and is shown below together with the passive sign convention for the
voltage and current:
v L
Figure 5.9
i(t) (mA)
20
10
-1 0 1 2 3 4 5
t (ms)
-10
Since the current is constant for t 0 , the voltage is zero in this interval. The
current then begins to increase at the linear rate di dt 10 As-1 , and thus a
constant voltage of v L di dt 250 mV is produced. During the following
2 millisecond interval, the current decreases at the linear rate di dt 15 As-1 ,
v(t) (mV)
400
200
t (ms)
-1 0 1 2 3 4 5
-200
-400
i v 2H
Let the current it which is produced by the source be described by the
function of time shown below:
i(t) (A)
1
0 1 2
t (s)
v(t) (V)
2
t (s)
0 1 2
-1
-2
We know that a resistor always absorbs power and the energy absorbed is
dissipated as heat – but how about an inductor? For the inductor in this
example, the instantaneous power pt vt it absorbed by the inductor is
given by the graph below:
p(t) (W)
2
0 1 2
t (s)
-1
-2
We see that the power absorbed by the inductor is zero for t 0 and
2 t . For 0 t 1 , since pt is a positive quantity, the inductor is
absorbing power (which is produced by the source). However, for 1 t 2 ,
since pt is a negative quantity, the inductor is actually supplying power (to
the source).
To get the energy absorbed by the inductor, we simply integrate the power
absorbed over time. For this example, the energy absorbed increases from 0 to
1
2
12 1 J as time goes from t 0 to t 1 s . However, from t 1 to t 2 s ,
the inductor supplies energy such that at time t 2 s and thereafter, the net
energy absorbed by the inductor is zero. Since all of the energy absorbed by the
inductor is not dissipated but is eventually returned, we say that the inductor
stores energy. The energy is stored in the magnetic field that surrounds the
inductor.
di
p vi L i (5.17)
dt
and the energy stored in its magnetic field is therefore:
wL t pdt wL t0
t
t0
dt wL t0
t di
L i
t0 dt
i t
L idi wL t0
i t0
1 2
2
L i t i 2 t0 wL t0
(5.18)
If the inductor current is zero at t 0 , then the magnetic field, and hence the
wL t Li t
1 2 The stored energy in
(5.19) an inductor
2
We can see that the energy stored in an inductor depends only on the
inductance and the current. Therefore, a finite amount of energy can be stored
in an inductor even if the voltage across the inductor is zero.
Whenever the current is not zero, and regardless of its direction, energy is
stored in the inductor. It follows, therefore, that power must be delivered to the
inductor for a part of the time and recovered from the inductor later.
100 m
vR
is 3 mH vL
The 100 m resistor in the circuit represents the resistance of the wire which
must be associated with the physical coil. Let i s 12 sin100t A .
v R Ri 1.2 sin100t V
A graph of the power delivered to the inductor versus time is shown below:
pL (W)
67.86
-10 -5 0 5 10 15 20 t (ms)
-67.86
2 2
wL (mJ)
216
-10 -5 0 5 10 15 20 t (ms)
The energy stored is sinusoidal and varies at twice the frequency of the current
source, but it also has a finite average component of 108 mJ.
Thus, an energy equal to 33.33% of the maximum stored energy is lost as heat
in the process of storing and removing the energy in the physical inductor.
i (t)
I
0 t0 t1 t
i (t)
I
0 t0 t1 t2 t3 t
Figure 5.10
3. For an ideal inductor, voltage can change instantaneously.
i
5
0 1 2 3 4 t (ms)
di
v= L dt
20
0 1 2 3 4 t (ms)
Figure 5.11
4. An ideal inductor never dissipates energy, but stores it and releases it
using its magnetic field.
5.3.1 Capacitors
There are many different types of capacitor construction. Some are shown
below, labelled by the type of dielectric:
Some types of
capacitors
Model of a real
capacitor
Rp
C
Rs Ls
Figure 5.13
In the model, the series resistance Rs takes into account the finite resistance of
the plates used to make the capacitor. The series inductance Ls is used to
model the fact that a current is required to charge and discharge the plates, and
this current must have a magnetic field. Finally, no practical material is a
perfect insulator, and the resistance R p represents conduction through the
dielectric.
There are many different types of inductor construction. Some are shown
below, labelled by the type of core:
Some types of
inductors
Air-cored inductors are linear and do not exhibit core losses (since there is no Air-cored inductors
conductive core). They can be made by winding a coil on a non-magnetic do not exhibit core
losses
former, such as plastic, or may be self-supporting if made large enough. Air-
cored inductors have lower inductance than ferromagnetic-core inductors, but
are often used at high frequencies because they are free of core losses.
Rp
Rs L
Cp
Figure 5.15
The series resistance Rs takes into account the finite resistance of the wire
used to create the coil. The parallel capacitance C p is associated with the
electric field in the insulation surrounding the wire, and is called interwinding
capacitance. The parallel resistance R p represents the core losses.
The following inductor model, showing just the predominant non-ideal effect
of finite winding resistance, is often used at low frequencies:
Low frequency
model of a real
inductor showing the Rs L
winding resistance
Figure 5.16
5.4.1 Inductors
v1 L1
v
v2 L2
Figure 5.17
v v1 v2
di di
L1 L2
dt dt
L1 L2
di
dt
di
L
dt (5.20)
where:
Combining inductors
L L1 L2 (series) (5.21) in series
L1 L2 L = L 1+L 2
Figure 5.18
i
i1 i2
v L1 L2
Figure 5.19
we have, by KCL:
i i1 i2
1 t
1
vdt i2 t0
t
L1 t0
vdt i t
1 0
L2 t0
1 1 t
vdt i1 t0 i2 t0
L1 L2 t0
vdt i t0
1 t
L t0 (5.22)
where:
1 1 1
(parallel) (5.23)
Combining inductors
in parallel
L L1 L2
and:
L1
i1(t0) 1 1 1
L L = L 1+ L 2
L2
i (t0) = i1(t0) + i2(t0)
i2(t0)
Figure 5.20
i
i1 i2
v C1 C2
Figure 5.21
By KCL, we have:
i i1 i2
dv dv
C1 C2
dt dt
C1 C2
dv
dt
dv
C
dt (5.25)
so that we obtain:
Combining
capacitors in parallel C C1 C2 (parallel) (5.26)
C1
C = C1 + C2
C2
Figure 5.22
1 1 1
Combining
(5.27) capacitors in series
C C1 C2 (series)
1=1 + 1
C1 C2 C C C1 C2
Figure 5.23
In summary, inductors in series and parallel are treated like resistors, whereas
capacitors in series and parallel are treated like conductances.
5.5.1 DC Circuits
2F
1 4H
3F
6A 1F 2 4
3
i
The circuit has one independent current source whose value is constant. For a
resistive circuit we would naturally anticipate that all voltages and currents are
constant. However, this is not a resistive circuit. Yet, our intuition suggests that
the constant-valued current source produces constant-valued responses. This
fact will be confirmed more rigorously later. In the meantime, we shall use the
result that a circuit containing only constant-valued sources is a DC circuit.
Since for DC all inductors behave like short-circuits and all capacitors behave
like open-circuits, we can replace the original circuit with an equivalent
resistive circuit:
1
6A 2 4
3
i
i
4
6 4 A
42
Just as we analysed resistive circuits with the use of node and mesh equations,
Nodal and mesh we can write a set of equations for circuits that contain inductors and capacitors
analysis can be
applied to circuits in addition to resistors and sources. The procedure is similar to that described
with inductors and
capacitors for the resistive case – the difference being that for inductors and capacitors the
appropriate relationship between voltage and current is used in place of Ohm’s
Law.
6F
5
i4 4H i3
1F 3H
1A i1 2 i2 3V
i1 1
For mesh i 2 :
2i2 i1 3 i2 i3 3
d
dt
For mesh i3 :
d
i3 i2 4 d i3 i4 1 i3 dt 0
t
3
dt dt 6
For mesh i 4 :
1 t
i4 i1 dt 5i4 4 d i4 i3 0
1 dt
Writing the equations for a circuit, as in the preceding example, is not difficult.
Finding the solution of equations like these, however, is another matter – it is
no simple task. Thus, with the exception of some very simple circuits, we shall
have to resort to additional concepts and techniques to be introduced later.
5.6 Duality
Duality is a concept which arises frequently in circuit analysis. To illustrate,
consider the two circuits shown below:
Dual circuits
R v
v1
vs i v2 is G C
i1 i2
Circuit A Circuit B
Figure 5.24
Using mesh analysis for circuit A and nodal analysis for circuit B, we get the
following results:
Circuit A Circuit B
vs v1 v2 is i1 i2
di dv
v s Ri L is Gv C
dt dt
xs x1 x2
dy (5.28)
xs a1 y a2
dt
except that a variable that is a current in one circuit is a voltage in the other and
vice versa. For these two circuits this result is not a coincidence, but rather is
due to a concept known as duality, which has its roots in the subject of graph
theory.
RG
relationships
LC
series parallel (5.29)
The usefulness of duality lies in the fact that once a circuit is analysed, its dual
is in essence analysed also. Note that if circuit B is the dual of circuit A, then
taking the dual of circuit B in essence results in circuit A. Not every circuit,
however, has a dual. With the aid of graph theory it can be shown that a circuit
has a dual if and only if it is a planar network.
When using this procedure to obtain the dual circuit, in order to get the mesh
equations of the original circuit to correspond to the node equations of the dual
circuit, place clockwise mesh currents i1 , i2 , ..., in in the finite regions. The
corresponding nodes in the dual are labelled with the voltages v1 , v 2 , ..., vn
respectively. The reference node of the dual circuit corresponds to the infinite
region of the original circuit.
For the circuit given in the previous example (shown in blue), the dual is
obtained as (shown in red):
6F
5
v4 v3
4F 4H 3F
5S 6H
1H 3H
1F
1A 2 3V
v1 2 S v2
1V 3A
4F
1H 3F
v1 2S v2
v4 v3
5S 1V 3A 6H
v1 1
At node v 2 :
2v2 v1 3 v2 v3 3
d
dt
At node v3 :
d
v3 v2 4 d v3 v4 1 v3 dt 0
t
3
dt dt 6
At node v 4 :
1 t
v4 v1 dt 5v4 4 v4 v3 0
d
1 dt
Note that these are the duals of the mesh equations that we obtained earlier for
the original circuit.
5.7 Summary
The v-i relationship for a capacitor is:
dv
iC
dt
1
wC Cv 2
2
di
vL
dt
1 2
wL Li
2
Inductors in series and parallel are combined in the same way as are
resistances. Capacitors in series and parallel are combined in the same way
as are conductances.
Writing node and mesh equations for circuits containing inductors and
capacitors is done in the same manner as for resistive circuits. Obtaining
solutions of equations in this form will be avoided, except for simple
circuits.
A planar circuit and its dual are in essence described by the same equations.
5.8 References
Bobrow, L.: Elementary Linear Circuit Analysis, Holt-Saunders, 1981.
Hayt, W. & Kemmerly, J.: Engineering Circuit Analysis, 3rd Ed., McGraw-
Hill, 1984.
Exercises
1.
There is a current i 5 sin 10t A through an inductance L 2 H . What is the
first instant of time after t 0 when the power entering the inductor is exactly:
(a) 100 W
(b) -100 W
2.
The energy stored in a certain 10 mH inductor is zero at t 1 ms and increases
linearly by 20 mJ each second thereafter. Find the inductor current and voltage
for t 1 ms if neither is ever negative.
3.
A 25 μF capacitor having no voltage across it at t 0 is subjected to the single
pulse of current shown below.
i(t) (mA)
20
10
0 10 20 30
t (ms)
Determine the voltage across, the power entering, and the energy stored in C at
t :
(a) 17 ms
(b) 40 ms
4.
Find C eq for the lattice network shown below if terminals a and b are:
(b) short-circuited
1 nF
a
3 nF
Ceq
4 nF
b
2 nF
5.
The series combination of a 4 μF and a 3 μF capacitor is in series with the
parallel combination of a 2 μF , a 1 μF and a C μF capacitor.
(a) What is the maximum possible value for the equivalent capacitance of
the five capacitors?
6.
At t 0 , i 5 A in the circuit shown below:
8 sin 10 t A 1H 3H v
7.
(a) Write the single nodal equation for the circuit (a) below:
(b) Write the single mesh equation for the circuit (b) below:
is
vC (0) 40 mH
5 k
i L (0)
200 F
vC (0) 200 F vs
5 k
40 mH
i L (0)
(a) (b)
8.
Using a reference node at the bottom of the circuit, assign node-to-reference
voltages in the circuit below and write nodal equations. Let iL 0 0.5 A and
vC 0 12 V .
3v1
v2
0.1 H
iL 50
-100 t
0.8e A
v1 20 200 F vC
Contents
Introduction
Nonlinear circuits play a major role in modern electronics. Examples include
signal generators, communication transmitters and receivers, DC power
supplies, and digital circuits.
The terminal characteristics of the diode will be presented, rather than the
underlying solid-state physics, so that we can focus on providing techniques for
the analysis of diode circuits. There are three types of diode circuit analysis
technique – graphical, numerical and use of a linear model. Graphical analysis
of diode circuits is done using graphs of the diode’s terminal characteristic and
the connected circuit. Numerical analysis can be performed with the nonlinear
equations of the diode with a technique known as iteration. Lastly, diodes can
be replaced with linear circuit models (of varying complexity), under assumed
diode operating conditions, so that we revert to linear circuit analysis. Each
analysis technique has its advantages and disadvantages, so it is important to
choose the most appropriate technique for a given circuit.
Basic applications of the diode will be introduced, with circuits such as the
rectifier, and the limiter. Lastly, with the use of so-called breakdown diodes,
we can design circuits that act as voltage regulators – i.e. circuits that provide a
steady output voltage when subjected to a wide range of input voltages and
output load currents.
i
(mA)
10
8 forward
bias
6
reverse 4
bias
2
-VZK
-150 v
-0.2 0.2 0.4 0.6
(V)
IS = 1 nA (reverse saturation current)
breakdown
(large change in current,
small change in voltage)
Figure 6.1
The diode is clearly a nonlinear element – its characteristic is not a straight line
through the origin! The i-v characteristic can be divided up into three distinct
regions:
The Shockley
equation
i I S ev nVT 1 (6.1)
When forward There is not much increase in current until the “internal barrier voltage” is
biased, the diode
conducts overcome (approximately 0.6 V in silicon). Then large conduction results.
Saturation current The current I S is called the saturation current and is a constant for a given
defined
diode at a given temperature.
Emission coefficient
The constant n is called the emission coefficient, and has a value between 1 and
defined 2, depending on the material and the physical structure of the diode.
kT
VT
Thermal voltage
defined (6.2)
q
where:
1.3811023 JK-1
(6.4)
T temperature in degrees Kelvin
1.602 1019 C
The thermal voltage is approximately equal to 26 mV at 300 K (a temperature
that is close to “room temperature” which is commonly used in device
simulation software).
i I S ev nVT (6.6)
This equation is usually “good enough” for rough hand calculations when we
know that the current is appreciable.
From the characteristic we note that the current is negligibly small for v smaller
than about 0.5 V (for silicon). This value is usually referred to as the cut-in
voltage. This apparent threshold in the characteristic is simply a consequence
of the exponential relationship.
The Shockley equation can be rearranged to give the voltage in terms of the
current:
i
v nVT ln 1 (6.7)
IS
This logarithmic form is used in the numerical analysis of diode circuits.
When reverse The reverse-bias region of operation is entered when the diode voltage v is
biased, the diode
does not conduct made negative. The Shockley equation predicts that if v is negative and a few
times large than VT in magnitude, the exponential term becomes negligibly
small compared to unity and the diode current becomes:
i I S (6.8)
That is, the current in the reverse direction is constant and equal to I S . This is
the reason behind the term saturation current. However, real diodes exhibit
reverse currents that, although quite small, are much larger than I S .
The breakdown region is entered when the magnitude of the reverse voltage
Breakdown occurs exceeds a threshold value specific to the particular diode and called the
eventually for a
large enough
breakdown voltage. This is the voltage at the “knee” of the i-v curve and is
reverse bias denoted by VZK , where the subscript Z stands for Zener (to be explained
shortly) and K denotes knee.
Breakdown is not a destructive process unless the device cannot dissipate the
heat produced in the breakdown process. Breakdown is actually exploited in
certain types of diodes (e.g. the Zener diode) because of the near vertical
characteristic in this region.
anode
cathode
Figure 6.2
In a photodiode, the p-n junction is very close to the surface of the crystal. The
A photodiode is
controlled by light Ohmic contact with the surface material is so thin, it is transparent to light.
Incident light (photons) can generate electron-hole pairs in the depletion layer
(a process called photoionisation).
LEDs are used in diverse applications. The compact size of LEDs has allowed
new text and video displays and sensors to be developed, while their high
switching rates are useful in advanced communications technology. Infrared
LEDs are also used in the remote control units of many commercial products
including televisions, DVD players, and other domestic appliances.
A Schottky diode is the result of a metal-semiconductor junction. The Schottky A Schottky diode is
a metal-
diode is a much faster device than the general purpose silicon diode. There are semiconductor
junction
three main reasons for this: 1) the junction used is a metal-semiconductor
junction, which has less capacitance than a p-n junction, 2) often the
semiconductor used is gallium arsenide (GaAs) because electron mobility is
much higher, and 3) the device size is made extremely small. The result is a
device that finds applications in high speed switching.
R Th
iD iD
linear
vD VTh vD
circuit
Figure 6.3
iD
1
vD VTh (6.10)
RTh
When graphed, we call it the load line. It was derived from KVL, and so it is
The “load line” is
derived using linear always valid. The load line gives a relationship between i D and v D that is
circuit theory
determined purely by the external circuit. The diode’s characteristic gives a
relationship between i D and v D that is determined purely by the geometry and
physics of the diode.
If the Thévenin voltage changes to VTh , then the operating point moves to Q
(the DC load line is shifted to the right).
The two end points of the load line are easily determined to enable quick
graphing. The two axis intercepts are:
VTh
vD 0, iD (6.11)
RTh
and:
vD VTh , iD 0 (6.12)
Alternatively, we can graph the load line using one known point and the fact
1
that the slope is equal to .
RTh
Since, in the preceding analysis, we have two equations (the load line and the
diode characteristic) and two unknowns, it is tempting to try and solve them
simultaneously. If we substitute the voltage from the Shockley equation:
i
vD nVT ln D 1 (6.13)
IS
into the load line equation:
iD
1
vD VTh (6.14)
RTh
we get:
1 iD
iD nVT ln 1 VTh
(6.15)
RTh IS
This equation is a transcendental equation, and its solution cannot be
expressed in term of elementary functions (try it!). With a sufficiently
advanced calculator (or mathematical software), we can use a special function
called the Lambert W function to solve it, but for engineering purposes, there
are usually simpler methods of solution.
We begin with an initial “guess” for the diode current, labelled i D , 0 , and then
compute:
1 i
i D ,1 nVT ln D ,0 1 VTh
I
RTh S
1 i (6.16)
iD,2 nVT ln D ,1 1 VTh
I
RTh S
i D ,3
1 k
iD
5V vD
1 0.001
i D ,1 0.026 ln
3 15
1 5 4.3 mA
10 2.03 10
1 0.0043
iD,2 0.026 ln
3 15
1 5 4.262 mA
10 2.03 10
Since the second value is very close to the value obtained after the first
iteration, no further iterations are necessary, and the solution is iD 4.262 mA
and v D 0.7379 V .
v
diode off (V)
Figure 6.6
(i) Find the current, I, in the circuit shown below, using the ideal diode
model.
R
10 k I
E 10 V ideal
(i) Firstly, we must determine whether the diode is forward biased or reverse
biased. In this circuit, the positive side of the battery is connected (via the
resistor) to the anode. Therefore, the anode is positive with respect to the
cathode, and the diode is forward biased. In order to use the ideal diode
model, the diode is simply replaced by the ideal diode model (forward
bias model), and the simplified circuit is analysed accordingly.
The equivalent circuit is shown below, where the diode has now been
replaced by a short circuit.
R
10 k
E 10
E I I= = = 1 mA
10 V R 10 k
(ii) If the battery is reversed, the diode becomes reverse biased. In this case,
the diode is replaced by the ideal diode model for reverse bias. Since the
reverse biased ideal diode model is simply an open circuit, there is no
current, i.e. I 0 .
A better model is to approximate the forward bias region with a vertical line
that passes through some voltage called e fd :
A model that takes
into account the
forward voltage drop
i
(mA)
v
efd (V)
This “constant voltage drop” model is better than the ideal model because it
more closely approximates the characteristic in the forward bias region. The
“voltage drop” is a model for the barrier voltage in the p-n junction. The The constant
voltage drop diode
model of the diode in this case is: model
ideal e fd
Figure 6.8
This model is the one of the simplest and most widely used. It is based on the
observation that a forward-conducting diode has a voltage drop that varies in
a relatively narrow range, say 0.6 V to 0.8 V. The model assumes this voltage
to be constant, say, 0.7 V. The constant voltage drop model is the one most
frequently employed in the initial phases of analysis and design.
(i) Find the current, I, in the circuit shown below, using the constant voltage
drop model of the diode (assume e fd 0.7 V ).
R
10 k I
E 10 V
(i) Analysis proceeds in exactly the same manner as the previous example,
except that the constant voltage drop diode model is used instead. The
diode is again forward biased, and so the equivalent circuit is shown
below, along with the calculation for I.
R
10 k I
ideal E - e fd 10 - 0.7
E I= = = 0.93 mA
10 V R 10k
e fd
1
slope =
rfd
reverse bias
model is valid
v
1 efd (V)
slope =
rrd forward bias
model is valid
For each section, we use a different diode model (one for the forward bias
region and one for the reverse bias region):
The piece-wise
linear diode model
ideal e fd rfd r rd
Figure 6.10
Typical values for the resistances are rfd 5 and rrd 109 .
Notice how we have done away with the ideal diode part of the model for
when the diode is reverse biased. This is because there is a separate
equivalent circuit for the forward bias and reverse bias regions, so an ideal
diode is not necessary (we apply one equivalent circuit or the other).
(i) Find the current, I, in the circuit shown below, using the piece-wise linear
model of the diode (assume e fd 0.7 V , rfd 5 and rrd 10 9 ).
R
10 k I
E 10 V
(iii) Analysis proceeds in exactly the same manner as the previous example,
except that the piece-wise linear diode model is used instead. The diode
is again forward biased, and so the equivalent circuit is shown below,
along with the calculation for I.
10 k
ideal
10 - 0.7
E 10 V e fd I= E - e fd = = 0.9295 mA
I R+ rfd 10k + 5
rfd
(iv) If the battery is reversed, the diode becomes reverse biased, and the
diode is replaced by the piece-wise linear model for the reverse
region, which is just the resistance rrd . Since rrd 10 9 , the
reverse current is:
E 10
I 9 10 nA
R rrd 10 10 4
Suppose we know the diode DC voltage and current exactly. We may want to
examine the behaviour of a circuit when we apply a signal (a small AC
voltage) to it. In this case we are interested in small excursions of the voltage
and current about the “DC operating point” of the diode. The best model in
this instance is the following (the forward bias region is used as an example,
but the method applies anywhere):
A model that
approximates the
characteristic by a
i tangent at a DC
operating point
(mA)
tangent
DC
operating
point 1
slope =
IDQ rd
v
VDQ (V)
Thus, for a small change v D in the diode voltage, we get a small change in
the diode current i D , which can be approximated by the change in current
we would get by following the tangent:
diD
iD vD (6.17)
dvD
diD I
S ev nVT (6.18)
dvD nVT
Dynamic resistance
dvD nVT
rd (6.19)
diD iD I DQ
I DQ
Therefore, using Eq. (6.17) and Eq. (6.19), a small AC signal v d superimposed
upon the DC operating point will result in a small AC current i d given by:
1
id vd (6.20)
rd
Now consider the case where the Thévenin equivalent circuit contains both a
DC source and a small signal AC source:
R Th
VDC iD
vD
vAC
Figure 6.12
In this case we analyse two separate circuits. The first circuit contains the DC
source which is used to establish the DC operating point. The diode in this
circuit has the standard i-v characteristic and the DC operating point can be
obtained using graphical methods (load line) or numerical methods (iteration).
The second circuit contains the small AC source and uses the dynamic
resistance model of the diode. The small AC currents and voltages in this
circuit can be superimposed upon the diode’s DC current and voltage obtained
from the first circuit. Thus we analyse:
R Th R Th
IDQ id
VDC VDQ + vAC rd vd
Figure 6.13
vD
VDQ
vd
Figure 6.14
The figure above illustrates the two separate analysis steps. First, the DC
operating point, or Q point for short, is found using graphical or numerical
techniques. Then the application of an AC voltage on top of the original DC
voltage results in a change in current given by the projection of the applied
voltage onto the diode i-v characteristic. If the AC voltage is a “small signal”,
then the diode characteristic can be replaced by a straight line. In this context, a
“small signal” is defined as one for which the tangent to the curve is a good
approximation to the curve, resulting in a linear relationship between the
voltage and current.
vi RL vo
Figure 6.15
vi vo
Vp Vp
t t
0 0
Figure 6.16
v i appears directly at the output – that is, vo vi , and the diode forward
cuts off – that is, there is no current. The output voltage v o will be zero, and the
It should be noted that while the input sinusoid has a zero average value, the
output waveform has a finite average value or DC component. Therefore,
rectifiers are used to generate DC voltages from AC voltages.
1
1
vi
Figure 6.17
As can be seen, the half-wave rectifier produces an output voltage equal to the
input voltage when the input voltage is positive and produces zero output
voltage when the input voltage is negative.
The full-wave rectifier utilizes both halves of the input signal – it inverts the
negative halves of the waveform. One popular implementation is shown below,
where the diodes are connected in a bridge configuration:
A full-wave “bridge
rectifier”
D1 D2
io
vs vi
D4 D3
Ro vo
Figure 6.18
We can perform the usual analysis quickly. In the positive half cycle of the
input voltage, D2 and D4 are on. Meanwhile, D1 and D3 will be reverse
biased. In the negative half cycle of the input voltage, D1 and D3 are on, and
D2 and D4 are off. The important point to note is that during both half-cycles,
the current through the resistor Ro is in the same direction (down), and thus v o
will always be positive. The waveforms are shown below:
vi vo
Vp Vp
0 t 0 t
Figure 6.19
D1 D2
vi vo
E1 E2
Figure 6.20
The circuit works very simply. Assume both diodes are off. KVL then gives:
vo vi (6.21)
If the output voltage is greater than E1 , then diode D1 will be on. This limits or
vo E1 for vi E1 (6.22)
If the output voltage is less than E 2 then diode D2 will be on, limiting the
output voltage to E 2 :
vo E2 for vi E2 (6.23)
vi
E1 vo
t
-E2
Figure 6.21
vo
E1
slope = 1
0
vi
-E2
Figure 6.22
6.7 Summary
The silicon junction diode forms the basis of modern electronics. It is a
device that effectively allows a current in only one direction.
i I S ev nVT 1
Beyond a certain value of reverse voltage (that depends on the diode)
breakdown occurs, and current increases rapidly with a small
corresponding increase in voltage. This property is exploited in diodes
known as breakdown diodes.
In the forward direction, the ideal diode conducts any current forced by the
external circuit while displaying a zero voltage drop. The ideal diode does
not conduct in the reverse direction; any applied voltage appears as reverse
bias across the diode.
nVT
rd
I DQ
vo
1
1
vi
vi RL vo
D1 D2
vo
io
vs vi
1 1
D4 D3 1 1
Ro vo vi
vo
R
E1
D1 D2 slope = 1
vi vo 0
vi
E1 E2
-E2
6.8 References
Sedra, A. and Smith, K.: Microelectronic Circuits, Saunders College
Publishing, New York, 1991.
Contents
Introduction
The analysis of a linear circuit that has storage elements (capacitors and
inductors) inevitably gives rise to a linear differential equation. The solution of
the differential equation always consists of two parts – one part leads to the so-
called forced response, the other is the natural response. The forced response
is due to the application of a source to the circuit. The natural response is due
entirely to the circuit’s configuration, its initial energy, and the amplitude of
the applied source at the instant of application.
We shall then study the natural response of some simple source-free RC and
RL circuits. This study will reveal some surprising results, such as the fact that
there is only ever one form of natural response – an exponential response.
We will become familiar with the exponential response, and we will give some
special names to the algebraic terms involved in it, such as initial condition and
time constant.
With practice, we will also see that we can write down the natural response for
simple circuits by inspection. This will lead to intuition of circuit behaviour,
and we will “get a feel” for the way a circuit behaves by simply looking at it.
D is just shorthand
d
D (7.1) for d dt
dt
Then D 2 denotes differentiation twice with respect to t, and so on. That is, for
positive integer k:
dk y
D y k
k
(7.2)
dt
The expression:
Differential
The product of two differential operators always exists and is a differential operators commute
operator. For operators with constant coefficients it is true that AB BA . if they have constant
coefficients
Let A D 2 and B 3D 1 .
Then:
By 3D 1 y 3
dy
y
dt
and:
dy
ABy D 2 3 y
dt
2
d y dy dy
3 2 6 2y
dt dt dt
2
d y dy
3 2 5 2y
dt dt
3D 5 D 2 y
2
Hence AB D 23D 1 3D2 5D 2 .
Hence A B 3D3 D2 3D 9 .
it is easy to find the effect that a differential operator has upon e st . Let f D
be a polynomial in D:
Then:
so:
Operating with D
f De f s e
st st and multiplication by
(7.9) s are equivalent for
the function e st
This equation does not mean that f D f s . f D is an operator, and it
means “to take a linear sum of derivatives” of a function that it operates on.
f s is a standard polynomial in s. The equation means that the effect of the D
f Dest 0, if f s 0 (7.10)
2s 2 5s 12 0
or:
s 42s 3 0
2D 2
5D 12 e4t 0
and that:
2D 2
5D 12 e3t 2 0
2D 2
5D 12 y 0 .
and:
D s 2 e st y D s e st Dy
(7.12)
e D y st 2
exponential factor
e st f Dy f D s est y (7.14) from the left of a
differential operator
to the right
This relation shows us how to shift an exponential factor from the left of an
operator to the right of an operator.
D 34 y 0
e3t D 3 y 0
4
D4 e3t y 0
and finally:
y c0 c1t c2t 2 c3t 3 e3t
It can be shown that the four functions e 3t , te 3t , t 2e 3t and t 3e 3t are linearly
independent – thus the solution given is the general solution of the differential
equation.
D s n t k est 0,
The solution to a
special class of
differential equation
k 0, 1, ..., n 1 (7.16)
dny d n1 y
an n an1 n1 a1 a0 y r t
dy (7.17)
dt dt dt
If r t is identically zero (i.e. zero for all time, not just a specific time), then
we have an equation that is said to be homogeneous:
n n 1 Homogeneous
d y d y dy differential equation
an a n 1 a a0 y 0 (7.18) defined
dt n1
1
dt n dt
Any linear combination of solutions of a linear homogeneous differential
equation is also a solution. If yi , with i 1, 2, ..., k , are solutions of
y c1 y1 c2 y2 ck yk (7.19)
y c1 y1 c2 y2 cn yn (7.20)
f D y 0 (7.21)
f De st 0
coefficients is
y e st (7.22)
f s 0
Characteristic
equation defined (7.23)
Let the characteristic equation for Eq. (7.21) be of degree n. Let its roots be
s1 , s2 , …, sn . If these roots are all real and distinct, then the n solutions
d3y d 2 y dy
4 6y 0
dt 3 dt 2 dt
s 3 4s 2 s 6 0
s 1s 2s 3 0
whose roots are s 1, 2, 3 . Then the general solution is seen to be:
3D 3
5D 2 2 D y 0
3s 3 5s 2 2s 0
ss 23s 1 0
whose roots are s 0, 2, 13 . Using the fact that eot 1 , the desired solution
may be written:
y c1 c2e2t c3et 3
d2y
4y 0
dt 2
s2 4 0
with roots s 2, 2 . Hence the general solution of the differential equation is:
y c1e2t c2e2t
0 c1 c2
Now:
dy
2c1e 2t 2c2e 2t
dt
3 2c1 2c2
c2 34 . Therefore:
y 3
4 e 2t
e2t
The simple RC
circuit
C v R
Figure 7.1
We designate the time-varying voltage by vt , and we shall let the value of
vt at t 0 be prescribed as V0 .
Kirchhoff’s Current Law (KCL) applied to the top node gives us:
dv v
C 0 (7.25)
dt R
Division by C gives us:
dv v The governing
0 (7.26) differential equation
of the simple RC
dt RC circuit
and we must determine an expression for vt which satisfies this equation and
also has the value V0 at t 0 .
1
D v 0 (7.27)
RC
for which the characteristic equation is:
1
s 0 (7.28)
RC
which has a root at s 1 RC . Therefore, the solution to the differential
equation is:
v c1et RC (7.29)
V0 c1 (7.30)
Let us check the power and energy relationships in this circuit. The power
being dissipated in the resistor is:
v 2 V02e 2t RC
pR (7.32)
R R
and the total energy turned into heat in the resistor is found by integrating the Power and energy
dissipated in the
instantaneous power from zero time to infinite time: simple RC circuit
V02
ER pR dt e 2t RC dt
0 R 0
V02 RC 2t RC
2 e
R 0
1
2 CV02 (7.33)
This is the result we expect, because the total energy stored initially in the
capacitor is 1
2 CV02 , and there is no energy stored in the capacitor at infinite
time. All the energy is accounted for by dissipation in the resistor.
v V0et RC (7.34)
At zero time, the voltage is the assumed value V0 and as time increases, the
voltage decreases and approaches zero. The shape of this decaying exponential
is seen by a plot of v V0 versus t, as shown below:
The decaying
exponential
response v
V0
1
Figure 7.2
Since the function we are plotting is e t RC , the curve will not change if RC
does not change. Thus, the same curve must be obtained for every RC circuit
having the same product of R and C. Let’s see how this product affects the
shape of the curve.
If we double the product RC, then the exponent will be unchanged if t is also
doubled. In other words, the original response will occur at a later time, and the
new curve is obtained by moving each point on the original curve twice as far
to the right. With this larger RC product, the voltage takes longer to decay to
any given fraction of its original value.
The initial rate of decay is found by evaluating the derivative at zero time:
d v 1 t RC 1
e (7.35)
dt V0 t 0
RC t 0 RC
We designate the value of time it takes for v V0 to drop from unity to zero,
The product RC has the units of seconds, and therefore the exponent t RC is
dimensionless (as it must be). The value of time T is called the time constant.
It is shown below:
Time constant
shown graphically
on the natural
v response curve
V0
1
T t
Figure 7.3
v
e 1 0.3679 or v 0.3679V0 (7.37)
V0
Thus, in one time constant the response has dropped to 36.8 percent of its
initial value. The value of T may be determined graphically from this fact
from the display on an oscilloscope, as indicated below:
Response curve
values at integer
multiples of the time v
constant
V0
1
0.3679
0.1353
0.0498
0
t
T 2T 3T 4T
Figure 7.4
At some point three to five time constants after zero time, most of us would
agree that the voltage is a negligible fraction of its former self.
Why does a larger value of the time constant RC produce a response curve
which decays more slowly? An increase in C allows a greater energy storage
for the same initial voltage, and this larger energy requires a longer time to be
dissipated in the resistor. For an increase in R, the power flowing into the
resistor is less for the same initial voltage; again, a greater time is required to
dissipate the stored energy.
In terms of the time constant T , the response of the parallel RC circuit may be
written simply as:
v V0et T (7.38)
Firstly, consider a circuit with any number of resistors and one capacitor. We
fix our attention on the two terminals of the capacitor and determine the
equivalent resistance across these terminals. The circuit is thus reduced to the
simple parallel case.
i1
R2
R1 R3 C v R eq
C v
(a) (b)
enabling us to write:
t Req C
v V0e
where:
v0 V0
R1R3
and Req R2
R1 R3
Every current and voltage in the resistive portion of the circuit must have the
t Req C
form Ae , where A is the initial value of that current or voltage.
i1 i1 0 et T
where:
RR
T R2 1 3 C
R1 R3
and i1 0 remains to be determined from some initial condition. Suppose that
v0
i1 0
R3
R2 R1R3 R1 R3 R1 R3
v0
t
R3
i1 e R2 R1R3 R1R3 C
R2 R1R3 R1 R3 R1 R3
Another special case includes those circuits containing one resistor and any
number of capacitors. The resistor voltage is easily obtained by establishing the
value of the equivalent capacitance and determining the time constant.
L v R
Figure 7.5
Kirchhoff’s Voltage Law (KVL) applied around the loop gives us:
di
L Ri 0 (7.39)
dt
Division by L gives us:
The governing
di R differential equation
i0 (7.40) of the simple RL
dt L circuit
dv v
0 (7.41)
dt RC
shows that the replacement of v by i and RC by L R produces an equation
identical to Eq. (7.40). It should, for the RL circuit we are now analysing is the
dual of the RC circuit we considered first.
This duality forces i t for the RL circuit and vt for the RC circuit to have
identical expressions if the resistance of one circuit is equal to the conductance
of the other and if L is numerically equal to C. That is, we will obtain the dual
circuit (and equation) if we make the substitution:
CL
Let’s examine the physical nature of the response of the RL circuit as expressed
by Eq. (7.44). At t 0 we obtain the correct initial condition, and as t
becomes infinite the current approaches zero. This latter result agrees with our
thinking that if there were any current remaining through the inductor, then
energy would continue to flow into the resistor and be dissipated as heat. Thus
a final current of zero is necessary.
The time constant of the RL circuit may be found by using the duality
relationships on the expression for the time constant of the RC circuit, or it may
be found by simply noting the time at which the response has dropped to 36.8
percent of its initial value:
L Time constant
T (7.45) defined for the
simple RL circuit
R
Our familiarity with the negative exponential and the significance of the time
constant T enables us to sketch the response curve readily:
i
I0
0.3679 I0
0
t
T
Figure 7.6
An increase in L allows a greater energy storage for the same initial current,
and this larger energy requires a longer time to be dissipated in the resistor. If
we reduce R, the power flowing into the resistor is less for the same initial
current; again, a greater time is required to dissipate the stored energy.
R3 L i i
R1 R2 R4 L R eq
i1 i2
(a) (b)
R1R2
Req R3 R4
R1 R2
L
T
Req
i i0et T
and represents what we might call the basic solution to the problem. It is quite
possible that some current or voltage other than i is needed, such as the current
i2 in R2 . We can always apply Kirchhoff’s laws and Ohm’s law to the resistive
i0e t T
R1
i2
R1 R2
It may also happen that we know the initial value of some current other than
the inductor current. Thus, if we are given the initial value of i1 as i1 0 , then
RR
i2 0 i1 0 1
i 0 i1 0 i2 0
R1 R2
R2
i1 0
i2
R1
R2
i1 0 e t T
We can obtain this last expression more directly. Every current and voltage in
the resistive portion of the circuit must have the form Ae t T , where A is the
initial value of that current or voltage. We therefore express i2 as:
i2 Ae t T
i2
R1
R2
i1 0 e t T
120
60
iL
t=0 1 mH 50
18 V 90 2 mH 3 mH
i1
23
Leq 1 2.2 mH
23
an equivalent resistance,
9060 120
Req 50 110
90 180
Leq 2.2 10 3
T 20 μs
Req 110
Thus, the form of the natural response is Ae 50000t . With the independent source
connected t 0 , iL is 18
50 , or 0.36 A, while i1 is 18
90 , or 0.2 A. At t 0 , iL
i1 0 iL 0 180
270 0.24 A
Hence:
iL 0.36 t0
0.36e 50000t
t0
and:
i1 0.2 t0
0.24e 50000t
t0
iL i1
0.4 0.4
0.3 0.3
0.2 0.2
0.1 0.1
t ( s) 0
t ( s)
-20 0 20 40 60 80 -20 20 40 60 80
-0.1
-0.2
-0.3
7.9 Summary
The solution to the linear homogeneous differential equation f Dy 0 is
y c1e s1t c2es2t cne snt where the si ’s are the roots of the characteristic
Leq
For single time constant RL circuits, the time constant is T .
Req
Not all RC and RL circuits can be reduced to single time constant circuits.
7.10 References
Bedient, P. & Rainville, E.: Elementary Differential Equations, 6th Ed.
Macmillan Publishing Co., 1981.
Hayt, W. & Kemmerly, J.: Engineering Circuit Analysis, 3rd Ed., Mcgraw-Hill,
1984.
Exercises
1.
The current in a simple source-free series RC circuit is given by
it 20e5000t mA , and the capacitor voltage is 2 V in magnitude at t 0 .
Find R and C.
2.
Consider the circuit shown below:
200
t=0
1 kV 600 50 F
3.
Let v and i be the voltage and current variables for a capacitor, assuming the
passive sign convention. The capacitor is the only energy-storage element
present in a source-free resistive circuit. If v 0 80 V , i 0 0.1 A , and
q 0 for the capacitor is 20 mC, find v0.01 .
4.
Consider the circuit shown below:
100
ix
5 ix 400 2 F
If ix 0 3 mA , find ix t for t 0 .
5.
Consider the circuit shown below:
fuse
vs 10 M 2 F
6.
Consider the circuit shown below:
t=0
2 M 9V
i2
4 M 1 M 20 F 30 F
7.
The magnitude of the current in a series RL circuit decreases at a rate of
2000 As-1 at t 0 and 100 As-1 at t 0.2 s . At what time has the energy
stored in the inductor decreased to 1 per cent of its initial value?
8.
Consider the circuit shown below:
v( t )
2 8
i1 i2
0.4
1H 2H
t=0
24 V
Find:
9.
What is the time constant of a series RL circuit if:
(b) the time required for the current to drop to half of its initial value is 0.1 s
less than the time required for it to drop to one-quarter of its initial value?
10.
The switch in the circuit shown below has been open for a long time.
1.5 H 2H
i
3
30 20
t=0
12 V
Find i at t :
11.
The voltage across the resistor in a simple source-free series RL circuit is
vR t 50e400t V for t 0 . If the value of resistance changes from 200 Ω to
40 Ω at t 0 when a second resistor is placed in parallel with it, find vR t
for t 0 .
12.
The switch in the circuit shown below has been open for a long time.
200
1 k 100
t=0
12 V
4 F 0.5 H
i
It closes at t 0 . Find i t .
Contents
Introduction
Nonlinear op-amp circuits play a major role in modern electronics. Examples
include comparators, precision rectifiers, peak detectors, limiters and clamps.
Each of these circuits can be used as a “building block” in the creation of more
advanced signal conditioning circuitry found in a large variety of applications,
such as: communication receivers, automatic gain control circuits, oscillators
and waveform generators.
A limiter circuit can be used to limit a signal to within a certain range – such a
circuit can be used to protect following circuitry from overload conditions, and
they are often used in signal generation circuitry.
Figure 8.1
vi vo
RL
During the positive half-cycle, the input voltage is positive, hence the output
voltage is Vsat . During the negative half-cycle, the input voltage is negative,
hence the output voltage is Vsat . Thus the output voltage switches between
Vsat and Vsat whenever the input signal crosses the zero level:
vi
t
T0
vo
+Vsat
t
T0
-Vsat
Looking at the waveform shown above, we realize that a zero crossing detector
can be used as a sine- to square-wave converter.
This is an impractical circuit, since any noise on the input waveform near the
zero crossings will cause multiple level transitions in the output signal.
+VCC
R3 R4
8
Vref
LM311
vp
2 7
vn
3
R2
vi
4 1
R1
reference voltage. The LED has VLED 1.8 V at I LED 3 mA . We calculate the
Zener diode’s current setting resistor as follows:
VCC VZ 10 2.5
R3 0.326 k
IZ 23
330 (standard value)
Careful examination of the LM311 datasheet reveals that the output transistor
will be turned ON when v p vn . The voltage at the inverting terminal of the
R1
vn vi
R1 R2
R1
vi VZ
R1 R2
R
vi 1 2 VZ
R1
R2 v
i 1
R1 VZ
R2 10
1 3
R1 2.5
From the datasheet of the LM311, we obtain the saturation voltage of the
output transistor as VCEsat 0.3 V . The current limiting resistor for the LED is
then given by:
Figure 8.2
The transfer
characteristic of a
half-wave rectifier
vo with real diodes
10
1
1
ideal
real
1
0 1.7 10.8
vi
Figure 8.3
Notice the effect of the finite voltage drop of the diode. To achieve precision
rectification we need a circuit that keeps v o equal to v i for vi 0 . Such
circuits can be made using op-amps and are known as precision rectifiers.
vo
vi
RL
"superdiode"
Figure 8.4
With a real op-amp with a finite open-loop gain, AOL , negative feedback will
work to ensure that the output of the op-amp is:
vo
1
AOLvi vd (8.2)
AOL 1
Since AOL 100 000 for a typical op-amp, the transfer characteristic is nearly
AOL
perfect, with a slope of 1 , and with vo 0 when vi vd AOL 0 . In
AOL 1
other words, the rectified output appears when v i exceeds a negligibly small
voltage equal to the diode drop divided by the op-amp open-loop gain.
Thus, for vi 0 , vo vi (to a high degree of precision).
Now consider the case when v i goes negative, and assume that the diode is
The transfer characteristic of the circuit will be almost identical to the ideal
characteristic of a half-wave rectifier. The non-ideal diode characteristic has
been almost completely masked by placing it in the negative-feedback path of
an op-amp. This is another dramatic application of negative feedback. The
combination of diode and op-amp, shown in the dotted box in Figure 8.4, is
appropriately referred to as a superdiode.
The circuit does have serious disadvantages which make it impractical. When
v i goes negative and vo 0 , the entire magnitude of v i appears between the
two input terminals of the op-amp. If this magnitude is greater than a few volts,
the op-amp may be damaged unless it is equipped with what is called
“overvoltage protection” (a feature that most modern IC op-amps have).
Another disadvantage is that when v i is negative the op-amp will be saturated
close to its negative supply rail. Although not harmful to the op-amp, saturation
should usually be avoided, since getting the op-amp out of saturation and back
into its linear region of operation takes some time. This time delay is
determined by the op-amp’s slew rate, and even a very fast op-amp will limit
the circuit to a low frequency range of operation.
An alternative precision half-wave rectifier circuit that does not suffer from the
disadvantages of the previous circuit is shown below:
A precision half-
wave rectifier
R2
D1
R1
vi D2
vo
Figure 8.5
Due to the presence of diodes, we will consider two cases: one where the input
voltage is positive, the other when the input voltage is negative.
In the positive half cycle ( vi 0 ), direct analysis on the circuit diagram gives:
3
v
R 2 Ri
vi 1
R1 R2
2 D1
0 vD
R1 1 2
vi D2 5 R2
vi 0 V vo = - vi
R1 vo - vD vi R1
2
6 R1 4
Figure 8.6
2. Due to the infinite input resistance of the ideal op-amp, the current entering
the inverting terminal is 0 A. We also assume that diode D1 is “off” (an
assumption that we will check later). KCL at the inverting terminal now
gives i2 i1 vi R1 .
vi
v R2 R2 i2 R2 , with the polarity shown.
R1
4. KVL, from the common, across the VSC, across R2 and to the output
vi R
terminal gives vo 0 R2 2 vi .
R1 R1
5. We assume that diode D2 is “on” (an assumption that we will check later).
KCL at the output then gives iD2 i2 vi R1 . The diode “on” voltage drop
R2
(remember that vo vi and vi 0 ). Thus, diode D1 is indeed reverse-
R1
biased, and our original assumption about it being “off” is correct. Also, the
diode D2 is indeed forward-biased, thus establishing a negative-feedback
path around the op-amp and forcing a virtual common to appear at the
inverting input terminal. That is, negative feedback works to ensure that the
op-amp output voltage is maintained at vo v D2 .
Thus, in the positive half cycle ( vi 0 ), the output of the circuit is:
R2
vo vi (8.3)
R1
In the negative half cycle ( vi 0 ), direct analysis on the circuit diagram gives:
0V
2
0 R2
D1 4
R1 1 vD - vi
vi 1
R1 D2
vi 0 V vo = 0
R1 vD 1 0 3
- 5
Figure 8.7
1. With the usual assumption that the ideal op-amp has a negative feedback
path, then a virtual short-circuit (VSC) exists at its input terminals. The
voltage at the inverting terminal is v 0 . The current through resistor R1 ,
2. We assume that diode D2 is “off” (an assumption that we will check later).
Then there is no current in resistor R2 , and hence v R2 0 .
3. KVL, from the common, across the VSC, across R2 and to the output
terminal gives vo 0 .
4. We assume that diode D1 is “on” (an assumption that we will check later).
Due to the infinite input resistance of the ideal op-amp, the current entering
the inverting terminal is 0 A. KCL at the inverting terminal now gives
iD1 i1 vi R1 . The diode “on” voltage drop is then given by its
indeed reverse-biased.
Thus, in the negative half cycle ( vi 0 ), the output of the circuit is:
vo 0 (8.4)
The transfer characteristic of the circuit is shown below for the case R1 R2 :
The transfer
characteristic of a
precision inverting
half-wave rectifier vo
vi
1
1
Figure 8.8
The major advantage of this circuit is that the feedback loop around the op-amp
remains closed at all times. Hence the op-amp remains in its linear operating
region, avoiding the possibility of saturation and the associated time delay
required to “get out” of saturation.
vi -2
1
1
vo
1
vi 1 vo
vi
Figure 8.9
R1 R 2 /2
D1 vo
R1
vi D2
Figure 8.10
The output, which is “buffered” since it comes from the output of an op-amp, is
the absolute value of the input voltage:
vo vi (8.5)
Rin R1 || R2 (8.6)
If desired, a voltage follower can be placed at the input to buffer the incoming
signal.
0V
v oH
0V
Figure 8.11
The circuit will work on any single supply op-amp whose inputs can withstand
being pulled below 0 V. In addition, the op-amps need to have an output that is
capable of swinging “rail-to-rail”, which means that the output can go within a
few millivolts of the supply rails under light loading.
When the input signal is above 0 V, the unity-gain follower presents the input
signal to the noninverting input of the second op-amp. The feedback around the
second op-amp creates a virtual short-circuit across its input terminals, and
subsequently the inputs are equal. Thus, there is no voltage across resistor R1 ,
and no current in R1 and R2 . The output voF therefore “tracks” the input.
Conversely, when the input is negative, the output of the first op-amp is forced
to zero (it saturates at the limit of its supply). The noninverting input of the
second op-amp see the 0 V output, and during this phase operates as a unity-
gain inverter, rectifying the negative portion of the input, v i .
ideal
vi C vo
Figure 8.12
The ideal diode allows the capacitor to charge, but not to discharge. Therefore,
the capacitor will retain the positive peak value of the input waveform:
… and its input and
output waveforms
v
vo
vi
t
Figure 8.13
vo
vi
C RL
"superdiode"
Figure 8.14
Here we have represented the input resistance of the following circuit as a load
resistance, R L .
For v i positive and greater than the output voltage the op-amp will drive the
diode on, thus closing the negative-feedback path and causing the op-amp to
act as a follower. The output voltage will therefore follow that of the input,
with the op-amp supplying the capacitor charging current. This process
continues until the input reaches its peak value.
Now consider what happens if the input signal falls below the peak value
stored on the capacitor. In this case v v at the op-amp’s input terminals,
and the op-amp enters negative saturation, reverse-basing the diode. The
superdiode is effectively in the “off” state and the capacitor will discharge
through the load resistance R L :
t
vo vˆi e RL C (8.7)
The rate of decay of the output voltage is therefore dictated by the capacitor
value and the attached load. This decay in output voltage is sometimes
desirable – inclusion of a load resistance is essential if the circuit is required to
detect reductions in the magnitude of the positive peak.
D1
D2 A2 vo
A1
vi
C
Figure 8.15
The op-amp A1 offers a high input impedance to the source. The op-amp A2
acts as a buffer between the capacitor and any attached load, thus preventing it
from discharging. The output v o is equal to the voltage on the capacitor, which
equals the positive peak of the input voltage up to that time.
0 R
D1 0V vi
vi D2 A2 vo
vi
A1
vi v1 vD 2
Figure 8.16
Now since diode D1 is “off”, there is no path for current through R. Thus the
voltage across R is 0 V. Thus the follower A2 must output a voltage such that:
vo vi (8.8)
Thanks to the virtual short-circuit across the follower A2 , this voltage must
appear across the capacitor, and it therefore charges up. The op-amp A1
provides the charging current, and its output voltage must be:
v1 vi vD2 (8.9)
We can now see that the assumption that diode D1 is “off” is consistent with
the voltage across it:
So long as vi vo , the circuit will work in this manner, and the output v o
It can be observed that placing the diode D2 and the follower A2 within the
feedback path of A1 eliminates the possible error due to the diode drop across
D2 . We should choose an op-amp for A2 that has low input bias currents so as
to minimize the capacitance discharge. JFET input op-amps are ideal in this
case. The op-amp we choose for A1 must have a high output current capability
to charge C during fast-occurring input voltage peaks. As will be seen shortly,
neither op-amp enters saturation which means the circuit can be operated at
relatively high frequencies.
vo - vi
R
vo - vi
D1 R vi
vD
vi 1
D2 A2 vo
0 vi
A1
vi v1
C
Figure 8.17
vo vˆi (8.11)
v1 vi vD1 (8.12)
We can now see that the assumption that diode D2 is “off” is consistent with
the voltage across it:
So long as vi vo , the circuit will work in this manner, and the output v o
retains the peak value of v i . This mode of operation is called the hold mode.
8.4 Limiter
Circuits which are used to clip off the unwanted portions of the input voltage
above or below certain levels, so as to produce limited outputs, are called
limiters or clippers.
A double limiter circuit works on both positive and negative peaks of an input
waveform. An implementation using an op-amp is shown below:
A double limiter
circuit utilising a
double-anode Zener
"double-anode R2 diode…
Zener diode"
Z2 Z1
R1
vi
vo
Figure 8.18
0
vi
R2
slope =
R1
-(VZ 1 + 0.7)
Figure 8.19
20 k
8.2 V 5.6 V
10 k
vi
vo
We assume that when a Zener diode conducts in the forward direction, the
voltage drop is approximately 0.7 V. The circuit’s transfer characteristic is:
vo
8.9
3.15
-4.45 0
vi
slope = - 2
- 6.3
vo
8.9 vi
3.15
t
-4.45
-6.3
8.5 Clamp
A clamp circuit is used to add a DC component to an AC input waveform so
that the positive (or negative) peaks are forced to take a specified value –
usually zero. In other words, the peaks of the waveform are “clamped” to a
specified voltage value. The simplest form of positive clamp is shown below:
An ideal positive
clamp
vC
C
vi ideal D vo
Figure 8.20
Because of the polarity in which the diode is connected, it will allow the
capacitor to charge to a voltage vC equal to the magnitude of the most negative
peak of the input signal. Subsequently, the diode turns off and the capacitor
retains its voltage indefinitely.
vo vi vC (8.14)
it follows that the output waveform will be identical to that of the input except
shifted upwards by vC .
Another way of visualizing the operation of the circuit is to note that because
the diode is connected across the output with the polarity shown, it prevents the
output voltage from going below 0 V (by turning on and charging up the
capacitor).
Figure 8.21
As can be seen from the figure above, another appropriate name for the circuit
is a DC restorer. These circuits find application in communication systems.
It should be obvious that reversing the diode polarity will provide an output
waveform whose highest peak is clamped to 0 V – a negative clamp.
vi vo
C
Figure 8.22
8.6 Summary
The op-amp in an open-loop configuration can be used as a basic
comparator:
vo
+Vsat
vi
vo vi
-Vsat
R2 vo
D1
R1
vi D2 vi
vo 1
1
A precision positive peak detector can retain its output voltage for a long
time:
D1
D2 A2 vo
A1
vi
C
A limiter is used to clip off the unwanted portions of the input voltage
above or below certain levels, so as to produce a limited output:
R2
vo
Z2 Z1 (VZ 2 + 0.7)
R1
vi vi
vo 0
R2
slope =
R1
-(VZ 1 + 0.7)
vi vo
C
8.7 References
Sedra, A. and Smith, K.: Microelectronic Circuits, Saunders College
Publishing, New York, 1991.
Exercises
1.
The window detector circuit detects when an unknown voltage falls within a
specified voltage band or window. It consists of two comparators and two
reference voltages VTL and VTH defining the lower and upper limits of the
window, as shown below:
+VCC
Rc
LM311
VTH 2 7
1
vi
LM311
2 7
vo
VTL 3
Note the use of a “wired-OR” output. If either comparator turns on then the
output will be “pulled low” (i.e. vo 0 V ). With both comparators off there is
no current and the output is “pulled high” (i.e. vo VCC ). The resistor Rc in
this case is called a “pull-up resistor”.
2.
Draw the transfer characteristic of the following op-amp circuit.
R R R
R D1
vi
A1 A2 vo
D2
R
3.
Draw the transfer characteristic of the following op-amp circuit.
3R R
+15 V
D1
R
vi D2
vo
4.
It is desired to clamp a 1 kHz, 5 V peak, sinusoid so that its maximum value is
0 V. Draw the schematic of a circuit that will achieve such an operation with
precision.
5.
The following block diagram shows part of a “clock recovery” circuit for a
communication system. Determine the function of each block, and therefore
give the blocks a name:
Waveform
a b c d
(i) (ii) (iii)
t
a
t
c
t
d
Contents
Introduction
The determination of the natural response of a source-free circuit relies solely
on the configuration of the circuit elements and on any initial energy storage
present in the system (capacitor voltages and inductor currents).
We will consider circuits that are initially in a known state – any sources have
either been off for a very long time, or on for a very long time. Any forcing
functions are switched on at t 0 .
The forced response can be obtained by considering the response of the circuit
after a very long time. The form of the natural response will be the same as that
obtained for the source-free circuit.
The complete response will be obtained by adding the forced response to the
natural response.
0, t 0
u t
The unit-step
function defined
1, t 0 (9.1)
and graphed
u(t )
1
0 t
Figure 9.1
The argument of a
We will now make a very important observation: it is the argument of the
function determines function which determines the position of the function along the t-axis. We
its position
therefore have the delayed unit-step function:
0, t t0
u t t0
1, t t0 (9.2)
u(t- t0 )
1
0 t0 t
Figure 9.2
We see that the argument t t0 simply shifts the origin of the original
General
V u(t - t0) network
Figure 9.3
Index The Unit-Step Forcing Function PMcL
The unit-step
function as a
u ( t- 1) cos 2 t “switch”
1
-2 -1 0 1 2 3 4 t
Figure 9.4
v(t)
V
0 t0 t1 t
Figure 9.5
t=0
General
(a) V network
General
(b) V u(t ) network
However, this is incorrect, because the circuit with the step function actually
represents:
The circuit
t=0
equivalent of a step-
voltage function
General
(c) V network
That is, the step function applies v 0 for t 0 , and then v V for t 0 . The
first circuit applies an open circuit for t 0 , and then v V for t 0 .
However, circuit (b) can often be used if we establish that all initial currents
and voltages in the original network and in circuit (b) for t 0 are equivalent.
This is always the case for circuits that start out with zero initial conditions (no
stored energy) at t 0 .
V C v( t ) Vu ( t ) C v( t )
(a) (b)
Figure 9.6
We will assume that there is no stored energy in the capacitor before t 0 , and
we are therefore able to replace the battery and switch by a voltage-step forcing
function Vu t , which also produces no response prior to t 0 . Hence, we will
analyse the equivalent circuit shown in circuit diagram (b).
We shall find vt by writing down the appropriate differential equation that
describes the circuit, and then solve it using Euler’s integrating factor.
Applying KCL to the top capacitor node, we have:
v Vu t dv (9.5)
C 0
R dt
which can be rewritten as:
The governing
Vu t
differential equation
(9.6)
dv v for the RC circuit
driven by a step-
dt RC RC voltage
vt 0, t 0 (9.7)
dv v V
, t 0 (9.8)
dt RC RC
To solve, first multiply both sides by an integrating factor equal to et RC . This
gives:
dv t RC v V
et RC e et RC (9.9)
dt RC RC
Thus, recognising that the left hand-side is the derivative of vet RC , we have:
d
dt
vet RC et RC
V
RC
(9.10)
Ve t RC
ve t RC
dt A (9.11)
RC
where A is a constant of integration. Dividing both sides by the integrating
factor gives:
Ve t RC
RC dt Ae
t RC t RC
ve (9.12)
vt V Ae t RC (9.13)
Prior to t 0 , vt 0 , and thus v 0 0 . Since the voltage across a capacitor
cannot change by a finite amount in zero time without being associated with an
infinite current, we thus have v 0 0 . We thus invoke the initial condition
that v 0 0 and get:
vt V Ve t RC , t 0 (9.14)
Thus, an expression for the response valid for all t would be:
The complete
vt V 1 et RC ut (9.15) response of an RC
circuit to a step-
voltage
This is the desired solution, but it has not been obtained in the simplest manner.
The complete
In order to establish a more direct procedure, we will interpret the two terms response is
composed of two
appearing in Eq. (9.15). parts…
The exponential term has the functional form of the natural response of the RC
circuit – it is a negative exponential that approaches zero as time increases, and
the natural response
it is characterized by the time constant RC. The functional form of this part of and…
the response is identical with that which is obtained in the source-free circuit.
However, the amplitude of this exponential term depends on V, the forcing
function.
Eq. (9.15) also contains a constant term, V. Why is it present? The natural
response approaches zero as the energy stored in the capacitor gradually
reaches its limit. Eventually the capacitor will be fully charged and it will the forced response
appear as an open circuit – the current will be zero, and the battery voltage V
will appear directly across the capacitor terminals. This voltage is a part of the
response which is directly attributable to the forcing function, and we call it the
forced response. It is the response which is present a long time after the switch
is closed.
The forced response has the characteristics of the forcing function; it is found
The forced response
is determined by by pretending that all switches have been thrown a long time ago. For circuits
forcing function
with only switches and DC sources, the forced response is just the solution of a
simple DC circuit problem (all capacitors are open-circuits, all inductors are
short-circuits).
The natural response is a characteristic of the circuit, and not of the sources. Its
The natural
response is form may be found by considering the source-free circuit, and it has an
determined by the
circuit amplitude which depends on the initial amplitude of the source and the initial
energy storage.
The reason for the two responses, forced and natural, may also be seen from
physical arguments. We know that our circuit will eventually assume the
forced response. However, at the instant the switches are thrown, the initial
The natural capacitor voltages (or the currents through the inductors in other circuits) will
response provides have values which depend only on the energy stored in these elements. These
the link between the
initial state and final voltages or currents cannot be expected to be the same as the voltages and
state of a circuit
currents demanded by the forced response. Hence, there must be a transient
period during which the voltages and currents change from their given initial
values to their required final values. The portion of the response which
provides the transition from initial to final values is the natural response (often
called the transient response).
dny d n1 y
an n an1 n1 a1 a0 y r t
dy
dt dt dt (9.17)
f Dy r t (9.18)
f Dyc 0
the complementary
(9.19) solution (natural
response) and…
where the ci ’s are arbitrary constants and the si ’s are the roots of the
characteristic equation.
satisfies the original differential equation. That is, the particular solution
satisfies:
f Dy p r t
the particular
solution (forced (9.21)
response)
To see that the general solution of Eq. (9.18) is composed of two parts, let the
complete solution be written as the sum of the particular solution and the
complementary solution:
The general solution
is the sum of the
particular solution y y p yc (9.22)
and the
complementary
solution
Substitution into Eq. (9.18) results in:
f D y p yc f D y p f D yc
r t 0
r t (9.23)
That is, we can safely add yc to any particular solution, since it contributes
nothing to the right-hand side.
f Dy r t (9.24)
it is natural to write:
and then try to find an operator 1 f D so that the function y p will have
f D
gives a solution to
the original
differential equation
f s 0
1 st 1 st inverse differential
e e , operator on an
f D f s (9.28)
exponential function
f s e st
(9.29)
e st
f D e st
f s f s
and thus, with the requirement of Eq. (9.26), Eq. (9.28) is verified.
D 2
D y e 2t
1 e 2t 1
yp e 2t
e 2t
D D
2
2 2 6
2
y c1 c2et 16 e2t
D 2
9 y 5 3et
1 5 5
y1 5 2
D 9
2
0 9 9
and:
1 3et 3
y2 3e t
et
D 9
2
1 9
2
8
Hence:
y p y1 y2 95 83 et
is a particular solution.
a D
n
n
an1Dn1 a1D a0 y r t (9.30)
by inspection.
The particular
(9.31)
R solution for a
yp 0 constant forcing
a0 function is a
constant
D 2
3D 2 y 16
yc c1et c2e2t
y p 162 8
y c1et c2e2t 8
For the third method of finding a particular solution, let us restrict ourselves to
first-order differential equations. The general equation of the type encountered
in analysing the RC circuit of the previous section can be written as:
dv
Pv Q (9.32)
dt
P and Q can, in general, be functions of time. We identify Q as a term that is
due to the forcing function, and P as a quantity due solely to the circuit
configuration. Following the steps as before, we first multiply both sides by an
integrating factor equal to e Pt . This gives:
dv Pt
e Pt e Pv e Pt Q (9.33)
dt
Thus, recognising that the left hand-side is the derivative of vePt , we have:
d
dt
vePt QePt (9.34)
vePt QePt dt A
(9.35)
v e Pt QePt dt Ae Pt
of a first-order
differential
equation… (9.36)
If Qt , the forcing function, is known, then it remains only to evaluate the
integral to obtain the complete response. However, we shall not evaluate such
an integral for each problem. Instead we are interested in using Eq. (9.36) to
draw several general conclusions.
We should note first that, for a source-free circuit, Q must be zero, and the
solution is the natural response:
has a natural
Pt
vn Ae (9.37) response…
We therefore find that one of the two terms making up the complete response
has the form of the natural response. It has an amplitude which will depend on
the initial energy of the circuit as well as the initial value of the forcing
function.
We next observe that the first term of Eq. (9.36) depends on the functional
form of Qt , the forcing function. Whenever we have a circuit in which the and a forced
response
natural response dies out as t becomes infinite, then this first term must
describe the response completely after the natural response has disappeared.
Thus, this term is the forced response.
(9.38)
The forced response Q
for DC excitation vf
P
and we can write the complete response:
The complete Q
response for DC v v f vn Ae Pt (9.39)
excitation P
For the RC series circuit, Q P is the constant voltage V and 1 P is the time
constant T. We can see that the forced response might have been obtained
without evaluating the integral, because it must be the complete response at
infinite time. The forced response is thus obtained by inspection using DC
circuit analysis.
In the following section we shall attempt to find the complete response for
several RC circuits by obtaining the forced and natural responses and adding
them.
The simple RC
circuit driven by a
R step-voltage
Vu ( t ) C v( t )
Figure 9.7
The desired response is the voltage across the capacitor, vt , and we first
express this voltage as the sum of the forced and natural voltage:
The complete
response expressed
v v f vn (9.40) as the sum of the
forced response and
natural response
The functional form of the natural response must be the same as that obtained
without any sources. We therefore replace the step-voltage source by a short-
circuit and recognize the resulting parallel source-free RC circuit. Thus:
The form of the
We next consider the forced response, that part of the response which depends
upon the nature of the forcing function itself. In this particular problem the
forced response must be constant because the source is a constant V for all
positive values of time.
After the natural response has died out the capacitor must be fully charged and
the forced response is simply:
v V Ae t RC (9.43)
and apply the initial condition to evaluate A. The voltage is zero prior to t 0 ,
Determining the
amplitude of the and it cannot change value instantaneously since it is the voltage across a
decaying
exponential term capacitor. Thus, the voltage is zero immediately after t 0 , and:
0 V A (9.44)
Thus:
A V (9.45)
Therefore:
The complete
response – obtained
without solving a
differential equation!
v V 1 et RC (9.46)
The complete response is plotted below, and we can see the manner in which
the voltage builds up from its initial value of zero to its final value of V.
0.6321V
0
t
T 2T 3T 4T
Figure 9.8
a t=0
b
10
60 50 v( t )
200 50 mF
120 V
50 V i( t )
The switch is assumed to have been in position a for a long time, or, in other
words, the natural response which resulted from the original excitation of the
circuit has decayed to a negligible amplitude, leaving only a forced response
caused by the 120 V source.
We begin by finding the forced response when the switch is in position a. The
voltages throughout the circuit are all constant, and there is thus no current
through the capacitor (which is treated like an open-circuit). Simple voltage
division determines the forced response prior to t 0 :
50
vf 120 100, t 0
50 10
v0 100
v v f vn
1
Req 24
1 50 1 200 1 60
t Req C
vn Ae
or
vn Ae t 1.2
In order to evaluate the forced response with the switch at b, we wait until all
the voltages and currents have stopped changing, thus treating the capacitor as
an open circuit, and use voltage division once more:
vf
50200 50 200 50 20
60 50200 50 200
Thus:
v 20 Ae t 1.2
v 0 20 A 100
and thus:
A 80
v 20 80et 1.2 , t 0
v
100
20
0
t
-1 1T 2 3 4
The natural response is seen to form a transition from the initial to the final
response.
Finally, let us calculate some response that need not remain constant during the
instant of switching, such as i t in the circuit diagram. With the contact at a, it
is evident that i 50 260 0.192 A . When the switch is in position b, the
forced response for this current now becomes:
50 50
if 0.1
60 50200 50 200 50 200
The form of the natural response is the same as that which we already
determined for the capacitor voltage:
in Be t 1.2
i 0.1 Be t 1.2
To evaluate B, we need to know i 0 . This is found by fixing our attention on
the energy-storage element, here the capacitor, for the fact that v must remain
100 V during the switching interval is the governing condition establishing
other currents and voltages at t 0 . Since v 0 100 V , and since the
capacitor is in parallel with the 200 resistor, we find i 0 0.5 , B 0.4 ,
and thus:
or:
it 0.192u t 0.1 0.4et 1.2 ut
This response is sketched below:
0.5
0.192
0.1
0
t
-1 1T 2 3 4
R
v( t )
V -V u ( t - t0)
C v( t )
Vu ( t )
0 t0 t
(a) (b)
principle. We will designate that part of vt which is due to the lower source
Vu t acting alone by the symbol v1 t and then let v2 t represent that part due
to Vu t t0 acting alone. Then:
vt v1 t v2 t
We now write each of the partial responses v1 and v2 as the sum of a forced
and a natural response. The response v1 t is familiar:
v1 t V 1 et RC , t 0
We now consider the upper source and its response v2 t . Only the polarity of
the source and the time of its application are different. There is thus no need to
determine the form of the natural response and the forced response, the
solution for v1 t enables us to write:
v2 t V 1 et t0 RC , t t0
where the applicable range of t , t t0 , must again be indicated.
We now add the two solutions carefully, since each is valid over a different
interval of time: Thus:
vt V 1 e t RC 0 t t0
vt V 1 e t RC
V 1 e t t0 RC
t t0
vt V 1 e t RC 0 t t0
vt V e t0 RC
1e t RC
t t0
vt V 1 e t0 RC
e
t t0 RC
t t0
We can identify the constant at the front of the decaying exponential term as
the value of the initial response at time t t 0 . If we define:
V0 V 1 e t0 RC
then the second term is just:
This is a “time shifted” decaying exponential with an initial value given by the
response at the switching instant, V0 .
The solution is completed by stating that vt is zero for negative t and
sketching the response as a function of time. The type of curve obtained
depends upon the relative values of t0 and the time constant T. Two possible
curves are shown below:
v
V
V0
0
t
t
1
2 0 t0 2t0
(T )
(a)
v
V
V0
The top curve (a) is drawn for the case where the time constant is only one-half
as large as the length of the applied pulse – the rising portion of the exponential
has therefore almost reached V before the decaying exponential begins.
The opposite situation is shown on the bottom (b) – there, the time constant is
twice t0 and the response never has a chance to reach a large amplitude.
equivalent capacitance Ceq when all independent sources are set equal to zero,
i.e. we have a single time constant (STC) circuit. The response we seek is
represented by f t .
vC 0 , the capacitor voltage just prior to the discontinuity.
4. Write the total response as the sum of the forced and natural
responses: f t f Ae t T .
5.
Find f 0 by using the condition that vC 0 vC 0 . If desired, Ceq
vC 0 0 ] for this calculation. With the exception of capacitor
voltages, other voltages and currents in the circuit may change
abruptly.
6.
Then f 0 f A and f t f f 0 f et T .
9.6 RL Circuits
The complete response of any RL circuit may also be obtained as the sum of
Solving RL circuits
uses the same the forced response and natural response.
techniques as for
RC circuits EXAMPLE 9.7 Step Response of an RL Circuit
2
i (t )
50u(t )
6 3H
50 V
L 3
T 2
Req 1.5
and:
in Ae t 2
The forced response must be that produced by a constant voltage of 100 V. The
forced response is constant, and no voltage is present across the inductor (it
behaves like a short-circuit) and therefore:
100
if 50
2
Thus:
i i f in 50 Ae t 2
25 50 A or A 25
Hence:
i 50 25et 2 , t 0
i 25, t 0
i 25 25 1 et 2 ut A
50
25
0
t
-2 2 4 6 8
Note how the natural response serves to connect the response for t 0 with the
constant forced response.
The procedure we have been using to find the response of an RL circuit after
DC sources have been switched on or off or in or out of the circuit at some
Step-by-step guide instant of time, say t 0 , is summarized in the following. We assume that the
to solving STC RL
circuits with step- circuit is reducible to a single equivalent resistance Req in series with a single
sources
equivalent inductance Leq when all independent sources are set equal to zero,
i.e. we have a single time constant (STC) circuit. The response we seek is
represented by f t .
iL 0 , the inductor current just prior to the discontinuity.
4. Write the total response as the sum of the forced and natural
responses: f t f Ae t T .
5.
Find f 0 by using the condition that iL 0 iL 0 . If desired, Leq
iL 0 0 ] for this calculation. With the exception of inductor
currents, other voltages and currents in the circuit may change
abruptly.
6.
Then f 0 f A and f t f f 0 f et T .
9.8 Summary
The unit-step function can be used to simulate the opening and closing of
switches under certain conditions.
For circuits driven by constant voltages or currents, the forced response can
be obtained by undertaking DC circuit analysis.
the initial response f 0 .
9.9 References
Bedient, P. & Rainville, E.: Elementary Differential Equations, 6th Ed.
Macmillan Publishing Co., 1981.
Hayt, W. & Kemmerly, J.: Engineering Circuit Analysis, 3rd Ed., Mcgraw-Hill,
1984.
Exercises
1.
A current source of 5 A, a 4 resistor, and a closed switch are in parallel. The
switch opens at t 0 , closes at t 0.2 s , opens at t 0.4 s , and continues in
this periodic pattern. Express the voltage across the switch as an infinite
summation of step functions.
2.
Consider the circuit shown below:
30 u (t ) V
2 k
vC ( t ) 25 F v1 ( t ) 2 k 10 u (t ) mA
Find vC t and v1 t .
3.
Consider the circuit shown below:
3
10 u (t ) A vC ( t ) 1 F 1 10 u (t ) V
2 i1
i1
Find vC t .
4.
After being open for several minutes, the switch in the circuit below closes
at t 0 .
t=0 4 k 1 k
Vs vC ( t ) 0.2F 100 V
(a) -200 V
(b) +100 V
5.
Consider the circuit shown below:
100
100 V R C
Specify values for R and C in the circuit so that the capacitor voltage will reach
80 V, 10 ms after the switch is closed, but will not drop below 90 V until 0.5 s
after the switch is opened, assuming that it has been closed for a very long
time.
6.
Consider the circuit shown below:
10 V
ix t=0
10 v (t ) 2 F 40 V
0.2ix
7.
A 250 Ω resistor and a source, 12ut 12u t 103 V , are in series with a
0.2 H inductor. Find the inductor current magnitude at t 0.5 and 2 ms.
8.
The general solution to the driven series RL circuit is given by Eq. (9.36). Use
it to find i t for t 0 if R 250 , L 0.2 H , and the source voltage is:
(a) 100ut V
9.
Consider the circuit shown below:
20 4 mH
6 u (t ) A v 40 60 u (t ) V
10.
Consider the circuit shown below:
40
100 u (t ) V 2A 2H
Among the symbols that Euler initiated are the sigma () for summation
Euler considered the motion of a point mass both in a vacuum and in a resisting
medium. He analysed the motion of a point mass under a central force and also
considered the motion of a point mass on a surface. In this latter topic he had to
solve various problems of differential geometry and geodesics.
He set up the main formulas for the topic of fluid mechanics, the continuity
equation, the Laplace velocity potential equation, and the Euler equations for
the motion of an inviscid incompressible fluid.
Euler did not stop working in old age, despite his eyesight failing. He
eventually went blind and employed his sons to help him write down long
equations which he was able to keep in memory. Euler died of a stroke after a
day spent: giving a mathematics lesson to one of his grandchildren; doing some
calculations on the motion of balloons; and discussing the calculation of the
orbit of the planet Uranus, recently discovered by William Herschel.
His last words, while playing with one of his grandchildren, were: “I die.”
10 Op-Amp Imperfections
Contents
Introduction
The initial analysis phase of op-amp circuits assumes the op-amps to be ideal.
Although in many applications such an assumption is not a bad one, a circuit
designer has to be thoroughly familiar with the characteristics of practical op-
amps and the effects of such characteristics on the performance of op-amp
circuits.
The most serious real op-amp deficiency is finite gain and limited bandwidth.
This causes “gain error” at low frequencies, and the op-amp to stop “working”
altogether at high frequencies.
10.1 DC Imperfections
The standard input stage of an integrated circuit op-amp is a “DC coupled
differential pair” of transistors. Without delving deeply into the topology and
analysis of such a configuration, we can imagine that for it to amplify only the
“difference” in voltage appearing at its inputs that it must, in some sense, be
perfectly “balanced”. This requires the transistors that make up the “differential
pair” to be perfectly matched – i.e. each transistor should have exactly the
same characteristics. In real devices it is impossible to perfectly match
transistors – so there must be some “inherent imbalance” in the differential
pair. This imbalance causes an output even when the inputs are connected to
the same voltage (so that there is no differential input). The result is a DC
offset appearing at the output of the op-amp. To take this into account, we refer
the voltage back to the input, and define the offset voltage as that voltage which
must be applied at the input of an op-amp to cause the output to be zero.
Vo
ideal op-amp
VOS
(a) real circuit under test (b) offset voltage model
Figure 10.1
R2
R1
vo
ideal op-amp
VOS
Figure 10.2
R
Vo VOS 1 2 (10.1)
R1
For op-amps that have bipolar junction transistors (BJTs) at their inputs, a
finite DC current is required for proper biasing of the internal differential
amplifier. For op-amps that have junction field effect transistors (JFETs) at
their inputs, the DC input currents are junction leakage currents. In either case,
there are DC input bias currents which enter the input terminals of the op-amp:
IB 1
IB 2
Figure 10.3
I B1 I B 2
IB (10.2)
2
while the difference is called the input offset current:
I OS I B1 I B 2 (10.3)
R2
R 3 IB2
IB1 -
R1
R 3 IB2
R1 R1
- R 3 IB 2
IB 1
Vo
IB 2
- R 3 IB2
IB2
R3
Figure 10.4
Vo R2 I B1 (10.4)
Vo R3 I B 2 R2 I B1 I B 2 R3 R1 (10.5)
R2 RR
R3 1 2 R1 || R2 (10.7)
1 R2 R1 R1 R2
Therefore, to reduce the effect of DC bias currents, we should select R3 to be
Vo R2 I B1 I B 2 R2 I OS (10.8)
which is usually about an order of magnitude smaller than the value obtained
without R3 .
Thus, to minimise the effect of the bias currents, we place a resistance in series
with the noninverting terminal that is equal to the DC resistance seen by the
inverting terminal.
For the noninverting amplifier, we have already derived the closed-loop gain
due to a finite open-loop gain. The result was:
AOL
ACL (10.9)
1 AOL
where:
R1
(10.10)
R1 R2
1
ACL
1 1 AOL
(10.11)
ACL
1 R2 R1
1 1 R2 R1 AOL
(10.12)
For the inverting configuration, we will use the following model for the op-
amp, which has an infinite input resistance, zero output resistance, but a finite
open-loop gain, AOL :
v vo
AOL ( v - v )
Figure 10.5
R2
R1
vi vo
v
AOL ( v - v )
v
Figure 10.6
vi vo AOL vi vo AOL
i1 (10.13)
R1 R1
The infinite input resistance of the op-amp causes this current to go through
R2 . The output voltage is then:
vo
vo R2i1
AOL
(10.14)
vo v v A
R2 i o OL
AOL R1
Collecting terms, the closed-loop gain is found to be:
vo R2 R1
ACL
vi 1 1 R2 R1 AOL
(10.15)
The numerators, however, are different, for the numerator gives the ideal or
nominal closed-loop gain, which we will denote G. The percent gain error
between the actual and ideal gain, for either configuration, is then:
ACL G
G
G
G
1 1 R2 R1 AOL
G
1
1 (10.16)
1 1 R2 R1 AOL
1 R2 R1 AOL
1 1 R2 R1 AOL
1 R2 R1 100%
AOL 1 R2 R1
AOL 1 R2 R1 (10.17)
|A| (dB)
A0
-20 dB/decade
G
0 fb B ft f (Hz)
log scale
This process of modifying the open-loop gain is termed frequency
compensation, and its purpose is to ensure that op-amp circuits will be
stable (as opposed to oscillating).
ft
A
f
The frequency f t where the op-amp has a gain of 1 (or 0 dB) is known as
the unity-gain bandwidth. Datasheets of internally compensated op-amps
normally call f t the gain-bandwidth product, since:
f t A0 f b
GB f t constant
Index Finite Bandwidth PMcL
The transfer
characteristic of a
real amplifier,
vo showing that it
L+ saturates eventually
vi
Figure 10.7
Each of the two saturation levels is usually within a volt or so of the voltage of
the corresponding power supply. Obviously, in order to avoid distorting the
output signal waveform, the input signal swing must be kept within the linear
range of operation. If we don’t, then the output waveform becomes distorted
and eventually gets clipped at the output saturation levels.
The input signal and
the output signal of
a saturated amplifier
showing clipping
Figure 10.8
Figure 10.9
The datasheet specifies that, typically, the output current is limited to 40 mA.
Thus, in designing closed-loop circuits utilizing the TL071, the designer has to
ensure that under no conditions will the op-amp be required to supply an output
current, in either direction, exceeding 40 mA. This current has to include both
the current in the feedback circuit as well as the current supplied to any load. If
the circuit requires a larger current, the op-amp output voltage will saturate at
the level corresponding to the maximum allowed output current.
dvo
SR (10.18)
dt max
theoretical output
vo
slew-rate limited output
Figure 10.10
vo Vm sint (10.19)
Then:
SR MVm (10.21)
or:
SR
fM (10.22)
2Vm
10.7 Summary
The input offset voltage, VOS , is the magnitude of DC voltage that, when
applied between the op-amp input terminals, with appropriate polarity,
reduces the DC offset voltage at the output to zero.
Direct currents exist at the input of the op-amp terminals. The average of
these currents, I B , is termed the bias current. The difference between these
currents, I OS , is called the offset current. These currents produce a DC
voltage at the output. The effect of bias currents can be minimised by
organising for the two op-amp inputs to “see” the same resistance.
The finite open-loop gain, AOL , of an op-amp causes a gain error. The
open-loop gain also drop off with frequency. For internally compensated
op-amps at high frequencies (> 1 kHz), the magnitude of the open-loop
gain AOL can be approximated as:
ft
AOL
f
Real amplifiers can only output a voltage signal that is within the
capabilities of the internal circuitry and the external DC power supplies.
The maximum rate at which the op-amp output voltage can change is called
the slew rate:
dvo
SR
dt max
10.8 References
Sedra, A. and Smith, K.: Microelectronic Circuits, Saunders College
Publishing, New York, 1991.
Exercises
1.
The op-amp circuit below is to be used at DC and very low frequencies.
R2
R1
vi
vo
R3
(i) the error due to finite open-loop gain cannot exceed 0.1%
Determine:
(c) assuming that the op-amp’s input offset current is 10 nA, and a suitable
compensating resistor R3 is used, calculate the maximum value of R2 that
can be permitted.
Contents
Introduction
The sinusoid is the most important function in electrical engineering. There are
several reasons for this.
It was the great Swiss mathematician Euler (1707-1783) who first identified
the fact that:
The special
relationship enjoyed For circuits described by linear differential equations a (11.1)
by sinusoids and
sinusoidal source yields a sinusoidal response.
linear circuits
The response sinusoid has the same frequency as the source, it is however
altered in amplitude and phase.
Only sinusoids have this property with respect to linear systems. For example,
applying a square wave input does not produce a square wave output.
d t
dt
e et (11.2)
The second major reason for the importance of the sinusoid can be attributed to
Joseph Fourier (1768-1830), who in 1807 recognised that:
Periodic signals are
Any periodic function can be represented as the weighted (11.3) made up of
sinusoids - Fourier
sum of a family of sinusoids. Series
With this observation, we can analyse the behaviour of a linear circuit for any
periodic forcing function by determining the response to the individual
sinusoidal (or exponential) components and adding them up (superposition).
The third reason is that the sinusoid is easy to generate, transmit and utilise.
Most of our electric power is generated as a sinusoid, and the functional form Sinusoids are
utilised in a lot of
of the sinusoid is needed to make most of our motors turn (it doesn’t really practical
applications
matter about the lights or heaters). It is therefore of great practical importance
to engineers who specialise in “power and machines”.
With digital communications, we encode the binary ones and zeros into some
aspect of the sinusoid, e.g. amplitude shift keying (ASK), frequency shift
keying (FSK), phase shift keying (PSK), and Gaussian minimum-shift keying
(GMSK) which is used in the Groupe Spécial Mobile (GSM) mobile telephone
network.
Thus, the sinusoid plays a prominent role in electrical engineering due to both
its theoretical and practical importance.
The cosinusoid
graphed
v( t )
Vm
t (rad)
3 2
2 2
-Vm
(a)
v( t )
Vm
t (s)
T T 3T T
4 2 4
-Vm
(b)
Figure 11.1
The amplitude of the cosine wave is Vm , and the argument is t . The radian
The relationship
1
between frequency
and period f (11.5)
T
Index Sinusoidal Signals PMcL
which now includes a phase angle in its argument t . Eq. (11.7) is
plotted below as a function of t , and the phase angle appears as the number
of radians by which the original cosine wave, shown as a dotted line, is shifted
to the left or earlier in time.
The phase angle
defined
v( t )
Vm
Vm cos ( t )
2
t (rad)
-Vm
Vm cos ( t + )
Figure 11.2
The natural The form of the natural response is independent of the mathematical form of
response is
determined by the
the forcing function and depends only upon the type of circuit and the element
circuit values. We have already determined the natural response of simple RC and RL
circuits.
The forced response has the mathematical form of the forcing function. We
The forced response therefore expect the forced response to be sinusoidal. The term steady-state is
for a sinusoid is
termed the used synonymously with forced response, and the circuits we are about to
sinusoidal steady-
state response analyse are commonly said to be in the “sinusoidal steady-state”.
Unfortunately, steady-state implies “not changing with time”, but this is not
correct – the sinusoidal forced response definitely changes with time. The
steady-state simply refers to the condition which is reached after the natural
response has died out.
R i( t )
vs ( t ) =
L
Vm cos( t )
Figure 11.3
The sinusoidal source voltage vs Vm cost has been switched into the
circuit at some remote time in the past, and the natural response has died out
completely.
Ri Vm cost
di
L (11.8)
dt
We now invoke the inverse differential operator to find a particular solution to
the differential equation and write:
LD R i Vm cost
Vm cost
1
i
LD R (11.9)
to write:
A cosinusoid
j j
e e expressed as a sum
cos (11.12) of complex
2 exponentials
A sinusoid
j j
e e expressed as a sum
sin (11.13) of complex
exponentials
j2
Vm e jt e jt
i
LD R 2 (11.14)
f s 0
1 st 1 st
e e ,
f D f s
(11.15)
Vm e jt Vm e jt
i
R jL 2 R jL 2 (11.16)
R jL e jt
i 2 Vm
R 2 L2 2
R jL e jt
2 V (11.17)
R L 2 2 m
2
Collecting terms gives:
Using Euler’s identities for cos and sin , the forced response is obtained:
This expression is quite unwieldy, and a clearer picture of the response can be
obtained by expressing the response as a single sinusoid with a phase angle.
We will therefore let:
(11.21)
cos t
RVm
A cos cos t A sin sin t
R 2 L2
2
LVm
2 sin t
R 2 L2
RVm
A cos
R 2 2 L2
LVm
A sin 2
R 2 L2 (11.22)
A 2 cos 2 A 2 sin 2 A 2
R 2Vm
2
2 L2Vm 2 V
2
2 m 2 2
R R
(11.23)
2
L 2 2 2 2
2 L2
2
R L
A sin L
tan (11.24)
A cos R
Hence:
Vm
A (11.25)
R L
2 2 2
and:
L (11.26)
tan 1
R
The alternative form of the forced response therefore becomes:
We can see that the amplitude of the response is proportional to the amplitude
of the forcing function – thus linearity between input and output holds (e.g.
doubling the input leads to a doubling of the output). We can also see that the
current decreases for any increase in R , or L , but not proportionately.
Also, the current lags the applied voltage by tan 1 L R , an angle between
0 and 90 . When 0 or L 0 , the current must be in phase with the
voltage since the former situation is DC and the inductor appears as a short-
circuit, and the latter situation is a resistive circuit. If R 0 then the current
lags the voltage by 90 .
Note also that the frequency of the response is the same as the forcing function.
The applied voltage and the resultant current are shown below:
The forced response
graphed, showing
only an amplitude
v, i and phase change
i( t )
0 2
t
v( t )
Figure 11.4
The fact that current lags the voltage in this simple RL circuit is now visually
apparent.
The method by which we found the sinusoidal steady-state response for the
simple RL circuit is quite intricate. It would be impractical to analyse every
circuit by this method. We shall see in the next section that there is a way to
simplify the analysis. It involves the formulation of complex algebraic
equations instead of differential equations, but the advantage is that we can
produce a set of complex algebraic equations for a circuit of any complexity.
Sinusoidal steady-state analysis becomes almost as easy as the analysis of
resistive circuits.
Vm cost (11.28)
Figure 11.5
I m cost (11.29)
Note that the frequency stays the same – only the amplitude and phase are
unknown.
If we delay the forcing function by 90 , then since the system is time-
invariant, the corresponding forced response must be delayed by 90 also
(because the frequencies are the same). Thus, the forcing function:
Since the circuit is linear, if we double the source, we double the response. In
fact, if we multiply the source by any constant k, we achieve a response which
is k times bigger. We now construct an imaginary source – we multiply the
source by j 1 . We thus apply:
jI m sint (11.33)
Figure 11.6
We have applied a real source and obtained a real response, and we have
applied an imaginary source and obtained an imaginary response. We can now
use the superposition theorem (the circuit is linear) to find the response to a
complex forcing function which is the sum of the real and imaginary forcing
functions. Thus, the sum of the forcing functions of Eqs. (11.28) and (11.32) is:
and it produces a response which is the sum of Eqs. (11.29) and (11.33):
The complex source and response may be represented more simply by applying
Euler’s identity. Thus, the forcing function:
produces:
I me j t (11.37)
Excitation of a
passive LTI circuit
by a complex source
produces a complex
response
passive
j ( t+ ) LTI j ( t+ )
Vm e Im e
circuit
Figure 11.7
We are now ready to see how this helps with sinusoidal analysis. We first note
that the real part of the complex response is produced by the real part of the
complex forcing function, and the imaginary part of the complex response is
produced by the imaginary part of the complex forcing function.
Our strategy for sinusoidal analysis will be to apply a complex forcing function We analyse circuits
in the sinusoidal
whose real part is the given real forcing function – we should then obtain a steady-state by
using a complex
complex response whose real part is the desired real response. forcing function
whose real part is
the given real
We will try this strategy on the previous RL circuit: forcing function
R i( t )
vs ( t ) =
L
Vm cos( t )
Figure 11.8
The real source Vm cost is applied, and the real response i t is desired.
I me j t (11.39)
di
Ri L vs (11.40)
dt
we insert our complex expressions for vs and i :
RI me j t L
d
dt
I me j t Vme jt (11.41)
the original
differential equation
to a complex which is a complex algebraic equation. This is a considerable advantage – we
algebraic equation
have turned a differential equation into an algebraic equation. The only
“penalty” is that the algebraic equation uses complex numbers. It will be seen
later that this is not a significant disadvantage.
factor e jt :
RI me j jLIme j Vm (11.43)
R jLI me j Vm (11.44)
Rearranging, we have:
The complex
Vm
response expressed
I me j (11.45)
in rectangular form
R jL
e j tan L R
(11.46) response expressed
Vm 1
I me j in polar form
R 2 2 L2
Thus, by comparison:
(11.47)
Vm
Im
R 2 2 L2
and:
and that the real response was just the real part of the complex response.
Therefore, the real response i t is obtained by multiplying both sides of
it I m cost
The real sinusoidal
steady-state
response
Vm L
cos t tan 1
R L
2 2 2
R (11.50)
This agrees with the response derived before using the D operator.
Although the analysis was straightforward, we have not yet taken advantage of
the full power of the complex representation. In order to do so, we must
introduce the concept of the phasor.
I m cost (11.51)
I me j t (11.52)
Once I m and are specified, the current is exactly defined. Throughout any
A sinusoid of a
given frequency is All sinusoidal responses in a linear circuit have a frequency of .
Therefore, instead of writing I m cost , we could just say “amplitude I m ”
specified by an
amplitude and
phase
and “phase ”.
A complex response
All complex responses in a linear circuit have the factor e jt .
of a given frequency
is specified by a
Therefore, instead of writing I me j t , we could just say “magnitude I m ”
magnitude and
angle
and “angle ”.
Thus, we can simplify the voltage source and current response of the example
by representing them concisely as complex numbers:
We usually write the complex representation in polar form. Thus, the source
voltage:
V Vm0 (11.55)
as:
Capital letters are used to represent phasors because they are constants – they
are not functions of time.
We can see that the magnitude of the complex representation is the amplitude
of the sinusoid and the angle of the complex representation is the phase of the
sinusoid.
amplitude magnitude
we have:
xt Re Xe jt (11.62) The phasor / time-
domain relationship
Graphical
interpretation of
Im rotating phasor /
time-domain
relationship
Xe j t = Ae je j t
A
Re
x( t )
complex plane
Figure 11.9
Run the Phasor simulation program to see this view of phasors in action!
Consider the representation of a sinusoid by its phasor: xt Re Xe jt .
Graphically, x t can be “generated” by taking the projection of the rotating
phasor formed by multiplying X by e jt , onto the real axis:
A sinusoid can be
generated by taking
the real part of a complex plane time-domain
rotating complex
number
X
Figure 11.10
Phasor Representations
Phasors can be represented in four different ways:
X X me j exponential form
X a jb rectangular form
We will begin with the defining time-domain equation for each of the
elements, and then let both the voltage and current become complex quantities.
After dividing throughout the equation by e jt , the desired relationship
between the phasor voltage and phasor current will become apparent.
The resistor provides the simplest case. The defining time-domain equation is:
vt Ri t (11.63)
I me j t , we obtain:
Vme j RI me j (11.65)
or in polar form:
But Vm and I m are just the voltage and current phasors V and I . Thus:
Phasor V-I
V RI (11.67) relationship for a
resistor
The voltage-current relationship in phasor form for a resistor has the same form
as the relationship between the time-domain voltage and current as illustrated
below:
i I
v=Ri R V=R I R
time-domain frequency-domain
Figure 11.11
vt
it 2 cos100t 50
R
V
I 2 50
R
If we transform back to the time-domain, we get the same expression for the
current.
dit
vt L (11.68)
dt
After applying the complex voltage and current equations, we obtain:
Vme j t L
d
dt
I me j t (11.69)
The time-domain equation Eq. (11.68) has become an algebraic equation in the
frequency-domain. The angle of jL is exactly 90 and you can see from
Eq. (11.71) that 90 . I must therefore lag V by 90 in an inductor.
i I
v=L di L V=j L I L
dt
time-domain frequency-domain
Figure 11.12
vt
i t dt
L
2 cos 100t 50dt
0.02 sin 100t 50
0.02 cos 100t 140
V 8 50
I 0.02 140
jL 100490
If we transform back to the time-domain, we get the same expression for the
current.
dvt
it C (11.73)
dt
After applying the complex voltage and current equations, we obtain:
I me j t C
d
dt
Vme j t (11.74)
I me j jCVme j (11.76)
dv
i=C dt I =j C V
v V
C C
time-domain frequency-domain
Figure 11.13
dvt
i t C
dt
4 8 cos 100t 50
d
dt
3200 sin 100t 50
3200 cos 100t 40
If we transform back to the time-domain, we get the same expression for the
current.
We have now obtained the phasor V I relationships for the three passive
elements. These results are summarized in the table below:
Summary of phasor
Time-domain Frequency-domain V-I relationships for
the passive
elements
v V
i I
v Ri V RI
R R
v V
i I
di V jLI
vL
dt
L j L
v V
i 1 1 I
C
v idt V I
jC
C 1 j C
All the phasor equations are algebraic. Each is also linear, and the equations
relating to inductance and capacitance bear a great similarity to Ohm’s Law.
v1 t v2 t vn t 0 (11.78)
If all voltages are sinusoidal, we can now use Euler’s identity to replace each
real sinusoidal voltage by the complex voltage having the same real part,
divide by e jt throughout, and obtain:
We now return to the series RL circuit that we considered several times before,
shown as (a) in the figure below. We draw the circuit in the frequency-domain,
as shown in (b):
(a) (b)
Figure 11.14
VR VL Vs (11.80)
RI jLI Vs (11.81)
Vs
I
R jL
(11.82)
tan 1 L R
Vm
I
R 2 2 L2
I m (11.84)
11.6 Impedance
The voltage-current relationships for the three passive elements in the
frequency-domain are:
I
V RI V jLI V
jC
(11.86)
Phasor V-I
V V V 1
R jL relationships for the
jC
(11.87) passive elements
I I I
These ratios are simple functions of the element values, and in the case of the
inductor and capacitor, frequency. We treat these ratios in the same manner we
treat resistances, with the exception that they are complex quantities and all
algebraic manipulations must be those appropriate for complex numbers.
V
Z
Impedance defined
(11.88)
I
The impedance is a complex quantity having the dimensions of ohms.
L j L
C 1 j C
Impedances may be combined in series and parallel by the same rules we use
for resistances.
I Z
V = ZI
Figure 11.15
5 mH 100 F
At 104 rads -1 , the impedance of the inductor is Z L jL j50 and the
j 49
Z Z
(11.89)
No special names or symbols are assigned to the magnitude and angle. For
example, an impedance of 100 60 is described as having an impedance
magnitude of 100 and an angle of 60 .
(imaginary part)
The real part, R, is termed the resistive component, or resistance. The
imaginary component, X, including sign, but excluding j, is termed the reactive
component, or reactance. The impedance 100 60 in rectangular form is
50 j86.6 . Thus, its resistance is 50 and its reactance is 86.6 .
20 5H
20 5H
20 j 20
Zeq 10 j10
20 j 20
We will use the impedance concept to analyse the RLC circuit shown below:
i ( t ) 1.5 k 1 k
40 sin (3000t ) V 1
3 H 1
6 F
I 1.5 k 1 k
40 -90° V j1 k -j2 k
Z eq 1.5
j11 j 2 1.5 2 j
j1 1 j 2 1 j
2 j 1 j 1 j3
1.5 1.5
1 j 1 j 2
2 j1.5 2.536.9 k
Vs 40 90
I 16 126.9 mA
Zeq 2.536.9
11.7 Admittance
The reciprocal of impedance can offer some convenience in the sinusoidal
steady-state analysis of circuits. We define admittance as the ratio of phasor
current to phasor voltage:
Admittance defined
I
Y (11.91)
V
and thus:
Admittance is the 1
reciprocal of
impedance
Y (11.92)
Z
The real part of the admittance is the conductance G , and the imaginary part
of the admittance is the susceptance B . Thus:
Admittance is
composed of a
1 1
Y G jB
conductance (real
part) and a (11.93)
susceptance Z R jX
(imaginary part)
0.1F
1
is:
1 1 1 1 j2
Y
Z 1 j2 1 j2 1 j2
0.2 j 0.4 S
5 0.8 F
5 j 2.5
Zeq 1 j2
5 j 2.5
as before.
11.8 Summary
Sinusoids are important theoretically and practically. A sinusoidal source
yields a sinusoidal response.
11.9 References
Bedient, P. & Rainville, E.: Elementary Differential Equations, 6th Ed.
Macmillan Publishing Co., 1981.
Hayt, W. & Kemmerly, J.: Engineering Circuit Analysis, 3rd Ed., McGraw-
Hill, 1984.
Exercises
1.
A sinusoidal voltage is zero and increasing at t 1.6 ms . The next zero
crossing occurs at t 4.65 ms .
(c) By what angle does vt lead the current i 5 cost 110 A ?
2.
For the sinusoidal waveform shown below:
f(t)
8
0 t (ms)
1.2
-5
-8
Find:
3.
Consider the circuit shown below:
200 i ( t )
vs ( t ) 0.1 H
4.
Consider the circuit shown below:
300 200
iL(t)
Find iL t .
5.
Consider the circuit shown below:
10 i( t )
vs ( t ) 2H
6.
Give in polar form:
7.
A box contains a voltage source vs1 and a current source is 2 . The voltage
8.
Assume that only three currents, i1 , i2 and i3 , enter a certain node.
9.
At the input of an RLC circuit it is found that V 41 j18 V and
I 3.5 j 7.5 A . Assuming V and I satisfy the passive sign convention,
determine the power entering the network at:
(a) t 0 (b) t 2
10.
In the figure below, the voltage v is given as the phasor, V 60 j 25 V .
i
circuit
v
element
11.
I1
IR
40 F 1H 400
12.
Using a 1 H inductor and a 1 μF capacitor, at what frequency (in hertz) may an
impedance be obtained having a magnitude of 2000 if the two elements are
combined in:
13.
A 10 μF capacitor and a 25 resistor are in parallel. What size inductor
should be placed in series with this parallel combination so that the impedance
of the final series network has zero reactance at 8 krads -1 ?
14.
What size capacitor should be placed in series with the series combination of
800 and 20 mH to give an admittance whose magnitude is 1 mS at
10 krads -1 ?
15.
If the input admittance and impedance of the network shown below are equal at
every frequency, find R and L.
L
Zin
R 1F
Yin
Fourier first showed talent in literature, but by the age of thirteen, mathematics
became his real interest. By fourteen, he had completed a study of six volumes
of a course on mathematics. Fourier studied for the priesthood but did not end
up taking his vows. Instead he became a teacher of mathematics. In 1793 he
became involved in politics and joined the local Revolutionary Committee. As
he wrote:-
…it was in attempting to verify a third theorem that I employed the This extract is from
procedure which consists of multiplying by cos x dx the two sides of the a letter found among
equation Fourier’s papers,
and unfortunately
x a0 a1 cos x a2 cos 2 x ... lacks the name of
the addressee, but
was probably
and integrating between x 0 and x . I am sorry not to have known the intended for
name of the mathematician who first made use of this method because I Lagrange.
would have cited him. Regarding the researches of d’Alembert and Euler
could one not add that if they knew this expansion they made but a very
imperfect use of it. They were both persuaded that an arbitrary…function
could never be resolved in a series of this kind, and it does not seem that
any one had developed a constant in cosines of multiple arcs
[i.e. found a1 , a 2 ,…, with 1 a1 cos x a2 cos 2 x ... for 2 x 2 ]
the first problem which I had to solve in the theory of heat.
f x ~ r ar exp irt but Fourier’s work extended this idea in two totally
new ways. One was the “Fourier integral” (the formula for the Fourier series
coefficients) and the other marked the birth of Sturm-Liouville theory (Sturm
and Liouville were nineteenth century mathematicians who found solutions to
many classes of partial differential equations arising in physics that were
analogous to Fourier series).
All these predictions are confirmed by measurements which show that annual
variations in temperature are imperceptible at quite small depths (this accounts
for the permafrost, i.e. permanently frozen subsoil, at high latitudes) and that
daily variations are imperceptible at depths measured in tenths of metres. A
reasonable value of soil thermal conductivity leads to a prediction that annual
temperature changes will lag by six months at about 2–3 metres depth. Again
this is confirmed by observation and, as Fourier remarked, gives a good depth
for the construction of cellars.
References
12 Circuit Simulation
Contents
Introduction
The most popular circuit simulation “package” is known as PSpice®. SPICE is
an acronym for Simulation Program with Integrated Circuit Emphasis – a
program developed at the University of California, Berkeley in the 1970’s that
was used to simulate analog electronic circuits. It quickly became an industry
standard – versions became available in the public domain and large companies
developed their own versions – and continue to do so. The “P” prefix came
about in 1984 when the first version for a PC became available. Most
professional computer-aided electronic design tools now incorporate PSpice®
compatible simulators.
There are many software packages which use PSpice® (or PSpice® compatible)
simulators, and they are updated frequently. It is not the purpose of this
document to outline how each version of the various software packages are
used. There are many other resources that are available that do this – online
tutorials, textbook appendices, student and demo versions of software, etc.
PSpice and OrCAD are registered trademarks of Cadence Design Systems, Inc.
5. Set the location. You should create a new directory for your project since
PSpice will generate a lot of project files in this folder.
6. Click OK.
8. You should see a window where you can draw the schematic (i.e. your
circuit diagram).
1. Go to Place Parts.
4. Click where you want to place the part on your schematic. Press R to
rotate the part by 90 degrees.
12.1.3 Simulation
3. Press Create.
4. In the “Analysis Type” drop-down list, choose the simulation type, e.g.
“Time Domain (Transient)” for a step response simulation, “AC Sweep /
Noise” for a frequency response simulation.
12.2.1 Ground
There are many types of grounds (common points in the circuit) and there may
be more than one common point, e.g. an “analog ground” and a “digital
ground” in a mixed circuit. PSpice uses nodal analysis for circuit simulation
and therefore needs a reference node with “zero voltage”. This is provided by a
special ground symbol called 0/SOURCE. You need to have it in your circuit!
It looks like a ground symbol with a zero. If you don't have it, PSpice may
complain of "floating nodes" even if you have a ground.
To place the ground on the circuit Go to Place Ground and choose 0/source
(if you don't see “source” in the Libraries section, you will need to add the
giga G
mega Meg
kilo k
milli m
micro u
nano n
pico p
femto f
The “mega” prefix is written “Meg” (case does not matter). “M” is NOT
“mega”, it is “milli”.
Example: For 6.5 MHz, enter "6.5 Meg", for 3 mV, enter "3 m".
The “micro” prefix is not the Greek letter mu (μ) as in the SI system of units,
because it is not supported on a standard keyboard. We use the letter “u”
instead.
You can't have two parts named "R1" in your circuit. If you are copying and
pasting parts or circuits, OrCAD usually increments the part number
automatically. However, you may accidentally name two parts the same, which
will cause a “netlist” error.
You should use aliases to label your input and output nodes. This makes your
nodes easier to find when dealing with simulation output. V(Vout) is simpler
than finding V(R1:1).
12.3 Simulation
The following sections detail the procedures used in setting up and running
simulations.
12.3.1 DC Bias
The response of the circuit to DC sources is always calculated. To display DC
bias voltages, currents and power on your circuit after you run the simulation,
click on the Enable Bias Display buttons:
V2
PW
V1
TR TF
t
TD TD+PER
Parameter Meaning
V1 Initial value (V)
V2 Pulsed value (V)
TD Delay time (s)
TR Rise time (s)
TF Fall time (s)
PW Pulse width (s)
PER Period (s)
Square Wave
Triangular Wave
Step
A step can be created by setting up a square wave with a period that is much
longer than any time constants in the circuit (this is what we do in the lab).
Simulation Settings
Example: If you are using a 1 kHz sine wave, it has a 1/1 kHz = 1 ms
period, so use a “Run to time” of 5 ms for 5 periods.
4. Set the “Maximum step size” to be much smaller than the period.
5. If you don't set the “Maximum step size”, PSpice may choose one which
is too big, making your waveforms look angular and ugly (because it
plots straight lines between data points).
Simulation Settings
Bode Plots
b. Click the "Cursor Max" button to find the highest point (or go
through the menu, Trace Cursor Max).
5 k
10 nF
1 k
vi
vo
Note the use of a real op-amp – the LF411. You can search for it in the parts
library by Place Part… then Part Search…. The op-amp requires DC voltage
sources on its power pins.
In this schematic, we have used the power symbol which simply “ties”
nets together with a common name – in this case the name is “+15V”. One
“tie” is placed on the DC voltage source, the other on the op-amp power pin.
This avoids cluttering wires on the schematic.
Exercises
1.
Simulate the step response and frequency response of the following circuit:
10 nF
10 k
2.5 k 2
vi
6 vo
TL071
3
Response X Y
Step 0 s to 1 ms -5 V to 0 V
Contents
Introduction
In the analysis of resistive circuits of arbitrary complexity, we are able to
employ many different circuit analysis techniques to determine the response –
nodal analysis, mesh analysis, superposition, source transformations,
Thévenin’s and Norton’s theorems.
differential
time-domain equations time-domain
problem solution
Figure 13.1
40 mF
v1 v2
2H
cos(5 t ) A 5 1H 10 0.5 sin (5 t ) A
20 mF
Figure 13.2
j10
1 0° A 5 j5 10 0.5 -90° A
-j10
Figure 13.3
Each passive element is specified by its impedance, which has been determined
by knowing the frequency of the sources (which are the same) and the element
values. Two current sources are given as phasors, and phasor node voltages V1
and V2 are indicated.
V1 V V V2 V1 V2
1 1 1 j0 (13.1)
5 j10 j5 j10
V2 V1 V2 V1 V2 V2
j 0.5 (13.2)
j5 j10 j5 10
1 j 0.1
j 0.5 0.1 j 0.1 0.1 j 0.1 0.05
V1
0.2 j 0.2 j 0.1 0.02 j 0.02 j 0.02 0.02 0.01
j 0.1 0.1 j 0.1
0.05 j 0.1
1 j2 V
0.05
0.2 j 0.2 1
j 0.1 j 0.5 0.1 j 0.1 j 0.1
V2 2 j 4 V
0.05 0.05 (13.4)
V1 5 63.4 V
(13.5)
V2 2 5116.6 V
v1 t 5 cos5t 63.4 V
(13.6)
v2 t 2 5 cos5t 116.6 V
500 F
3 i1
3
10cos(10 t ) V 4 mH 2 i1
Figure 13.4
Noting from the left source that 103 rads -1 , we draw the frequency-domain
circuit and assign mesh currents I1 and I 2 :
Mesh analysis in the
frequency-domain
-j2
3
10 0° V I1 I2 2I 1
j4
Figure 13.5
Around mesh 1:
3 j 4I1 j 4I 2 10
2 j 4I1 j 2I 2 0
(13.9)
Solving:
14 j8
I1 1.24029.7 A
13 (13.10)
20 j 30
I2 2.77456.3 A
13
or:
i1 t 1.240 cos 103 t 29.7 A
i t 2.774 cos 10 t 56.3 A
(13.11)
3
2
13.4 Superposition
Linear circuits are those that consist of any of the following: idealised linear
passive circuit elements (R, L and C), ideal independent voltage and current
sources and linearly dependent voltage and current sources. Such circuits are
amenable to the superposition principle.
We can analyse linear circuits with phasors and the principle of superposition.
(You may remember that linearity and superposition were invoked when we
combined real and imaginary sources to obtain a complex source).
Let’s look again at the circuit of Figure 13.3, redrawn below with each pair of
parallel impedances replaced by a single equivalent impedance (for example, 5
and j10 in parallel yield 4 j 2 ):
Superposition in the
frequency-domain
V1 -j10 V2
Figure 13.6
To find V1 we first activate only the left source and find the partial response:
V1L 10
4 j 2 j10 2 j 4 4 j 28 2 j 2
(13.12)
4 j 2 j10 2 j 4 6 j8
With only the right source active, current division helps us to obtain:
2 j4 6 j8
V1R 0.5 90 4 j 2 1 (13.13)
4 j 2 j10 2 j 4 6 j8
Summing, we get:
V1 2 j 2 1 1 j 2 V (13.14)
Thévenin’s Theorem
in the frequency-
V1 -j10 V2 domain
Figure 13.7
The impedance of the inactive circuit, as viewed from the load terminals, is
simply the sum of the two remaining impedances (because the current sources
are set to zero – open circuits). Hence:
Zth 6 j 2 (13.16)
Thus, when we reconnect the circuit, the current directed from node 1 toward
node 2 through the j10 load is:
6 j3
I12 0.6 j 0.3 (13.17)
6 j 2 j10
Subtracting this from the left source current, the downward current through the
4 j 2 branch is found:
and , thus:
Figure 13.8
2 j4
I sc 0.5 90
2 j 4 j10
2 j 1 j
A
2 j6 4 (13.20)
Zth 2 j 6 (13.21)
V1
Figure 13.9
V1
4 j 22 j 6 1 0.25 j 0.25
4 j 2 2 j 6
4 j 28
0.75 j 0.25 2 j 20.75 j 0.25 1 j 2 V
6 j8 (13.22)
It should now be clear that all methods available for linear circuit analysis can
be applied to the frequency-domain. The slight additional complexity that is
apparent now arises from the necessity of using complex numbers and not from
any more involved theoretical considerations.
Since phasor voltages and currents are complex numbers, they may be
identified as points in a complex plane. For example, the phasor voltage
V1 6 j8 1053.1 is identified on the complex voltage plane shown
below:
A simple phasor
diagram
Imaginary
axis (V)
j8 V1
10
53.1°
Real axis (V)
6
Figure 13.10
The axes are the real voltage axis and the imaginary voltage axis. The voltage
V1 is located by an arrow drawn from the origin. Since addition and
subtraction are particularly easy to perform and display on a complex plane, it
is apparent that phasors may be easily added and subtracted in a phasor
diagram. Multiplication and addition result in a change in magnitude and the
addition and subtraction of angles.
V1
V1 + V2
V2
Figure 13.11
Figure 13.12 shows the current I1 , which is the product of V1 and the
admittance Y 1 j1 :
Phasor diagram
showing
multiplication
V1
I1= 45°
(1+ j 1) V1
Figure 13.12
This last phasor diagram shows both current and voltage phasors on the same
complex plane – it is understood that each will have its own amplitude scale,
but a common angle scale.
t
Vm V= Vm t+ Vm
(a) (b)
Figure 13.13
The series RLC circuit shown below has several different voltages associated
with it, but only a single current:
I 3 j6
VR VL
Vs VC -j 10
The phasor diagram is constructed most easily by employing the single current
as the reference phasor – all other phasors with have their angles measured
with respect to the reference. Let us arbitrarily set I I m0 and place it along
the real axis of the phasor diagram, as shown below:
VL VR + VL
j6
j5
VR I
3
-j 4
Vs = VR + VL + VC
-j 5
-j10 VR + VC
VC
We can design using the phasor diagram quite easily instead of embarking on
complex algebraic manipulation. For example, suppose we would like to
determine a single extra passive element that can be added in series with the
circuit so that the magnitude of the current does not change. This additional
circuit element will contribute to an additional voltage drop, but we still must
have KVL satisfied so that the total voltage drop magnitude equals the source
voltage magnitude. Therefore, the addition of the voltage drop due to the new
element must keep the source voltage on a circle of radius Vs . From the
phasor diagram, we can see that we can only add an inductor with an
impedance Z Lnew j8 , so that the additional voltage drop still brings us onto
j5
Vsnew = VR + VL + VC + VLnew
j4
VLnew
-j 4
Vs = VR + VL + VC
-j 5
PMcL Phasor Diagrams Index
VL
j7.746 VR + VL
Vs = VR I
3
-j 7.746 VR + VC
VC
The figure below shows a simple parallel circuit in which it is logical to use the
single voltage between the two nodes as a reference phasor:
IR IC
Is V 5 -j 10
Let us arbitrarily set V Vm0 and place it along the real axis of the phasor
diagram. The resistor current is in phase with this voltage, I R 0.2Vm A , and
the capacitor current leads the reference voltage by 90 , I C j 0.1Vm A . After
these two currents are added to the phasor diagram, shown below, they may be
summed to obtain the source current. The result is I s 0.2 j 0.1Vm A .
I R=0.2Vm V= Vm 0°
If the source current were specified initially as, for example, I s 10 A , and
the node voltage is not initially known, it is still convenient to begin
construction of the phasor diagram by assuming, say V 10 . The source
current, as a result of the assumed node voltage, is now I s 0.2 j 0.1 A . The
true source current is 10 A , however, and thus the true node voltage is
greater by the factor 1 0.2 j 0.1 ; the true node voltage is therefore 4 j 2 V .
The assumed voltage leads to a phasor diagram which differs from the true
phasor diagram by a change of scale (the assumed diagram is smaller by a
factor of 1 20 ) and an angular rotation (the assumed diagram is rotated
clockwise through 26.6 ). The true phasor diagram in this case is shown
below:
IC
I s = 1 0° A
IR
V= 20 -26.6° V
Phasor diagrams are usually very simple to construct, and most sinusoidal
steady-state analyses will be more meaningful if such a diagram is included.
i v
v network t
Figure 13.14
v Vm cost
i I m cost
(13.23)
and define:
(13.24)
p vi
Vm I m cost cost
Vm I m
cos cos2t
2 (13.25)
Notice that the first term is a constant, and the second term oscillates with time
at double the supply frequency.
Average power is just the average value of the instantaneous power. We define
this average in the normal way (the “mean value theorem”) as:
pt dt
1 T2
T T T 2
P lim (13.26)
If the instantaneous power is periodic with period T0 , we have the special case:
pt dt
1 T0 2
P
T0 T0 2
(13.27)
That is, for a periodic instantaneous power, we can integrate over one period,
and divide by the period. A graph of the instantaneous power in a network
operating in the sinusoidal steady-state, Eq. (13.25), is shown below:
Vm Im /2
Vm Im
cos
2
Vm Im /2 t
T0 T0
2
Figure 13.15
From this graph it is easily seen that the average power is the constant part of
the instantaneous power (the oscillating part averages to zero) and we have:
P is the average
Vm I m
value of p
P cos (W) (13.28)
2
6
p
4 v
2 i P
t
0 T0
-2
Figure 13.16
Note that, on occasion, the power delivered to the network is negative, which
implies that the network is actually sourcing power back to the voltage supply.
P
Vm I m
cos 1
2 42cos 60 2 W
2
Both the 2 W average power and its period, one-half the period of either the
current or the voltage, are evident in the graph. The zero value of the
instantaneous power at each instant when either the voltage or current is zero is
also apparent.
1 T0 2 2
T0 T0 2
P Ri dt RI 2
RMS (13.29)
That is, the RMS value of any periodic current is equal to the value of the
direct current which delivers the same average power. Removing R from the
above formula, we thus have:
The operation involved in finding this value is the root of the mean of the
square, hence the name root-mean-square value, or RMS value for short. A
similar expression is obtained for voltage, VRMS (or for any other signal for that
matter).
The easiest way to find its RMS value is by performing the mean-square
operations in Eq. (13.30) graphically. For the arbitrary sinusoid given, we can
graph the square of the current, i 2 t I m2 cos 2 t , as shown below:
2
i (t)
2
Im
equal areas
2
I m
t
T0
Figure 13.17
Note that in drawing the graph we don’t really need to know the identity
cos 2 1 cos 2 2 – all we need to know is that if we start off with a
sinusoid uniformly oscillating between I m and I m , then after squaring we
obtain a sinusoid that oscillates (at twice the frequency) uniformly between I m2
and 0. We can now see that the average value of the resulting waveform is
I m2 2 , because there are equal areas above and below this value. This is the
mean of the square, and so we now just take the root and get:
In the power industry, it is tacitly assumed that values of voltage and current
will be measured using their RMS value. For example, in Australia the
electricity delivered to your home has a frequency of 50 Hz and an RMS value
of 230 V. This means the voltage available at a general power outlet is a 50 Hz
sinusoid with a peak value of approximately 325 V.
It should be noted that this formula can only be applied to a sinusoid – for other
waveforms, you will obtain a different ratio between the peak and the RMS
value. For example, the RMS value of a triangle waveform is I m 3 whilst for
as:
I I m (13.34)
Phasor magnitudes
can be defined as Im
RMS values I I RMS (13.35)
2
If we use this definition, then all relationships involving phasors, such as
V ZI , KCL, KVL, etc. must also use this definition. When working with
power and machines, it is customary to use the RMS value for the phasor
magnitude. In other fields, such as telecommunications and electronics, we use
the amplitude for the phasor magnitude. You need to be aware of this usage.
Returning to the formula for average power, we can now rewrite it using RMS
values. We have:
Apparent power
apparent power VRMS I RMS (VA) (13.37) defined
Dimensionally, average power and apparent power have the same units, since
cos is dimensionless. However, to avoid confusion, the term volt-amperes, or
VA, is applied to apparent power.
The ratio of average power to the apparent power is called the power factor,
symbolized by PF:
P
PF
Power factor defined
(13.38)
VRMS I RMS
PF cos (13.39)
Vm
V VRMS VRMS e j
2
(13.40)
I
I m I RMS I RMS e j
2
we know that the average power is:
We can associate the average power with the real part of a complex power:
P Re VRMS I RMS e j
ReV
(13.42)
j j
RMS e I RMS e
P Re VI * (13.43)
Complex power
defined S VI * (complex VA) (13.44)
From the rectangular form, we can see that the average power is also the “real”
power. It can also be seen that the “imaginary” power, which we call the
reactive power, is:
Reactive power
Q VRMS I RMS sin (var) (13.48) defined
It has the same dimensions as the real power P, the complex power S and the
apparent power S . In order to avoid confusion, the unit of Q is defined as the
Reactive power is a measure of the energy flow rate into or out of the reactive
components of a network. It is positive for inductive loads, and negative for
capacitive loads.
Then:
The instantaneous power associated with the real and reactive power
components is shown below:
p associated with P
total p
P
Q
t
0
p associated with Q
Figure 13.18
Note that the instantaneous power associated with P follows a “cos”, and the
instantaneous power associated with Q follows a “sin”. Thus, the two
waveforms are 90° apart and are said to be in “quadrature”. You can see that
reactive power does not transfer energy – instantaneous power is both
delivered to, and received from, the network in a cyclic fashion, with an
average of zero. In contrast, real power does transfer energy – instantaneous
power is always delivered to the network in a cyclic fashion, but it has a non-
zero average.
In summary we have:
S VI * S P jQ (13.51)
where:
Components of
S V I apparent power (VA) complex power
jQ S
V
|S|
I
P
Figure 13.19
V S1 S2 S3
S1 10 j 7.5 kVA
The complex power supplied to the second load must have a real part of
3.84 kW and an angle (refer to the power triangle) of cos 1 0.96 16.26 .
Hence,
P 3.84
S2 16.26 4 16.26 3.84 j1.12 kVA
cos 0.96
S3 5 j 0 kVA
P 18.84
PF 0.9472 lagging
S 19.89
S 19890
I 86.48 A RMS
V 230
Electricity supply authorities do all they can to improve the PF of their loads by
installing capacitors or special machines called synchronous condensers which
supply vars to the system. They also impose tariffs which encourage consumers
to correct their PF.
If we now seek to raise the PF to 0.98 lagging, without affecting the existing
real power, the total complex power must become:
Now since:
2
VV * V
S 4 VI * *
*
4
Z4 Z4
then:
2
V 2302
Z4 * j 20.71
S4 j 2554
1 1
C 153.7 μF
X C 2 50 20.71
The magnitude of the line current drawn by the new combined load reduces to:
S 19220
I 83.57 A
V 230
13.9 Summary
A linear circuit can be converted to the frequency-domain where we use the
concept of phasors and impedances, and in particular the branch phasor
relationship V ZI . The circuit is then amenable to normal circuit analysis
techniques: nodal analysis, mesh analysis, superposition, source
transformations, Thévenin’s theorem, Norton’s theorem, etc. Time-domain
responses are obtained by transforming phasor responses back to the time-
domain.
13.10 References
Hayt, W. & Kemmerly, J.: Engineering Circuit Analysis, 3rd Ed., McGraw-
Hill, 1984.
Exercises
1.
Consider the circuit shown below:
4 4 4
(a) Find V2 .
2.
Consider the circuit shown below:
400 F
1 1
10cos (104 t +30°) A
1 400 H 2 v3
i3
3.
Consider the circuit shown below:
2 F 20 4 mH
i2
v1 1 mH v2 3v1
4
10cos (10 t ) A
(a) Find i2 t .
(b) Change the control voltage from 3v1 to 3v2 and again find i2 t .
4.
Consider the circuit shown below:
2A
1
4
F
vR 2 vL 2 H
6
1cos (10 t ) A
(a) Find vR t .
(b) Find vL t .
5.
Find the output impedance of the network shown below:
12 j 20
1
Vx
0.1Vx -j 3
6.
Use superposition to find I x in the circuit below:
1 0° A
1 j1
Ix 1 0° V
1 0° V
1
-j1
1 0° A
7.
For the circuit below, find the phase angles of Vx and Vy graphically if
Vx 90 V and Vy 150 V .
Vx Vy
120 0° V 50 80° V
8.
If vs 20 cos1000t 30 V in the circuit below, find the power being
2.5 k
R1
vs 1H 1 F R2 10 k
9.
Determine the average power delivered to each resistor in the network shown
below if: (a) k 0 (b) k 1
I1 20 j60
10
1000 0° V kI1
-j50
10.
The series combination of a 1000 resistor and a 2 H inductor must not
absorb more than 100 mW of power at any instant. Assuming a sinusoidal
current with 400 rads -1 , what is the largest RMS current that can be
tolerated?
11.
Consider the following circuit:
j 100
(a) What value of R will cause the RMS voltages across the inductors to be
equal?
12.
A composite load consists of three loads connected in parallel.
One draws 100 W at 0.9 lagging PF, another takes 200 W at 0.8 lagging PF,
and the third requires 150 W at unity PF. The composite load is supplied by a
source Vs in series with a 10 resistor. If the loads are all to operate at 110 V
RMS, determine:
13.
A load operating at 2300 V RMS draws 25 A RMS at a power factor of
0.815 lagging. Find:
14.
In the circuit shown below, load A receives S A 80 j 40 VA , while load B
absorbs S B 100 j 200 VA . Find the complex power supplied by each
source.
In 1874 Heaviside resigned from his job as telegraph operator and went back to
live with his parents. He was to live off his parents, and other relatives, for the
rest of his life. He dedicated his life to writing technical papers on telegraphy
and electrical theory – much of his work forms the basis of modern circuit
theory and field theory.
In 1876 he published a paper entitled On the extra current which made it clear
that Heaviside (a 26-year-old unemployed nobody) was a brilliant talent. He
had extended the mathematical understanding of telegraphy far beyond
Rigorous
it seemed to solve physical problems, it’s mathematical rigor was not at all
mathematics is clear. His knowledge of the physics of problems guided him correctly in many
narrow, physical
mathematics bold instances to the development of suitable mathematical processes. In 1887
and broad. – Oliver
Heaviside Heaviside introduced the concept of a resistance operator, which in modern
terms would be called impedance, and Heaviside introduced the symbol Z for
it. He let p be equal to time-differentiation, and thus the resistance operator for
an inductor would be written as pL. He would then treat p just like an algebraic
1
The Ukrainian Mikhail Egorovich Vashchenko-Zakharchenko published The Symbolic
Calculus and its Application to the Integration of Linear Differential Equations in 1862.
Heaviside independently invented (and applied) his own version of the operational calculus.
Heaviside also played a role in the debate raging at the end of the 19th century
about the age of the Earth, with obvious implications for Darwin’s theory of
evolution. In 1862 Thomson wrote his famous paper On the secular cooling of
the Earth, in which he imagined the Earth to be a uniformly heated ball of
molten rock, modelled as a semi-infinite mass. Based on experimentally The practice of
eliminating the
derived thermal conductivity of rock, sand and sandstone, he then physics by reducing
a problem to a
mathematically allowed the globe to cool according to the physical law of purely mathematical
exercise should be
thermodynamics embedded in Fourier’s famous partial differential equation for avoided as much as
possible. The
heat flow. The resulting age of the Earth (100 million years) fell short of that physics should be
needed by Darwin’s theory, and also went against geologic and palaeontologic carried on right
through, to give life
evidence. John Perry (a professor of mechanical engineering) redid Thomson’s and reality to the
problem, and to
analysis using discontinuous diffusivity, and arrived at approximate results that obtain the great
assistance which
could (based on the conductivity and specific heat of marble and quartz) put the physics gives to
the mathematics. –
the age of the Earth into the billions of years. But Heaviside, using his Oliver Heaviside,
operational calculus, was able to solve the diffusion equation for a finite Collected Works,
Vol II, p.4
spherical Earth. We now know that such a simple model is based on faulty
premises – radioactive decay within the Earth maintains the thermal gradient
without a continual cooling of the planet. But the power of Heaviside’s
methods to solve remarkably complex problems became readily apparent.
Heaviside spent much of his life being bitter at those who didn’t recognise his
genius – he had disdain for those that could not accept his mathematics without
formal proof, and he felt betrayed and cheated by the scientific community
who often ignored his results or used them later without recognising his prior
work. It was with much bitterness that he eventually retired and lived out the
rest of his life in Torquay on a government pension. He withdrew from public
and private life, and was taunted by “insolently rude imbeciles”. Objects were
thrown at his windows and doors and numerous practical tricks were played on
him.
Heaviside should be Today, the historical obscurity of Heaviside’s work is evident in the fact that
remembered for his
vectors, his field his vector analysis and vector formulation of Maxwell’s theory have become
theory analyses, his
brilliant discovery of “basic knowledge”. His operational calculus was made obsolete with the 1937
the distortionless
circuit, his
publication of a book by the German mathematician Gustav Doetsch – it
pioneering applied showed how, with the Laplace transform, Heaviside’s operators could be
mathematics, and
for his wit and replaced with a mathematically rigorous and systematic method.
humor. – P.J. Nahin
The last five years of Heaviside’s life, with both hearing and sight failing, were
years of great privation and mystery. He died on 3rd February, 1925.
References
14 Amplifier Characteristics
Contents
Introduction
Amplifiers are designed to have certain performance characteristics that meet
the requirements of a specific application. For example, an amplifier may be
required to amplify a very small voltage from a source that has a relatively
large internal resistance, such as an antenna. The amplifier would need to have
a very large input impedance, and a large gain over a wide band of frequencies.
An audio amplifier may be required to amplify signals in the audio range with
minimal distortion and provide a low impedance output to drive a speaker.
vs vi Ri Avovi vo RL
Figure 14.1
The input resistance, Ri , of the amplifier is the equivalent resistance seen when
looking into the input terminals. Later we will generalise this concept so that
the amplifier has an input impedance, Z i .
The open-circuit voltage gain of the amplifier, Avo , is the value of the VCCS in
the amplifier model (if the load is an open circuit, there is no voltage drop
across the output resistance, and then vo Avo vi ).
The output resistance, Ro , of the amplifier models the fact that when the load
draws a current there is a reduction in the voltage at the output terminals.
vo RL
Av Avo (14.1)
vi RL Ro
and the overall gain between the load and source is:
vo Ri
Gv Av
vs Ri Rs
Ri RL
Avo (14.2)
Ri Rs RL Ro
voltage divider open - circuit voltage divider
due to source amplifier gain due to load
The current gain Ai of a loaded amplifier is the ratio of the output current to
the input current:
io vo RL R
Ai Av i (14.3)
ii vi Ri RL
14.1.3 Power Gain
The power delivered to the input terminals by the signal source is called the
input power Pi , and the power delivered to the load by the amplifier is the
output power Po . The power gain AP of an amplifier is the ratio of the output
power to the input power:
voio
AP Av Ai (14.4)
vi ii
Amplifier Amplifier
vi1 1 vo1 = vi2 2 vo2
Figure 14.2
In the figure above, two voltage amplifiers are cascaded. The overall voltage
gain is determined be considering the gains of each amplifier, under loaded
conditions. Since vi 2 vo1 , we have for the overall gain:
vo 2 vo1 vo 2 vo1 vo 2
Av Av1 Av 2 (14.5)
vi1 vi1 vo1 vi1 vi 2
In this equation Av1 and Av 2 represent the voltage gains of the individual
stages of the cascade, the values of which are calculated using the specific
loading conditions of the cascade.
The voltage gain of the first amplifier, which is loaded by the input resistance
of the second amplifier, is:
Ri 2 1500
Av1 Avo1 200 150
Ri 2 Ro1 2000
The voltage gain of the second amplifier, which has a load resistance attached,
is:
RL 100
Av 2 Avo 2 100 50
RL Ro 2 200
Ri1 10 6
Ai1 Av1 150 10 5
Ri 2 1500
Ri 2 1500
Ai 2 Av 2 50 750
RL 100
Ri Ri1 1 M
Ro Ro 2 100
The overall open-circuit voltage gain of the cascaded amplifiers (i.e. with the
first amplifier being loaded by the input resistance of the second amplifier, but
with the second amplifier with no load) is:
ii Ro io
100
vi Ri Avovi2 vo
1 M =15 000vi2
vs vi Ri Avo vi vo RL
IA IB connected to various
points of the internal
circuit (which are
not shown)
VAA VBB
Power Supply
Figure 14.3
In the figure above, the total power supplied to the amplifier is:
It is quite typical for amplifiers to take power without a zero volt reference or
common – op-amps are a prime example. In these cases the designer of the
internal amplifier circuit has arranged for the output to be exactly half way
between the voltage supplies under zero input conditions. If the bipolar
supplies are symmetric (i.e. they are equal in magnitude), then the output will
be 0 V for no input, with respect to the power supply common. Note that for an
op-amp, which doesn’t have a GND pin, the single-ended voltage output is
normally taken with respect to the power supply common, and symmetric
supplies are assumed.
Figure 14.4
Pi Ps Po Pd
power power (14.7)
supplied absorbed
14.3.1 Efficiency
Po
100% (14.8)
Ps
We have already seen the model for a voltage amplifier – it is a practical model
for devices such as the op-amp (since the op-amp is designed to amplify
voltage) as well as for circuits built from op-amps that are designed to amplify
voltage, such as the inverting and noninverting op-amp configurations.
ii Ro io
vi Ri Avovi vo
Voltage Amplifier
Figure 14.5
Note that the output side of the amplifier has a series connection – it is like the
Thévenin equivalent of a linear circuit, except it uses a dependent source to
model the amplifier behaviour. If we do KVL at the output we get:
ii io
vi Ri Ais ii Ro vo
Current Amplifier
Figure 14.6
Note that the output side of the amplifier has a parallel connection – it is like
the Norton equivalent of a linear circuit, except it uses a dependent source to
model the amplifier behaviour. If we do KCL at the output we get:
io Aisii vo Ro (14.10)
Comparison with the voltage amplifier’s output equation, Eq. (14.9), reveals
that we can convert from one to the other using:
Ro
Avo Ais (14.12)
Ri
The values of the input and output resistors are the same in each model.
Transconductance
amplifier model
ii io
vi Ri Gmvi Ro vo
Transconductance Amplifier
Figure 14.7
io Gmvi vo Ro (14.13)
Comparison with the voltage amplifier’s output equation reveals that we can
convert from one to the other using:
Avo Gm Ro (14.15)
The values of the input and output resistors are the same in each model.
ii Ro io
vi Ri Rmii vo
Transresistance Amplifier
Figure 14.8
Comparison with the voltage amplifier’s output equation reveals that we can
convert from one to the other using:
Rm
Avo (14.18)
Ri
The values of the input and output resistors are the same in each model.
Rs ii Ro io
vs vi Ri Avovi vo RL
Figure 14.9
In the figure above, the source has been modelled using a Thévenin equivalent
circuit. Since the application calls for the source voltage to be amplified, we
want to minimise the voltage drop occurring in the source due to the current
drawn by the input of the amplifier. The voltage amplifier therefore needs to
present a very high impedance to the source.
Since the overall gain between the load and source is:
vo Ri RL
Gv Avo (14.19)
vs Ri Rs RL Ro
we can see that the ideal case would be for the amplifier input impedance to be
infinite, and for the output impedance to be zero – we would then achieve the
maximum gain Gv Avo .
Conversely, applications that call for the internal current produced by the
source to be amplified need to present a low impedance to the source, and as
large an impedance as possible to the load.
ii Ro io
is Rs vi Ri Rmii vo RL
vo Rs RL
Rm
is Ri Rs RL Ro
current divider open - circuit voltage divider
due to source amplifier gain due to load
Rf
IP
vo
D1
photodiode
transresistance
amplifier
In this example the source is a photodiode (which acts like a current source),
and the requirement of the amplifier is to convert the low-level current to a
voltage. Photodiodes are often used for accurate measurement of light intensity
in science and industry. They are also widely used in various medical
applications, such as detectors for computed tomography, instruments to
analyze medical samples (immunoassay), and pulse oximeters. The photodiode
is designed to operate in reverse bias, where the current is almost linearly
proportional to the light intensity.
vo R f I P
Due to the virtual short-circuit across the op-amp input terminals, the input
resistance of the amplifier is effectively zero. Since the output is taken from the
op-amp output, the output resistance of the amplifier is effectively zero.
Thus, the circuit satisfies the criteria to make a good transresistance amplifier.
It is also known as a current-to-voltage converter.
Frequency response
V
Av o (14.20)
of an amplifier is the
output phasor over
Vi the input phasor
vi t 0.1cos2000t 30
vo t 10 cos2000t 15
To find the gain as a complex number, we convert the voltages into their
respective phasors:
Vo 1015
Av 10045
Vi 0.1 30
The meaning of this complex voltage gain is that the output signal is 100 times
larger in amplitude than the input signal. Furthermore, the output signal is
phase shifted by 45 relative to the input signal.
Some amplifier stages are “coupled” together using capacitors which block
DC. Thus, only AC signals are amplified. Such amplifiers are known as AC
coupled amplifiers. Examples include audio amplifiers and electro-
cardiographs.
An AC coupled
amplifier
Input Interstage Output
coupling coupling coupling
capacitor capacitor capacitor
First Second
vi amplifier amplifier vo RL
Signal source stage stage
may include a
DC component
Figure 14.1
The capacitors used to couple the stages together are known as coupling
capacitors or DC blocking capacitors. These coupling capacitors may be
external to the amplifier or may be internal to the amplifier. The most common
reason why amplifiers are AC coupled is so that the internal DC biasing
arrangements of the transistors in the amplifier are undisturbed by any DC
component of the input signal, and because the output AC signal is usually
superimposed upon an unwanted DC bias signal.
Amplifiers that provide gain all the way down to DC are known as DC coupled
or direct coupled amplifiers. Examples are op-amps and other integrated circuit
amplifiers where the coupling capacitors cannot be fabricated in integrated
form.
Gain magnitude
versus frequency for
|A v| AC and DC coupled
Low-frequency Midband region High-frequency amplifiers
|A v mid | region region
0
0
(a) AC coupled amplifier frequency response f
|A v|
Midband region High-frequency
region
|A v mid |
0
0
(b) DC coupled amplifier frequency response f
Figure 14.2
The gain magnitude is constant over a wide range of frequencies known as the
midband region. At high frequencies the gain of an amplifier inevitably falls
off due to the intrinsic capacitances of the internal transistors, which appear
more and more like short-circuits. For AC coupled amplifiers the gain drops
off at low frequencies and is eventually zero at DC due to the coupling
capacitors.
The bandwidth B of an amplifier is the difference between the upper and lower
half-power frequencies.
Av
Avmid
Avmid
2
B
0
0 fL fH f
Figure 14.3
In the figure above f L and f H are the lower and upper half-power frequencies,
respectively. The half-power bandwidth of the amplifier is then given by:
B fH fL
Bandwidth of an
amplifier defined (14.21)
If the gain of an amplifier has a different magnitude for the various frequency
components of the input signal, then amplitude distortion occurs. Audio
systems tend to suffer from amplitude distortion due to the frequency response
of the speakers (not the audio amplifier).
vi t 3 cos2000t 2 cos6000t
The magnitude response of the amplifier is shown below, and the phase
response is zero (an ideal case that never occurs in practice):
Av
10
2.5
0
0 1 kHz 3 kHz f
The first term of the input signal (a 1 kHz sinusoid) experiences a gain of 10,
whilst the second term of the input signal (a 3 kHz sinusoid) experiences a gain
of 2.5. The output signal is then:
vo t 30 cos2000t 5 cos6000t
Notice that the output waveform has a different shape than the input waveform
because of amplitude distortion.
vi t 3 cos2000t cos6000t
is applied to the inputs of three amplifiers having the phase responses shown
below:
0 1 kHz 3 kHz
0° f
Av
(a)
0 1 kHz 3 kHz
0° f
Av
-45°
(b)
-135°
0 1 kHz 3 kHz
0° f
Av
-45°
(c)
|Av |
0
0 f
Frequency range
of input signal
0
f
Av
Figure 14.4
0
0 t
Figure 14.5
The step response displays overshoot and ringing, and the leading edge is
gradual rather than abrupt due to slew rate limiting. The error band is defined
as a given percentage of the final value, and the settling time is the time it takes
for the output to fall within the error band.
If the amplifier is AC coupled, a final value will never be reached and the
output response will gradually decay to zero.
Actual
amplifier
vi
Figure 14.6
Consider the case where the input signal is a sinusoid given by:
vi t Vm cosot (14.23)
collecting terms, and defining V0 to be equal to the sum of all the constant
terms, V1 to be the sum of the coefficients of the terms with frequency 0 , and
so on, we find that:
The desired output is the V1 cos0 t term, which we call the fundamental
component. The V0 term represents a shift in the DC level (which does not
appear at the load if it is AC coupled). In addition, terms at multiples of the
input frequency have resulted from the second and higher power terms of the
transfer characteristic. These terms are called harmonic distortion. The 2 0
term is called the second harmonic, the 3 0 term is called the third harmonic,
and so on.
Vn
Dn (14.25)
V1
The total harmonic distortion (THD), denoted by D, is the ratio of the RMS
value of the sum of all the harmonic distortion terms to the RMS value of the
fundamental:
Total harmonic
distortion defined D D22 D32 D42 D52 (14.26)
14.10 Summary
Amplifier performance measures the voltage gain, current gain and power
gain under certain source and load conditions.
Several models are useful in characterising amplifiers. They are the voltage
amplifier model, the current amplifier model, the transconductance
amplifier model and the transresistance amplifier model. The different
models are suited to particular amplifiers or configurations.
14.11 References
Hambley, A.R..: Electrical Engineering – Principles and Applications, 5th Ed.,
Pearson, 2011.
15 Frequency Response
Contents
Introduction
The frequency response of a circuit, by definition, is the sinusoidal steady-state
response of the circuit, as a function of frequency. The frequency response is
therefore a description of a circuit’s behaviour in the frequency-domain – we
will use the concepts of voltage and current phasors, and impedance, to
facilitate this view.
It turns out that the frequency response of a circuit gives us enough information
to completely characterise1 a circuit. Thus, if we know the frequency response
of a circuit, then we can determine the circuit’s response to any input, not just
individual sinusoids.
1
A formal link between the frequency response of a circuit and it’s time-domain description
will be given in later subjects, where the ideas and mathematics related to the Fourier and
Laplace transforms are elucidated.
phasors, the sinusoidal input can be represented by X A0 0 and the output
response by Y B :
LTI
X = A 0 Y=B
circuit
input output
Figure 15.1
T j
Y
(15.1)
X
We call T j the magnitude response of the circuit, and we call T j the
T j T j e j (15.2)
T j T j
response in terms of
magnitude and (15.3)
phase
If the logarithm (base 10) of the magnitude is multiplied by 20, then we have
the gain of the frequency response in decibels (dB):
The magnitude of
the frequency
response in dB
A 20 log10 T j dB (15.4)
R R
vi (t ) = 1
C vo Vi Vo
Vm cos( t ) j C
(a) (b)
Figure 15.2
The circuit shown in (a) is the real physical circuit, whilst that shown in (b) is
its frequency-domain representation. The forcing function is regarded as the
input to the circuit, and the voltage across the capacitor is regarded as the
output response. We can find the forced response of this circuit using the
voltage divider rule:
1 jC
Vo Vi
R 1 j C
(15.5)
1 RC
Vi
j 1 RC
T j
Vo 1 RC
(15.6)
Vi 1 RC j
For the RC circuit, let 0 1 RC so that the frequency response can be written
as:
T j
1
1 j 0
T j
1
1 0
2
tan 1
0
T j 0 0
T j0
1
0.707 (15.7)
2
T j 1
A simple lowpass
filter
|T|
1
R
1 2
vi C vo
0
0 0 2 0
Figure 15.3
An idealisation of the response in Figure 15.3, known as a brick wall, and the
circuit that produces it are shown below:
An ideal lowpass
filter
|T| Cutoff
1
ideal
vi vo
Pass Stop filter
0
0 0
Figure 15.4
For the ideal filter, the output voltage remains fixed in amplitude until a critical
frequency is reached, called the cutoff frequency, 0 . At that frequency, and
for all higher frequencies, the output is zero. The range of frequencies with
Pass and stop output is called the passband; the range with no output is called the stopband.
bands defined
The obvious classification of the filter is a lowpass filter.
Even though the response shown in the plot of Figure 15.3 differs from the
ideal, it is still known as a lowpass filter, and, by convention, the half-power
frequency is taken as the cutoff frequency.
If the positions of the resistor and capacitor in the circuit of Figure 15.2 are
interchanged, then the resulting circuit is:
1
C j C
vi (t ) =
R vo Vi R Vo
Vm cos( t )
(a) (b)
Figure 15.5
j
T j (15.8)
1 RC j
j 0
T j (15.9)
1 j 0
T j 0 0
T j0
1
0.707 (15.10)
2
T j 1
A simple highpass
filter
|T|
1
C
1 2
vi R vo
0
0 0 2 0 3 0
Figure 15.6
This filter is classified as a highpass filter. The ideal brick wall highpass filter
is shown below:
An ideal highpass
filter
|T| Cutoff
1
ideal
vi vo
Stop Pass filter
0
0 0
Figure 15.7
Phase response is
V
T j o o
V obtained in the
T (15.11) sinusoidal steady-
Vi Vi 0 state
We use the sign of the phase angle to classify circuits. Those giving positive Lead and lag circuits
are known as lead circuits, those giving negative as lag circuits. defined
For the simple RC circuit of Figure 15.3, we have already seen that:
tan 1 0
tan1 1 45 . A complete plot of the phase response is shown below:
0 0 2 0
0º
-45 º
-90 º
For the simple RC circuit of , we can show that the phase is given by:
90 tan 1 0
90 º
45 º
0º
0 0 2 0
The angle is positive for all , and so the circuit is a lead circuit.
15
10
5
|T(f)| dB
-5
-10
-15
-20
2 3 4 5
10 10 10 10
f (Hz)
170
160
150
angle(H(f)) degrees
140
130
120
110
100
90
2 3 4 5
10 10 10 10
f (Hz)
Figure 15.8
We normally don’t deal with equations when drawing Bode plots – we rely on
our knowledge of the asymptotic approximations for the handful of factors that
go to make up a frequency response.
*
Dr. Hendrik Bode grew up in Urbana, Illinois, USA, where his name is pronounced boh-dee.
Purists insist on the original Dutch boh-dah. No one uses bohd.
T j
1
1 j 0
A 20 log 10 T j 20 log 10
1
1 0
2
10 log 10 1 0
2
The phase is:
tan 1
0
The Bode plots are graphed below, using a normalised log scale for :
The primary advantage of a logarithmic scale for Bode magnitude plots is the
Bode plot factors conversion of multiplicative factors into additive factors by virtue of the
are additive if the
magnitude scale is definition of the logarithm. The phase plots are additive by definition of the
logarithmic
multiplication of complex numbers. For example, if we have a frequency
response function of the form:
T j
T1T2
(15.12)
T3T4
then clearly:
A1 A2 A3 A4
and:
There are four different kinds of factors that may occur in a frequency response
function:
The four factors that
Name Factor can occur in a
frequency response
function
Constant gain K
1 1 Q00 j j 0
Complex conjugate poles (or zeros) 2
We can determine the logarithmic magnitude plot and phase plot for these four
factors and then utilize them to obtain a Bode plot for any general form of a
frequency response function. Typically, the curves for each factor are obtained
and then added together graphically to obtain the curve for the complete
frequency response function.
Approximate The hand drawing of the individual Bode plot frequency response factors can
responses can be
easily drawn for the be simplified by using linear approximations to the exact curves.
individual frequency
response factors Approximate Magnitude Response
A 10 log10 1 0
2
(15.15)
Thus, on a set of axes where the horizontal axis is log 10 , the “asymptotic”
curves for the magnitude response are straight lines as shown below:
Exact and
approximate
magnitude response
for a “real pole”
factor
Figure 15.9
The low and high frequency asymptotes meet at the frequency 0 , which is
Break frequency
often called the break frequency or corner frequency. The slope of the high and corner
frequency asymptote can be ascertained from Eq. (15.17). frequency defined
20 dB
That is, the slope of the high frequency asymptotic line for this frequency
response factor is -20 dB/decade.
Note that the actual gain at the break frequency 0 is -3 dB, so 0 is also
sometimes referred to as “the -3 dB frequency”.
tan 1 (15.20)
0
Figure 15.10
The piece-wise linear approximation passes through the correct phase of -45°
The slope of all at the break frequency, and is within 6° of the actual phase curve for all
asymptotic lines on
frequencies. As can be seen from the graph, the slope of the line passing
a phase plot is a
multiple of through the -45° point is -45°/decade. This line only continues a decade above
±45°/decade
and a decade below the break frequency. For 0 the approximating line
Magnitude Phase
Frequency
Asymptote Linear Approximation Response
Factor
A, dB ,
40
0
20
0 -90
K
-20 -180
-40
0.01 n 0.1 n n 10 n 100 n
0.01 n 0.1 n n 10 n 100 n
40
0
20
0 -90 1
-20 -180
j 0
-40
0.01 n 0.1 n n 10 n 100 n
0.01 n 0.1 n n 10 n 100 n
40
0
20
0 -90 1
-20
1 j 0
-180
-40
0.01 n 0.1 n n 10 n 100 n
0.01 n 0.1 n n 10 n 100 n
40
0
20
1
0 -90
2
j
-20 1 2
0 Q0 0
-180
-40
0.01 n 0.1 n n 10 n 100 n
0.01 n 0.1 n n 10 n 100 n
15.9 Summary
The frequency response T j is a complex function and can be written
using a complex exponential in terms of magnitude and phase:
T j T j e j
Approximate Bode plot factors can be used to analyse and design simple
circuits.
15.10 References
Kamen, E. & Heck, B.: Fundamentals of Signals and Systems using
MATLAB®, Prentice-Hall, 1997.
Exercises
1.
With respect to a reference frequency f 0 20 Hz , find the frequency which is
2.
Express the following magnitude ratios in dB: (a) 1, (b) 40, (c) 0.5
Contents
Introduction
Filters are essential to electrical engineering. They are used in all modern
electronic systems. In communications, filters are essential for the generation
Filters are essential
to all modern and detection of analog and digital signals, whether via cable, optic fibre, air or
electronic systems
satellite. In instrumentation, filters are essential in “cleaning up” noisy signals,
or to recover some “special” part of a complicated signal. In control, feedback
through a filter is used to achieve a desired response. In power, filters are used
to inject high frequency signals on the power line for control purposes, or for
removing harmonic components of a current. In machines, filters are used to
suppress the generation of harmonics, or for controlling switching transients.
The design of filters is therefore a useful skill to possess.
Filters can be of two types: analog and digital. In this subject, we will
concentrate on analog filters. There are two reasons for this: analog filters are
necessary components in “digital” systems, and analog filter theory serves as a
precursor to digital filter design. The analog filters we will be looking at will
also be of two types: passive and active. Active filters represent the most
common, and use electronic components (such as op-amps) for their
implementation. This is opposed to passive filters, which use the ordinary
circuit elements: resistors, capacitors, inductors.
Recall that we define a circuit’s frequency response as the ratio of the output
voltage phasor to the input voltage phasor, as a function of frequency:
T j
Vo Frequency response
(16.1) defined
Vi
EXAMPLE 16.1 Frequency Response of an RC Circuit
1
Vi
j C Vo
Vo 1 jC
T j
1 1 1
, 0
Vi R 1 jC 1 jRC 1 j 0 RC
ja1 a2
T j
Bilinear frequency
response defined (16.2)
jb1 b2
where the a and b constants are real numbers. If Eq. (16.2) is written in a
“standard form”:
a2 1 ja1 a2 1 j z
T j
and rewritten in
terms of poles and K (16.3)
zeros b2 1 jb1 b2 1 j p
then “-z” is the zero of T j and “-p” is the pole of T j (the reason for
these names will become apparent later). For real circuits, p will always be a
positive real number, while z may be either a positive or negative real number.
The constant K depends on the circuit used to create the bilinear frequency
response – for active circuits (e.g. those with op-amps) it can be positive or
negative.
Thus for the RC circuit in the example, if we were to write the frequency
response in the standard form, we would identify:
K 1
z (16.4)
p 0 1 RC
The magnitude
1 j z
T j K
response is the
(16.5) magnitude of the
1 j p frequency response
1 j z
T j K
The phase of the
(16.6) bilinear frequency
1 j p response
Tk K
Tz 1 j z
1
Tp
1 j p (16.7)
Tz
2
1
0
log 10
z
Tp
1
1/ 2
0
log 10
p
Figure 16.1
If all three factors are combined then the magnitude response takes on one of
two shapes, depending on whether p z or not:
|T |
0
log 10
p z
|T |
0
log 10
z p
Figure 16.2
Thus, we can use the bilinear frequency response to create either a lowpass
response ( p z ) or a highpass response ( p z ).
Index Bilinear Frequency Responses PMcL
1 j z
T j K (16.8)
1 j p
k K
z tan 1
z
p tan 1
p (16.10)
z
90°
45°
log 10
0° z
p p
log 10
0°
-45°
-90°
Figure 16.3
p z
log 10
0°
90°
90°
log 10
0° z p
Figure 16.4
Thus, we can use the bilinear frequency response to create either a lag circuit
( p z ) or a lead circuit ( p z ).
RL
Vi Vo
jL
RL jL
T j
R RL jL
1 j z
T j K
1 j p
then:
RL R R RL
K , z L and p
R RL L L
RL
T j 0 K
R RL
T j K
1z
1
1 p
|T( j) |
1
RL
R+R L
0
log 10
z p
This does not approximate an ideal brickwall filter very well, but it is still
known as a highpass filter.
From Eq. (16.9) we see that is characterized by the sum of three angles, the
first due to the constant K 0 , the second a function of the zero numerator
term, z , and the third a function of the pole denominator term, p . For p z
45 for a higher frequency. Therefore, the phase response looks like:
90°
z
45°
z + p
z
0° p log 10
p
-45°
-90°
K j 0 K
0 log 10
log 10
0 0°
|T |
2 log 10
0°
K
j 0 K
0
log 10 -90°
0
|T |
3 90°
K 1 j z
2K 45°
K
0 log 10
log 10 0°
z z
|T | p
4 K log 10
0°
K/ 2
1 -45°
K
1 j p 0
log 10 -90°
p
|T |
5 K 90°
j p K/ 2
45°
K
1 j p 0
log 10 log 10
p 0° p
|T | p z
6 log 10
0°
1 j z
K
1 j p 0
log 10 90°
zp
p z
|T |
7 90°
1 j z
K
1 j p 0
log 10 log 10
0° z p
pz
z p
T j
1 RC
(16.11)
1 RC j
expressed as:
T j
1
(16.12)
1 j 0
T j
1
(16.13)
1 j
The difficulty that now arises is denormalising the resulting equations, values
or circuit designs.
1 1 1
ZC
C k f 1 k f C k f Cnew
(16.14)
We must decrease the capacitance by the amount 1 k f , while increasing the Frequency scaling
must keep the
frequency by the amount k f if the magnitude of the impedance is to remain the magnitude of the
impedance the
same. same
Z L L k f L k f Lnew
1
(16.15)
kf
1
Lnew Lold
kf (16.17)
The frequency
scaling equations
1
Cnew Cold
kf (16.18)
1
Z R R, Z L L, ZC (16.19)
C
then after magnitude scaling with a constant k m they will be:
k m Z R k m R,
km Z L kmL,
1
km ZC
C km (16.20)
1
Cnew Cold
km (16.23)
R R
vi C C vo
Figure 16.5
Show that the frequency response for the above circuit is:
Vo
1 RC 2
(16.24)
Vi 1 RC 2 2 j 3 RC
R R
vi C C vo
Figure 16.6
Vo 1 RC 1 RC
Vi 1 RC j 1 RC j
1 RC 2
1 RC 2 2 j 2 RC (16.25)
Cascading buffered
Therefore, when we cascade circuits, if the “output” of each circuit presents a
circuits is highly low impedance to the next stage, so that each successive circuit does not “load”
desirable from a
design perspective the previous circuit, then we can simply multiply the frequency responses of
the individual circuits to achieve an overall frequency response. Op-amp
circuits of both the inverting and non-inverting type are ideal for cascading.
T j
Z2
(16.26)
Z1
The specifications of the design problem are the values K, z and p. These may
be found from a Bode plot – the break frequencies and the gain at some
frequency – or obtained in any other way. The solution to the design problem
involves finding a circuit and the values of the elements in that circuit. Since
we are using an active device – the op-amp – inductors are excluded from our
circuits. Therefore, we want to find values for the R’s and the C’s. Once found,
For the general bilinear frequency response, we can make the following
identification:
1 j z K 1 j p Z2
K
1 j p 1 1 j z Z1
(16.28)
Therefore:
1 1
Z2 (16.29) The impedances for
1 K j pK 1 R2 jC2 the inverting op-amp
circuit to implement
1 1 a bilinear frequency
Z1 (16.30) response
1 j z 1 R1 jC1
An inverting op-amp
K circuit that
implements a
bilinear frequency
response
1
1
pK
vi
vo
1 z
Figure 16.7
PMcL Inverting Bilinear Op-Amp Circuit Index
1
K 1 j z vi
vo
1 z
2 K
1
1
K 1 pK
1 j p vi
vo
3 K
1 p
j p 1
K vi
1 j p vo
4 K
1
1 j z 1
K pK
1 j p vi
vo
1 z
5 K p2
j p1 p 2 1 p1
1 K
K 1
1 j p1 1 j p2 vi
vo
A , dB 20 dB
A band-
0 dB enhancement filter
10
2
10
3
10
4
10
5
rad/s (log scale)
The composite plot may be decomposed into four first-order factors as shown
below:
A , dB 20 dB
0 dB
10 rad/s (log scale)
2 3 4 5
10 10 10
Decomposing a
A , dB
Bode plot into first- 1 4
order factors
2 3
Those marked 1 and 4 represent zero factors, while those marked 2 and 3 are
pole factors.
T j
14 1 j
102 1 j 105
23 1 j
103 1 j 104
We next write T j as a product of bilinear functions:
The frequency
response as a T j T1 j T2 j
cascade of bilinear
functions
For a circuit realisation of T1 and T2 we decide to use the inverting op-amp
circuit 4 in Table 16.2. Since one of the design requirements was that all
capacitor values are equal, we need to choose K z p in each circuit. This
leads to:
T j T1 j T2 j
1 j 10 2 1 j 10 5
0.1 10
1 j 10 3 1 j 10 4
Note that, in this design, the DC gains K z p of each circuit multiply to give
us the overall DC gain we required (of 1). In general though, we might need to
add an additional gain / attenuation stage to the cascade to “meet spec”.
Using the formulas for element values given in Table 16.2, we obtain the
realisation shown below:
-1
1 10 1 10
vi vo A realisation of the
-2 -2 -5 -5 specifications
10 10 10 10
Frequency scaling is not required since we have worked directly with specified
frequencies (we did not normalize the initial Bode plot). The magnitude scaling
of the circuit is accomplished with the equations:
Magnitude scaling is
1
Cnew Cold and Rnew km Rold required to get
km realistic element
values
Since the capacitors are to have the value 10 nF, this means k m 10 6 for the
first circuit and k m 10 3 for the second circuit. The element values that result
are shown below and the design is complete:
1 M 100 k 1 k 10 k
vi vo
A realistic
10 nF 10 nF 10 nF 10 nF implementation of
the specifications
16.7 Summary
A bilinear frequency response can be put in the “standard form”:
1 j z
T j K
1 j p
A circuit can be cascaded when it does not “load” the output of the
previous stage. Circuits in which the output is taken from an op-amp output
terminal are ideal for cascading, since the op-amp effectively acts as an
ideal source.
Simple op-amp circuits, of both the inverting and non-inverting variety, can
be used to implement bilinear frequency responses.
16.8 References
Van Valkenburg, M. E.: Analog Filter Design, Holt-Saunders, Tokyo, 1982.
Exercises
1.
For the circuit shown below, prepare the asymptotic Bode plot for the
magnitude of T j . Carefully identify all slopes and low and high frequency
asymptotes.
10 k 10 k
10 k 1 nF 10 k 10 pF
vi
vo
2.
Design an RC op-amp filter to realise the bandpass response shown below.
A, dB
20 dB
+20 dB/decade -20 dB/decade
0 dB
10 10 4 rad/s (log scale)
Use a minimum number of op-amps in your design, and scale so that the
elements are in a practical range.
3.
The asymptotic Bode plot shown below represents a lowpass filter-amplifier
with a break frequency of 0 1000 rads -1 .
A, dB
20 dB
-40 dB/decade
1000 rad/s
Design a circuit to be connected in cascade with the amplifier such that the
break frequency is extended to 0 5000 rads -1 :
A, dB
20 dB
-40 dB/decade
5000 rad/s
Contents
Introduction
Circuits that contain resistors, inductors and capacitors are known as RLC
circuits. We will examine the simplest RLC circuits – the parallel RLC circuit
where the resistor, inductor and capacitor are in parallel, and the series RLC
circuit in which they are connected in series.
Many circuits can be reduced to one of these equivalent circuits. For example,
transistor amplifiers in analog radios, crystal oscillators driving the clocks of
digital circuits and microprocessors, and power system “power factor
correction” circuits, can each be reduced to a parallel RLC circuit.
dny d n1 y dy
an n an1 n1 a1 a0 y 0 (17.1)
dt dt dt
or more simply using the D operator as:
f D y 0 (17.2)
We have seen that the solution to such an equation was found by using the
property that:
then letting:
f s 0 (17.4)
are linearly independent and the general solution can be written at once. It is:
d2y dy
2
7 6y 0
dt dt
s 2 7s 6 0
s 1s 6 0
whose roots are s 1, 6 . Then the general solution is seen to be:
y c1et c2e6t
Suppose that f s 0 has repeated roots. Then Eq. (17.6) does not yield the
general solution. To see this, let the characteristic equation have three equal
roots s1 b , s2 b and s3 b . The corresponding part of the solution yielded
by Eq. (17.6) is:
Thus, corresponding to the three roots under consideration, this method yields
only one solution.
s1 s2 sm b (17.8)
D bm y 0 (17.9)
because, aside from the common factor ebt , they contain only the respective
powers t 0 , t1 , t 2 , ..., t m1 .
yi ci e sit (17.12)
D 4
7 D3 18D2 20D 8 y 0
or:
y c1et c2 c3t c4t 2 e2t
s 4 2s 3 s 2 0
s1 a jb (17.14)
s2 a jb (17.15)
where for y to be real, we must have c1 c2* . Since t is real along with a and b,
Euler’s identity gives us the result:
c4 are real arbitrary constants. Then f Dy 0 is seen to have the solution:
D 3
5D2 17 D 13 y 0
s3 5s 2 17s 13 0
one root, s1 1, is easily found. When the factor s 1 is removed, it is seen
that the other two roots are solutions of the quadratic equation:
s 2 4s 13 0
equation has the roots s 1, 2 j3 . Hence the general solution of the
differential equation is:
c c t c t e
1 2 3
2 at
cos bt c4 c5t c6t 2 eat sin bt (17.20)
D 4
8D2 16 y 0
s 2
2
4 0
iL
R L v C
Figure 17.1
We will assume that energy may be stored initially in both the inductor and the
capacitor, and thus nonzero values of both inductor current and capacitor
voltage are initially present. With reference to the circuit above, we may then
write the single nodal equation:
vdt iL t0 C
v 1 t dv
0 (17.21)
R L t0 dt
When both sides are differentiated once with respect to time and divided by C
the result is the linear second-order homogeneous differential equation:
d 2v 1 dv 1
v0 (17.22)
dt 2 RC dt LC
We must solve this equation subject to the initial conditions:
iL 0 I 0
v0 V
(17.23)
0
With our theory of the D operator behind us, we now embark on solving
Eq. (17.22). We write the characteristic equation:
f s s 2
1 1
s 0 (17.24)
RC LC
and identify the two roots:
2
1 1 1
s1
2 RC 2 RC LC
2
1 1 1
s2
2 RC 2 RC LC (17.25)
These roots can be either real and distinct, real and repeated, or complex and
distinct depending on the values of R, L and C.
Re s
s
s -plane
Re s
s
s -plane
Re s
s
s -plane
It will be helpful to make some simplifying substitutions into Eq. (17.25) for
the sake of conceptual clarity. Let us define the undamped natural frequency:
1
0 (17.26)
LC
1
(parallel) (17.27)
2 RC
Finally, s , s1 and s2 are called complex frequencies and will form the basis for
some of our later work.
s1 2 02
(17.29)
s2 2 2
0
It is now apparent that the nature of the response depends upon the relative
magnitudes of and 0 . The square root appearing in the expressions for s1
s1 2 02
(17.30)
s2 2 2
0
2 02 (17.32)
and therefore:
2 02 2 02 0 (17.33)
s2 s1 0
This shows that both s1 and s2 are negative real numbers. Thus, the response
vt is the algebraic sum of two decreasing exponential terms, both of which
approach zero as time increases without limit. In fact, since the absolute value
of s2 is larger than that of s1 , the term containing s2 has the more rapid rate of
decrease.
It only remains to find the arbitrary constants K1 and K 2 using the initial
conditions, and we have the solution.
iR iL iC
2
4
9
H v 10 mF
in which v0 0 and iL 0 8 . We may easily determine the values of the
several parameters:
25 0 15
s1 5 s 2 45
and since 0 immediately write the general form of the natural response:
Only evaluation of the two constants K1 and K 2 remains. Using the initial
value of vt :
v0 0
and therefore:
0 K1 K 2
derivative of vt with respect to time, determining the initial condition of this
derivative through the use of the remaining initial condition iL 0 8 , and
equating the results.
dv
5K1e 5t 45K 2 e 45t
dt
dv
5K1 45K 2
dt t 0
We next pause to consider how the initial value of the derivative can be found
numerically. This next step is always suggested by the derivative itself, dv dt
suggests capacitor current, for:
dv
iC C
dt
Thus:
vt 20 e 5t e 45t
We can interpret this result. We note that vt is zero at t 0 , as required. We
also interpret the first exponential term as having a time constant of 1 5 s and
the other exponential, a time constant of 1 45 s . Each starts with unity
amplitude, but the second decays more rapidly – vt is thus never negative.
We thus have a response curve which is zero at t 0 , zero at t , and is
dv
dt
20 5e 5t 45e 45t
Then set the derivative to zero to determine the time t p at which the voltage
and obtain:
vt p 13.51 V
20
-5 t
20 e
16
v( t ) 12
(V)
8
4 -45 t
20 e
0 t (s)
0.2 0.4 0.6 0.8 1
You can see that the dominant term is 20e 5t for large t since the other term
has effectively decayed to zero.
s1 0
(17.34)
s2 0
We will use the same circuit as before as an example, but this time set
R 3 13 to obtain critical damping:
iR iL iC
33
1 4
9
H v 10 mF
The initial conditions are again v0 0 and iL 0 8 . In this case:
0 15
s1 s 2 15
and since 0 immediately write the general form of the natural response:
vt itself, v0 0 . Thus, K1 0 . This simple result occurs in this example
because the initial value of the response was selected as zero.
dv
K2
dt t 0
and thus:
K 2 800
and once again we have a response which begins and ends at zero and has
positive values at all other times.
t p 1 15 s and v p 19.62 V
This maximum is larger than that obtained in the overdamped case and is a
result of the smaller losses that occur in the larger resistor. The time of the
maximum response is slightly larger than it was with overdamping.
v ( t ) (V)
20
15
10
0 t (s)
0.2 0.4 0.6 0.8 1.0
s1 2 02 j 02 2
(17.36)
s2 2 02 j 02 2
We now take the new square root, which is real for the underdamped case, and
call it d , the damped natural frequency:
d 02 2 (17.37)
Thus, the roots are distinct complex conjugates and are located at:
s1 jd
(17.38)
s2 jd
We will use the same circuit as before as an example, but this time set
R 5 95 , L and C are unchanged:
iR iL iC
59
5 4
9
H v 10 mF
1
9
2 RC
1
0 15
LC
d 02 2 12
dv
12 K 2 e 9t cos 12t 9 K 2 e 9t sin 12t
dt
and at t 0 :
dv i 0
12 K 2 L 800
dt t 0 C
Notice that, as before, vt is zero at t 0 , as required. The response also has a
final value of zero because the exponential term vanishes for large values of t.
As t increases from zero through small positive values, vt increases because
the exponential term remains unable to damp the increase due to the sinusoidal
term. But at a time t p , the exponential function begins to decrease more
rapidly than sin 12t is increasing, so vt reaches a maximum v p and begins to
decrease. We should note that t p is not the value of t for which sin 12t is a
maximum, but must occur before sin 12t reaches its maximum value.
Thus vt is an oscillatory function of time and crosses the time axis an infinite
and so on.
The natural response curve for the underdamped case is shown below:
v ( t ) (V)
25
20
15
10 200 e -9 t
3
5
0 t (s)
0.2 0.6 0.8 1.0
-5
-10 200 -9 t
- 3 e
-15
-20
v ( t ) (V)
Underdamped iL
4
25
R 9 H v 10 mF
Critically damped
20
15 Overdamped
10
The table below shows the possibilities and names associated with the
second-order natural response.
0
v ( t ) (V)
20
15
s1, 2 2 2
0
10
0 f n K1 K 2 t e t
v ( t ) (V)
Critically 25
20
damped
s1, 2 15
10
Underdamped 25
20
s1, 2 j d 15
10
d
5
2 2
0 0 0.2 0.6 0.8 1.0 t (s)
i L
R C vC
Figure 17.2
idt vC t0 0
di 1 t
Ri L (17.40)
dt C t 0
When both sides are differentiated once with respect to time and divided by L
the result is the linear second-order homogeneous differential equation:
d 2i R di 1
2
i0 (17.41)
dt L dt LC
This is the dual of Eq. (17.22). Thus, if we define:
R
(series) (17.42)
2L
then we get the same characteristic equation as for the parallel RLC circuit,
Eq. (17.28). It is now apparent that our discussion of the parallel RLC circuit is
directly applicable to the series RLC circuit.
t=0 i (t ) R L
1.3 mH
Vs C v (t )
1V 1.1F
Figure 17.3
1. R 330
2. R 68.7552
3. R 33
First, we find the forced response. Since we have a DC source, we can find this
part of the solution by replacing the inductance by a short circuit and the
capacitance by an open circuit, i.e. we analyse the circuit under DC conditions.
This is shown below:
if R
Vs vf
1V
Figure 17.4
The current is zero, the voltage drop across the resistance is zero, and the
voltage across the capacitance (an open circuit) is equal to the DC source
voltage. Therefore, the forced response is:
v f Vs 1 V (17.43)
Notice that in this circuit the forced response for vt is the same for all three
values of resistance.
First, we can write an expression for the current in terms of the voltage across
the capacitance:
dv
iC (17.44)
dt
Then, we write a KVL equation for the circuit:
Ri v Vsu t
di
L (17.45)
dt
Using Eq. (17.44) to substitute for i , we get, for t 0 :
d 2v dv
LC 2 RC v Vs (17.46)
dt dt
Dividing through by LC, we have:
d 2v R dv 1 1
2
v Vs (17.47)
dt L dt LC LC
In D operator notation, the equation is:
2 R 1 1
D D v Vs (17.48)
L LC LC
R 1
s2 s 0 (17.49)
L LC
If we let:
R 1
and 0 (17.50)
2L LC
then the characteristic equation can be written as:
s1 2 02
(17.52)
s2 2 2
0
Next, we find the natural response and complete response for each value of R.
For all three cases we have:
1
0 26444 (17.53)
LC
R
126923 (17.54)
2L
Since we have 0 , this is the overdamped case. The roots of the
characteristic equation are given by:
s1 2 02
126923 1269232 264442
(17.55)
2785
and
s2 2 02 (17.56)
251060
For the overdamped case, the natural response has the form:
Adding the forced response given by Eq. (17.43) to the natural response, we
obtain the complete response:
Now, we must find values of K1 and K 2 so the solution matches the known
initial conditions in the circuit. It was given that the initial voltage on the
capacitance is zero, hence v0 0 . Evaluating Eq. (17.58) at t 0 , we obtain:
0 1 K1 K 2 (17.59)
Furthermore, the initial current was given as i0 0 . Since the current through
the capacitance is given by:
dv
iC (17.60)
dt
we conclude that:
dv
0 (17.61)
dt
Taking the derivative of Eq. (17.58) and evaluating at t 0 , we have:
s1 K1 s2 K 2 0 (17.62)
Now, we can solve Eqs. (17.59) and (17.62) for the values of K1 and K 2 . The
results are K1 1.0112 and K2 0.01122 . Substituting these values into
Eq. (17.58), we have the solution:
R
26444 (17.65)
2L
Since 0 , this is the critically damped case. The roots of the characteristic
equation are given by:
0 1 K1 (17.69)
s1 K1 K 2 0 (17.70)
Solving Eqs. (17.69) and (17.70) yields K1 1 and K 2 26444 . Thus the
complete response is:
R
12692 (17.73)
2L
Since 0 , this is the underdamped case. Using:
d 02 2 (17.74)
d 23199 (17.75)
Adding the forced response found earlier to the natural response, we obtain the
complete response:
As in the previous cases, the initial conditions are v0 0 and dv0 dt 0 .
Evaluating Eq. (17.77) at t 0 , we obtain:
0 1 K1 (17.78)
dvt
e t d K1 sin d t d K 2 cos d t
dt (17.79)
e t K1 cos d t K 2 sin d t
d K2 K1 0 (17.80)
v (t )
vp
1.00
0
t
tp
Figure 17.5
We can evaluate the maximum value, and the time to reach the maximum value
(called the peak time), by observing that the derivative of vt is zero at
relative maxima and minima.
dvt
K1e t cos d t d K1e t sin d t
dt (17.83)
K 2 e t sin d t d K 2 e t cos d t
dvt
e t d K 2 K1 cos d t d K1 K 2 sin d t (17.84)
dt
d K 2 K1 0 (17.85)
dvt
e t d K1 K 2 sin d t (17.86)
dt
Equating this to zero, we get:
sin d t 0 (17.87)
n
tm (17.88)
d
tp (17.89)
d
we get:
Putting values of this particular case into Eqs. (17.89) and (17.91), we get:
tp 0.13542 ms (17.92)
23199
and:
12692
vp 1 e 23199
1.17929 V (17.93)
It is important to note that the formula obtained for the peak time, Eq. (17.89),
is only valid for this particular case of zero initial conditions. In the general
case it can be shown that the times of relative maxima and minima for an
underdamped response are given by:
1 K K1
tm tan 1 d 2 (17.94)
d d K1 K 2
from which Eq. (17.89) is a special case. Derive this general formula.
17.9 Summary
For the RLC circuit, we define the undamped natural frequency:
1
0
LC
1
parallel
2 RC
R
series
2L
The RLC circuit exhibits three different forms for the natural response:
Overdamped ( 0 )
Critically Damped ( 0 )
f n K1 K 2 t e t
Underdamped ( 0 )
The complete response is the sum of the forced response and the natural
response.
17.10 References
Hayt, W. & Kemmerly, J.: Engineering Circuit Analysis, 3rd Ed., McGraw-
Hill, 1984.
Exercises
1.
Consider the circuit shown below:
iR iL iC
1
2 L v 20 F
Let L 1.25 H and determine vt if v 0 100 V and:
(a)
iC 0 20 A (b)
iL 0 20 A
2.
Consider the circuit shown below:
50 125 mH
8 F v
200 50
120 V 6V
Both switches close at t 0 after having been open for a very long time.
3.
The capacitor voltage in a parallel RLC circuit that is critically damped is given
by vt 1000e500t t 0.01 V . If the energy stored in the capacitor is 2 mJ at
t 0 , find:
(a) R.
4.
Consider the circuit shown below:
5 L v C
The voltage is given by vt e7t 20 cos 24t 5 sin 24t V for t 0 . Find:
(a) L and C .
5.
Consider the circuit shown below:
1 t=0
10
1.5 V H 1 nF 50 k
101
What is the maximum voltage magnitude present across the switch after t 0 ?
(Note that it is much safer to solve this problem analytically than to do so
experimentally.)
6.
Consider the circuit shown below:
F
20
10
3 2 mH
100 V t=0 40 vR
7.
Consider the circuit shown below:
t=0 2.5 mH
10 V v 10 nF 0.5
The switch has been closed for hours. It is opened at t 0 . Show that a 10 V
battery can create a high voltage by finding v at t 2.5 μs .
8.
A 2.5 H inductor, a 4 resistor, and a 25 mF capacitor are in parallel.
An 80 V battery is then placed in series with the inductor.
(a) After a long time has passed, find the energy stored in the inductor and in
the capacitor.
9.
Consider the circuit shown below:
20 H 1.2 k
iC
F
20 V 10
vC 3 50 u (t ) V
Find vC t and iC t .
10.
Consider the circuit shown below:
25
iL
2.5 mH 25 F vC
3-5u (t ) A
Find:
(a) vC t
(b) iL t
11.
A 5 mH inductor, a 50 μF capacitor, and a 25 resistor are in series with a
William Thomson was born in Belfast, Ireland. His father was a professor of
engineering. When Thomson was 8 years old his father was appointed to the
chair of mathematics at the University of Glasgow. By age 10, William
Thomson was attending Glasgow University. He studied astronomy, chemistry
and natural philosophy (physics, heat, electricity and magnetism). Prizes in
Greek, logic (philosophy), mathematics, astronomy and physics marked his
progress. In 1840 he read Fourier’s The Analytical Theory of Heat and wrote:
…I had become filled with the utmost admiration for the splendour and
poetry of Fourier… I took Fourier out of the University Library; and in a
fortnight I had mastered it - gone right through it.
After graduating, he moved to Paris on the advice of his father and because of
his interest in the French approach to mathematical physics. Thomson began
trying to bring together the ideas of Faraday, Coulomb and Poisson on
electrical theory. He began to try and unify the ideas of “action-at-a-distance”,
the properties of the “ether” and ideas behind an “electrical fluid”. He also
became aware of Carnot’s view of heat.
In the first decades of the nineteenth century geological evidence for great
changes in the past began to build up. Large areas of land had once been under
water, mountain ranges had been thrown up from lowlands and the evidence of
fossils showed the past existence of species with no living counterparts. Lyell,
in his Principles of Geology, sought to explain these changes “by causes now
in operation”. According to his theory, processes – such as slow erosion by
wind and water; gradual deposition of sediment by rivers; and the cumulative
effect of earthquakes and volcanic action – combined over very long periods of
time to produce the vast changes recorded in the Earth’s surface. Lyell’s so-
called ‘uniformitarian’ theory demanded that the age of the Earth be measured
in terms of hundreds of millions and probably in terms of billions of years.
Lyell was able to account for the disappearance of species in the geological
record but not for the appearance of new species. A solution to this problem
was provided by Charles Darwin (and Wallace) with his theory of evolution by
natural selection. Darwin’s theory also required vast periods of time for
operation. For natural selection to operate, the age of the Earth had to be
measured in many hundreds of millions of years.
Such demands for vast amounts of time run counter to the laws of
thermodynamics. Every day the sun radiates immense amounts of energy. By
the law of conservation of energy there must be some source of this energy.
Thomson, as one of the founders of thermodynamics, was fascinated by this
problem. Chemical processes (such as the burning of coal) are totally
insufficient as a source of energy and Thomson was forced to conclude that
gravitational potential energy was turned into heat as the sun contracted. On
this assumption his calculations showed that the Sun (and therefore the Earth)
was around 100 million years old.
With respect to the lapse of time not having been sufficient since our planet
was consolidated for the assumed amount of organic change, and this
objection, as argued by [Thomson], is probably one of the gravest yet
advanced, I can only say, firstly that we do not know at what rate species
change as measured by years, and secondly, that many philosophers are not
yet willing to admit that we know enough of the constitution of the universe
and of the interior of our globe to speculate with safety on its past duration.
…this seems to be one of the many cases in which the admitted accuracy of
mathematical processes is allowed to throw a wholly inadmissible
A variant of the appearance of authority over the results obtained by them. Mathematics
adage: may be compared to a mill of exquisite workmanship, which grinds you stuff
“Garbage in equals of any degree of fineness; but nevertheless, what you get out depends on
garbage out”.
what you put in; and as the grandest mill in the world will not extract
wheat-flour from peascods, so pages of formulae will not get a definite
result out of loose data.
However, Thomson’s estimates were the best available and for the next thirty
years geology took its time from physics, and biology took its time from
geology. But Thomson and his followers began to adjust his first estimate
down until at the end of the nineteenth century the best physical estimates of
the age of the Earth and Sun were about 20 million years whilst the minimum
the geologists could allow was closer to Thomson’s original 100 million years.
Then in 1904 Rutherford announced that the radioactive decay of radium was
accompanied by the release of immense amounts of energy and speculated that
this could replace the heat lost from the surface of the Earth.
A problem for the geologists was now replaced by a problem for the physicists.
The answer was provided by a theory which was just beginning to be gossiped
about. Einstein’s theory of relativity extended the principle of conservation of
energy by taking matter as a form of energy. It is the conversion of matter to
heat which maintains the Earth’s internal temperature and supplies the energy
radiated by the sun. The ratios of lead isotopes in the Earth compared to
meteorites now leads geologists to give the Earth an age of about 4.55 billion
years.
Attempts were made to provide underwater links between the various separate
systems. The first cable between Britain and France was laid in 1850. The
operators found the greatest difficulty in transmitting even a few words. After
12 hours a trawler accidentally caught and cut the cable. A second, more
heavily armoured cable was laid and it was a complete success. The short lines
worked, but the operators found that signals could not be transmitted along
submarine cables as fast as along land lines without becoming confused.
In spite of the record of the longer lines, the American Cyrus J. Fields proposed
a telegraph line linking Europe and America. Oceanographic surveys showed
that the bottom of the Atlantic was suitable for cable laying. The connection of
existing land telegraph lines had produced a telegraph line of the length of the
proposed cable through which signals had been passed extremely rapidly. The
British government offered a subsidy and money was rapidly raised.
Faraday had predicted signal retardation but he and others like Morse had in
mind a model of a submarine cable as a hosepipe which took longer to fill with
water (signal) as it got longer. The remedy was thus to use a thin wire (so that
less electricity was needed to charge it) and high voltages to push the signal
through. Faraday’s opinion was shared by the electrical adviser to the project,
Dr Whitehouse (a medical doctor).
Realising that the success of the enterprise would depend on a fast, sensitive
detector, Thomson set about to invent one. The problem with an ordinary
galvanometer is the high inertia of the needle. Thomson came up with the
mirror galvanometer in which the pointer is replaced by a beam of light.
In a first attempt in 1857 the cable snapped after 540 km had been laid. In
1858, Europe and America were finally linked by cable. On 16 August it
carried a 99-word message of greeting from Queen Victoria to President
Buchanan. But that 99-word message took 16½ hours to get through. In vain,
Whitehouse tried to get his receiver to work. Only Thomson’s galvanometer
was sensitive enough to interpret the minute and blurred messages coming
through. Whitehouse ordered that a series of huge two thousand volt induction
coils be used to try to push the message through faster – after four weeks of
this treatment the insulation finally failed; 2500 tons of cable and £350 000 of
capital lay useless on the ocean floor.
Once again the British Government supported the project – the importance of
quick communication in controlling an empire was evident to everybody. The
new cable was mechanically much stronger but also heavier. Only one ship
was large enough to handle it and that was Brunel’s Great Eastern. She was
fives time larger than any other existing ship.
This time there was a competitor. The Western Union Company had decided to
build a cable along the overland route across America, Alaska, the Bering
Straits, Siberia and Russia to reach Europe the long way round. The
commercial success of the cable would therefore depend on the rate at which
messages could be transmitted. Thomson had promised the company a rate of
8 or even 12 words a minute. Half a million pounds was being staked on the
correctness of the solution of a partial differential equation.
In 1865 the Great Eastern laid cable for nine days, but after 2000 km the cable
parted. After two weeks of unsuccessfully trying to recover the cable, the
expedition left a buoy to mark the spot and sailed for home. Since
communication had been perfect up until the final break, Thomson was
confident that the cable would do all that was required. The company decided
to build and lay a new cable and then go back and complete the old one.
Cable laying for the third attempt started on 12 July 1866 and the cable was
landed on the morning of the 27th. On the 28th the cable was open for business
and earned £1000. Western Union ordered all work on their project to be
stopped at a loss of $3 000 000.
On 1 September after three weeks of effort the old cable was recovered and on
8 September a second perfect cable linked America and Europe. A wave of
knighthoods swept over the engineers and directors. The patents which
Thomson held made him a wealthy man.
For his work on the transatlantic cable Thomson was created Baron Kelvin of
Largs in 1892. The Kelvin is the river which runs through the grounds of
Glasgow University and Largs is the town on the Scottish coast where
Thomson built his house.
Other Achievements
There are many
other factors Thomson worked on several problems associated with navigation – sounding
influencing local
tides – such as
machines, lighthouse lights, compasses and the prediction of tides. Tides are
channel width – primarily due to the gravitational effects of the Moon, Sun and Earth on the
which produce
phenomena akin to oceans but their theoretical investigation, even in the simplest case of a single
resonance in the
tides. One example ocean covering a rigid Earth to a uniform depth, is very hard. Even today, the
of this is the narrow
Bay of Fundy, study of only slightly more realistic models is only possible by numerical
between Nova
Scotia and New
computer modelling. Thomson recognised that the forces affecting the tides
Brunswick, where change periodically. He then approximated the height of the tide by a
the tide can be as
high as 21m. In trigonometric polynomial – a Fourier series with a finite number of terms. The
contrast, the
Mediterranean Sea coefficients of the polynomial required calculation of the Fourier series
is almost tideless
because it is a coefficients by numerical integration – a task that “…required not less than
broad body of water
with a narrow
twenty hours of calculation by skilled arithmeticians.” To reduce this labour
entrance. Thomson designed and built a machine which would trace out the predicted
Michelson (of height of the tides for a year in a few minutes, given the Fourier series
Michelson-Morley
coefficients.
fame) was to build a
better machine that
used up to 80 Thomson also built another machine, called the harmonic analyser, to perform
Fourier series
coefficients. The the task “which seemed to the Astronomer Royal so complicated and difficult
production of ‘blips’
at discontinuities by that no machine could master it’ of computing the Fourier series coefficients
this machine was
explained by Gibbs from the record of past heights. This was the first major victory in the struggle
in two letters to
Nature. These ‘blips’
“to substitute brass for brain” in calculation.
are now referred to
as the “Gibbs
phenomenon”.
Thomson worked in collaboration with Tait to produce the now famous text
Treatise on Natural Philosophy which they began working on in the early
1860s. Many volumes were intended but only two were ever written which
cover kinematics and dynamics. These became standard texts for many
generations of scientists.
During the first half of Thomson's career he seemed incapable of being wrong
while during the second half of his career he seemed incapable of being right.
This seems too extreme a view, but Thomson's refusal to accept atoms, his
opposition to Darwin's theories, his incorrect speculations as to the age of the
Earth and the Sun, and his opposition to Rutherford's ideas of radioactivity,
certainly put him on the losing side of many arguments later in his career.
William Thomson, Lord Kelvin, died in 1907 at the age of 83. He was buried
in Westminster Abbey in London where he lies today, adjacent to Isaac
Newton.
References
Burchfield, J.D.: Lord Kelvin and The Age of the Earth, Macmillan, 1975.
Körner, T.W.: Fourier Analysis, Cambridge University Press, 1988.
Encyclopedia Britannica, 2004.
Morrison, N.: Introduction to Fourier Analysis, John Wiley & Sons, Inc., 1994.
Thomson, S.P.: The Life of Lord Kelvin, London, 1976.
Kelvin & Tait: Treatise on Natural Philosophy, Appendix B.
PMcL William Thomson (Lord Kelvin) (1824-1907) Index
18 Waveform Generation
Contents
Introduction
A comparator uses the op-amp in an open-loop mode. For a very small input
voltage, the output will saturate close to one of the power supply voltages due
to the very large gain of the op-amp.
vo
positive saturation
vi
vo vi
negative saturation
Figure 18.1
Since the open-loop voltage gain of an op-amp is very large, when there is no
feedback an input voltage difference of only a few microvolts is sufficient to
drive the output voltage to either its maximum ( VOH ) or to its minimum value
( VOL ). These values are determined by the op-amp supply voltages and its
internal structure; their magnitudes are always slightly lower than that of their
respective supply values ( VOH VCC , VOL VEE ).
This feature is used in comparator circuits, when one wishes to know whether a
given input is larger or smaller than a reference value. It is especially useful in
digital applications, such as in analog to digital converters (ADCs).
R2 vo
R1 VOH
vo
vi VTL 0 VTH vi
VOL
Figure 18.2
difference vi V changes sign, the polarity of the output, and consequently of
value V . The result is that the output may be at either extreme value ( VOH or
VOL ) for the same value of the input; whether the output is positive or negative
is determined by its previous state. The circuit therefore possesses memory.
The consequence of this is that the voltage transfer characteristic of a Schmitt
trigger follows a different curve, depending on whether the independent
variable is increasing or decreasing. This property is called hysteresis and is
depicted in Figure 18.2. Since the circuit has two stable states, it is also called a
bistable circuit.
R1
VTL VOL
R1 R2
(18.1)
R1
VTH VOH
R1 R2
It is important to note that in order for the output to change state all that is
needed is a short departure of the input voltage above or below the respective
threshold. This initiates the regenerative process that results in changing the
state.
R1 R2
vi
vo
VREF
VCC VEE
R3
Figure 18.3
R2 R1
v vi vo (18.2)
R1 R2 R1 R2
Let’s assume that the circuit is in the positive stable state with vo VOH . Then,
R R
vi VTL VREF 1 1 VOH 1 (18.3)
R2 R2
Similarly, to change the state from low to high, the input voltage must satisfy
(even for a brief moment) the following inequality:
R R
vi VTH VREF 1 1 VOL 1 (18.4)
R2 R2
18.3 Astable Multivibrator (Schmitt Trigger Clock)
When a negative feedback path consisting of a resistor R and a capacitor C is
added to the Schmitt trigger in Figure 18.2, the new circuit has no stable state.
The output will continuously switch between its two extremes at a rate
determined by the time constant T RC . The circuit is shown below:
R2
R1
vo
Figure 18.4
Immediately after a transition of the output to either its positive extreme ( VOH )
previous state, with its voltage approaching the new value of vo . When the
v
vo
VOH
VOH R 1
R 1+R 2 vC
0 t1 t2 t
VOL R 1
R 1+R 2
VOL
Figure 18.5
Suppose that at t 0 the output voltage is VOL , and the capacitor voltage v
has just fallen below v VOL R1 R1 R2 . The output will switch from VOL to
VOH because v v has just become positive. The capacitor voltage begins to
increase, and is given by:
R1 RCt
vC t VOH VOL VOH e t0 (18.5)
R1 R2
Substitution of t 0 shows that the above equation indeed satisfies the initial
condition vC 0 VOL R1 R1 R2 . When t , we obtain lim vC t VOH .
t
VOH R2
t1 RC ln
VOH R1 R2 VOL R1
(18.6)
t1
R1 tRC
vC t VOL VOH VOL e t t1 (18.7)
R1 R 2
At time t 2 , vC reaches vC t2 VOL R1 R1 R2 . Solving the above equation for
this condition, one gets:
VOL R2
t2 t1 RC ln
(18.8)
VOL R1 R2 VOH R1
T0 t2 t1 t1
VOL R2 VOH R2
RC ln RC ln
VOL R1 R2 VOH R1 VOH R1 R2 VOL R1
VOL R2 VOH R2
RC ln
VOL R1 R2 VOH R1 VOH R1 R2 VOL R1 (18.9)
In the special case of R1 R2 and VOL VOH , the above equation simplifies to
a function of only R and C:
T0 RC ln 9 2.2RC (18.10)
vo2
Figure 18.6
This circuit oscillates and generates a square waveform at the output of the
noninverting Schmitt trigger, vo1 , and a triangular waveform at the output of
Let the output of the bistable circuit be at VOH . A current equal to VOH R will
go into the resistor R and then on to the capacitor C, causing the output of the
integrator to linearly decrease with the slope VOH RC , as shown in the figure
below. This will continue until the integrator output reaches the lower
threshold, VTL , of the bistable circuit.
VOH
vo1 vo2 slope = RC
T1 T2 T1 T2
VOH VTH
t t
0 0
Figure 18.7
At this point the bistable circuit will switch states, its output becoming negative
and equal to VOL . At this moment the current through R will reverse direction
and its value will become equal to VOL R . The output of the integrator will
therefore linearly increase with time. This will continue until the integrator
output voltage reaches the positive threshold of the Schmitt trigger, VTH . The
Schmitt trigger switches states again, starting the new cycle.
From Figure 18.7 it is relatively easy to derive an expression for the period T0
1 1 1 VOLVOH
f0
T0 T1 T2 RC VTH VTL VOL VOH (18.13)
18.5 Summary
An op-amp comparator with hysteresis is known as a Schmitt trigger:
R2 vo
R1 VOH
vo
vi VTL 0 VTH vi
VOL
R2
R1
vo
C
R2
R
R1
vo1
vo2
Index Summary PMcL
18.6 References
Sedra, A. and Smith, K.: Microelectronic Circuits, Saunders College
Publishing, New York, 1991.
Contents
Introduction
The use of both capacitors and inductors in a circuit gives rise to an important
phenomenon – the exchange of electric and magnetic stored energy in a
sinusoidal fashion between the ideal elements without dissipation. The peak
energy stored in the elements reaches a maximum when a sinusoidal forcing
function drives the circuit into resonance at a frequency close to the natural
frequency of the circuit.
The resonance phenomenon occurs in many natural systems, and is the result
of systems being able to store energy in different ways. For example, a
pendulum, without friction, will oscillate forever once set in motion, and there
will be a continual exchange of kinetic energy (the velocity of the pendulum
mass) and potential energy (stored by virtue of the position of the pendulum in
a gravitational field) as the pendulum oscillates in a sinusoidal fashion.
19.1 Resonance
A system being driven by a sinusoidal forcing function will produce a
sinusoidal steady-state response at the frequency of the driving force. The
amplitude of the response may be larger than the forcing function when the
frequency of the driving force is near a “natural frequency of oscillation” of the
system.1 This dramatic increase in amplitude near a natural frequency is called
resonance, and we denote the frequency at which it occurs as r , which is
called the resonance frequency of the system.2
1
A natural frequency of oscillation only occurs in systems that are second-order or higher.
Even then, a large amplitude response will occur only under certain conditions.
2
This assumes that one natural frequency gives rise to one resonance frequency. Certain
topologies of circuit components can give rise to two resonance frequencies even though there
is only one natural frequency. Circuits and systems of high-order can have multiple natural
frequencies and consequently may have multiple resonance frequencies. Also, even though the
amplitude response is very large at a resonance frequency, it is not necessarily the maximum
amplitude response – it depends on how we define “response”.
n th -order
circuit
Z ( j ) (n 2)
Figure 19.1
It should be noted that the resonance condition ImZ jr 0 may not be
satisfied at any real positive frequency r . Thus, resonance is a condition
which a circuit may achieve, but only if its topology and component values
allow it.
IR IL IC
1
Is R jL jC V
Figure 19.2
1 1
Y j C (19.3)
R L
Obviously, if the impedance is to be purely resistive at resonance, then so is the
admittance. Thus, resonance occurs when:
1
r C 0 (19.4)
r L
1
r 0 (19.5)
LC
This resonance frequency is identical to the undamped natural frequency that
was defined whilst considering the step-response of the parallel RLC circuit.
1 1
Y jC
R jL
(19.6)
j RC 1 LC
2
C
j
1 j
V ZI
C 1 LC j RC
2
Is
(19.7)
R |I s|/ 2
1 pole roll-off
0
0 1 0 2
90
45
V
(°) 0 2
0 1
-45
-90
Figure 19.3
To show that the maximum response is R I s , and that this occurs at resonance,
we could take the magnitude of Eq. (19.7), differentiate and equate to zero to
obtain the frequencies of any relative maxima and minima, and then use these
values to obtain the magnitude of the response. However, there is a simpler
way.
At the resonance frequency, therefore, the voltage across the parallel circuit is
simply RI s , and we can see that the source current goes through the resistor.
However, there is also a current in L and C, since there is a voltage across
them:
RI
I Lr
j r L (19.8)
I Cr jr CRI
I Cr I Lr (19.9)
Although the height of the response curve depends only upon the value of R,
the width of the curve or the steepness of the sides depends upon the other two
element values also. The width of the response curve is most easily expressed
when we introduce a very important parameter, the quality factor Q.
i
IC
iR
iL
iC
IR V
t
I s = I R+ I L + I C
IL + IC
< r
IL
i
IC iR iL iC
IR V
t
I s = I R+ I L + I C
IL + IC = 0
= r
IL
IC
i
IL + IC iR
I s = I R+ I L + I C iC
iL
IR V
t
IL
> r
Figure 19.4
The constant 2 is put into the definition in order to simplify the more useful
expressions for Q that occur in the study of second-order systems.
For the parallel RLC circuit, energy is only lost in the resistor. We can
therefore express Q in terms of the instantaneous energy associated with each
of the reactive elements and the average power dissipated in the resistor:
Q 2
wL t wC t max
(19.11)
PRT0
We will apply this definition and determine the value of Q at the resonance
frequency r 0 , which is denoted by Q0 . We select the forcing function:
2 2
wC t 12 Cv cos 2 0t
CR
2 Im (19.14)
2
2
1 t
wL t 12 Li 12 L vdt
2
L
L 0
R 2 I m2 CR 2 I m2
sin 0t
2
sin 2 0t
20 L2
2 (19.15)
CR 2 I m2
wL t wC t (19.16)
2
and this constant value must also be the maximum value.
In order to find the energy lost in the resistor in one period, we take the average
power absorbed by the resistor:
PR 12 RI m2 (19.17)
RI m2
PRT0 (19.18)
2 f0
CR 2 I m2 2
Q0 2 2 2f 0CR 0CR (19.19)
RI m 2 f 0
This equation holds only for the simple parallel RLC circuit.
R R C
Q0 0CR R (19.20)
X C 0 X L0 L
Each is Q0 times the source current in magnitude and they are 180 out of
phase. Thus if we apply 1 mA at the resonance frequency to a parallel resonant
circuit with a Q0 of 50, we find 1 mA in the resistor, and 50 mA in both the
inductor and capacitor. A parallel resonant circuit can therefore act as a current
amplifier (but not a power amplifier, since it is a passive network).
We have:
1 1
2 RC 2Q0 0C C
(19.22)
and thus:
0
(19.23)
2Q0
We also have:
d 02 2 (19.24)
and thus:
2
1
d 0 1 (19.25)
2Q0
19.5 Bandwidth
The “width” of the response curve for the parallel RLC circuit can be defined
more carefully and related to Q0 .
|T|
R |I|
R |I| / 2
B
0
0 1 0 2
Figure 19.5
The two half-power frequencies 1 and 2 are those frequencies at which the
power frequency. These names arise from the fact that a voltage which is 1 2
times the resonance voltage is equivalent to a squared voltage which is one-half
the squared voltage (and therefore the power) at resonance.
B 2 1 rads -1 (19.26)
B f 2 f1 Hz (19.27)
The context of the analysis or design makes the units of bandwidth clear.
PMcL Bandwidth Index
We think of this bandwidth as the “width” of the response curve, even though
the curve actually extends from 0 to .
1 1
Y j C
R L
1 1 0CR 0 R
j
R 0 0 L
(19.28)
R
1 0
1 jQ0
R 0
Thus:
Q0 1 0 1 and Q0 2 0 1 (19.29)
0 1 0 2
Solving, we have:
2
1 1
1 0 1
2Q0 2Q0
(19.30)
2
1 1
2 0 1
2Q0 2Q0
Although individually complicated, their difference provides a very simple
formula for the bandwidth:
Bandwidth defined
0 for a parallel
B 2 1 rads 1 (19.31) resonant circuit
Q0
This equation tells us that Q0 and B are inversely related, as shown below:
The inverse
relationship between
|T| B and Q0
|T| max
1.0 Low Q0 , large B
1/ 2
0.5
High Q0 , small B
0
0 0.5 1.0 1.5 2.0 0
Figure 19.6
and therefore:
0 12 (19.33)
That is, the resonance frequency is the geometric mean of the two half-power
frequencies.
2
1 1 0 B
1, 2 0 1 (19.34)
2Q0 2Q0 2
and:
1 2
0 12 (19.35)
2
That is, for high-Q circuits, each half-power frequency is located
approximately one-half bandwidth from the resonance frequency – the
resonance frequency is approximately the arithmetic mean of the half-power
frequencies.
R I jL
1
V
jC
Figure 19.7
We can derive the important equations for the series resonant circuit by using a
“dual language” on the parallel circuit. We find that resonance occurs when:
1
r 0 (19.36)
LC
which is the same as for the parallel RLC circuit. However, the quality factor at
resonance for the series RLC circuit is different:
0 L X L0 X C 0 1 L
Q0 (19.37)
R R R R C
2
1 1
1, 2 0 1 (19.38)
2Q0 2Q0
0
B 2 1 rads 1 (19.39)
Q0
0 12 (19.40)
RL
1
jC R
Y jL
Figure 19.8
ImY jr 0
1 1 (19.41)
Im jr C 0
R RL jr L
1 R jr L
Im jr C L2 0
2 2
(19.42)
R RL r L
Thus:
L
C (19.43)
RL2 r2 L2
and:
2
1 RL
r (19.44)
LC L
We note that r is less than 1 LC , but sufficiently small values of the ratio
The maximum magnitude of the input impedance is not R , and it does not
occur at r (or at 1 LC ). The proof is algebraically cumbersome, but
the theory is straightforward (set the derivative of the impedance magnitude to
zero to find relative maxima and minima, etc.).
1
L= 4 H
i v
R= 2
1
v s (t ) = cos (4 t ) V C= 8 F
di
L v vs 0
dt
dv v
iC
dt R
d 2 v L dv
LC v vs 0
dt 2 R dt
from which:
d 2v 1 dv 1 1
2
v vs
dt RC dt LC LC
1 1
0 32 4 2 rads -1
LC 1 1
4 8
R1 jC
Z jL
R 1 jC
R
jL
1 jRC
R1 jRC
jL
1 2 R 2C 2
R R 2 C
j
L
1 2 R 2C 2 1 2 R 2C 2
r R 2C
r L 0
1 r2 R 2 C 2
r L1 r2 R 2 C 2 R 2 C 0
R 2C L 1 1
r 0 and r 2 2
R 2 LC 2 LC R C
1 1
r 0 and r 4 rads -1
2
2 2
1 1 1
4 8 8
I j V
1
1 0° V 2 - j2
=4
By nodal analysis:
1 V V V
j 2 j2
from which:
2 2
V 2 45
1 j 245
and:
1 V 1 2 1 j 1 j 1 j 1 j
I 10
j j j 1 j
So:
and:
it cos4t
wL t Li t cos 2 4t
1 2 1
2 8
cos 2 x
1
1 cos 2 x
2
the total stored energy is:
wL t wC t
1
1 cos 8t 1 1 cos8t 90
16 16
2 cos 8t sin 8t
1
16
1
16
2 2 cos 8t 45
and this has a maximum value of:
wL t wC t max
1
16
2 2 J
The power dissipated by the resistor is:
2
1 V 12 1
PR W
2 R 22 2
and the energy lost in a period is:
2 1 2
PRT0 PR J
r 2 4 4
Thus the Q0 of the circuit is:
Q0 2
1 162 2 1 1
1.707
4 2
R jL
1
Vi Vo
jC
Figure 19.9
In this case the frequency response is given by the voltage divider rule:
T j
Vo
Vi
1 j C
R jL 1 jC
1 LC
1 LC 2 jR L (19.45)
Noting that 0 1 LC and Q0 0 L R for the series RLC circuit, this can be
written as:
02
T j 2
0 2 j 0 Q0
(19.46)
This has the form of a second-order lowpass frequency response – it passes low
frequencies but attenuates high frequencies.
The magnitude
02
T j
response of a
lowpass second-
(19.47)
2 2
Q0
order frequency 2 2
response 0 0
The magnitude and phase functions are plotted below for Q0 1.25 :
Typical magnitude
and phase
responses of a p = 0 1-(1/2 Q02 )
lowpass second-
order frequency |T|
Q0
response (V/V)
1
-40 dB / decade
0
0 0
T 0
(°) All Q0
-90
-180° asymptote
for all Q0
-180
0 0
Figure 19.10
The peak of the frequency response does not correspond to the resonance
frequency 0 (nor does it have any relation with d , which arises in the
description of the time-domain natural response). To obtain the peak of the
frequency response, we find the relative maximum in the usual way.
u 0
2
(19.49)
T j
1 1
1 u Gu
(19.50)
u Q
2 2
0
where:
G u 1 u u Q02
2
(19.51)
u 1 Q 2 u 1
2 2
0
d
du
Gu 2u 1 Q02 2 0 (19.52)
1
up 1 (19.53)
2Q02
Thus, the frequency at which the magnitude response reaches a peak is:
1
p 0 1 , Q0 1 2
2Q02 (19.54)
p 0, Q0 1 2
Notice that the peak response always occurs before the resonance frequency for
the lowpass response, and we approach p 0 for high Q0 (say Q0 5 ).
We can also see that a relative peak will not occur in the magnitude response if
Q0 1 2 (for then p is an imaginary quantity!). In this case, the absolute
T j p
Q0
, Q0 1 2
1 1 2Q0
2
(19.55)
T j p 1, Q0 1 2
19.8.2 Bandwidth
The bandwidth of the lowpass RLC circuit is the difference between the two
half-power frequencies on each side of the peak frequency:
|T|
|T ( jp)|
|T ( jp)|
2 1
0
0 1 p 2
Figure 19.11
B 2 1 rads -1 (19.56)
T j1, 2
2
1
T j p
2
(19.57)
2
However, as will be seen, the relative peak in the magnitude response only
occurs when Q0 1 2 0.7071 , and when this is the case the peak is only
T j
1 1
2
2
Gu u 1 Q02 2 u 1 (19.58)
T j p
2 Q02
1 1 2Q0
2
(19.59)
so we have:
T j1, 2
2
1 1 2Q Q 2 2
1
0 0
T j p
(19.60)
2
u 1 Q 2 u 1
2 2
0 2
u 2 1 Q02 2 u 1 2 1 1 2Q0
2
Q 2
0 0 (19.61)
2
1 1 1
u1, 2 1 2
1 (19.62)
2Q0 Q0 2Q0
1 u10
(19.63)
2 u 2 0
B 2 1 u2 u1 0 (19.64)
For high Q0 (say Q0 5 ), we can simplify this result in the following way.
Firstly:
1
u1, 2 1 (19.65)
Q0
1 x 1 1
1
2
1 x x2 (19.66)
2 8
we can approximate the u terms with the first two terms from the series:
B u2 u1 0
1 1
1
Q
1
Q 0
0 0
1 1
1 1 0
2Q0 2Q0
0
Q0 (19.67)
The lowpass circuit in this case exhibits bandpass behaviour, and it is debatable
whether we should still call it a lowpass filter. However, since the circuit still
passes low frequencies down to DC (but at levels which are below half-power),
the circuit is still classified as a lowpass filter. Perhaps the best name would be
a “lowpass filter with band enhancement”.
B 2 u2 0
2
1 1 1 (19.68)
0 1 1
2Q02 Q0 2Q0
|T|
|T ( jp)|
|T ( jp)| 1
2
0
0 p 2
Figure 19.12
In a manner similar to the derivation for Case I, we can show that the
bandwidth is given by:
2
1 1
B 0 1 1
2Q 2
1 (19.69)
2Q02 0
|T|
1
1
2
0
0 B
Figure 19.13
Figure 19.14
The asymptotic Bode magnitude plot decreases at the rate of -40 dB / decade,
and this is sometimes described as two-pole rolloff. Note the symmetry in the
phase response around -90. Do you know why?
1
jC
Vi jL Vo
Figure 19.15
T j
Vo
Vi
jL
R jL 1 jC
2
1 LC 2 jR L (19.70)
Noting that 0 1 LC and Q0 0 L R for the series RLC circuit, this can be
written as:
2
T j 2
0 2 j 0 Q0
(19.71)
The magnitude
2
T j
response of a
highpass second-
(19.72)
2 2
Q0
order frequency 2 2
response 0 0
The magnitude and phase functions are plotted below for Q0 1.25 :
Typical magnitude
and phase
responses of a p = 0
highpass second- 1-(1/2 Q02 )
order frequency |T|
response Q0
(V/V)
1
0
0 0
T 180
All Q0
(°)
90
0° asymptote
for all Q0
0
0 0
Figure 19.16
0
p , Q0 1 2
1
1 (19.74)
2Q02
p , Q0 1 2
Notice that the peak response always occurs after the resonance frequency for
the highpass response, and we approach p 0 for high Q0 (say Q0 5 ).
T j p
Q0
, Q0 1 2
1 1 2Q0
2
(19.75)
T j p 1, Q0 1 2
19.9.2 Bandwidth
If there is a relative peak in the magnitude response, then the two half-power
frequencies are the same as for the lowpass case (the circuit exhibits bandpass
behaviour) and the bandwidth is thus:
B 2 1 u2 u1 0 (19.76)
02
TLP Lowpass
02 2 j 0 Q0
j 0 Q0
TBP
2 j 0 Q0
2 Bandpass
0
2
THP
02 2 j 0 Q0
Highpass
02 2
TBS 2
0 2 j 0 Q0
Bandstop
“notch”
02 2 j 0 Q0
TAP
02 2 j 0 Q0
Allpass
19.11 Summary
Resonance is a phenomenon that only occurs in 2nd-order or higher circuits,
and even then, only under certain conditions. It occurs when the forcing
function drives the circuit near one of its natural frequencies of oscillation.
1
r 0
LC
R R C
parallel Q0 0CR R
X C 0 X L0 L
0 L X L0 X C 0 1 L
series Q0
R R R R C
B 2 1 rads -1 or B f 2 f1 Hz
For a lowpass RLC circuit, if there is only one half-power frequency then
the bandwidth is equal to it (the formulae above apply with f1 1 0 ).
19.12 References
Hayt, W. & Kemmerly, J.: Engineering Circuit Analysis, 3rd Ed., McGraw-
Hill, 1984.
Exercises
1.
Find 0 and Q0 for a parallel resonant circuit in which:
(a) C 1 4 μF , L = 4 H, R 20 k .
2.
Let vs t 100 cos0t V in the circuit shown below:
10 k
i1 i2 i3
vs 40 k 50 mH 1.25 F v( t )
(a) Find the equivalent parallel RLC circuit and then determine
0 , Q0 and vt .
(c) Calculate the average power loss in the 10 k resistor and the maximum
energy stored in the inductor.
3.
Find the resonance frequency of the circuit shown:
10
0.2 H 25
500 F
4.
Consider the circuit shown below:
400 H 20 k
1 0° mV 100 pF 80 k V0
Find:
5.
A parallel RLC circuit used in a radio frequency (RF) amplifier is intended to
have an impedance magnitude of 5 k at resonance, 0 107 rads -1 , and
6.
In the series RLC circuit shown below:
100 pF
i 50
7.
Find the effective values of 0 and Q0 for the network shown below:
0.1 H
0.1 F vC
20 0.04vC
8.
Determine reasonably accurate values of r and Q0 for the resonant circuits
shown below:
250
0.1 0.15 1 k
2 mH
2 mH 20 F 20 F
(a) (b)
9.
A series RLC circuit has an impedance of 10 j 40 at 100 rads -1 . After it
is scaled in magnitude and frequency by the same factor (i.e. km k f ), it is
E
B
E
t
B 0
E
B J
t
From these he was able to predict that there should exist electromagnetic waves
which could be transmitted through free space at the speed of light. The
revolution in human affairs wrought by these equations and their experimental
verification by Heinrich Hertz in 1888 is well known: wireless
communication, control and measurement - so spectacularly demonstrated by
television and radio transmissions across the globe, to the moon, and even to
the edge of the solar system!
James Maxwell was born in Edinburgh, Scotland. His mother died when he
was 8, but his childhood was something of a model for a future scientist. He
was endowed with an exceptional memory, and had a fascination with
mechanical toys which he retained all his life. At 14 he presented a paper to the
Royal Society of Edinburgh on ovals. At 16 he attended the University of
Edinburgh where the library still holds records of the books he borrowed while
still an undergraduate – they include works by Cauchy on differential
equations, Fourier on the theory of heat, Newton on optics, Poisson on
3
It was Oliver Heaviside, who in 1884-1885, cast the long list of equations that Maxwell had
given into the compact and symmetrical set of four vector equations shown here and now
universally known as “Maxwell's equations”. It was in this new form ("Maxwell redressed," as
Heaviside called it) that the theory eventually passed into general circulation in the 1890s.
We can scarcely avoid the conclusion that light consists in the transverse
undulations of the same medium which is the cause of electric and magnetic
phenomena.
Maxwell’s famous account, “A Dynamical Theory of the Electromagnetic
All the mathematical
Field” was read before a largely perplexed Royal Society in 1864. Here he sciences are
founded on relations
brought forth, for the first time, the equations which comprise the basic laws of between physical
laws and laws of
electromagnetism. numbers, so that the
aim of exact science
Maxwell also continued work he had begun at Aberdeen, on the kinetic theory is to reduce the
problems of nature
of gases (he had first considered the problem while studying the rings of to the determination
of quantities by
Saturn). In 1866 he formulated, independently of Ludwig Boltzmann, the operations with
kinetic theory of gases, which showed that temperature and heat involved only numbers. – James
Clerk Maxwell
molecular motion.
Maxwell was spending an evening with Sir William Grove who was then
engaged in experiments on vacuum tube discharges. He used an induction
coil for this purpose, and found the if he put a capacitor in series with the
primary coil he could get much larger sparks. He could not see why. Grove
knew that Maxwell was a splendid mathematician, and that he also had
mastered the science of electricity, especially the theoretical art of it, and so
he thought he would ask this young man [Maxwell was 37] for an
explanation. Maxwell, who had not had very much experience in
experimental electricity at that time, was at a loss. But he spent that night in
working over his problem, and the next morning he wrote a letter to Sir
William Grove explaining the whole theory of the capacitor in series
connection with a coil. It is wonderful what a genius can do in one night!
Maxwell’s letter, which began with the sentence, “Since our conversation
yesterday on your experiment on magneto-electric induction, I have considered
it mathematically, and now send you the result,” was dated March 27, 1868.
Preliminary to the mathematical treatment, Maxwell gave in this letter an
unusually clear exposition of the analogy existing between certain electrical
and mechanical effects. In the postscript, or appendix, he gave the
mathematical theory of the experiment. Using different, but equivalent,
symbols, he derived and solved the now familiar expression for the current i in
such a circuit:
di 1
L Ri idt V sin t
dt C
The solution for the current amplitude of the resulting sinusoid, in the steady-
state is:
V
I
2
1
R L
2
C
from which Maxwell pointed out that the current would be a maximum when:
1
L
C
When creating his standard for electrical resistance, Maxwell wanted to design
a governor to keep a coil spinning at a constant rate. He made the system stable
by using the idea of negative feedback. It was known for some time that the
governor was essentially a centrifugal pendulum, which sometimes exhibited
“hunting” about a set point – that is, the governor would oscillate about an
equilibrium position until limited in amplitude by the throttle valve or the
travel allowed to the bobs. This problem was solved by Airy in 1840 by fitting
a damping disc to the governor. It was then possible to minimize speed
j
fluctuations by adjusting the “controller gain”. But as the gain was increased,
the governors would burst into oscillation again. In 1868, Maxwell published
his paper “On Governors” in which he derived the equations of motion of s -plane
engines fitted with governors of various types, damped in several ways, and
explained in mathematical terms the source of the oscillation. He was also able
to set bounds on the parameters of the system that would ensure stable
operation. He posed the problem for more complicated control systems, but
thought that a general solution was insoluble. It was left to Routh some years
later to solve the general problem of linear system stability: “It has recently
come to my attention that my good friend James Clerk Maxwell has had
difficulty with a rather trivial problem…”.
The Cavendish laboratory was opened in 1874, and Maxwell spent the next 5
years editing Henry Cavendish’s papers.
References
Contents
Introduction
With the advent of op-amps and circuit miniaturization, engineers developed
what is known as a universal filter. It’s frequency response takes the form of a
biquadratic equation, and so it is also known as a biquad. Depending on the
connections made and the point at which the output is taken, the universal filter
can deliver lowpass, highpass, bandpass, bandstop (notch) and allpass
responses. It is one of the most useful circuits to the electrical engineer and is
widely available.
We begin with the RLC circuit shown below, which has the now familiar form
of a voltage-divider circuit.
R jL
1
Vi Vo
jC
Figure 20.1
T j
Vo 1 LC
(20.1)
Vi 1 LC 2 jR L
This result can be put into a standard form by noting that 0 1 LC and
02
T j 2
0 2 j 0 Q0
(20.2)
The two parameters 0 and Q0 uniquely specify the standard form of the 0 and Q0
uniquely specify a
second-order frequency response. second-order
frequency response
since we can identify many kinds of circuits with the parameter Q0 . We can
R jL
1 0
Vi Vo
jC Vi
Q0
Vo
Figure 20.2
Standard form of a
H02
lowpass second-
T j 2
0 2 j 0 Q0
order frequency
(20.3)
response with gain
Standard form of a
H
T j
normalised lowpass Vo
1 2 j 1 Q0 Vi
second-order (20.4)
frequency response
with gain
We can manipulate this equation so that it has a form that can be identified
with simple circuits we have seen before. We first rewrite Eq. (20.4) as:
Dividing by j j 1 Q0 , it becomes:
1 H
1 o
V Vi
(20.6)
j j 1 Q0 j j 1 Q0
1 H 1
Second-order
Vo Vo Vi 1 frequency response
(20.7)
made from first-
j j j 1 Q0 order parts
The (–1) term can be realised by an inverting circuit of gain 1. The factor
1 j 1 Q0 is realised by a “lossy” inverting integrator. Two operations are
indicated by the remaining factor. The circuit realisation must produce a sum
of voltages, and it must have a frequency response of the form 1 j .
The three circuits that provide for these three operations are shown below:
The three first-order
circuits that make a
1 second-order circuit
1
1
1
vo
1
vi 1 Q0
1/H
Figure 20.3
1 1
1/H Q0
vi 1
1
vo
Figure 20.4
There are many circuits that implement biquadratic frequency responses. The
Tow-Thomas circuit is one of them, the Kerwin-Huelsman-Newcomb (KHN)
circuit is another. For brevity, we will simply refer to the Tow-Thomas biquad
circuit as “the biquad”.
C1 C2
R2
R1
vi R2 R4
R3
vo
Figure 20.5
1 R1R3C1C2
T j The biquad’s
1 R3 R5C1C2 2 j 1 R4C2
(20.8) frequency response
1
0 (20.9)
R3 R5C1C2
R42C2 The biquad’s design
Q0 (20.10) equations
R3 R5C1
R5
H (20.11)
R1
An important property of the biquad is that it can be orthogonally tuned. Using The biquad can be
the above equations, we can devise a tuning algorithm: orthogonally tuned
affecting either 0 or Q0 .
1
1 mF 1 mF
1
0.5
vi 1 0.866
1
vo
Figure 20.6
10 k
100 nF 100 nF
10 k
5 k
vi 10 k 10 k 8.66 k
vo
Figure 20.7
The normalised
Tow-Thomas
1
universal filter
1 1
1 Q0
1
vo
R1 R2 C3
vi
Figure 20.8
Vo 1 R1 C3 2 j 1 R2
1 2 j 1 Q0
(20.12)
Vi
numerator vanish, leaving only the 2 term. Writing this result we have:
The universal
2 biquad circuit can
T j implement a
1 2 j 1 Q0
(20.13) highpass second-
order frequency
response
Table of design
Design Values
values for a
Filter Type R1 R2 C3
universal filter
Lowpass 1H 0
Bandpass Q0 H 0
Highpass H
Notch 0 n H
2
H
Allpass 1H Q0 H H
The UAF42
universal filter from HP Out BP Out LP Out
Texas Instruments R F1 R F2
12 13 8 7 14 1
R1
50 k
R2 C1 C2
50 k
2
1 nF 1 nF
50 k
RG A1 A2 A3
v i
3
R4
50 k
RQ
UAF42
11
Figure 20.9
Index The Universal Biquad Circuit PMcL
Approximating the
ideal lowpass filter
|T| Small error
1 Brick wall
n-pole rolloff
0
0 1
Figure 20.10
The method we will use in the approach to this problem is illustrated below:
We achieve the
approximation to the
ideal lowpass filter
by cascading
|T|
1.5
|T1 |
Brick wall
1.0 |T2 |
|T3 |
0.5
Vi T1 T2 T3 Vo
Figure 20.11
We will connect modules in cascade such that the overall frequency response is
of the form given in Figure 20.10. For the example in Figure 20.11, large
The cascaded
circuits have the values of T1 are just overcome by the small values of T2 and T3 to achieve
same 0 but
the approximation to the brick wall. The frequency responses have the same
different Q0
value of 0 , but different values of Q0 . Determining the required values of Q0
is a part of filter design.
Tn j
1 The Butterworth
magnitude response
1 0
2n
(20.14)
defined
The normalised
Tn j
1 Butterworth
(20.15)
1 2n magnitude response
1. Tn j 0 1 for all n.
3. Tn j has all derivatives but one equal to zero near 0 . The response
1
Stephen Butterworth was a British engineer who described this type of response in connection
with electronic amplifiers in his paper “On the Theory of Filter Amplifiers”, Wireless Eng.,
vol. 7, 1930, pp. 536-541.
Butterworth lowpass
magnitude
responses 1.0
0.9
0.8
0.7
0.6
n =1
|Tn( j )| 0.5
0.4 2
0.3
6 4
0.2
8
0.1
10
0
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Figure 20.12
n
2 3 4 5 6 7 8 9 10
Table of Q0 for 0.707 1.000 0.541 0.618 0.518 0.555 0.510 0.532 0.506
Butterworth filters 1.307 1.618 0.707 0.802 0.601 0.653 0.561
1.932 2.247 0.900 1.000 0.707
2.563 2.879 1.101
3.196
Note: For n odd, there is an additional first-order factor with a cutoff frequency
at 0 1 .
From Table 20.2, for n 5 the required values of Q0 are 0.618 and 1.618.
Figure 20.13
Each second-order block could be realised using the biquad circuit. The first-
order circuit can be realised with a simple buffered RC circuit. If we use the
circuit of Figure 20.4 for the biquad, then we must frequency scale using
k f 1248 . We then perform magnitude scaling to achieve practical element
values.
The Butterworth response is not the only response that can be used to
approximate the ideal brickwall filter. Other common responses are the
Chebyshev response, inverse Chebyshev response and Cauer (or elliptic)
response. Each has their advantages and disadvantages.
20.6 Summary
The universal biquad circuit is a ready-made module which provides a
variety of second-order frequency responses – lowpass, highpass, bandpass,
notch or allpass.
Butterworth filters are easily designed using a table of Q0 values and can
be implemented as a cascade of first-order and second-order circuits.
20.7 References
Huelsman, L. P.: Active and Passive Analog Filter Design, McGraw-Hill,
Singapore, 1993.
Exercises
1.
Consider the circuit shown below:
R
Vo
2R R
Vi1
2R 1
Vi2
j C
1 1
Vo Vi1 Vi 2
jCR jCR
(b) Show that the use of this circuit in the lowpass biquad circuit permits us to
reduce the number of op-amps by one.
2.
(a) Design a lowpass second-order filter with 0 10 000 , Q0 5 and H 2
using 1 nF capacitors.
3.
Derive the frequency response of the so-called Sallen-Key circuit:
2Q0
1 1
vi
vo
1
2Q0
This can be used instead of the biquad as a single op-amp lowpass second-
order circuit.
4.
Derive the frequency response of the so-called Friend circuit:
1
2Q0
2
4 Q0
1
vi
vo
1
2Q0
This can be used instead of the biquad as a single op-amp bandpass second-
order circuit.
21 Complex Frequency
Contents
Introduction
We have analysed circuits with DC sources and sinusoidal sources – DC can be
considered a special case of a sinusoidal source (one that has zero frequency).
We have also seen that sinusoids are made up of exponentials with imaginary
exponents, and that the exponential function plays a special and key role in the
determination of the natural response of circuits.
It is only natural, then, to try and extend our study of circuits to a more general
class of exponential functions – specifically to complex exponential functions,
which then include DC, exponential, and sinusoidal functions as special cases.
The only difference is that the exponent is real in one case, and imaginary in
the other. Since t must be dimensionless, we define to be a “frequency”.
s j (21.6)
f t Kest (21.7)
where K and s are complex constants (independent of time). We say that the
function is characterised by the complex frequency s . For example, a constant
voltage V0 may be declared in the required format as:
vt 12 Vm e j t e j t
12 Vme j e jt 12 Vm e j e jt (21.11)
K1es1t K 2es 2t
of the second term is s s2 j . Thus, s1 s*2 and the two values of K are
12 Vm e j e j t 12 Vm e j e j t
vt 5e 2t s 2 j 0
s1 3 j 6
vt 4e 3t sin 6t 10
s 2 s1 3 j 6
*
s 5 j 0 f t Ke5t (21.15)
s1 j10
f t A cos10t (21.16)
s 2 j10
s1 3 j5
f t Ae 3t cos5t (21.17)
s 2 3 j5
vt Re Vmet e j t (21.19)
Collecting factors:
vt Re Vme j e j t (21.20)
vt Re Vme j est (21.21)
vt Re Vme j e jt (21.22)
The only difference is that we now have s where we previously had j . Thus,
our approach will be to develop a frequency-domain description of the
exponentially varying sinusoid in exactly the same way as we did for the
undamped sinusoid: omit the Re notation and suppress est .
then we expect the forced response, say a current in some branch of the circuit,
to be:
where the complex frequency of the source and the response must be identical.
i (t ) 2 3H
v( t ) 0.1 F
We first express the forcing function as the real part of a complex function:
vt Re Vest
where:
V 6010 and s 2 j 4
After dropping the Re, we are left with the complex forcing function Vest . In a
similar manner, we represent the unknown response by the complex quantity
Iest where I I m .
idt vt
di 1
dt C
Ri L
and we substitute the given complex forcing function and the assumed complex
forced response:
10 st
2Iest 3sIest Ie 6010est
s
10
2I 3sI I 6010
s
and:
6010
I
2 3s 10 s
The left side of this equation is a current. On the right, the numerator is a
voltage, and so the denominator must be interpreted as an impedance.
6010
I
2 3 2 j 4 10 2 j 4
I 5.37 106.6
We will consider the inductor, and then state the relationships for the other
elements, since the derivations are similar.
dit
vt L (21.25)
dt
After applying the complex voltage and current equations, we obtain:
d st
Vest L Ie (21.26)
dt
Taking the indicated derivative:
V sLI (21.28)
I
and the admittance is:
Ys
I 1
(21.30)
V sL
i I
v=L di L V=s L I sL
dt
time-domain frequency-domain
Figure 21.1
L sL
C 1
sC
If we now reconsider the series RLC example in the frequency domain, the
source voltage:
V 6010
I 2 -6+ j 12
10
60 10° = -1- j2
-2+ j 4
s =-2+ j 4
The phasor current is now easily found by dividing the phasor voltage by the
sum of the three impedances:
6010 6010
I 5.37 106.6 A
2 6 j12 1 j 2 5 j10
Thus, the previous result is obtained, but much more easily and rapidly.
I R
Vs sL
The phasor voltage Vs Vs 0 is applied, and the response is the phasor
current I . The forced response is:
Vs
I
R sL
Vs
I
R jL
Vs
I
R 2 L2
2
L
I tan 1
R
These are the analytical expressions for the magnitude and phase angle of the
response as a function of – we can now present the same information
graphically.
For the magnitude curve, we note that we are plotting the absolute value of
some quantity and so the entire curve lies above the axis. The response is
Vs R at zero frequency, and the response approaches zero as frequency
approaches infinity. We graph both positive and negative values of frequency:
|I |
Vs / R magnitude of
Vs
I ( j ) =
R+ j L
0
- 2R -R R 2R
L L L L
The second part of the response, the phase angle of I versus , is an inverse
tangent function:
90°
angle of
Vs
I ( j ) = R+ j L
2R R 0 R 2R
- L -L L L
-90°
1
Is V sL sC
V Is
sL 1 sC I sL
sL 1 sC s LC 1
s 2
V jL 1
Z j
I s LC 1
2
C 1 LC
2
1
Z
C 0 0
Such frequencies are called critical frequencies, and their early identification
simplifies the construction of the response curve. We note that the response has
zero amplitude when 0 . When this happens we say that the response has a
zero at 0 , and we also describe the frequency at which it occurs as a zero.
A response of infinite amplitude is noted at 0 and 0 . These
frequencies are called poles, and the response is said to have a pole at each of
these frequencies. Finally, we note that the response approaches zero as
, and thus is also a zero (it is customary to consider plus
infinity and minus infinity as being the same point).
| Z|
2
0C
1
0C
- 2 0 -0 0 0 2 0
90°
- 2 0 -0 0 0 2 0
-90°
I R
Vs sL
The phasor voltage Vs Vs 0 is applied, and the response is the phasor
current I . The forced response is:
Vs
I
R sL
Vs
I
R L
of must all provide positive amplitude responses, and the response must
decrease as get larger. Finally, as , we have a zero-amplitude
response, and therefore a zero. The only critical frequencies are the pole at
R L and the zero at .
|I |
Vs
R
0
-R
L
vs Vs eRt L (21.31)
we get an infinite response. Why? The forcing function has a familiar form – it
is the same form as the natural response of the circuit. We know that if we have
a source-free circuit, then the response due to an initial current would be:
i I 0e Rt L (21.32)
We also have:
i s I s e t v C
1 1 RC
V ZI R I s RI s
C
We can now identify the poles and zeros of the response from the form of the
equation – it indicates a pole at 0 and a zero at 1 RC .
|V |
RIs
0
- 1
RC
The reason for the pole at zero frequency may again be explained on physical
grounds. If I s 0 , then the current source is an open-circuit and the response
i (t ) 6 1H
t
100 e V 0.2 F
100
I 100
6 5 1 5
The response curve is most easily found by first indicating the locations of all
poles and zeros on the axis, and placing vertical asymptotes at the poles. We
can then seek out relative minima and maxima, and make a sketch of the
response:
|I |
-5 -1 0
The two poles may again be used to construct the natural response:
in t A1et A2e5t
2
R R 1
s1, 2
2L 2L LC
3 3 2 5
1 and 5
Im s
s = + j
j
0 Re s
complex plane
Figure 21.2
j
s -plane
Figure 21.3
The origin, for example, must represent a DC quantity. Points lying on the
axis must represent exponential functions, decaying for 0 , increasing for
0 . Pure sinusoids are associated with points on the positive or negative
j axis. Points in the left half-plane (LHP) describe the frequencies of
exponentially decreasing (or damped) sinusoids. The RHP contains points
describing exponentially increasing sinusoids.
Ys
1
s3
infinite, the magnitude of Ys must be zero. The model must have zero height
at points infinitely far away from the origin. A cut-away view of the magnitude
of Ys is shown below:
1
The graph of the
0.8 magnitude of Ys
over the s-plane
0.6
forms a surface with
|Y|
poles and zeros
0.4
0.2
0
-6
10
-4 5
0
-2
-5
0 -10
j
We can completely specify Ys , apart from a constant gain factor, by drawing
a so-called pole-zero plot:
j
A pole-zero plot is a
-3
shorthand way of
representing a
complex function
s -plane of s
One cut of the surface has been fortuitously placed along the imaginary axis. If
we graph the height of the surface along this cut against , we get a picture of
the magnitude of the frequency response versus :
The frequency
|Y|
1/3 magnitude ofresponse is
obtained from the
1 j-axis of a plot of a
Y( ) =
3+ j function over the
entire s-plane
0
We can obtain a mental image of the surface that represents the magnitude of a
function over the s-plane quite quickly if we imagine a rubber sheet model. At
zeros, we secure the rubber sheet to the plane (tent pegs). At poles, we prop the
rubber sheet up with infinitely high and thin poles.
j
-1+ j 5
-2
s -plane
-1- j 5
0.8
0.6
|Z|
0.4
0.2
0
-10
10
8
-5 6
4
2
0 0
j
We can build up the expression for Zs which leads to this pole-zero
configuration. The zero requires a factor of s 2 in the numerator, and the
two poles require the factors s 1 j5 and s 1 j5 in the denominator.
Except for a multiplying constant k, we now know the form of Zs :
s2
Zs k
s 1 j5s 1 j5
s2
k 2
s 2s 26
The plots Z versus and Z versus may be obtained exactly from
this expression, but the general form of the function is apparent from the pole-
zero configuration and the rubber-sheet analogy. Portions of these two curves
appear at the sides of the 3D model above.
s 0 Q0 s
(21.35) order response
2 2
0 function
the poles are located on a circle of radius 0 and at an angle with respect to the
p* - j 0
Figure 21.4
In terms of the poles shown in Figure 21.4, the response function is:
02
Underdamped
Vo
lowpass second-
s p s p
Vi (21.36) order response
function using pole
factors
j p m1 1 and j p m2 2
Polar representation
of the pole factors
(21.37)
Magnitude function
02
T j
written using the
Vo
polar representation
of the pole factors
(21.38)
Vi m1m2
T j 1 2
written using the
polar representation (21.39)
of the pole factors
Determining the
magnitude and
j j j
phase response
m1 j 2
from the s-plane
m1
p p j 0 p
1
m1 1 1
j 1
m2 m2 m2
2 2 2
p* p* p*
|T| T
Q0 1 0 2
0
1
-90 º
-180 º
0 1 0 2
Figure 21.5
Index Visualization of the Frequency Response from a Pole-Zero Plot PMcL
Figure 21.5 shows three different frequencies – one below 0 , one at 0 , and
one above 0 . From this construction we can see that the short length of m1
near the frequency 0 is the reason why the magnitude function reaches a peak
near 0 . These plots are useful in visualising the frequency response of the
circuit.
21.8 Summary
Complex frequency is defined as s j .
conjugate pair: f t Ke st K *e s t .
*
1
ZR R , Z L sL , ZC
sC
21.9 References
Hayt, W. & Kemmerly, J.: Engineering Circuit Analysis, 3rd Ed., McGraw-
Hill, 1984.
Exercises
1.
Find the complex frequencies associated with the natural response of a source-
free series RLC circuit in which L 10 H , C 250 μF , and R :
2.
(b) Find the phasor corresponding to it 2e 5t 3 cos 50t 2 sin 50t mA .
3.
Consider the circuit shown below:
1 1H i (t )
vs 1F 1H
(a) v s 10 V
(b) vs 10 cos2t V
4.
Consider the circuit shown below:
5
vs 2H 20 is
If vs 20e 4t cos 3t V , while is 3e 3t cos 4t A , find the energy stored in the
inductor at t 0 .
5.
Consider the circuit shown below:
0.1 F
is v 2 k 1 k 0.2 F
Find all the critical frequencies of the ratio V I s , and graph the magnitude of
6.
One of the critical frequencies of the impedance of a series RLC circuit occurs
at s 4 j10 s -1 . If the minimum impedance magnitude is 100 ,
determine:
7.
The pole-zero plot of an input impedance displays a zero at s 50 and poles
at s 20 j30 .
(a) Determine the magnitude and angle of each vector from a critical frequency
to the point s j 20 .
8.
In 1945, Dr Hendrik W. Bode published Network Analysis and Feedback
Amplifier Design, codifying in one classic book the filter and feedback-
amplifier theory upon which much of the electronics industry still relies.
One of the many results his seminal work revealed was the constant-resistance
network:
R1 R2
L1 C2
Zin
Show that, as long as you let R1 R2 and scale the components such that the
time constant L1 R1 equals the time constant R2 C 2 , then the impedance of the
whole circuit remains constant at all frequencies, and is equal to R1 .
22 Specialty Amplifiers
Contents
Introduction
There are several popular types of specialty amplifiers, or amplifiers that are
based in some way on op-amp techniques. In an overall application sense, they
are not generally used as universally as op-amps. Examples of specialty
amplifiers include difference amplifiers, instrumentation amplifiers,
programmable gain amplifiers (PGAs) and isolation amplifiers. These will be
looked at briefly because they are used in the important areas of data
acquisition and distribution systems and embedded systems.
In addition, there are many other types of amplifiers such as audio and video
amplifiers, cable drivers, high-speed variable gain amplifiers and various
communication-related amplifiers.
vid /2
vid = vi2 vi1
vicm = 1 (vi1 + vi2)
2
vicm vid /2
Although the ideal difference amplifier will amplify only the differential input
signal vid and reject completely the common-mode signal vicm , practical
where Ad denotes the amplifier differential gain and Acm denotes its common-
mode gain (ideally zero). One measure of a differential amplifier’s
performance is the degree of its rejection of common-mode signals in
preference to differential signals. This is usually quantified by a measure
known as the common-mode rejection ratio (CMRR), defined as:
Ad
CMRR 20 log10 dB (22.2)
Acm
R2
R1
v i1
R3
v i2
vo
R4
Analyzing a
difference amplifier
using superposition R2 R2
R1 R1
v i1
vo1 vo2
R3
v i2
R3 R4 R4
(a) (b)
R2
vo1 vi1 (22.3)
R1
R2 R4 R
vo 2 1 vi 2 2 vi 2 (22.4)
R1 R3 R4 R1
Thus:
R2
vi 2 vi1 R2 vid Ad vid
The differential gain
vo (22.5) of a difference
amplifier
R1 R1
ii R1
v id R1
ii
Another drawback is that it is not easy to vary the differential gain, since we
need to maintain the resistors in the ratio R4 R3 R2 R1 .
R5
10 k 6
A2 vo
(1%)
A1
R3 R4
100 k 10 k
3
v+ IN
INA146
4 1 8
V- vo 1
R2 R3
RG A3
R2 R3 vo
R4
A2
v i2
0V A2 vo2
v i2
The analysis shows that the gain of the in-amp is given by:
Note that this formula is only valid for perfect op-amps and matched resistors.
In this case, there is no output component due to the common-mode voltage,
and so the common-mode gain is Acm 0 . Real in-amps have CMRRs ranging
from 90 to 130 dB, i.e. the common-mode gain is around a million times
smaller than the differential gain!
The in-amp gain can be set by the user by selecting the external RG .
In-amp gain can also be preset via an internal RG by pin selection (again
isolated from the signal inputs). Typical in-amp gains range from 1 to 1000.
The internal resistors are trimmed so that standard 1% or 0.1% resistors can be
used to set the gain to popular values, such as 2, 5, 10, …, 200, 500, 1000.
voltage appears at the negative input terminals of A1 and A2 , causing the The in-amp has a
very high CMRR
current through RG to be zero. Thus there will be no current in the R2
resistors, and the voltages at the output terminals of A1 and A2 will be equal to
the input (i.e. vicm ). Thus the first stage does not amplify vicm , it simply
propagates vicm to its two output terminals where they are subtracted to
Another important feature of the in-amp is that the internal resistance network
and RG are isolated from the signal input terminals.
From Figure 22.7, we can see that for the in-amp to “work”, the sum of the
common-mode voltage and the signal voltage at the outputs of A1 and A2 must
fall within the amplifier output voltage range. Otherwise, one of these op-amps
will saturate and the output of the difference amplifier will not be proportional
to the differential voltage.
AD705 AGND
20 k
The in-amp is ideally suited for this application because the bridge output is
fundamentally balanced, and the in-amp presents it with a truly balanced high
impedance load.
Full scale output voltages from a typical bridge circuit can range from
approximately 10 mV to several hundred mV. Typical in-amp gains in the
order of 100 to 1000 are therefore ideally suited for amplifying these small
voltages to levels compatible with popular analog-to-digital (ADC) input
voltage ranges (usually 1 V to 10 V full scale).
Transducers however, have a very wide range of output voltages. High gain is
needed for a small sensor voltage, but with a large output, a high gain will
cause the amplifier or ADC to saturate. So, some type of predictably
controllable gain device is needed.
Such a device has a gain that is controlled by a digital input. This device is
known as a programmable gain amplifier, or PGA. Typical PGAs may be
configured either for selectable decade gains such as 10, 100, 1000, etc., or
they might also be configured for binary gains such as 1, 2, 4, 8, etc.
A PGA is usually located between a sensor and its ADC, as shown below:
A PGA’s location in
a system
gain
control
sensor
digital
PGA ADC output
Thus, a digital processor can combine PGA gain information with the digital
output of the ADC to increase its resolution. Some ADCs have on-chip PGAs.
1 12 +5 V
1 k
2 3 G= 1
8 13 +15 V 10 k
0-5 V GAIN 7 6 G= 10
CONTROL
9 4 -15 V 1 k
10 11 G= 100
16 5 100
15 14 G 1000
ADG1412 11
Examples include the need to prevent the ignition of explosive gases by sparks
at sensors and the protection from electric shock of patients whose ECG or
EEG is being monitored. In the ECG case, protection may be required in both
directions: the patient must be protected from accidental electric shock, but if
the patient’s heart should stop, the ECG machine must be protected from the
very high voltages (> 7.5 kV) applied to the patient by the defibrillator which
will be used to attempt to restart it.
High voltage
AC Input = 230 V
INPUT OUTPUT
FB
T1
+15 V
-IN DEMOD
Motor control +IN
MOD
FILTER
vo
0.1 RG AD620
current sensing
REF COM i COM o
using an analog -15 V
3-port isolator –
providing power, +Viss T2 POWER T3 +Voss
input and output INPUT
POWER
OUTPUT
POWER
isolation M -V iss SUPPLY SUPPLY
-V oss
POWER
OCILLATOR
AD210
PWR COM PWR
+15 V
The input of the AD210, being isolated, can be directly connected to a 230 V
power line without protection being necessary. The input section’s isolated
±15 V powers the AD620, which senses the voltage drop in a small value
current sensing resistor. The AD210 input stage op-amp is simply connected as
a unity-gain follower. The 230 V RMS common-mode voltage is ignored by
this isolated system.
425 10 k
VDD1 VDD2 (5 V)
(5 V)
CMOS
A digital isolator
GATE
IIN IOUT v OUT using a LED and
v IN phototransistor
The availability of low cost digital isolators solves most system isolation
problems in data acquisition systems as shown below:
ISOLATION BARRIER
DIGITAL MICRO-
Practical application
SENSOR ADC
ISOLATORS CONTROLLER of digital isolation in
a data acquisition
system
In this system, digitizing the signal first using an ADC with serial output, then
using digital isolation, eliminates the problem of analog isolation amplifiers
(which are expensive).
22.6 Summary
The two signals that appear at the inputs of difference amplifiers can be
split into a common-mode signal and a differential signal. This aids in
calculating the output of a difference amplifier, and gives rise to a measure
of difference amplifier performance, known as the common-mode rejection
ratio, or CMRR. It is usually expressed in dB.
22.7 References
Jung, W: Op-Amp Applications, Analog Devices, 2002.
Exercises
1.
Consider the instrumentation amplifier implementation shown below:
v i1
vo1 R3 R5
A1
10 k 10 k
R1
RG 100 k
A3 vo
1 k R2
100 k
R4 R6
A2
vo2 10 k 10 k
v i2
(c) The following voltages are applied to the in-amp: vi1 230 mV ,
(d) What value of RG must be used to change the gain of the in-amp to
1000?
2.
Consider the two-op-amp instrumentation amplifier shown below:
v i1
A1 vo
R4
40 k
RG R3
16 k 10 k
R2
10 k
A2
v i2
R1
40 k
Determine the value of the overall differential voltage gain Ad of the in-amp.
23 Transfer Functions
Contents
Introduction
In any particular circuit, the phasor ratio of the desired forced response to the
forcing function, written in terms of the complex frequency s, is called the
transfer function. Thus, a transfer function is an input-output description of the
behaviour of a circuit, and it does not include any information concerning the
internal structure of the circuit and its behaviour (we have already seen that the
RLC circuit can be replaced by a biquad circuit utilising op-amps – both have
the same input-output behaviour within certain bounds).
The transfer function will also be seen to hold information about the form of
the circuit’s natural response. Thus, given a transfer function of a circuit, we
can write down an expression for the natural response by inspection. If we are
given a forcing function and the initial conditions, we can then determine the
complete response.
We shall also see that circuits are not special – we can model any system
described by linear differential equations (e.g. mechanical, hydraulic,
electrical, thermal, fluid) with block diagrams.
vs ( t ) C v( t )
Figure 23.1
We can find the forced response of this circuit by working in the frequency-
domain (if the source has a functional form that we can transform to the
frequency-domain, such as an exponentially damped sinusoid). Then we have:
1 sC 1 RC
V Vs Vs (23.1)
R 1 sC s 1 RC
A transfer function is the ratio of the desired forced response to the forcing
function, using phasor notation and the complex frequency s. It is usually
designated Ts :
Ts
V
(23.2)
Vs
With this notation, we can see that the transfer function is a complex function
of the complex variable s . Thus, in this case, we have:
Ts
1 RC
(23.3)
s 1 RC
Several important conclusions can be drawn from the form of the transfer
function.
PMcL Transfer Functions Index
Roots of the characteristic equation give us the poles of the transfer function. In
this case there is one pole at s 1 RC j 0 . Zeros are obtained by finding
those frequencies for which the transfer function is zero. In this case, there is a
zero at s . When plotting poles and zeros, we normally don’t show poles
and zeros at infinity, and so the pole-zero plot corresponding to this particular
transfer function is:
j
-1
RC
s -plane
Figure 23.2
This pole-zero plot conveys exactly the same information as the transfer
function, apart from the multiplicative factor 1 RC . For example, from the plot
K
above we know the transfer function has the form . In many instances,
s 1 RC
just the form of the transfer function tells us a lot about the circuit’s behaviour,
so engineers make a lot of use of pole-zero plots.
The form of a transfer function is such that it can always be written as a ratio of
two polynomials. The numerator polynomial can be factored into m “zero”
terms, the denominator can be factored into n “pole” terms.
Ts K
s z1 s z 2 s z m
s p1 s p 2 s p n
(23.4)
The number of pole terms determines the order of the circuit. For our simple
example RC circuit, we have a first-order circuit, since there is one pole. There
are no zeros (except for the implicit one at s ).
Some of the poles in the transfer function may occur as complex conjugate
pairs. For example, if the first two pole terms are complex conjugates, then the
transfer function can be written as:
Ts K
s z1 s z 2 s z m
s p1 s p1* s p n
s z1 s z 2 s z m
(23.5)
K 2
s p1 p1* s p1p1* s p n
If we let p1 x jy then p1* x jy , then p1 p1* 2 x and p1p1* x 2 y 2 ,
both of which are real quantities. Thus, if we define the real numbers a 2 x
and b x 2 y 2 , then the transfer function can be written as:
Ts K
s z1 s z 2 s z m
s2 as bs pn (23.6)
Returning to the original circuit, we can do KVL around the loop and write the
describing differential equation in the form:
dv v v
s (23.7)
dt RC RC
or, using the D operator:
1 vs
D v (23.8)
RC RC
1 1
s V Vs (23.9)
RC RC
We now get:
Ts
V 1 RC
(23.10)
Vs s 1 RC
vs ( t ) C v( t )
Vs 1/RC V
s 1/RC
Figure 23.3
The representation of a circuit in terms of its input signal, transfer function and
output signal is known as a block diagram. The block diagram is a concept that
is used often across all disciplines of engineering, and can be applied to any
linear system, not just electrical circuits. It is a way to characterize a system
without resorting to writing differential equations – instead we represent a
system by its transfer function and work with input and output phasors. The
only drawback to this approach is that we must work with algebraic equations
involving complex numbers – but most of us would prefer this to solving
differential equations!
That is, the output phasor representing the forced response is given by:
Ts s0
1 RC
1 (23.12)
s 1 RC s0
Ts s j
1 RC
s 1 RC s j
1 RC
j 1 RC
1
, 0 1 RC
1 j 0 (23.14)
V f Ts s j Vs
1
Vm
1 j 0
Vm
1 j 0 (23.15)
0.01 F
0.2 H
is (t ) v1(t) 1 3 v2(t)
100
0.2 s s
Is V1 1 3 V2
and, using the current-divider rule, we write down the transfer functions:
V2
T2 s 3
1 15s
2
Is 4 0.2s 100 s s 20s 500
15 0
V2 T2 0I s 0.20 0
0 20 0 500
2
Thus, the output voltage for a DC current source is zero, as can be seen by
inspection of the circuit – the capacitor acts as an open circuit.
15
V2 T2 I s
15 s
0.20 0.20 0
1 20 s 500 s 2
1 20 500 2
Thus, the output voltage for an infinitely high frequency source (say a
sinusoidal source) is zero, as can be seen by inspection of the circuit – the
inductor acts as an open circuit.
15 10
V2 T2 10I s 0.20 0.075
10 2
20 10 500
Thus v2 t 0.075e10t . Note that this is a forced response due to the forcing
V2 T2 j10I s
15 j10
0.20
j10 2
20 j10 500
j3
0.20
8 j4
0.0670863.4
Lastly, let s 10 j 20 . Then since we are exciting the system at the same
frequency as a pole, the response must be infinite.
Ts s j
1
, 0 1 RC (23.17)
1 j 0
T j
1
1 0
2
(23.18)
T j tan 1 0
100
0.2 s s
Is V1 1 3 V2
we can use the transfer function to establish the frequency response quite
quickly. For example, we know:
T2 s
15s
s 20s 500
2
15 j
T2 j
j
20 j 500
2
j15
500 2 j 20
15
T2 j
500 2 2
400 2
20
T2 j 90 tan 1 2
500
1 RC
V Vs
s 1 RC
1 RC
0
s 1 RC (23.19)
At first glance, it appears as though the response phasor must be zero. This is
true for most frequencies, but what happens when the forcing function happens
to be at a complex frequency s 1 RC j 0 ?
Vs
V (23.20)
0
So we conclude that if we “excite” the circuit at the same frequency with a zero
voltage, that we get a finite response. Mathematically, we have:
0
V
0
V 0 0
finite 0 0 (23.21)
Thus, the natural response must occur at frequencies corresponding to the poles
of the transfer function.
Vn A at s 1 RC j 0 (23.22)
vn t Ae t RC (23.23)
Ts K
s z1 s z 2 s z m
s p1 s p 2 s p n
(23.24)
f n t A1e p1t
B1ebt B2te bt B2t 2ebt
(23.25)
C1e1t cosd 1t D2e1t sin d 1t
E1 E2t e 2t cosd 2t F1 F2t e 2t sin d 2t
or, in words:
100
0.2 s s
Is V1 1 3 V2
V2
T2 s 3
1 15s
2
Is 4 0.2s 100 s s 20s 500
Consideration of either transfer function will determine the form of the natural
response. First, we find the poles by setting the denominator to zero, and thus
obtain the roots by solving the characteristic equation:
s 2 20s 500 0
s 102 400 0
s 10 j 20
Thus, we have two complex and distinct poles. The form of the natural
response for either v1 t or v2 t is thus:
To evaluate A and B, we need to know the initial conditions and the forcing
function.
Note that the denominators of the two transfer functions in the preceding
example are the same. This is not a coincidence. Provided that one portion of a
circuit is not separated from the rest, each transfer function will have the same
denominator regardless of which voltage or current is chosen as the output
variable. This should not be surprising however, for the denominator (via the
characteristic equation) determines those values of s, called poles or natural
frequencies, that determine the natural response – and the form of the natural
response is the same throughout a nonseparated circuit.
If the natural response is desired for a circuit that contains no forcing function,
then we can insert any source we like into the circuit, evaluate the transfer
function, and then determine the natural response by inspection of the poles.
If the circuit already contains a source, then we are allowed to set it to zero,
apply a forcing function in a more convenient location, and then determine the
poles from the resulting transfer function.
These methods will work since the poles of the transfer function are a
characteristic of the circuit only, and not of the forcing function – we will
obtain the same poles for any of the many source locations that are possible –
apart from two special cases:
3F
v1(t) 1 2F 1
2
v2(t)
Firstly, note that this is not a single time constant (STC) circuit, since we
cannot reduce the circuit further. We thus need to investigate this circuit by
examination of a transfer function.
Let us install a current source I s in parallel with the 1 resistor, and find the
We have:
Is 3s 2I s
V1 2
1 2s 6s 3s 2 6s 13s 2
V 1 s 2
Ts 1 2 3
I s s 2s 16
v1 t Ae 2t Be t 6
The solution is completed by using the given initial conditions to establish the
values of A and B. Since v1 0 is given as 11, then:
11 A B
dv1 i 11 22
C 2 A 1 6 B
dt t 0 C 2
v1 t 8e2t 3et 6
v2 t 12e2t et 6
complete forced
natural (23.27)
response response response
The transfer function can be used to give us both the forced response and
natural response, and therefore the complete response!
1
3
F
t=0 2
i(t )
vC1
vs ( t ) 1
vC2 1F
2
= e -tcos(2t)
The switch is in an open position prior to t 0 , and thus all currents and
voltages to the right of the switch are assumed to be zero. At t 0 the switch is
closed, and the current through the switch is to be found. This response is
composed of both a forced response and a natural response:
it i f t in t
We have:
Vs ss 2Vs
I
2 3 s 1 s 2 2ss 2 3s 2 s
ss 2
Ts
I
Vs 2s 1s 3
I f Ts s 1 j 2 Vs
1 j 21 j 2 1 5
2 j 22 j 2 j81 j
and thus:
5 2
If 45
16
i f t e cos2t 45
5 2 t
16
The form of the natural response can be written by inspection of the poles of
the transfer function:
in t Ae t Be 3t
The solution is completed by using the given initial conditions to establish the
values of A and B. Since the voltage across both capacitors is initially zero, the
initial source voltage of 1 V must appear across the 2 resistor. Thus:
i0
1 5 2 1
A B
2 16 2
di 5 2 2 1
A 3B
dt t 0 16 2 2
15
A 3B
16
The initial value of this rate of change is obtained by analysing the circuit.
However, those rates of change which are most easily found are the derivatives
of the capacitor voltages, since i C dv dt , and the initial values of the
capacitor currents should not be too difficult to find. KVL around the circuit
gives:
2i vs vC1 vC 2
The first term on the right-hand side is obtained by differentiation of the source
function and evaluation at t 0 , the result is 1 2 As-1 .The second term is
numerically equal to 3 2 of the initial current through the 1 3 F capacitor, or
di 1 3 1 3
dt t 0 2 4 4 2
We may now use our two equations in A and B to determine the unknown
coefficients of the natural response:
A 0 and B 3 16
23.6 Summary
A transfer function is the ratio of the desired forced response to the forcing
function, using phasor notation and the complex frequency s. It is usually
designated Ts .
s z 1 s z 2 s z m
Ts K
s p1 s p 2 s p n
where z i is termed a zero and p j is termed a pole.
The transfer function can be used to determine the forced response phasor –
by evaluating it at the complex frequency of the forcing function and
multiplying the resultant complex number by the input phasor.
23.7 References
Hayt, W. & Kemmerly, J.: Engineering Circuit Analysis, 3rd Ed., McGraw-
Hill, 1984.
Exercises
1.
The capacitors in the circuit shown below carry charge at t 0 .
250 k
i1 i2
1 F v 50 k 8 F
2.
Find vt for all values of time in the circuit shown below:
12
i s(t) t=0 v( t ) 3 2H 6H
= e -tcos(2t)
3.
Find it for all values of time in the circuit shown below:
t=0 10 0.8 H
i
12 V 2 0.1 H
4.
Consider the circuit shown below:
2.5i 2
5 2
1
2 H 0.1 F v2
i2
Determine:
(c) The transfer function V2 Vs1 , if Vs1 is in series with the inductor with its
positive reference on top.
5.
Consider the following circuit:
1 0.5 H 1
i (t )
2 u (t ) V vs 0.8 F 0.5 H
(a) Write the transfer function for I Vs and find the three natural
frequencies (possibly complex) associated with the response i t .
6.
There is no initial energy stored in the following circuit:
L R2
i2(t )
vs R1 C
(a) Transform the circuit into the s-domain and formulate mesh-current
equations.
Laplace was the son of a farmer of moderate means, and while at the local
military school, his uncle (a priest) recognised his exceptional mathematical
talent. At sixteen, he began to study at the University of Caen. Two years later
he travelled to Paris, where he gained the attention of the great mathematician
and philosopher Jean Le Rond d’Alembert by sending him a paper on the
principles of mechanics. His genius was immediately recognised, and Laplace
became a professor of mathematics.
In 1784 Laplace was appointed as examiner at the Royal Artillery Corps, and
in this role in 1785, he examined and passed the 16 year old Napoleon
Bonaparte.
If man were restricted to collecting facts the sciences were only a sterile
nomenclature and he would never have known the great laws of nature. It is
in comparing the phenomena with each other, in seeking to grasp their
relationships, that he is led to discover these laws...
The first volume of the Mécanique Céleste is divided into two books, the first
on general laws of equilibrium and motion of solids and also fluids, while the
second book is on the law of universal gravitation and the motions of the
centres of gravity of the bodies in the solar system. The main mathematical
approach was the setting up of differential equations and solving them to
describe the resulting motions. The second volume deals with mechanics
applied to a study of the planets. In it Laplace included a study of the shape of
the Earth which included a discussion of data obtained from several different
expeditions, and Laplace applied his theory of errors to the results.
After the publication of the fourth volume of the Mécanique Céleste, Laplace
continued to apply his ideas of physics to other problems such as capillary
action (1806-07), double refraction (1809), the velocity of sound (1816), the
theory of heat, in particular the shape and rotation of the cooling Earth
(1817-1820), and elastic fluids (1821).
Many original documents concerning his life have been lost, and gaps in his
biography have been filled by myth. Some papers were lost in a fire that
destroyed the chateau of a descendant, and others went up in flames when
Allied forces bombarded Caen during WWII.
Contents
Introduction
A sensor is a device that receives a signal or stimulus and responds with an
electrical signal. Sensors and their associated circuits are used to measure
Sensors translate a
physical quantity to various physical properties such as temperature, force, pressure, flow, position,
an electrical quantity
light intensity, etc. These properties act as the stimulus to the sensor, and the
sensor output is conditioned and processed to provide the corresponding
measurement of the physical property.
Sensors which measure different properties may have the same type of
electrical output. For example, a Resistance Temperature Detector (RTD) is a
variable resistance, as is a resistive strain gauge. Both RTDs and strain gauges
are often placed in bridge circuits, and the conditioning circuits are therefore
quite similar. Therefore bridges and their conditioning circuits will be looked at
in detail.
The full-scale outputs of most sensors are relatively small voltages, currents, or
resistance changes, and therefore their outputs must be properly conditioned
before further analog or digital processing can occur. Amplification, level
translation, galvanic isolation, impedance transformation, linearization and
filtering are fundamental signal-conditioning functions that may be required.
24.1 Sensors
There are many types of sensors – we will briefly look at those which lend
themselves to measurement systems, data acquisition systems and process
control systems.
Some typical sensors and their output formats are shown in the table below:
Some typical
Property Sensor Active / Output sensors and their
output formats
Passive
SENSOR ADC
PC or MICRO-
PROCESS
SCADA CONTROLLER
ACTUATOR DAC
A Programmable
Logic Controller
(PLC)
SENSOR ADC
MICRO- HUMAN
PROCESS SCADA
CONTROLLER INTERFACE
ACTUATOR DAC
SIGNAL
CONDITIONING
to other PLCs
PLC
A smart transducer
Smart Transducer
Digital
PHYSICAL MICRO- NETWORK Communication
PROCESS
TRANSDUCER CONTROLLER INTERFACE System
Sensor element resistance can range from less than 100 to several hundred
Resistive elements
form the basis for k , depending on the sensor design and the physical environment to be
many types of
physical measured. The table below shows the wide range of sensor resistances used in
measurements
bridge circuits.
Rather than trying to measure the sensor output directly, a bridge circuit is
often used. The ability to balance the bridge initially (and zero the output, v o )
is a significant advantage of the bridge, since it is much easier to measure small
changes in voltage vo from a null voltage than from an elevated voltage v o ,
R1 R2
vo VB (24.1)
1
R R4 R2 R3
For sensor applications, the deviation of one or more of the resistors in a bridge
from an initial value is measured as an indication of the change in the measured
variable. In this case, the output voltage change is an indication of the
resistance change. Since very small resistance changes are common, the output
voltage change may be as small as tens of millivolts, even with an excitation
voltage of VB 10 V (a typical value).
vo vo vo vo
R R+ R R R+ R R R+ R
R- R R+ R
VB R VB R VB R R
vo : VB
4 R+ 2R 2 R+ 2R 2 R R
Note that since the bridge output is always directly proportional to VB , the
measurement accuracy can be no better than that of the accuracy of the
excitation voltage.
In each case, the value of the fixed bridge resistor R is chosen to be equal to
the nominal value of the variable resistor(s). The deviation of the variable
resistor(s) about the nominal value is assumed to be proportional to the
quantity being measured, such as strain (in the case of a strain gauge), or
temperature (in the case of an RTD).
The all-element varying bridge (D) produces the most signal for a given
resistance change, and is inherently linear. It is also an “industry-standard”
configuration for load cells constructed from four identical strain gauges.
Load cells – bridge
elements are “strain
gauges” arranged in
a particular
orientation
RG
VB R
IN AMP
vo = R GAIN
REF 4 R+ 2
R R+ R -VS
The in-amp provides a large and accurate gain that is set with a single resistor,
RG . The in-amp also provides dual, high-impedance loading to the bridge
nodes – it does not unbalance or load the bridge. Using modern in-amps with
gain ranging from 10-1000, excellent common-mode rejection and gain
accuracy can be achieved with this circuit.
However, due to the intrinsic characteristics of the bridge, the output is still
nonlinear. In a system where the output of the in-amp is digitized using an
ADC and fed into a microcontroller, this nonlinearity can be corrected in
software.
The bridge in this example is voltage driven, by the voltage VB . This voltage
can optionally be used for an ADC reference voltage, in which case it is an
additional output of the circuit, VREF .
VB R R2
R R vo = 1+
2 R R1
vo
R+ R R R2
R1
The top node of the bridge is excited by the voltage VB . The bottom of the
bridge is driven in complementary fashion by the left op-amp, which maintains
a constant current of VB R in the varying resistance element, R R , which is
the mechanism for linearity improvement. Also, the bridge left-side centre
node is “ground-referenced” by the op-amp, making this configuration
suppress common-mode voltages.
The output signal is taken from the right-hand leg of the bridge, and is
amplified by a second op-amp connected as a noninverting gain stage.
IB RG IN AMP
R
vo = IB GAIN
REF 2
R R+ R -VS
+VS
IB
R SENSE
-VS
VREF
This circuit uses an op-amp, a sense resistor, and a voltage reference, set up in
a feedback loop containing the sensing bridge. The net effect of the loop is to
maintain a constant current through the bridge of I B VREF RSENSE . The
Wiring resistance and noise pickup are the biggest problems associated with
remotely located bridges. The figure below shows a 350 strain gauge which
is connected to the rest of the bridge circuit by 30 m of twisted pair copper
wire. The temperature coefficient of the copper wire is 0.385 %/°C. The figure
shows nominal resistor values at 25 C .
Wiring resistance is
a big problem for
remotely located +10 V
bridges
350 350
R LEAD
10.5 (10.904 )
vo
0 23.45 mV Strain Gauge
350 (5.44 mV 28.84 mV)
350 353.5 FS
R LEAD
R COMP 10.5 (10.904 )
21
The full-scale variation of the strain gauge resistance above its nominal 350
value is +1% ( 3.5 ), corresponding to a full-scale strain gauge resistance of
353.5 which causes a bridge output voltage of +23.45 mV. Notice that the
addition of the 21 resistor, RCOMP , is used to compensate for the wiring
resistance and balances the bridge when the strain gauge is 350 .
The three-wire method works well for remotely located resistive elements
which make up one leg of a single-element varying bridge. However, four-
element varying bridges are generally housed in a complete assembly, as in the
case of a load cell. When these bridges are remotely located from the
conditioning electronics, special techniques must be used to maintain accuracy.
vo
R LEAD
-SENSE R LEAD
-FORCE R LEAD
In this setup the drive voltage VB is not applied directly to the bridge, but goes
instead to the input of the upper precision op-amp, which is connected in a
feedback loop around the bridge (+) terminal. Although there may be a
substantial voltage drop in the +FORCE lead resistance of the remote cable, the
op-amp will automatically correct for it, since it has a feedback path through
the +SENSE lead. The net effect is that the upper node of the remote bridge is
maintained at a precise level of VB . A similar situation occurs with the bottom
precision op-amp, which drives the bridge (-) terminal to ground level. Again,
the voltage drop in the –FORCE lead is relatively immaterial, because of the
sensing at the –SENSE terminal.
Index Bridge Circuits PMcL
-SENSE R LEAD
-VREF
GND
-FORCE R LEAD
The Analog Devices AD7730 Bridge Transducer ADC can be driven from a
single supply voltage of 5 V, which in this case is used to excite the bridge.
Both the analog input and the reference input to the ADC are high impedance
and fully differential. By using the +SENSE and –SENSE outputs from the
bridge as the differential reference voltage to the ADC, there is no loss in
measurement accuracy as the actual bridge excitation voltage varies.
Measurement Sensor
Strain Strain gauge, Piezoelectric transducer
Force Load cell
Pressure Diaphragm to force to strain gauge
Flow Differential pressure techniques
Table 24.3 – Sensors used for Typical Measurements
FORCE
FORCE
The strain gauge is normally mounted so that as much as possible of the length
of the conductor is aligned in the direction of the stress that is being measured.
Lead wires are attached to the base and brought out for interconnection.
Very high gain is usually required to convert the output signal of these sensors
into a usable voltage. For example, a photodiode application typically needs to
detect outputs down to 30 pA of current, and even a gain of 106 will only yield
30 mV. To accurately measure photodiode currents in this range, the bias
current of the op-amp should be no more than a few picoamps. A high
performance JFET-input op-amp is normally used to achieve this specification.
Special circuit layout techniques are required for the signal conditioning
…require special
interfacing circuits circuitry. For example, circuit layouts on a printed circuit board (PCB)
typically need very short connections to minimise leakage and parasitic
elements. Inputs tend to be “guarded” with ground tracks to isolate sensitive
amplifier inputs from voltages appearing across the PCB.
In most cases, because of low-level and/or nonlinear outputs, the sensor output
must be properly conditioned and amplified before further processing can
occur. Sensor outputs may be digitized directly by high resolution ADCs –
linearization and calibration can then be performed in software, reducing cost
and complexity.
Thermistors have the most sensitivity, but are also the most nonlinear. They are
popular in portable applications for measurement of battery and other critical
system temperatures.
24.10 Summary
A sensor is a device that receives a signal or stimulus and responds with an
electrical signal. The full-scale outputs of most sensors are relatively small
voltages, currents, or resistance changes, and therefore their outputs must
be properly conditioned before further analog or digital processing can
occur.
There are many types of sensors – their use in a certain application requires
an understanding of their physical construction and operation, as well as the
required performance and cost demanded by the overall system.
24.11 References
Jung, W: Op-Amp Applications, Analog Devices, 2002.
Exercises
1.
For temperature measurements only one active transducer is used and so it is
not possible to have a linear output if it is placed in a bridge.
(a) Show that the output from a single-element varying bridge is given by:
VB R
vo
4 R R
2
(b) Since the active transducer resistance change can be rather large (up to
100% or more for RTDs), the nonlinearity of the bridge output
characteristic (the formula above) can become quite significant. It is
therefore desired to linearize the output of a temperature transducer using
the following circuit:
R 2+ R
R1
VB
vo
R1
R2
25 System Modelling
Contents
Introduction
In order to understand, analyse and design complex systems, we must obtain
quantitative mathematical models of these systems. Since most systems are
dynamic in nature, the descriptive equations are usually differential equations.
If the system stays “within bounds”, then the equations are usually treated as
linear differential equations, and the method of transfer functions can be used
to simplify the analysis.
In practice, the complexity of systems and the ignorance of all the relevant
factors necessitate the introduction of assumptions concerning the system
operation. Therefore, we find it useful to consider the physical system,
delineate some necessary assumptions, and linearize the system. Then, by
using the physical laws describing the linear equivalent system, we can obtain
a set of linear differential equations. Finally, utilizing mathematical tools, such
as the transfer function, we obtain a solution describing the operation of the
system.
In summary, we:
6. Reanalyse or design.
K
f
Friction Mass y
M
r (t )
Force
This is described by Newton’s second law of motion (this system could
represent, for example, a car’s shock absorber). We therefore obtain:
d2y dy
M 2
f Ky r
dt dt
where K is the spring constant of the ideal spring and f is the friction constant.
r (t ) R L C v( t )
dv v 1
dt R L
C vdt r
In order to reveal the close similarity between the differential equations for the
mechanical and electrical systems, we can rewrite the mechanical equation in
terms of velocity:
dy
v
dt
Then we have:
dv
M fv K vdt r
dt
The equivalence is immediately obvious where velocity vt and voltage vt
are equivalent variables, usually called analogous variables, and the systems
are analogous systems.
The concept of analogous systems is a very useful and powerful technique for
system modelling. Analogous systems with similar solutions exist for
electrical, mechanical, thermal and fluid systems. The existence of analogous
systems and solutions allows us to extend the solution of one system to all
analogous systems with the same describing differential equation.
y mx b
(25.2)
y0 y mx0 mx b
y
y=f ( x)
tangent
y0
operating point
0 x0 x
Figure 25.1
y f x0 x f x0 x
df
(25.3)
dx x x0
The tangent to the curve at the operating point is a good approximation to the
curve for small x . Thus, for a small region about the operating point, a
reasonable first-order approximation of the element is:
y f x0 x
df
y0 mx (25.4)
dx x x0
y mx (25.5)
This linear approximation is only accurate for a range of small signals which
depends on the actual nonlinear element’s characteristic.
Index Linear Approximations of Physical Systems PMcL
Length L
Mass M
T MgL sin
where g is the gravity constant. The equilibrium position for the mass is
0 0 . The nonlinear relation between T and is shown graphically below:
2 2
T MgL
d
sin 0
d 0
d
s (25.6)
dt
Similarly, integration in the time-domain turns into division by s in the
frequency-domain.
t 1
0
d
s
(25.7)
d2y dy
M 2
f Ky r
dt dt
Ms 2 Y fsY KY R
Y 1
R Ms fs K
2
vs ( t ) C v( t )
Vs 1/RC V
s 1/RC
Figure 25.2
The block diagram for the simple spring-mass-damper mechanical system is:
R 1 Y
2
M s + f s +K
A block represents
multiplication with a
transfer function X Y
G ( s)
Figure 25.3
Blocks can be connected in cascade, but only if the outputs are “buffered”, i.e.
the connection does not cause the transfer function of each individual block to
be different from the “unloaded” or open condition:
Cascading blocks
implies multiplying
the transfer
functions X Y= G1X Z= G1G2 X
G 1( s ) G 2( s )
Figure 25.4
Addition and
subtraction of
signals in a block X Z= X+ Y X Z= X - Y
diagram
Y Y
Figure 25.5
Index Block Diagrams PMcL
R
vi
vo
Vo Z 1 sC
2
Vi Z1 R
Vi -1 Vo
s RC
Thus, an integrator circuit has a 1 s term in its transfer function. This makes
intuitive sense, since multiplication by s represents differentiation, and so
division by s must be representative of integration.
RF
R2
v2
CF
R1
v1
vo
V2 1 I2
R2
V1 1 I1 -1/CF Vo
R1 s + 1/R FCF
K p
1 z
1 K
Vi
Vo
Vi s +z Vo
-K s +p
Armature
Ra
La
Rf
ia
vf Lf
Inertia = J
if Friction= f
Field
Load
Tm K mi f
The motor torque is delivered to the load, which can also be subjected to
external disturbances (e.g. wind-gust forces for a tracking antenna):
TL Tm Td
The load torque for a rotating system with inertia and friction comes from the
rotational form of Newton’s second law:
d d
TL J f ,
dt dt
The blocks are derived from the differential equations governing the various
parts of the system. The block diagram of a field-controlled DC motor is
therefore:
disturbance
torque
Td
Vf Km
s (R f + s L f) (f +s J )
25.5 Feedback
Perhaps the most important block diagram is that of a feedback connection,
shown below:
Standard form for
the feedback
connection
R E C
G ( s)
H ( s)
Figure 25.6
To find the closed-loop transfer function, we solve the following two equations
which are self-evident from the block diagram:
C G s E
E R Hs C
(25.8)
C G s R G s Hs C
C1 G s Hs G s R
(25.9)
and therefore:
Transfer function for
C G s the standard
negative feedback
R 1 G s Hs
(25.10) connection
Note that for negative feedback we get 1 GsHs and for positive feedback
Negative and
positive feedback
negative feedback positive feedback
1+ GH 1- GH
Figure 25.7
vi
A vo
R2
R1
The voltage fed back to the inverting terminal is negative feedback. Let the
proportion of the voltage fed back be given by:
R1
v o v o
R1 R2
Vi Vo
A
Vi A Vo
1+A
For large values of A such that A 1 , the transfer function reduces to:
1 R2
1
R1
25.6 Summary
We model linear time-invariant systems by making necessary simplifying
assumptions before applying the basic physical laws. The result is a linear
differential equation describing the system.
Ts
G
1 GH
25.7 References
Dorf, R.: Modern Control Systems, 5th Ed., Addison-Wesley, 1989.
Exercises
1.
Consider the following circuit:
RF
R1
R5
C1
R3 C5
v in1 R0
-1 R2 R4
A1
A2
v out1 A3 v out3
v7 R7 R6
v8 R8
A4 v out4
R3 R0 R2 R4 C1C5
T1 s
1 1 R3 1
s 2 s
1 1
R C R5 5
C 2 4 F 1 5
R R R C C R1 5 1 5
R C C
K102
T1 s
s 2 2s 02
d 02 2 , show that the poles of the transfer function are located
at p1, 2 j d where:
1 R 1
d 3
R1C1 R2 R4C1
K 2 s
T2 s
s 2s 02
2
T3 s
K 3 s 2 02 2 2
s 2 2s 02
(g) Draw pole-zero plots for each of the three transfer functions.
(h) Perform a simulation of the circuit and determine each transfer function’s
frequency response. Hence, classify each of the transfer functions in
terms of their frequency response (e.g. lowpass, highpass, notch, etc.).
26 Revision
Contents
2015 26 - Revision
26.2
Know the passive and active sign conventions and have confidence in applying
KCL and KVL to any circuit. Know and use Ohm’s Law. Know circuit
analysis short-cuts with series / parallel combinations, voltage and current
dividers. Know what parameters are used for an ideal op-amp, the concept and
application of negative feedback and the concept of the “virtual short-circuit”.
You should know the gain formulas for both noninverting and inverting
amplifiers, and be able to derive them if necessary.
Know that nodal analysis applies KCL and finds nodal voltages, whilst mesh
analysis applies KVL and finds mesh current. Know how to perform, by hand,
analysis on a three-node or three-mesh circuit composed of resistors, ideal
independent and ideal dependent sources.
26 - Revision 2015
26.3
You should be able to convert between a real voltage source and a real current
source (a special application of Thévenin’s and Norton’s Theorems). Know
when linearity applies (and does not apply), and be able to use superposition
appropriately (e.g. DC and AC sources, common-mode and differential mode).
Know how to apply Thévenin’s and Norton’s Theorems to any linear circuit,
even if it contains dependent sources.
2015 26 - Revision
26.4
Know the v-i relationships and the energy stored for C and L, and how they can
be combined in series and parallel. Know how to write nodal or mesh equations
for any circuit. Know how to perform DC analysis for any circuit.
Familiar with the fact that real components exhibit other characteristics, and we
initially study idealized forms of components. The most important nonideality
of the passive components is the resistance of the inductor windings.
Aware of the concept of duality – be able to recognise circuits that are “duals”.
Familiar with the fact that real signal diodes exhibit a 0.7 V voltage drop when
conducting, the principles of rectification and why we rectify, application of
diodes to limiting and clamping voltage signals, light emitting diodes have a
forward voltage drop different to 0.7 V (depends on the colour).
26 - Revision 2015
26.5
2015 26 - Revision
26.6
26 - Revision 2015
26.7
Know the general expression for a sinusoid, the concepts of amplitude and
phase, that a sinusoidal input yields a sinusoidal output in the steady-state
(“sinusoid in = sinusoid out”), complex forcing functions can be created from
real sinusoidal forcing functions, the concept of a phasor (visualize a rotating
phasor, and how to obtain the real part), phasor relationships for R, L and C and
the concepts of impedance and admittance.
2015 26 - Revision
26.8
Know how to apply nodal and mesh analysis to circuits in the frequency-
domain, apply superposition, source transformations, Thévenin’s and Norton’s
Theorems and draw phasor diagrams. Know the different forms of power such
as instantaneous, average, real, reactive and complex.
Familiar with the circuit models used for real amplifiers, cascading amplifiers,
efficiency, input and output impedances, ideal amplifier characteristics,
frequency response including the concepts of bandwidth and half-power, linear
amplitude and phase distortion, nonlinear distortion.
26 - Revision 2015
26.9
Know the definition of the decibel and its application to amplifier circuits, how
to cascade circuits, logarithmic scales, Bode plots, how to derive the equations
for the frequency response for first-order lowpass and highpass filters, and
sketch their responses.
Know the form of the bilinear frequency response, and be able to derive a
suitable op-amp implementation of it, how to implement lowpass and highpass
filters using cascaded op-amp circuits.
2015 26 - Revision
26.10
26 - Revision 2015
26.11
2015 26 - Revision
26.12
Know the concept of the differential and common-mode signals, and why we
split signals up in this way. Know the difference amplifier and its limitations.
Aware of the existence of other types of amplifier, which are based on the op-
amp, such as the instrumentation amplifier which is suited to specific
applications, such as those found in data acquisition and distribution systems.
26 - Revision 2015
26.13
Know the concept of the transfer function, how to find the forced response and
natural response from it.
2015 26 - Revision
26.14
26 - Revision 2015
M.1
Definitions
Symbol Description
aij Element of a matrix. i is the row, j is the column.
a11 a12 a13 A is the representation of the matrix with elements
A a21 a22
a23 aij aij .
Multiplication
Multiplication Description
Z kY Multiplication by a scalar: zij kyij
z Ax n
Multiplication by a vector: zi aij x j
j 1
Z AB n
Matrix multiplication: zij aik bkj .
k 1
Linear Equations
Terminology Description
a11x1 a12 x2 a13 x3 b1 Set of linear equations written explicitly.
a21x1 a22 x2 a23 x3 b2
a31x1 a32 x2 a33 x3 b3
a11 a12 a13 x1 b1 Set of linear equations written using matrix elements.
a a23 x2 b2
21 a22
a31 a32 a33 x3 b3
Ax b Set of linear equations written using matrix notation.
x A 1b Solution to set of linear equations.
Eigenvalues
Equations Description
Ax x are the eigenvalues. x are the column eigenvectors.
A I 0 Finding eigenvalues.
Answers
1.1
(a) To the left (b) 300e 100t mA (c) 4.055 ms (d) 0.3820 A/mm2
q i
(mC) (mA)
3 300
1.8963
110.4
t (ms) t (ms)
(e) 0 10 20 30 40 0 10 20 30 40
1.2
(a) 10 µC (b) 10 µC (c) 12.71 mA
1.3
(a) 975 C (b) 383 C
1.4
(a) 31.1 kC (b) 48 W (c) 373 kJ (d) 24.9 W
1.5
8.0 C
1.6
(a) 120.8 V (b) 8.453 kW (c) 754.0 W/mm2
1.7
(a) 10 V (b) 5 A (c) 50 W
1.8
(a) -3 A (b) 3 V (c) 15 W
PMcL Answers Index
2015 Answers
A.2
1.9
-30 W
1.10
Pvx 68.48 W , P50 V 168.9 W , P0.2vx 13.70 W , P10 114.1 W
1.11
(a) -20 V, -20 mA, 50 mA (b) 26 23 V , 26 23 mA , 3 13 mA
1.12
(a) 6 23 V , 3 13 A , 66 23 W (b) 20 V, 10 A, 200 W
1.13
(a) 8 (b) 3.7
1.14
(a) 2.5 A (b) 4 V
1.15
R1 R3 R2 R3
v3 is i1 is
R1 R2 R3 R1 R2 R3
1.16
5.5 V, 3.975 A
1.17
(a) 30 W (b) -2 A
1.18
(a) 0 V, 1 mA, 1 mA, -10 V, -10 mA, -11 mA
Answers 2015
A.3
1.19
R2
(c) (b) R1 (c) same results, thanks to the VSC
R1
1.20
R1 can be any non-zero value, R2 200
1.21
(a) R (b) 0
1.22
R R1
(a) R1 1 1 R3 (b) 0 (c) 1
R2 R2
1.23
R Ri
(a) 1 2 Ri (b) Ri (c)
R1 R1
2015 Answers
A.4
2.1
(a) -33 (b) 17, -34, -11
2.2
2A
2.3
25.64 W
2.4
(a) 6 A (b) 3 A
2.5
-3.5 mA
2.6
20 mA, -80 mW
Answers 2015
A.5
3.1
80 W
3.2
4A
3.3
(a) 150 V (b) 110 V
3.4
(a) 15 A, 2 (b) 2 (c) 112.5 W
3.5
381 mW
3.6
8 9
2015 Answers
A.6
3.7
R2 I S
(a) i A
rm R2
(b) It is indeterminant – iA A . For this special case you can show that
KVL is violated – the circuit becomes:
- rm IS iA
A large but finite current i A would result – either briefly (before a fuse
blows or a protection device trips), or continuously (limited by the power
supply’s output current and voltage capability).
Answers 2015
A.7
4.1
25 nF
10 k
vi
vo
4.2
100 k
1 M
100 k
v1 1 M
vo
100 k
v2
4.3
vo v1 v2 2v3
4.4
10 k
10 k
1 k
vi vi 10 mV when the source is attached
4.5
vi
io
R
2015 Answers
A.8
5.1
(a) 20.6 ms (b) 177.7 ms
5.2
5.3
(a) 9.6 V, 192 mW, 1.152 mJ (b) 16 V, 0 W, 3.20 mJ
5.4
(a) 2 nF (b) 2.4 nF
5.5
12 12
(a) μF (b) μF (c) 9 μF
7 11
5.6
(a) 60 cos 10t V (b) 5 2 sin 10t A
5.7
5.8
Use v1 , v 2 , vC left to right.
v1 vC 3v1
v1 vC v2 dv
10 v1 v2 dt 0.5 0.8e 100t
t
2 10 4 C 0
0 20 50 dt
v2 vC
10 v2 v1 dt 0.5 0.8e 100t
t
0
0 50
Answers 2015
A.9
7.1
100 , 2 μF
7.2
(b) 50 mC (b) 38.9 mC
7.3
76.10 V
7.4
3et 0.003 mA
7.5
t 122.6 s (over 2 minutes)
7.6
6.75et 40 μA
7.7
153.7 ms
7.8
(a) 9.6 A (b) 2.4 A (c) 9.6e2t A (d) 2.4e4t A (e) 19.2 e4t e2t V
7.9
(a) 28.95 ms (b) 144.3 ms
7.10
(a) 800 mA (b) 280 mA
7.11
10e80t V
7.12
60 4e250t 40e200t mA
2015 Answers
A.10
8.1
+12 V
R4 5.1 k
R1 13 k
LM311
VTH = 5.5 V
2 7
1
R2 vi
2 k
LM311
2 7
vo
VTL = 4.5 V 3
R3 9 k 1
8.2
vo
1
1
vi
8.3
vo
1
1
vi
-5 V 0
Answers 2015
A.11
8.4
vi vo
C
8.5
Full-wave Threshold
Differentiator
rectifier detector
2015 Answers
A.12
9.1
20 1 u t 0.2n V
n
n 0
9.2
50 1 e10t ut V , 20 25e10t ut V
9.3
20 1 e10 t 3 ut V
6
9.4
(a)
100u- t 40 60e6250t ut V
(b) 100 V
9.5
76.28 k , 62.13 F
9.6
10 30e40000t V
9.7
22.31 mA, 9.812 mA
9.8
(a)
0.4 1 e1250t A
(b)
10 23 e100t e1250t A
(c)
0.2 2 cos1250t 45 e1250t A
9.9
40 200e 15000t
ut V
9.10
(a) 0 W (b) 200 W (c) 131.7 W (d) 0 W
Index Answers PMcL
Answers 2015
A.13
10.1
(a) AOL 200799 V/V
(c) R2 500 kΩ
2015 Answers
A.14
11.1
(a) 12.5 ms, 80 Hz, 502.7 rad/s
(c) 66.08
11.2
(a) 8.00 and 38.68 (b) 11.17 ms (c) 89.54 Hz (d) 562.6 rad/s
11.3
412.3 cos500t 116.0 V
11.4
80 cos2000t 36.87 mA
11.5
11.6
(a) 18.83133.5 (b) 5.584 56.87
11.7
15.98 cos1000t 71.23 4.598 cos500t 38.22 V
11.8
(a) 95.79 cost 94.01 mA (b) 25.14 111.6 mA
Answers 2015
A.15
11.9
(a) 143.5 W (b) -135.0 W
11.10
(a) 39.99 W (b) 9.512 W (c) -9.512 W
11.11
(a) 26.00 47.38 mA (b) 0.769237.38 A
11.12
(a) 384.2 and 65.92 Hz (b) 203.8 and 124.3 Hz
11.13
1.25 mH
11.14
125 nF
11.15
1 Ω, 1 H
2015 Answers
A.16
12.1
Answers 2015
A.17
13.1
13.2
(a) 6.468 cos 104 t 44.04 V
(b) 3.234 cos 104 t 44.04 A
13.3
(a) 11.09 cos 104 t 33.69 A
(b) 3.288 cos 104 t 170.5 A
13.4
13.5
6 j17
13.6
1.581 18.43 A
13.7
65.05 and 60.72 , or 112.8 and 13.00
13.8
p R1 4.8 mW , p L 110.9 mW , pC 110.9 mW and p R2 19.2 mW
13.9
(a) P20 10 kW , P10 5 kW (b) P20 3.125 kW , P10 6.25 kW
13.10
6.622 mA
2015 Answers
A.18
13.11
300
(a) 106.1 (b) 61.24 V RMS
2 2
13.12
(a) 4.471 A RMS (b) 0.9150 lagging
13.13
(a) 46.86 kW (b) 33.32 kvar (c) 57.535.41 kVA
13.14
There are two possible solutions:
Answers 2015
A.19
16.1
| T(j ) |
(dB)
0 dB 10 3 10 4 10 5 10 6 10 7 10 8
rad/s (log scale)
-20
-20 dB/decade
-40
-60
16.2
One possible solution is:
100 k
1 F
10 k 10 nF
16.3
One possible solution is:
10 k 10 k 10 k 10 k
vi vo
100 nF 20 nF 100 nF 20 nF
2015 Answers
A.20
17.1
17.2
17.3
(a) 25 (b) 1.28 mJ
17.4
(a) 14
125 H, 1
70 F (b) 3.630 J
17.5
12.89 kV
17.6
200 e5000t e15000t V, t 0
17.7
9.992 kV
17.8
(a) 500 J in L, 80 J in C (b) 335.4 J in L, 62.21 J in C
17.9
20 250 e100t e150t V , 1
24 3e 150t
2e100t A
17.10
(a)
50 253 16e2000t e8000t V, t 0
(b)
2 5 3 4e2000t e8000t A, t 0
17.11
(a) 0 A (b) 1.748 A (c) -1.073 A
Index Answers PMcL
Answers 2015
A.21
19.1
(a) 1000 rads -1 , 5 (b) 120 krads -1 , 60 (c) 602.1 rads -1 , 6.021
19.2
(c) 20 mW, 4 mJ
19.3
115.5 rads -1
19.4
19.5
5 k , 2.360 μH , 4.237 nF
19.6
19.7
19.8
19.9
10 , 514.3 mH, 875 μF
2015 Answers
A.22
20.1
(a) If we analyse the circuit:
R
vo
R1 R2
v i1
R5
v i2 C
2Vi1 2Vi 2 1 1
Vo Vi1 Vi 2
jCR1 jCR5 jCR jCR
Answers 2015
A.23
R5 Q0
R 1
1
vo
2 2
H 1+ H
vi
R1 R2
1
2015 Answers
A.24
20.2
(a) One possible solution is:
100 k
1 nF 1 nF
100 k
50 k
vi 100 k 100 k 500 k
vo
20 k
10 nF 10 nF
20 k
20 k 160 k
20 k
vo
10 nF
vi
20.3
T j
1
1 j 1 Q0
2
20.4
j 2Q0
T j
1 2 j 1 Q0
Answers 2015
A.25
21.1
(a) -10, -40 (b) 16 j12
21.2
(a) 5.754 58.50 mA (b) 7.211 33.69 mA
21.3
(a) 10.00 A (b) -1.995 A (c) -97.01 mA (d) 53.90 mA
21.4
2.508 J
21.5
Zeros: s 3333, ; poles s 2500, 10 000
V()
Is ()
5000
21.6
(a) 100 (b) 12.5 H (c) 689.7 μF
21.7
(a) 53.85 21.80 from zero at s 50 ,
53.85 68.20 from pole at s 20 j30 ,
22.36 26.57 from pole at s 20 j30
2015 Answers
A.26
22.1
R R
(a) vo1 1 1 vi1 1 vi 2
RG RG
R R
vo 2 1 2 vi 2 2 vi1
RG RG
(b) Ad 201
(c) 1.005 V
(d) 200.2
22.2
Ad 10
Answers 2015
A.27
23.1
(a), (b) and (c) -2 and -5
23.2
6 5 4 5 e 25t
2e10t ut A
23.4
(a) 0 (b) 10 s 17.5 (c) 0 (d) Ae 17.5t V
23.5
(a)
I Vs 5 s 2 s 2 2s 5 , s 2, 1 j 2
(b) i f t 1 A
(d)
it 1 e2t et sin2t ut A
23.6
R1 sL R1 I V
(a) 1 s
1
R1 R1 R2 I 2 0
sC
R1
s
(b)
I2
R1 R2 L
Vs R1 R2 1 R1
s 2 s
R1 R2 L R1 R2 C R1 R2 LC
(c) i2 t
3 1000 3t
500
e
e 500t u t
2015 Answers
A.28
24.1
VB
(b) vo R
R1 R2
Answers 2015
A.29
25.1
(a)
1
RF
1
R7
-1 Vout4
R8 - R6
(b) Considering just the output Vout3 , this can be reduced to:
Vin1 -1 -R 3 / R 2 R 4 C1 C5 Vout3
R0 (s + 1/R 1C1 )(s + 1/R 5C5 )
1
RF
(c)
R1 R3 R5 RF
K1
R0 R1 R3 R5 R2 R4 RF
1 1 1
2 R1C1 R5C5
R3 1
0
R2 R4 RF C1C5 R1 R5C1C5
PMcL Answers Index
2015 Answers
A.30
(d)
1 1 1 1 2 1
2 R1C1 R1C1 2 R1C1 R1C1
R3 1 1 R3 1
d 2 2
2 2 2 2
R2 R4 C1 R1 C1 R1 C1 R2 R4C1
Vout3 R3 1
Vout1 R2 R4C5 s 1 R5C5
Then:
s 1 R5C5
Vout1 Vout3 Vout3 R0C1
Vin1 Vin1 Vout1 2 1 1 R3 1
s s
R1C1 R5C5 R2 R4 RF C1C5 R1 R5C1C5
Vout1
1 s K s
Vin1 R0C1 s 2s 0 s 2s 02
2 2 2 2
R6 R
Vout4 Vin1 6 Vout1
R8 R7
R6 R 1 s
Vout4 Vin1 6 Vin1
R8 R7 R0C1 s 2s 02
2
Answers 2015
A.31
s 2 2s 02 s
T3 s 6
R R8
2 2
s 2s 0 R0 R7C1 s 2s 0
2 2
R8
R8 R8
s 2 2 s 02
R0 R7C1 R0 R7C1 s 2 02 2 2
T3 s 2
s 2 2s 02 s 2s 02
j j j
j 0 j 0 j 0
j d j d j d
j 02 2 2
-j 02 2 2
-j d -j d -j d
-j 0 -j 0 -j 0
2015 Answers
Index
A B
admittance Bode plot, 15.14
defined, 11.36 approximate magnitude response,
generalized, 21.11 15.18
approximate phase response, 15.20
amplifier, 1.51 factors, 15.16, 15.21
AC coupled, 14.18
amplitude distortion, 14.21 Boltzmann's constant, 6.4
bandwidth, 14.20
cascaded, 14.5 biquad circuit
circuit model, 1.56 design, 20.8
current, 14.11 frequency response, 20.7
current gain, 14.4 Tow-Thomas, 20.6
DC coupled, 14.18 tuning algorithm, 20.7
definition, 1.51 universal, 20.9
distortionless, 14.25
frequency response, 14.17 block diagram, 23.7, 25.9
half-power frequencies, 14.20 bilinear op-amp circuit, 25.13
harmonic distortion, 14.27 feedback, 25.16
impedances, 14.14 field-controlled DC motor, 25.14
isolation, 22.13 ideal integrator, 25.11
linear waveform distortion, 14.21 noninverting amplifier, 25.18
models, 14.10 summing lossy integrator, 25.12
performance, 14.3
phase distortion, 14.21 breakdown
power gain, 14.4 avalanche, 6.7
power supplies, 1.54 Zener, 6.7
saturation, 1.55
bridge
step response, 14.26
3-wire connection, 24.17
transconductance, 14.12
4-wire sensing, 24.18
transresistance, 14.13
design issues, 24.12
units of gain, 1.52
integrated transducer, 24.19
voltage, 14.10
linearizing, 24.14, 24.15
voltage gain, 14.4
output using an in-amp, 24.13
astable multivibrator, 18.6 resistance, 24.9
Wheatstone, 24.9
attenuation
defined, 15.4 bridge circuit, 24.8
bridges
driving remotely, 24.16
buffer, 1.76
PMcL
2015
C complex power, 13.29
2015
p-n junction, 6.3 definition, 3.4
reverse-bias region, 6.6 damped sinusoidal, 21.7
Schottky, 6.9
symbol, 6.7 Fourier, 11.3
varactor, 6.9
frequency-domain
diode circuits impedance, 21.12
full-wave rectifier, 6.27 representation, 11.19
half-wave rectifier, 6.25
limiter circuits, 6.28 frequency response
as a function of , 21.14
diode model as a function of , 21.18
constant voltage drop, 6.17 bilinear, 16.3, 16.11
ideal, 6.15 bilinear magnitude response, 16.5
piece-wise linear, 6.19 bilinear phase response, 16.7
small signal, 6.21 experimentally, 15.13
from a pole-zero plot, 21.29
diodes from circuit analysis, 15.5
breakdown, 6.7 function, 15.3
in decibels, 15.4
duality, 5.37 representation, 15.4
second-order, 19.38
E second-order lowpass, 19.25
standard form of second-order,
Earth, 2.5 20.4, 20.5
PMcL
2015
I K
impedance, 11.31 Kirchhoff’s Current Law, 1.21
circuit symbol, 11.32
defined, 11.32 Kirchhoff’s Voltage Law, 1.25
generalized, 21.11
polar form, 11.33 L
rectangular form, 11.34
level detector, 8.5
in-amp, 22.7
advantages, 22.8 limiter, 8.23
application, 22.10 double limiter, 8.23
disadvantages, 22.9
gain, 22.8 linearity, 3.3
PMcL
2015
N input bias currents, 10.6
offset voltage, 10.5
natural response, 9.11, 9.17, 21.20, output current limits, 10.15
21.22 output voltage saturation, 10.14
percent gain error, 10.12
negative feedback, 1.63 slew rate, 10.16
amplifier, 1.65
open-circuit, 1.14
negative impedance converter, 4.12
operating point, 25.5, 25.6
nodal analysis, 2.4
circuits with dependent sources, OrCAD
2.15 AC simulation, 12.12
circuits with resistors and drawing the schematic, 12.5
independent current sources only, ground, 12.6
2.7 labeling nodes, 12.8
circuits with voltage sources, 2.13 schematic capture, 12.6
methodology, 2.4 SI unit prefixes, 12.7
using branch element stamps, 2.10 simulation, 12.5, 12.9
with capacitors, 5.35 starting a new project, 12.4
with inductors, 5.35 transient simulation, 12.9
PMcL
2015
phase response, 15.11 programmable automation controller
defined, 15.3 (PAC), 24.7
lowpass second-order, 19.26
programmable gain amplifier (PGA),
phasor 22.11
analysis, 11.30
defined, 11.18 programmable logic controller (PLC),
diagrams, 13.14 24.5
formal relationship, 11.21
graphical illustration, 11.22 Q
mesh analysis, 13.7
nodal analysis, 13.5 quality factor, 19.9
Norton’s theorem, 13.12
relationship for a capacitor, 11.27
relationship for a resistor, 11.23 R
relationship for an inductor, 11.25
RC circuit
relationships, 11.23
driven, 9.7
representation, 11.19, 11.20, 11.22
energy, 7.15
RMS value, 13.27
natural response, 7.13
summary of relationships, 11.29
power, 7.15
superposition, 13.9
single time constant, 7.19
Thévenin’s theorem, 13.10
step-response, 9.19
transform, 11.20
time constant, 7.17
transform method, 13.4
RC circuits
pole, 21.16
analysis procedure, 9.29
pole-zero plot, 21.25, 21.27, 23.4
RL circuit
power, 1.44 natural response, 7.21
absorbed in a resistor, 1.50 single time constant, 7.24
apparent, 13.28 time constant, 7.23
average, 13.23
RL circuits
average (using RMS values), 13.28
analysis procedure, 9.32
complex, 13.29
complete response, 9.30
definition, 1.44
instantaneous, 13.22 reactance, 11.34
reactive, 13.30
sinusoidal steady-state, 13.22 rectifier
precision, 8.7
power factor precision full-wave, 8.15
defined, 13.28 precision inverting half-wave, 8.10
single-supply half-wave and full-
power supplies, 14.8
wave, 8.17
efficiency, 14.9
superdiode, 8.8
practical source
reference node, 2.5
equivalence, 3.14
PMcL
2015
sensor, 24.3
resistance high impedance, 24.22
internal, 3.11 temperature, 24.23
output, 3.11
sensors, 24.3
resistor, 1.10
circuit symbol, 1.11 series RLC circuit
defined, 1.10 complete response, 17.28
critically damped, 17.34
resistors, 1.15 forced response, 17.29
combining, 1.28 natural response, 17.30
'E’ Series, 1.16 overdamped, 17.32
in parallel, 1.29 peak time, 17.38
in series, 1.28 quality factor, 19.17
marking codes, 1.18 resonance, 19.17
practical, 1.15 source-free, 17.27
preferred values, 1.16 underdamped, 17.35
PMcL
2015
T U
thermal voltage, 6.4 undamped natural frequency, 17.13
Tow-Thomas, 20.6 V
Z
zero, 21.16
PMcL
2015