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    Appendix - Equations v3

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    ALEN chia
    The document contains formulas for analyzing different transistor configurations including: 1) BJT configurations such as fixed bias, voltage divider bias, unbypassed emitter bias, and collector feedback. 2) JFET/MOSFET configurations such as fixed bias, self-bias with/without bypassed RS, voltage divider bias, and common gate. 3) For each configuration, the formulas given relate to DC bias conditions, input and output impedances, and voltage or current gain.

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    © All Rights Reserved
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    Appendix - Equations v3

    Uploaded by

    ALEN chia
    21 views4 pages
    The document contains formulas for analyzing different transistor configurations including: 1) BJT configurations such as fixed bias, voltage divider bias, unbypassed emitter bias, and collector feedback. 2) JFET/MOSFET configurations such as fixed bias, self-bias with/without bypassed RS, voltage divider bias, and common gate. 3) For each configuration, the formulas given relate to DC bias conditions, input and output impedances, and voltage or current gain.

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    appendix_equations v3

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    The document contains formulas for analyzing different transistor configurations including: 1) BJT configurations such as fixed bias, voltage divider bias, unbypassed emitter bias, and collector feedback. 2) JFET/MOSFET configurations such as fixed bias, self-bias with/without bypassed RS, voltage divider bias, and common gate. 3) For each configuration, the formulas given relate to DC bias conditions, input and output impedances, and voltage or current gain.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    21 views4 pages

    Appendix - Equations v3

    Uploaded by

    ALEN chia
    The document contains formulas for analyzing different transistor configurations including: 1) BJT configurations such as fixed bias, voltage divider bias, unbypassed emitter bias, and collector feedback. 2) JFET/MOSFET configurations such as fixed bias, self-bias with/without bypassed RS, voltage divider bias, and common gate. 3) For each configuration, the formulas given relate to DC bias conditions, input and output impedances, and voltage or current gain.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 4

    NOORFAZILA KAMAL (JKEES) KL2173 ELEKTRONIK ANALOG

    FORMULA

    BJT Configuration DC bias Zi Zo Av

    Fixed-bias:
    𝑉𝐶𝐶 − 𝑉𝐵𝐸 𝑅𝐶 ∥ 𝑟𝑜
    𝐼𝐵 = ; =− ;
    𝑅𝐵 = 𝑅𝐵 ∥ 𝛽𝑟𝑒 ; = 𝑅𝐶 ∥ 𝑟𝑜 ; 𝑟𝑒
    ≅ 𝛽𝑟𝑒 ≅ 𝑅𝐶 𝑅𝐶
    𝐼𝐶 = 𝛽𝐼𝐵 ; ≅ −
    𝐼𝐸 = (𝛽 + 1)𝐼𝐵 ; |(𝑅𝑏 ≥10𝛽𝑟𝑒 ) ; 𝑟𝑒
    |(𝑟𝑜≥10𝑅𝐶 ) ;
    𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 ; |(𝑟𝑜 ≥10𝑅𝐶 ) ;

    Voltage-divider bias:
    Approximate analysis: (𝛽𝑅𝐸 ≥
    10𝑅2 ) 𝑅𝐶 ∥ 𝑟𝑜
    𝑅2 =− ;
    = 𝑅𝐶 ∥ 𝑟𝑜 ; 𝑟𝑒
    𝑉𝐵 = 𝑉 ; 𝑅𝐶
    𝑅1 +𝑅2 𝐶𝐶 = 𝑅1 ∥ 𝑅2 ∥ 𝛽𝑟𝑒 ; ≅ 𝑅𝐶
    ≅ −
    𝑉𝐸 = 𝑉𝐵 − 𝑉𝐵𝐸 ; 𝑟𝑒
    𝑉𝐸 |(𝑟𝑜 ≥10𝑅𝐶 ) ;
    𝐼𝐸 = ; |(𝑟𝑜≥10𝑅𝐶 ) ;
    𝑅𝐸
    𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 );

    Unbypassed emitter
    bias:
    𝑉𝐶𝐶 − 𝑉𝐵𝐸 𝑅𝐶
    𝐼𝐵 = ; =− ;
    𝑅𝐵 + (𝛽 + 1)𝑅𝐸 = 𝑅𝐵 ∥ 𝛽(𝑟𝑒 + 𝑅𝐸 ); 𝑟𝑒 + 𝑅𝐸
    = 𝑅𝐶 ; 𝑅𝐶
    𝐼𝐶 = 𝛽𝐼𝐵 ; ≅ 𝑅𝐵 ∥ 𝛽𝑅𝐸
    ≅ −
    𝐼𝐸 = (𝛽 + 1)𝐼𝐵 ; |(𝑅𝐸 ≫𝑟𝑒 ) ; 𝑅𝐸
    𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ); .(𝑅𝐸 ≫𝑟𝑒 ) ;

    Collector feedback:
    𝑉𝐶𝐶 − 𝑉𝐵𝐸 𝑅𝐹 𝑅𝐶
    𝑟𝑒 ≅ −( ) ;
    𝐼𝐵 = ; = 𝑅𝐶 + 𝑅𝐹 𝑟𝑒
    𝑅𝐹 + 𝛽(𝑅𝐶 + 𝑅𝐸 ) 1 𝑅𝐶 = 𝑅𝐶 ∥ 𝑅𝐹 𝑅𝐶
    𝐼𝐶 = 𝛽𝐼𝐵 ; 𝛽 + 𝑅𝐶 + 𝑅𝐹 ≅−
    𝐼𝐸 = (𝛽 + 1)𝐼𝐵 ; |(𝑟𝑜 ≥10𝑅𝐶 ) ; 𝑟𝑒
    |(𝑟𝑜 ≥10𝑅𝐶 ) ;
    𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ); |(𝑟𝑜 ≥10𝑅𝐶 ),(𝑅𝐹 ≫𝑅𝐶 );

    Emitter follower:
    𝑉𝐶𝐶 − 𝑉𝐵𝐸
    𝐼𝐵 = ; = 𝑅𝐵 ∥ 𝛽(𝑟𝑒 + 𝑅𝐸 ); = 𝑅𝐸 ∥ 𝑟𝑒 ; 𝑅𝐸
    𝑅𝐵 + (𝛽 + 1)𝑅𝐸
    ≅ 𝑅𝐵 ∥ 𝛽𝑅𝐸 ≅ 𝑟𝑒 = ;
    𝐼𝐶 = 𝛽𝐼𝐵 ; 𝑟𝑒 + 𝑅𝐸
    𝐼𝐸 = (𝛽 + 1)𝐼𝐵 ; |(𝑅𝐸 ≫𝑟𝑒 ) ; |(𝑅𝐸 ≫𝑟𝑒 ) ; ≅ 1
    𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸 ;

    Common base: 𝑉𝐸𝐸 − 𝑉𝐵𝐸


    𝐼𝐸 = ;
    𝑅𝐸
    𝐼𝐶 = 𝛽𝐼𝐵 ; = 𝑅𝐸 ∥ 𝑟𝑒 ;
    ≅ 𝑟𝑒 𝑅𝐶
    𝐼𝐸 = 𝑅𝐶 ≅ ;
    𝐼𝐵 = ; 𝑟𝑒
    (𝛽 + 1) |(𝑅𝐸 ≫𝑟𝑒 ) ;
    𝑉𝐶𝐸 = 𝑉𝐸𝐸 + 𝑉𝐶𝐶 − 𝐼𝐸 (𝑅𝐶 + 𝑅𝐸 );
    𝑉𝐶𝐵 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 ;
    NOORFAZILA KAMAL (JKEES) KL2173 ELEKTRONIK ANALOG

    JFET / D-MOSFET
    DC bias Zi Zo Av
    Configuration

    Fixed bias:

    = 𝑅𝐷 ∥ 𝑟𝑑 ; = −𝑔𝑚 (𝑟𝑑 ∥ 𝑅𝐷 );
    𝑉𝐺𝑆 = −𝑉𝐺𝐺 ; ≅ 𝑅𝐷 ≅ −𝑔𝑚 𝑅𝐷
    = 𝑅𝐺 ;
    𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 𝑅𝐷 ;
    |(𝑟𝑑≥10𝑅𝐷) ; |(𝑟𝑑≥10𝑅𝐷) ;

    Self-bias bypassed RS:

    = 𝑅𝐷 ∥ 𝑟𝑑 ; = −𝑔𝑚 (𝑟𝑑 ∥ 𝑅𝐷 );
    𝑉𝐺𝑆 = −𝐼𝐷 𝑅𝑆 ; ≅ 𝑅𝐷 ≅ −𝑔𝑚 𝑅𝐷
    = 𝑅𝐺 ;
    𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 (𝑅𝐷 + 𝑅𝑆 );
    |(𝑟𝑑≥10𝑅𝐷) ; |(𝑟𝑑 ≥10𝑅𝐷) ;

    Self-bias unbypassed
    RS: − 𝑔𝑚 𝑅𝐷
    𝑅𝑠 = ;
    [1 + 𝑔𝑚 𝑅𝑠 + ]𝑅 𝑅 + 𝑅𝐷
    𝑟𝑑 𝐷 [1 + 𝑔𝑚 𝑅𝑠 + 𝑠 ]
    = 𝑟𝑑
    𝑅𝑠 𝑅𝐷
    𝑉𝐺𝑆 = −𝐼𝐷 𝑅𝑆 ; [1 + 𝑔𝑚 𝑅𝑠 + + ]
    𝑟𝑑 𝑟𝑑 𝑔𝑚 𝑅𝐷
    = 𝑅𝐺 ; ≅−
    𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 (𝑅𝐷 + 𝑅𝑆 ); ≅ 𝑅𝐷 1 + 𝑔𝑚 𝑅𝑠
    |(𝑟𝑑≥10𝑅𝐷) ; |(𝑟𝑑 ≥10(𝑅𝐷+𝑅𝑆 ) ;

    Voltage-divider bias:

    𝑅2 = −𝑔𝑚 (𝑟𝑑 ∥ 𝑅𝐷 );
    𝑉𝐺 = 𝑉 ; = 𝑅𝐷 ∥ 𝑟𝑑 ; ≅ −𝑔𝑚 𝑅𝐷
    𝑅1 +𝑅2 𝐷𝐷 = 𝑅1 ∥ 𝑅2 ; ≅ 𝑅𝐷
    𝑉𝐺𝑆 = 𝑉𝐺 − 𝐼𝐷 𝑅𝑆 ; |(𝑟𝑑 ≥10𝑅𝐷) ;
    𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 (𝑅𝐷 + 𝑅𝑆 ); |(𝑟𝑑≥10𝑅𝐷) ;

    Common gate:
    = 𝑅𝑆 𝑅
    𝑟𝑑 + 𝑅𝐷 𝑔𝑚 𝑅𝐷 + 𝑟𝐷
    𝑑
    ∥[ ]; = 𝑅𝐷 ∥ 𝑟𝑑 ; = ;
    1 + 𝑔𝑚 𝑟𝑑 𝑅𝐷
    𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 (𝑅𝐷 + 𝑅𝑆 ); ≅ 𝑅𝐷 1+ 𝑟
    1 𝑑
    ≅ 𝑅𝑆 ∥ ≅ 𝑔𝑚 𝑅𝐷
    𝑔𝑚 |(𝑟𝑑≥10𝑅𝐷) ;
    |(𝑟𝑑 ≥10𝑅𝐷) ; |(𝑟𝑑≥10𝑅𝐷) ;

    Source follower:
    1 𝑔𝑚 (𝑟𝑑 ∥ 𝑅𝑆 )
    = 𝑟𝑑 ∥ 𝑅𝑆 ∥ ; = ;
    𝑉𝐺𝑆 = −𝐼𝐷 𝑅𝑆 ; 𝑔𝑚 1 + 𝑔𝑚 (𝑟𝑑 ∥ 𝑅𝑆 )
    𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 𝑅𝑆 ; 1 𝑔𝑚 𝑅𝑆
    = 𝑅𝐺 ; ≅ 𝑅𝑆 ∥ ≅
    𝑔𝑚 1 + 𝑔𝑚 𝑅𝑆
    |(𝑟𝑑≥10𝑅𝑆 ) ; |(𝑟𝑑 ≥10𝑅𝑆 ) ;
    NOORFAZILA KAMAL (JKEES) KL2173 ELEKTRONIK ANALOG

    FORMULA

    BJT:
    26𝑚𝑉
    𝑟𝑒 = ;
    𝐼𝐸
    𝑉𝐵𝐸 = 0.7;

    JFET and D-MOSFET:


    𝑉𝐺𝑆 2 1 ∆𝑉𝐷𝑆
    𝐼𝐺 = 0; 𝐼𝐷 = 𝐼𝑆 ; 𝐼𝐷 = 𝐼𝐷𝑆𝑆 (1 − ) ; 𝑟𝑑 = = | ;
    𝑉𝑃 𝑔𝑜𝑠 ∆𝐼𝐷 𝑉𝐺𝑆 =𝑐𝑜𝑛𝑠𝑡𝑎𝑛𝑡
    𝑟𝑜 𝑉𝐺𝑆 2𝐼𝐷𝑆𝑆
    𝑟𝑑 = ; 𝑔𝑚 = 𝑔𝑚0 [1 − ]; 𝑔𝑚0 = ;
    (1 − 𝑉𝐺𝑆 ⁄𝑉𝑃 )2 𝑉𝑃 |𝑉𝑃 |

    E-MOSFET:
    𝐼𝐺 = 0; 𝐼𝐷 = 𝐼𝑆 ; 𝐼𝐷 = 𝑘(𝑉𝐺𝑆 − 𝑉𝑇 )2

    𝐼𝐷(𝑜𝑛) 1 ∆𝑉𝐷𝑆
    𝑘= 2; 𝑔𝑚 = 2𝑘(𝑉𝐺𝑆𝑄 − 𝑉𝑇 ); 𝑟𝑑 = = |
    (𝑉𝐺𝑆(𝑜𝑛) − 𝑉𝑇 ) 𝑔𝑜𝑠 ∆𝐼𝐷 𝑉𝐺𝑆=𝑐𝑜𝑛𝑠𝑡𝑎𝑛𝑡

    NOORFAZILA KAMAL (JKEES) KL2173 ELEKTRONIK ANALOG

    FORMULA

    BJT:
    26𝑚𝑉
    𝑟𝑒 = ;
    𝐼𝐸
    𝑉𝐵𝐸 = 0.7;

    JFET and D-MOSFET:


    𝑉𝐺𝑆 2 1 ∆𝑉𝐷𝑆
    𝐼𝐺 = 0; 𝐼𝐷 = 𝐼𝑆 ; 𝐼𝐷 = 𝐼𝐷𝑆𝑆 (1 − ) ; 𝑟𝑑 = = | ;
    𝑉𝑃 𝑔𝑜𝑠 ∆𝐼𝐷 𝑉𝐺𝑆 =𝑐𝑜𝑛𝑠𝑡𝑎𝑛𝑡
    𝑟𝑜 𝑉𝐺𝑆 2𝐼𝐷𝑆𝑆
    𝑟𝑑 = ; 𝑔𝑚 = 𝑔𝑚0 [1 − ]; 𝑔𝑚0 = ;
    (1 − 𝑉𝐺𝑆 ⁄𝑉𝑃 )2 𝑉𝑃 |𝑉𝑃 |

    E-MOSFET:
    𝐼𝐺 = 0; 𝐼𝐷 = 𝐼𝑆 ; 𝐼𝐷 = 𝑘(𝑉𝐺𝑆 − 𝑉𝑇 )2 ;

    𝐼𝐷(𝑜𝑛) 1 ∆𝑉𝐷𝑆
    𝑘= 2 ; 𝑔𝑚 = 2𝑘(𝑉𝐺𝑆𝑄 − 𝑉𝑇 ); 𝑟𝑑 = = |
    (𝑉𝐺𝑆(𝑜𝑛) − 𝑉𝑇 ) 𝑔𝑜𝑠 ∆𝐼𝐷 𝑉𝐺𝑆=𝑐𝑜𝑛𝑠𝑡𝑎𝑛𝑡
    NOORFAZILA KAMAL (JKEES) KL2173 ELEKTRONIK ANALOG

    FORMULA

    E-MOSFET
    DC bias Zi Zo Av
    Configuration

    Drain feedback bias:


    𝑅𝐹 + 𝑟𝑑 ∥ 𝑅𝐷
    = ;
    1 + 𝑔𝑚 (𝑟𝑑 ∥ 𝑅𝐷 ) = 𝑅𝐹 ∥ 𝑟𝑑 ∥ 𝑅𝐷 ; = −𝑔𝑚 (𝑅𝐹 ∥ 𝑟𝑑 ∥ 𝑅𝐷 );
    𝑉𝐷𝑆 = 𝑉𝐺𝑆 ; 𝑅𝐹 ≅ 𝑅𝐷 ≅ −𝑔𝑚 𝑅𝐷
    𝑉𝐺𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 𝑅𝐷 ; ≅
    1 + 𝑔𝑚 𝑅𝐷 |(𝑅𝐹 ≫𝑟𝑑 ∥𝑅𝐷,𝑟𝑑 ≥10𝑅𝐷) ; |(𝑅𝐹 ≫𝑟𝑑∥𝑅𝐷, 𝑟𝑑 ≥10𝑅𝐷) ;
    |(𝑅𝐹 ≫𝑟𝑑 ∥𝑅𝐷, 𝑟𝑑≥10𝑅𝐷) ;

    Voltage-divider bias:

    𝑅2 = 𝑅𝐷 ∥ 𝑟𝑑 ; = −𝑔𝑚 (𝑟𝑑 ∥ 𝑅𝐷 );
    𝑉𝐺 = 𝑉 ;
    𝑅1 +𝑅2 𝐷𝐷 ≅ 𝑅𝐷 ≅ −𝑔𝑚 𝑅𝐷
    = 𝑅1 ∥ 𝑅2 ;
    𝑉𝐺𝑆 = 𝑉𝐺 − 𝐼𝐷 𝑅𝑆 ;
    𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 (𝑅𝐷 + 𝑅𝑆 ); |(𝑟𝑑 ≥10𝑅𝐷) ; |(𝑟𝑑≥10𝑅𝐷) ;

    NOORFAZILA KAMAL (JKEES) KL2173 ELEKTRONIK ANALOG


    FORMULA

    E-MOSFET
    DC bias Zi Zo Av
    Configuration

    Drain feedback bias:


    𝑅𝐹 + 𝑟𝑑 ∥ 𝑅𝐷
    = ;
    1 + 𝑔𝑚 (𝑟𝑑 ∥ 𝑅𝐷 ) = 𝑅𝐹 ∥ 𝑟𝑑 ∥ 𝑅𝐷 ; = −𝑔𝑚 (𝑅𝐹 ∥ 𝑟𝑑 ∥ 𝑅𝐷 );
    𝑉𝐷𝑆 = 𝑉𝐺𝑆 ; 𝑅𝐹 ≅ 𝑅𝐷 ≅ −𝑔𝑚 𝑅𝐷
    𝑉𝐺𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 𝑅𝐷 ; ≅
    1 + 𝑔𝑚 𝑅𝐷 |(𝑅𝐹 ≫𝑟𝑑 ∥𝑅𝐷,𝑟𝑑 ≥10𝑅𝐷) ; |(𝑅𝐹 ≫𝑟𝑑∥𝑅𝐷, 𝑟𝑑 ≥10𝑅𝐷) ;
    |(𝑅𝐹 ≫𝑟𝑑 ∥𝑅𝐷, 𝑟𝑑≥10𝑅𝐷) ;

    Voltage-divider bias:

    𝑅2 = 𝑅𝐷 ∥ 𝑟𝑑 ; = −𝑔𝑚 (𝑟𝑑 ∥ 𝑅𝐷 );
    𝑉𝐺 = 𝑉 ;
    𝑅1 +𝑅2 𝐷𝐷 ≅ 𝑅𝐷 ≅ −𝑔𝑚 𝑅𝐷
    = 𝑅1 ∥ 𝑅2 ;
    𝑉𝐺𝑆 = 𝑉𝐺 − 𝐼𝐷 𝑅𝑆 ;
    𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 (𝑅𝐷 + 𝑅𝑆 ); |(𝑟𝑑 ≥10𝑅𝐷) ; |(𝑟𝑑≥10𝑅𝐷) ;

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