Lecture 3: Boolean Algebra: CS-216: Digital Logic Design
Lecture 3: Boolean Algebra: CS-216: Digital Logic Design
Lecture 3: Boolean Algebra: CS-216: Digital Logic Design
• Problem Definition
• Modeling and Analysis
• Design and Implementation
• Realization
Engineering Problem
• Let’s arrange a party on Thursday
• Divide it into simpler binary “true” or “false” level propositions
– Homework due on Friday
• GS211 = a
• ET212 = b
• MT213 = c
• MT214 = d
• CS215 = e
• CS216 = f
– Classes on Thursday
• GS211 = u
• ET212 = v
• MT213 = w
• MT214 = x
• CS215 = y
• CS216 = z
– Party on Thursday = q
• Boolean expression representing party actually taking place on Thursday
q = (a + b + c + d + e + f)’ • (u + v + w + x + y + z)’
Engineering Problem (cont.)
• University rules changed, and only three courses offered in third semester: Homework
on Friday for GS211 = a, ET212 = b, MT213 = c. Classes on Thurdsay doesn’t matter,
because no matter what, classes will finish before the evening. Furthermore, you can
complete assignment for one subject, but not more after the party.
a b c q
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 0
q = a’b’c’ + a’b’c + a’bc’ + ab’c’ (from sum of products method)
OR q = (a+b’+c’)(a’+b+c’)(a’+b’+c)(a’+b’+c’) (from product of sums method)
Engineering Problem (cont.)
Simplification:
q = a’b’c’ + a’b’c + a’bc’ + ab’c’
= a’b’(c’ + c) + c’(a’b + ab’)
= a’b’ + c’((a+b’)(a’+b))’
= a’b’ + c’(aa’+ab+b’a’+b’b)’
= a’b’ + c’(ab + a’b’)’
= (a+b)’ + (c + (a’b’+ab))’
= ((a+b)(c+(a’b’+ab))’
= ((ac+bc)+(aa’b’+aab+a’bb’+abb))’
= ((ac+bc)+(ab+ab))’
= (ac+bc+ab)’
Engineering Problem (cont.)
Simplification using K-Maps:
Engineering Problem (cont.)
Implementation using Logic Gates:
Summary Engineering Problem Discussion
• Define the problem:
– Identifying all inputs and output(s).
– Simplify until the problem is represented by True/False propositions,
and the inputs and output(s) also take up True/False (or 1/0) values.
• Write down the truth table for the problem.
• Determine Boolean expression for the problem using the truth
table.
• Minimize the Boolean expression using Boolean Algebra
OR
Minimize using K-maps technique
• Implement using Logic gates
• Realize using discrete components, or CPLD/FPGA, or ASIC (for large
scale production)
Definitions
• Elements; B = { 0, 1 }
• Operators:
– Binary operators
• AND: Symbol for two elements a and b: a • b
• OR: Symbol for two elements a and b: a + b
– Unary operator
• NOT: Symbol for a generic element a: a’ or ā
• Postulates: Huntington Postulates (defined in pairs to
represent “duality”
NOTES:
(i) Paranthesis are used to define the order in which the operators are applied.
(ii) No subtraction or division operations defined in Boolean Algebra.
(iii) Just like Multiplication in ordinary Algebra, while writing Boolean expressions, •
is not written, i.e. ( a • b ) is written as (ab).
(iv) Operator precedence: Paranthesis, NOT, AND and OR.
Huntington’s Postulates
Postulate 1: Closure
∀ x, y ∈ B, ∃! z1 ∈ B, such that
a. x • y = z1
Similarly, ∀ x, y ∈ B, ∃! z2 ∈ B, such that
b. x + y = z2
Postulate 6
There exist at least two values x, y ∈ B, such that x ≠ y.
F1 = Π(0,1,2,3,7)
= (a+b+c)(a+b+c’)(a+b’+c)
(a+b’+c’)(a’+b’+c’)
Problem Session
Evaluate Boolean expression for F1 for the
following table, and simplify it.
F1 = a’b’c’+ab’c’+ab’c
+abc’+abc
F1 = (a+b+c’)(a+b’+c)(a+b’+c’)
Additional Gates
In addition to the three basic gates (or Boolean operations),
the following derived Boolean gates are commonly used.
Consider this a free grade, since the solutions are provided in Morris
and Mano Book.
Homework Assignment
From the Morris/Mano text book, solve the following problems:
i. Simplify Boolean expressions given in 2.2(c), 2.2(f) using Boolean
theorems and postulates; Implement the derived expressions
using logic gate diagrams.
ii. 2.15; Draw logic gate diagram for T1 and T2.
iii. Write down Boolean expression for the following logic circuit, and
minimize the expressions for y1 and y2: